mirror of
https://github.com/holub/mame
synced 2025-07-01 16:19:38 +03:00
wildpkr, tabpkr: Work out several device hookups (nw)
The use of a DS2401 "ID" in tabpkr is inferred from the code. The data supplied for it is totally artificial, and the chip may have been stripped from the PCB pictured on citylan.it. Much still needs to be learned about the HW of these games. The emulation doesn't display even error codes yet.
This commit is contained in:
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e855ebcd54
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@ -276,6 +276,7 @@ public: \
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DAC_GENERATOR_EPILOG(_dac_type, _dac_class)
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DAC_GENERATOR_EPILOG(_dac_type, _dac_class)
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// DAC chips
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// DAC chips
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DAC_GENERATOR(AD557, ad557_device, dac_byte_interface, dac_code_binary<8>, dac_gain_r2r, "AD557", "ad557")
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DAC_GENERATOR(AD7224, ad7224_device, dac_byte_interface, dac_code_binary<8>, dac_gain_r2r, "AD7224", "ad7224")
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DAC_GENERATOR(AD7224, ad7224_device, dac_byte_interface, dac_code_binary<8>, dac_gain_r2r, "AD7224", "ad7224")
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DAC_GENERATOR(AD7521, ad7521_device, dac_word_interface, dac_code_binary<12>, dac_gain_r2r, "AD7521", "ad7521")
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DAC_GENERATOR(AD7521, ad7521_device, dac_word_interface, dac_code_binary<12>, dac_gain_r2r, "AD7521", "ad7521")
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DAC_GENERATOR(AD7524, ad7524_device, dac_byte_interface, dac_code_binary<8>, dac_gain_r2r, "AD7524", "ad7524")
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DAC_GENERATOR(AD7524, ad7524_device, dac_byte_interface, dac_code_binary<8>, dac_gain_r2r, "AD7524", "ad7524")
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@ -158,8 +158,14 @@
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#include "emu.h"
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#include "emu.h"
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#include "cpu/m68000/m68000.h"
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#include "cpu/m68000/m68000.h"
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#include "machine/clock.h"
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#include "machine/ds2401.h"
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#include "machine/mc68681.h"
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#include "machine/nvram.h"
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#include "sound/ay8910.h"
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#include "sound/ay8910.h"
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//#include "video/hd63484.h"
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#include "sound/dac.h"
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#include "sound/volt_reg.h"
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#include "video/hd63484.h"
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#include "video/ramdac.h"
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#include "video/ramdac.h"
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#include "screen.h"
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#include "screen.h"
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#include "speaker.h"
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#include "speaker.h"
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@ -167,7 +173,7 @@
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#define MAIN_CLOCK XTAL_12MHz
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#define MAIN_CLOCK XTAL_12MHz
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#define AY_CLOCK MAIN_CLOCK / 8
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#define AY_CLOCK MAIN_CLOCK / 8
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#define SEC_CLOCK XTAL_3.6864MHz
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#define SEC_CLOCK XTAL_3_6864MHz
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#define AUX1_CLOCK XTAL_26MHz
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#define AUX1_CLOCK XTAL_26MHz
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#define AUX2_CLOCK XTAL_24MHz
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#define AUX2_CLOCK XTAL_24MHz
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@ -177,16 +183,37 @@ class wildpkr_state : public driver_device
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public:
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public:
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wildpkr_state(const machine_config &mconfig, device_type type, const char *tag)
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wildpkr_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu")
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m_maincpu(*this, "maincpu"),
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m_id(*this, "id"),
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m_dac(*this, "dac"),
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m_dac_clock(*this, "dacclock"),
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m_nvram(*this, "nvram")
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{ }
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{ }
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_maincpu;
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optional_device<ds2401_device> m_id;
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optional_device<dac_byte_interface> m_dac;
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optional_device<clock_device> m_dac_clock;
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optional_shared_ptr<u16> m_nvram;
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u16 m_clock_rate;
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DECLARE_DRIVER_INIT(wildpkr);
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DECLARE_DRIVER_INIT(wildpkr);
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virtual void machine_start() override;
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virtual void machine_start() override;
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virtual void video_start() override;
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virtual void video_start() override;
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DECLARE_PALETTE_INIT(wildpkr);
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DECLARE_PALETTE_INIT(wildpkr);
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uint32_t screen_update_wildpkr(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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DECLARE_READ8_MEMBER(unknown_read8);
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DECLARE_WRITE8_MEMBER(unknown_write8);
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DECLARE_WRITE16_MEMBER(nvram_w);
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DECLARE_READ16_MEMBER(id_serial_r);
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DECLARE_WRITE16_MEMBER(id_serial_w);
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DECLARE_WRITE16_MEMBER(out0_w);
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DECLARE_WRITE16_MEMBER(out1_w);
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DECLARE_WRITE8_MEMBER(dac_w);
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DECLARE_WRITE16_MEMBER(clock_start_w);
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DECLARE_WRITE16_MEMBER(clock_rate_w);
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DECLARE_WRITE16_MEMBER(unknown_trigger_w);
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};
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};
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@ -198,11 +225,6 @@ void wildpkr_state::video_start()
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{
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{
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}
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}
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uint32_t wildpkr_state::screen_update_wildpkr(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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return 0;
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}
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PALETTE_INIT_MEMBER(wildpkr_state, wildpkr)
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PALETTE_INIT_MEMBER(wildpkr_state, wildpkr)
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{
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{
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}
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}
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@ -217,6 +239,62 @@ PALETTE_INIT_MEMBER(wildpkr_state, wildpkr)
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* Misc Handlers *
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* Misc Handlers *
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*************************/
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*************************/
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READ8_MEMBER(wildpkr_state::unknown_read8)
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{
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return 0xff;
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}
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WRITE8_MEMBER(wildpkr_state::unknown_write8)
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{
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}
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WRITE16_MEMBER(wildpkr_state::nvram_w)
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{
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m_nvram[offset] = data | 0xff00;
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}
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READ16_MEMBER(wildpkr_state::id_serial_r)
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{
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return m_id->read();
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}
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WRITE16_MEMBER(wildpkr_state::id_serial_w)
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{
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m_id->write(data & 1);
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}
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WRITE16_MEMBER(wildpkr_state::out0_w)
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{
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}
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WRITE16_MEMBER(wildpkr_state::out1_w)
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{
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}
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WRITE8_MEMBER(wildpkr_state::dac_w)
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{
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m_dac->write(space, 0, data);
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m_maincpu->set_input_line(M68K_IRQ_5, CLEAR_LINE);
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}
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WRITE16_MEMBER(wildpkr_state::clock_start_w)
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{
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if (data != 0 && m_clock_rate != 0)
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m_dac_clock->set_clock_scale(1.0 / m_clock_rate);
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else
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m_dac_clock->set_clock_scale(0.0);
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m_maincpu->set_input_line(M68K_IRQ_5, CLEAR_LINE);
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}
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WRITE16_MEMBER(wildpkr_state::clock_rate_w)
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{
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m_clock_rate = data;
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}
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WRITE16_MEMBER(wildpkr_state::unknown_trigger_w)
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{
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}
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/*************************
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/*************************
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* Memory Map *
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* Memory Map *
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@ -224,23 +302,44 @@ PALETTE_INIT_MEMBER(wildpkr_state, wildpkr)
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static ADDRESS_MAP_START( wildpkr_map, AS_PROGRAM, 16, wildpkr_state )
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static ADDRESS_MAP_START( wildpkr_map, AS_PROGRAM, 16, wildpkr_state )
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AM_RANGE(0x000000, 0x0fffff) AM_ROM
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AM_RANGE(0x000000, 0x0fffff) AM_ROM
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AM_RANGE(0x100000, 0x103fff) AM_RAM
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AM_RANGE(0x100000, 0x113fff) AM_RAM
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// AM_RANGE(0x800000, 0x800003) ACRTC?
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AM_RANGE(0x800000, 0x800001) AM_DEVREADWRITE("acrtc", hd63484_device, status_r, address_w)
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AM_RANGE(0x800180, 0x800181) AM_DEVWRITE8("aysnd", ay8930_device, address_w, 0xff00)
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AM_RANGE(0x800002, 0x800003) AM_DEVREADWRITE("acrtc", hd63484_device, data_r, data_w)
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AM_RANGE(0x800180, 0x800181) AM_DEVREADWRITE8("aysnd", ay8930_device, data_r, data_w, 0x00ff)
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AM_RANGE(0x800080, 0x80009f) AM_DEVREADWRITE8("duart", mc68681_device, read, write, 0x00ff)
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AM_RANGE(0x800180, 0x800181) AM_READ8(unknown_read8, 0xff00)
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AM_RANGE(0x800180, 0x800181) AM_WRITE8(unknown_write8, 0x00ff)
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AM_RANGE(0x800200, 0x800201) AM_DEVWRITE8("ramdac", ramdac_device, index_w, 0xff00)
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AM_RANGE(0x800200, 0x800201) AM_DEVWRITE8("ramdac", ramdac_device, index_w, 0xff00)
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AM_RANGE(0x800202, 0x800203) AM_DEVWRITE8("ramdac", ramdac_device, pal_w, 0xff00)
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AM_RANGE(0x800202, 0x800203) AM_DEVWRITE8("ramdac", ramdac_device, pal_w, 0xff00)
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AM_RANGE(0x800204, 0x800205) AM_DEVWRITE8("ramdac", ramdac_device, mask_w, 0xff00)
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AM_RANGE(0x800204, 0x800205) AM_DEVWRITE8("ramdac", ramdac_device, mask_w, 0xff00)
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AM_RANGE(0x800280, 0x800281) AM_DEVWRITE8("aysnd", ay8930_device, data_w, 0xff00)
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AM_RANGE(0x800282, 0x800283) AM_DEVWRITE8("aysnd", ay8930_device, address_w, 0xff00)
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AM_RANGE(0x800284, 0x800285) AM_DEVREAD8("aysnd", ay8930_device, data_r, 0x00ff) // (odd!)
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AM_RANGE(0x800286, 0x800289) AM_WRITENOP
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( tabpkr_map, AS_PROGRAM, 16, wildpkr_state )
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static ADDRESS_MAP_START( tabpkr_map, AS_PROGRAM, 16, wildpkr_state )
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AM_RANGE(0x000000, 0x2fffff) AM_ROM
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AM_RANGE(0x000000, 0x2fffff) AM_ROM
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AM_RANGE(0x300000, 0x303fff) AM_RAM
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AM_RANGE(0x300000, 0x303fff) AM_RAM
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AM_RANGE(0x400000, 0x4007ff) AM_RAM // dallas timekeeper?
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AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(nvram_w) AM_SHARE("nvram")
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AM_RANGE(0x500000, 0x500001) AM_DEVREADWRITE("acrtc", hd63484_device, status_r, address_w)
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AM_RANGE(0x500002, 0x500003) AM_DEVREADWRITE("acrtc", hd63484_device, data_r, data_w)
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AM_RANGE(0x500020, 0x500021) AM_DEVWRITE8("ramdac", ramdac_device, index_w, 0x00ff)
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AM_RANGE(0x500022, 0x500023) AM_DEVWRITE8("ramdac", ramdac_device, pal_w, 0x00ff)
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AM_RANGE(0x500024, 0x500025) AM_DEVWRITE8("ramdac", ramdac_device, mask_w, 0x00ff)
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AM_RANGE(0x500040, 0x50005f) AM_DEVREADWRITE8("duart", mc68681_device, read, write, 0x00ff)
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AM_RANGE(0x500060, 0x500061) AM_READWRITE(id_serial_r, id_serial_w)
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AM_RANGE(0x600000, 0x600001) AM_READ_PORT("IN0") AM_WRITE(out0_w)
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AM_RANGE(0x600002, 0x600003) AM_READ_PORT("IN1") AM_WRITE(out1_w)
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AM_RANGE(0x600004, 0x600005) AM_READ_PORT("IN2")
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AM_RANGE(0x600004, 0x600005) AM_WRITE8(dac_w, 0xff00)
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AM_RANGE(0x700000, 0x700001) AM_WRITE(clock_start_w)
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AM_RANGE(0x700002, 0x700003) AM_WRITE(clock_rate_w)
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AM_RANGE(0x700004, 0x700007) AM_WRITE(unknown_trigger_w)
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AM_RANGE(0x70000a, 0x70000b) AM_WRITENOP // only writes 0 at POST
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ADDRESS_MAP_END
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// AM_RANGE(0x800200, 0x800201) AM_DEVWRITE8("ramdac", ramdac_device, index_w, 0xff00)
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static ADDRESS_MAP_START( hd63484_map, AS_0, 16, wildpkr_state )
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// AM_RANGE(0x800202, 0x800203) AM_DEVWRITE8("ramdac", ramdac_device, pal_w, 0xff00)
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AM_RANGE(0x00000, 0x3ffff) AM_RAM
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// AM_RANGE(0x800204, 0x800205) AM_DEVWRITE8("ramdac", ramdac_device, mask_w, 0xff00)
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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/* Unknown R/W:
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/* Unknown R/W:
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@ -256,6 +355,62 @@ ADDRESS_MAP_END
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static INPUT_PORTS_START( wildpkr )
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static INPUT_PORTS_START( wildpkr )
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INPUT_PORTS_END
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INPUT_PORTS_END
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static INPUT_PORTS_START( tabpkr )
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PORT_START("IN0")
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PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_START("IN1")
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PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_START("IN2")
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PORT_BIT(0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN)
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INPUT_PORTS_END
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/*************************
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/*************************
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* Machine Start *
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* Machine Start *
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@ -271,7 +426,7 @@ void wildpkr_state::machine_start()
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80000-bffff = unused
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80000-bffff = unused
|
||||||
c0000-fffff = unused
|
c0000-fffff = unused
|
||||||
*/
|
*/
|
||||||
|
m_clock_rate = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -290,17 +445,20 @@ static MACHINE_CONFIG_START( wildpkr, wildpkr_state )
|
|||||||
/* basic machine hardware */
|
/* basic machine hardware */
|
||||||
MCFG_CPU_ADD("maincpu", M68000, MAIN_CLOCK)
|
MCFG_CPU_ADD("maincpu", M68000, MAIN_CLOCK)
|
||||||
MCFG_CPU_PROGRAM_MAP(wildpkr_map)
|
MCFG_CPU_PROGRAM_MAP(wildpkr_map)
|
||||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", wildpkr_state, irq2_line_hold) // guess
|
//MCFG_CPU_VBLANK_INT_DRIVER("screen", wildpkr_state, irq2_line_hold) // guess
|
||||||
|
|
||||||
|
MCFG_MC68681_ADD("duart", SEC_CLOCK)
|
||||||
|
|
||||||
MCFG_SCREEN_ADD("screen", RASTER)
|
MCFG_SCREEN_ADD("screen", RASTER)
|
||||||
MCFG_SCREEN_REFRESH_RATE(60)
|
MCFG_SCREEN_REFRESH_RATE(60)
|
||||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500))
|
||||||
MCFG_SCREEN_SIZE(512, 512)
|
MCFG_SCREEN_SIZE(384, 280)
|
||||||
MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 512-1)
|
MCFG_SCREEN_VISIBLE_AREA(0, 384-1, 0, 280-1)
|
||||||
MCFG_SCREEN_UPDATE_DRIVER(wildpkr_state, screen_update_wildpkr)
|
MCFG_SCREEN_UPDATE_DEVICE("acrtc", hd63484_device, update_screen)
|
||||||
MCFG_SCREEN_PALETTE("palette")
|
MCFG_SCREEN_PALETTE("palette")
|
||||||
|
|
||||||
// MCFG_DEVICE_ADD("hd63484", HD63484, 0)
|
MCFG_HD63484_ADD("acrtc", 0, hd63484_map)
|
||||||
|
|
||||||
MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
|
MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
|
||||||
|
|
||||||
MCFG_PALETTE_ADD("palette", 256)
|
MCFG_PALETTE_ADD("palette", 256)
|
||||||
@ -318,22 +476,38 @@ static MACHINE_CONFIG_START( tabpkr, wildpkr_state )
|
|||||||
/* basic machine hardware */
|
/* basic machine hardware */
|
||||||
MCFG_CPU_ADD("maincpu", M68000, XTAL_24MHz / 2)
|
MCFG_CPU_ADD("maincpu", M68000, XTAL_24MHz / 2)
|
||||||
MCFG_CPU_PROGRAM_MAP(tabpkr_map)
|
MCFG_CPU_PROGRAM_MAP(tabpkr_map)
|
||||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", wildpkr_state, irq2_line_hold) // 2 / 5 are valid
|
//MCFG_CPU_VBLANK_INT_DRIVER("screen", wildpkr_state, irq2_line_hold) // 2 / 5 are valid
|
||||||
|
|
||||||
|
MCFG_NVRAM_ADD_1FILL("nvram") // DS1220Y
|
||||||
|
|
||||||
|
MCFG_MC68681_ADD("duart", 3686400)
|
||||||
|
|
||||||
|
MCFG_DEVICE_ADD("id", DS2401, 0)
|
||||||
|
|
||||||
|
MCFG_DEVICE_ADD("dacclock", CLOCK, 1500000) // base rate derived from program code
|
||||||
|
MCFG_CLOCK_SIGNAL_HANDLER(ASSERTLINE("maincpu", M68K_IRQ_5))
|
||||||
|
|
||||||
MCFG_SCREEN_ADD("screen", RASTER)
|
MCFG_SCREEN_ADD("screen", RASTER)
|
||||||
MCFG_SCREEN_REFRESH_RATE(60)
|
MCFG_SCREEN_REFRESH_RATE(60)
|
||||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500))
|
||||||
MCFG_SCREEN_SIZE(512, 512)
|
MCFG_SCREEN_SIZE(384, 280)
|
||||||
MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 512-1)
|
MCFG_SCREEN_VISIBLE_AREA(0, 384-1, 0, 280-1)
|
||||||
MCFG_SCREEN_UPDATE_DRIVER(wildpkr_state, screen_update_wildpkr)
|
MCFG_SCREEN_UPDATE_DEVICE("acrtc", hd63484_device, update_screen)
|
||||||
MCFG_SCREEN_PALETTE("palette")
|
MCFG_SCREEN_PALETTE("palette")
|
||||||
|
|
||||||
// MCFG_DEVICE_ADD("hd63484", HD63484, 0)
|
MCFG_HD63484_ADD("acrtc", 0, hd63484_map)
|
||||||
|
|
||||||
MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
|
MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
|
||||||
|
|
||||||
MCFG_PALETTE_ADD("palette", 256)
|
MCFG_PALETTE_ADD("palette", 256)
|
||||||
MCFG_PALETTE_INIT_OWNER(wildpkr_state, wildpkr)
|
MCFG_PALETTE_INIT_OWNER(wildpkr_state, wildpkr)
|
||||||
|
|
||||||
|
/* sound hardware */
|
||||||
|
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||||
|
MCFG_SOUND_ADD("dac", AD557, 0)
|
||||||
|
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
||||||
|
MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
|
||||||
|
MCFG_SOUND_ROUTE_EX(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac", -1.0, DAC_VREF_NEG_INPUT)
|
||||||
MACHINE_CONFIG_END
|
MACHINE_CONFIG_END
|
||||||
|
|
||||||
|
|
||||||
@ -376,6 +550,18 @@ ROM_START( tabpkr ) // Royal Poker V 1.85 Oct 29 1996 12:20:07
|
|||||||
// are these missing, or just unpopulated but checked anyway?
|
// are these missing, or just unpopulated but checked anyway?
|
||||||
/* reads 0x100000 - 0x1fffff ? - 2x sockets for same type of roms as above */
|
/* reads 0x100000 - 0x1fffff ? - 2x sockets for same type of roms as above */
|
||||||
/* reads 0x200000 - 0x2fffff ? - 1x socket for larger ROM? */
|
/* reads 0x200000 - 0x2fffff ? - 1x socket for larger ROM? */
|
||||||
|
|
||||||
|
ROM_REGION(8, "id", 0)
|
||||||
|
ROM_LOAD("ds2401.bin", 0, 8, NO_DUMP)
|
||||||
|
// Dummy data to appease POST
|
||||||
|
ROM_FILL(0, 1, 0x66)
|
||||||
|
ROM_FILL(1, 1, 0xfa)
|
||||||
|
ROM_FILL(2, 1, 0xce)
|
||||||
|
ROM_FILL(3, 1, 0xde)
|
||||||
|
ROM_FILL(4, 1, 0xad)
|
||||||
|
ROM_FILL(5, 1, 0xbe)
|
||||||
|
ROM_FILL(6, 1, 0xef)
|
||||||
|
ROM_FILL(7, 1, 0x01)
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
|
|
||||||
@ -395,4 +581,4 @@ DRIVER_INIT_MEMBER(wildpkr_state,wildpkr)
|
|||||||
|
|
||||||
/* YEAR NAME PARENT MACHINE INPUT INIT ROT COMPANY FULLNAME FLAGS */
|
/* YEAR NAME PARENT MACHINE INPUT INIT ROT COMPANY FULLNAME FLAGS */
|
||||||
GAME( 199?, wildpkr, 0, wildpkr, wildpkr, wildpkr_state, wildpkr, ROT0, "TAB Austria", "Wild Poker (ver. D 1.01)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION )
|
GAME( 199?, wildpkr, 0, wildpkr, wildpkr, wildpkr_state, wildpkr, ROT0, "TAB Austria", "Wild Poker (ver. D 1.01)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION )
|
||||||
GAME( 1996, tabpkr, 0, tabpkr, wildpkr, wildpkr_state, wildpkr, ROT0, "TAB Austria", "Royal Poker V 1.85", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION )
|
GAME( 1996, tabpkr, 0, tabpkr, tabpkr, wildpkr_state, wildpkr, ROT0, "TAB Austria", "Royal Poker V 1.85", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION )
|
||||||
|
Loading…
Reference in New Issue
Block a user