From 9bfcd85cc37128a0b55cb4dadbe8333fa5df1e08 Mon Sep 17 00:00:00 2001 From: Joakim Larsson Edstrom Date: Mon, 26 Dec 2016 22:49:50 +0100 Subject: [PATCH] Added VME device and divided mzr8105 in board and card devices. Naughty segfault needs to be fixed (nw) --- scripts/src/bus.lua | 17 ++ scripts/target/mame/arcade.lua | 1 + scripts/target/mame/mess.lua | 5 + src/devices/bus/vme/vme.cpp | 399 ++++++++++++++++++++++++++++ src/devices/bus/vme/vme.h | 426 ++++++++++++++++++++++++++++++ src/devices/bus/vme/vme_mvme350.c | 257 ++++++++++++++++++ src/devices/machine/z80sio.h | 3 + src/mame/bus/vme/mzr8105.cpp | 71 +++++ src/mame/bus/vme/mzr8105.h | 26 ++ src/mame/bus/vme/mzr8300.cpp | 87 ++++++ src/mame/bus/vme/mzr8300.h | 31 +++ src/mame/drivers/mzr8105.cpp | 363 +------------------------ src/mame/includes/mzr8105.h | 30 +++ src/mame/includes/mzr8300.h | 36 +++ src/mame/machine/mzr8105.cpp | 192 ++++++++++++++ src/mame/machine/mzr8300.cpp | 169 ++++++++++++ 16 files changed, 1762 insertions(+), 351 deletions(-) create mode 100644 src/devices/bus/vme/vme.cpp create mode 100644 src/devices/bus/vme/vme.h create mode 100644 src/devices/bus/vme/vme_mvme350.c create mode 100644 src/mame/bus/vme/mzr8105.cpp create mode 100644 src/mame/bus/vme/mzr8105.h create mode 100644 src/mame/bus/vme/mzr8300.cpp create mode 100644 src/mame/bus/vme/mzr8300.h create mode 100644 src/mame/includes/mzr8105.h create mode 100644 src/mame/includes/mzr8300.h create mode 100644 src/mame/machine/mzr8105.cpp create mode 100644 src/mame/machine/mzr8300.cpp diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index 4af0e78d6ab..ee035c2fdab 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -1484,6 +1484,23 @@ if (BUSES["VIP"]~=null) then end +--------------------------------------------------- +-- +--@src/devices/bus/vme/vme.h,BUSES["VME"] = true +--------------------------------------------------- + +if (BUSES["VME"]~=null) then + files { + MAME_DIR .. "src/devices/bus/vme/vme.cpp", + MAME_DIR .. "src/devices/bus/vme/vme.h", + MAME_DIR .. "src/mame/bus/vme/mzr8105.cpp", + MAME_DIR .. "src/mame/bus/vme/mzr8105.h", + MAME_DIR .. "src/mame/bus/vme/mzr8300.cpp", + MAME_DIR .. "src/mame/bus/vme/mzr8300.h", + } +end + + --------------------------------------------------- -- --@src/devices/bus/wangpc/wangpc.h,BUSES["WANGPC"] = true diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index ea84fe73138..35f4f40ccb4 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -674,6 +674,7 @@ BUSES["VECTREX"] = true --BUSES["VIC20"] = true --BUSES["VIDBRAIN"] = true --BUSES["VIP"] = true +--BUSES["VME"] = true --BUSES["VTECH_IOEXP"] = true --BUSES["VTECH_MEMEXP"] = true --BUSES["WANGPC"] = true diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index b2fa12977c0..013c94f3b96 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -702,6 +702,7 @@ BUSES["VIC10"] = true BUSES["VIC20"] = true BUSES["VIDBRAIN"] = true BUSES["VIP"] = true +BUSES["VME"] = true BUSES["VTECH_IOEXP"] = true BUSES["VTECH_MEMEXP"] = true BUSES["WANGPC"] = true @@ -2211,6 +2212,10 @@ files { createMESSProjects(_target, _subtarget, "mizar") files { MAME_DIR .. "src/mame/drivers/mzr8105.cpp", + MAME_DIR .. "src/mame/includes/mzr8105.h", + MAME_DIR .. "src/mame/machine/mzr8105.cpp", + MAME_DIR .. "src/mame/includes/mzr8300.h", + MAME_DIR .. "src/mame/machine/mzr8300.cpp", } createMESSProjects(_target, _subtarget, "morrow") diff --git a/src/devices/bus/vme/vme.cpp b/src/devices/bus/vme/vme.cpp new file mode 100644 index 00000000000..342596f10bf --- /dev/null +++ b/src/devices/bus/vme/vme.cpp @@ -0,0 +1,399 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom +/* + * vme.c + * + * The Versabus-E was standardized as the VME bus by VITA 1981 for Europe + * in the single or double Euroboard form factor. Several standard revs has + * been approved since then up until recently and the VME64 revision. + * + * This bus driver starts with Versabus and VME rev C. + * http://bitsavers.informatik.uni-stuttgart.de/pdf/motorola/versabus/M68KVBS_VERSAbus_Specification_Manual_Jul81.pdf + * + * Acronymes from the specification + * --------------------------------- + * BACKPLANE - A printed circuit board which provides the interconnection path + between other printed circuit cards. + SLOT - A single position at which a card may be inserted into the backplane. + One slot may consist of more than one edge connector. + BOARD/CARD - Interchangeable terms representing one printed circuit board capable + of being inserted into the backplane and containing a collection of + electronic components. + MODULE - A collection of electronic components with a single functional + purpose. More than one module may exist on the same card, but one + module should never be spread over multiple cards. + MASTER - A functional module capable of initiating data bus transfers. + REQUESTER - A functional module capable of requesting control of the data + transfer bus. + INTERRUPT - A functional module capable of detecting interrupt requests + HANDLER and initiating appropriate responses. + MASTER - The combination of a MASTER, REQUESTER, INTERRUPT HANDLER, and + SUB-SYSTEM (optionally) an INTERRUPTER, which function together and which + must be on the same card. + + NOTE! All MASTERS, REQUESTERS, and INTERRUPT HANDLERS must be pieces of a + MASTER SUB-SYSTEM. + + SLAVE - A functional module capable of responding to data transfer + operations generated by a MASTER. + INTERRUPTER - A functional module capable of requesting service from a MASTER + SUB-SYSTEM by generating an interrupt request. + SLAVE - The combination of a SLAVE and INTERRUPTER which function together + SUB-SYSTEM and which must be on the same card. + + NOTE! All INTERRUPTERS must be part of either SLAVE SUB-SYSTEMS or MASTER + SUB-SYSTEMS. However, SLAVES may exist as stand-alone elements. + Such SLAVES will never be called SLAVE SUB-SYSTEMS. + + CONTROLLER - The combination of modules used to provide utility and emergency + SUB-SYSTEM signals for the VERSAbus. There will always be one and only one + CONTROLLER SUB-SYSTEM. It can contain the following functional + modules: + + a. Data Transfer Bus ARBITER + b. Emergency Data Transfer Bus REQUESTER + c. Power up/power down MASTER + d. System clock driver + e. System reset driver + f. System test controller + g. Power monitor (for AC clock and AC fail driver) + + In any VERSAbus system, only one each of the above functional modules will exist. + The slot numbered Al is designated as the controller sub-system slot because the + user will typically provide modules a through d on the board residing in this + slot. System reset and the system test controller are typically connected to + an operator control panel and may be located elsewhere. The power monitor is + interfaced to the incoming AC power source and may also be located remotely. +*/ + +#include "emu.h" +#include "vme.h" +#include "bus/vme/mzr8105.h" +#include "bus/vme/mzr8300.h" + +#define LOG_GENERAL 0x01 +#define LOG_SETUP 0x02 +#define LOG_PRINTF 0x04 + +#define VERBOSE 0 //(LOG_PRINTF | LOG_SETUP | LOG_GENERAL) + +#define LOGMASK(mask, ...) do { if (VERBOSE & mask) logerror(__VA_ARGS__); } while (0) +#define LOGLEVEL(mask, level, ...) do { if ((VERBOSE & mask) >= level) logerror(__VA_ARGS__); } while (0) + +#define LOG(...) LOGMASK(LOG_GENERAL, __VA_ARGS__) +#define LOGSETUP(...) LOGMASK(LOG_SETUP, __VA_ARGS__) + +#define logerror printf // logerror is not available here + +#ifdef _MSC_VER +#define FUNCNAME __func__ +#else +#define FUNCNAME __PRETTY_FUNCTION__ +#endif + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +const device_type VME_P1_SLOT = &device_creator; + +//------------------------------------------------- +// vme_p1_slot_device - constructor +//------------------------------------------------- +vme_p1_slot_device::vme_p1_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, VME_P1_SLOT, "VME_P1_SLOT", tag, owner, clock, "vme_p1_slot", __FILE__) + ,device_slot_interface(mconfig, *this) + ,m_vme_p1_tag(nullptr) + ,m_vme_p1_slottag(nullptr) + ,m_vme_j1_callback(*this) +{ + LOG("%s %s\n", tag, FUNCNAME); +} + +vme_p1_slot_device::vme_p1_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) : + device_t(mconfig, type, name, tag, owner, clock, shortname, source), + device_slot_interface(mconfig, *this) + ,m_vme_p1_tag(nullptr) + ,m_vme_p1_slottag(nullptr) + ,m_vme_j1_callback(*this) +{ +} + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- +void vme_p1_slot_device::static_set_vme_p1_slot(device_t &device, const char *tag, const char *slottag) +{ + LOG("%s %s - %s\n", FUNCNAME, tag, slottag); + vme_p1_slot_device &vme_card = dynamic_cast(device); + vme_card.m_vme_p1_tag = tag; + vme_card.m_vme_p1_slottag = slottag; +} + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- +void vme_p1_slot_device::device_start() +{ + device_vme_p1_card_interface *dev = dynamic_cast(get_card_device()); + LOG("%s %s - %s:%s\n", tag(), FUNCNAME, m_vme_p1_tag, m_vme_p1_slottag); + if (dev) device_vme_p1_card_interface::static_set_vme_p1_tag(*dev, m_vme_p1_tag, m_vme_p1_slottag); + + // m_card = dynamic_cast(get_card_device()); +} + +//------------------------------------------------- +// device_config_complete - perform any +// operations now that the configuration is +// complete +//------------------------------------------------- +void vme_p1_slot_device::device_config_complete() +{ + LOG("%s %s\n", tag(), FUNCNAME); +} + +//------------------------------------------------- +// P1 D8 read +//------------------------------------------------- +READ8_MEMBER(vme_p1_slot_device::read8) +{ + uint16_t result = 0x00; + LOG("%s %s\n", tag(), FUNCNAME); + // printf("%s %s\n", tag(), FUNCNAME); + // if (m_card) result = m_card->read8(space, offset); + return result; +} + +//------------------------------------------------- +// P1 D8 write +//------------------------------------------------- +WRITE8_MEMBER(vme_p1_slot_device::write8) +{ + LOG("%s %s\n", tag(), FUNCNAME); + // printf("%s %s\n", tag(), FUNCNAME); + // if (m_card) m_card->write8(space, offset, data); +} + +SLOT_INTERFACE_START( vme_p1_slot1 ) + SLOT_INTERFACE("mzr8105", VME_MZR8105) +SLOT_INTERFACE_END + +SLOT_INTERFACE_START( vme_p1_slots ) + SLOT_INTERFACE("mzr8105", VME_MZR8105) + SLOT_INTERFACE("mzr8300", VME_MZR8300) +SLOT_INTERFACE_END + +// +// VME device P1 +// + +const device_type VME_P1 = &device_creator; + +vme_p1_device::vme_p1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, VME_P1, "VME_P1", tag, owner, clock, "vme_p1", __FILE__) +{ +} + +vme_p1_device::vme_p1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) : + device_t(mconfig, type, name, tag, owner, clock, shortname, source) +{ +} + +vme_p1_device::~vme_p1_device() +{ + m_device_list.detach_all(); +} + +void vme_p1_device::device_start() +{ +} + +void vme_p1_device::device_reset() +{ +} + +void vme_p1_device::add_vme_p1_card(device_vme_p1_card_interface *card) +{ + m_device_list.append(*card); +} + +void vme_p1_device::install_device(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler, uint32_t mask) +{ + cpu_device *m_maincpu = machine().device("maincpu"); + + // printf("%s", __func__); + + int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_databus_width; + switch(buswidth) + { + case 32: + m_maincpu->space(AS_PROGRAM).install_readwrite_handler(start, end, rhandler, whandler, mask); + break; + case 64: + m_maincpu->space(AS_PROGRAM).install_readwrite_handler(start, end, rhandler, whandler, ((uint64_t)mask<<32)|mask); + break; + default: + fatalerror("VME_P1: Bus width %d not supported\n", buswidth); + } +} + +void vme_p1_device::install_device(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler, uint32_t mask) +{ + cpu_device *m_maincpu = machine().device("maincpu"); + int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_databus_width; + switch(buswidth) + { + case 32: + m_maincpu->space(AS_PROGRAM).install_readwrite_handler(start, end, rhandler, whandler, mask); + break; + case 64: + m_maincpu->space(AS_PROGRAM).install_readwrite_handler(start, end, rhandler, whandler, ((uint64_t)mask<<32)|mask); + break; + default: + fatalerror("VME_P1: Bus width %d not supported\n", buswidth); + } +} + +void vme_p1_device::install_device(offs_t start, offs_t end, read32_delegate rhandler, write32_delegate whandler, uint32_t mask) +{ + cpu_device *m_maincpu = machine().device("maincpu"); + int buswidth = m_maincpu->space_config(AS_PROGRAM)->m_databus_width; + switch(buswidth) + { + case 32: + m_maincpu->space(AS_PROGRAM).install_readwrite_handler(start, end, rhandler, whandler, mask); + break; + case 64: + m_maincpu->space(AS_PROGRAM).install_readwrite_handler(start, end, rhandler, whandler, ((uint64_t)mask<<32)|mask); + break; + default: + fatalerror("VME_P1: Bus width %d not supported\n", buswidth); + } +} + +// +// Card interface +// +device_vme_p1_card_interface::device_vme_p1_card_interface(const machine_config &mconfig, device_t &device) + : device_slot_card_interface(mconfig, device) + ,m_vme_p1(nullptr) + ,m_vme_p1_tag(nullptr) + ,m_vme_p1_slottag(nullptr) + ,m_slot(0) + ,m_next(nullptr) +{ + m_device = &device; + LOG("%s %s\n", m_device->tag(), FUNCNAME); +} + +device_vme_p1_card_interface::~device_vme_p1_card_interface() +{ + LOG("%s %s\n", m_device->tag(), FUNCNAME); +} + +void device_vme_p1_card_interface::static_set_vme_p1_tag(device_t &device, const char *tag, const char *slottag) +{ + device_vme_p1_card_interface &vme_p1_card = dynamic_cast(device); + vme_p1_card.m_vme_p1_tag = tag; + vme_p1_card.m_vme_p1_slottag = slottag; +} + +void device_vme_p1_card_interface::set_vme_p1_device() +{ + LOG("%s %s\n", m_device->tag(), FUNCNAME); + m_vme_p1 = dynamic_cast(device().machine().device(m_vme_p1_tag)); + // printf("*** %s %sfound\n", m_vme_p1_tag, m_vme_p1 ? "" : "not "); + if (m_vme_p1) m_vme_p1->add_vme_p1_card(this); +} + +/* VME D8 accesses */ +READ8_MEMBER(device_vme_p1_card_interface::read8) +{ + uint8_t result = 0x00; + LOG("%s %s Offset:%08x\n", m_device->tag(), FUNCNAME, offset); + return result; +} + +WRITE8_MEMBER(device_vme_p1_card_interface::write8) +{ + LOG("%s %s Offset:%08x\n", m_device->tag(), FUNCNAME, offset); +} + +//--------------- P2 connector below-------------------------- +#if 0 +/* +The VME P2 connector only specifies the mid row B of the connector +and leaves row A and C to be system specific. This has resulted in +a number of variants that has been more or less standardized: + +- VMXbus was available on the first VME boards but not standardized hence +an almost compatible variant was developed by Motorola called MVMX32bus. +- VSBbus replaced VMX and MVMX32and was approved by IEEE in 1988 +- SCSA is a P2 standardization for telephony voice and facsimile applications +- SkyChannel is packet switched P2 architecture from Sky Computers and standardized +through VITA/VSO. +- RACEway is a 40Mhz P2 bus allowing 480MBps throughput from Mercusry Computers and +standardized through VITA/VSO. +- VME64 adds two more rows, called 'z' and 'd', of user defined pins to the P2 connector +- P2CI adds a PCI bus onto a VME64 P2 connector + +URL:s +http://rab.ict.pwr.wroc.pl/dydaktyka/supwa/vme/secbuses.html +http://www.interfacebus.com/Design_Connector_VME_P2_Buses.html + +TODO: Figure out a good way to let all these variants coexist and interconnect in a VME system + +*/ +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +const device_type VME_P2_SLOT = &device_creator; + +//------------------------------------------------- +// vme_p2_slot_device - constructor +//------------------------------------------------- +vme_p2_slot_device::vme_p2_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, VME_P2_SLOT, "VME P2 connector", tag, owner, clock, "vme_p2_connector", __FILE__), + device_slot_interface(mconfig, *this), + m_vme_j2_callback(*this) +{ +} + +void vme_p2_slot_device::device_start() +{ + m_vme_p2 = dynamic_cast(get_card_device()); +} + +//------------------------------------------------- +// device_config_complete - perform any +// operations now that the configuration is +// complete +//------------------------------------------------- + +void vme_p2_slot_device::device_config_complete() +{ + // set brief and instance name + update_names(); +} + +//------------------------------------------------- +// P2 read +//------------------------------------------------- +READ32_MEMBER(vme_p2_slot_device::write32) +{ + uint8_t result = 0x00; + if (m_vme_p2) + result = m_vme_p2->read32(space, offset); + return result; +} + +//------------------------------------------------- +// P2 write +//------------------------------------------------- +WRITE32_MEMBER(vme_p2_slot_device::read32) +{ + if (m_vme_p2) + m_vme_p2->write32(space, offset, data); +} +#endif diff --git a/src/devices/bus/vme/vme.h b/src/devices/bus/vme/vme.h new file mode 100644 index 00000000000..8c22c828ae5 --- /dev/null +++ b/src/devices/bus/vme/vme.h @@ -0,0 +1,426 @@ +// license:BSD-3-Clause +// copyright-holders: Joakim Larsson Edstrom + +/* + * vme.h + * + * VME bus system + * + * Pinout: (from http://pinouts.ru/Slots/vmebus_pinout.shtml) + + P1/J1 P2/J2 (optional for 32 bit) + +-A-B-C--+ A B C +-A-B-C--+ A B C + 01 | [][][] | D00 BBSY* D08 | [][][] | n/a +5v n/a + 02 | [][][] | D01 BCLR* D09 | [][][] | n/a GROUND n/a + 03 | [][][] | D02 ACFAIL* D10 | [][][] | n/a RESERVED n/a + 04 | [][][] | D03 BG0IN* D11 | [][][] | n/a A24 n/a + 05 | [][][] | D04 BG0OUT* D12 | [][][] | n/a A25 n/a + 06 | [][][] | D05 BG1IN* D13 | [][][] | n/a A26 n/a + 07 | [][][] | D06 BG1OUT* D14 | [][][] | n/a A27 n/a + 08 | [][][] | D07 BG2IN* D15 | [][][] | n/a A28 n/a + 09 | [][][] | GROUND BG2OUT* GROUND | [][][] | n/a A29 n/a + 10 | [][][] | SYSCLK BG3IN* SYSFAIL* | [][][] | n/a A30 n/a + 11 | [][][] | GROUND BG3OUT* BERR* | [][][] | n/a A31 n/a + 12 | [][][] | DS1* BR0* SYSRESET* | [][][] | n/a GROUND n/a + 13 | [][][] | DS0* BR1* LWORD* | [][][] | n/a +5v n/a + 14 | [][][] | WRITE* BR2* AM5 | [][][] | n/a D16 n/a + 15 | [][][] | GROUND BR3* A23 | [][][] | n/a D17 n/a + 16 | [][][] | DTACK* AM0 A22 | [][][] | n/a D18 n/a + 17 | [][][] | GROUND AM1 A21 | [][][] | n/a D19 n/a + 18 | [][][] | AS* AM2 A20 | [][][] | n/a D20 n/a + 19 | [][][] | GROUND AM3 A19 | [][][] | n/a D21 n/a + 20 | [][][] | IACK* GROUND A18 | [][][] | n/a D22 n/a + 21 | [][][] | IACKIN* SERCLK* A17 | [][][] | n/a D23 n/a + 22 | [][][] | IACKOUT* SERDAT* A16 | [][][] | n/a GROUND n/a + 23 | [][][] | AM4 GROUND A15 | [][][] | n/a D24 n/a + 24 | [][][] | A07 IRQ7* A14 | [][][] | n/a D25 n/a + 25 | [][][] | A06 IRQ6* A13 | [][][] | n/a D26 n/a + 26 | [][][] | A05 IRQ5* A12 | [][][] | n/a D27 n/a + 27 | [][][] | A04 IRQ4* A11 | [][][] | n/a D28 n/a + 28 | [][][] | A03 IRQ3* A10 | [][][] | n/a D29 n/a + 29 | [][][] | A02 IRQ2* A09 | [][][] | n/a D30 n/a + 30 | [][][] | A01 IRQ1* A08 | [][][] | n/a D31 n/a + 31 | [][][] | -12v +5v STDBY +12v | [][][] | n/a GROUND n/a + 32 | [][][] | +5v +5v +5v | [][][] | n/a +5v n/a + + */ + +#ifndef VME_H_ +#define VME_H_ + +#pragma once + +#include "emu.h" + +//************************************************************************** +// CONSTANTS +//************************************************************************** + +#define VME_BUS_TAG "vme" + +// Callbacks to the board from the VME bus comes through here +#define MCFG_VME_J1_CB(_devcb) \ + devcb = &vme_p1_slot_device::static_set_vme_j1_callback(*device, DEVCB_##_devcb); + +SLOT_INTERFACE_EXTERN(vme_p1_slot1); +SLOT_INTERFACE_EXTERN(vme_p1_slots); + +class device_vme_p1_card_interface; // This interface is standardized + +class vme_p1_slot_device : public device_t, + public device_slot_interface +{ +public: + // VME BUS signals driven to or drived by the VME bus + enum class control + { + AS, + DS0, + DS1, + BERR, + DTACK, + WRITE + }; + + enum class address + { + DS0, + DS1, + LWORD + }; + + // construction/destruction + vme_p1_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + vme_p1_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source); + + template static devcb_base &static_set_vme_j1_callback(device_t &device, _Object object) { return downcast(device).m_vme_j1_callback.set_callback(object); } + + // device-level overrides + virtual void device_start() override; + virtual void device_config_complete() override; + + static void static_set_vme_p1_slot(device_t &device, const char *tag, const char *slottag); + // configuration + const char *m_vme_p1_tag, *m_vme_p1_slottag; + + virtual DECLARE_READ8_MEMBER(read8); + virtual DECLARE_WRITE8_MEMBER(write8); + + // callbacks + devcb_write_line m_vme_j1_callback; + device_vme_p1_card_interface *m_card; +private: +}; + +extern const device_type VME_P1; + +#define MCFG_VME_P1_DEVICE_ADD(_tag) \ + MCFG_DEVICE_ADD(_tag, VME_P1, 0) + +class vme_p1_card_interface; + +class vme_p1_device : public device_t +{ +public: + vme_p1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + vme_p1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source); + ~vme_p1_device(); + + void add_vme_p1_card(device_vme_p1_card_interface *card); + void install_device(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler, uint32_t mask); + void install_device(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler, uint32_t mask); + void install_device(offs_t start, offs_t end, read32_delegate rhandler, write32_delegate whandler, uint32_t mask); +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + simple_list m_device_list; +}; + + + +// device type definition +extern const device_type VME_P1_SLOT; + +class device_vme_p1_card_interface : public device_slot_card_interface +{ +public: + // construction/destruction + device_vme_p1_card_interface(const machine_config &mconfig, device_t &device); + virtual ~device_vme_p1_card_interface(); + void set_vme_p1_device(); + + virtual DECLARE_READ8_MEMBER(read8); + virtual DECLARE_WRITE8_MEMBER(write8); + device_t *m_device; + + // inline configuration + static void static_set_vme_p1_tag(device_t &device, const char *tag, const char *slottag); + vme_p1_device *m_vme_p1; + const char *m_vme_p1_tag, *m_vme_p1_slottag; + int m_slot; + device_vme_p1_card_interface *m_next; + + // + // Address Modifiers + // + /* There are 6 address modifier lines. They allow the MASTER to pass additional binary + information to the SLAVE during data transfers. Table 2-3 lists all of the 64 possible + address modifier (AM) codes and classifies each into one of three categories: + - Defined + - Reserved + - User defined + The defined address modifier codes can be further classified into three categories: + Short addressing AM codes indicate that address lines A02-A15 are being used to select a BYTE(0-3) group. + Standard addressing AM codes ,indicate that address lines A02-A23 are being used to select a BYTE(0-3) group. + Extended addressing AM codes indicate that address lines A02-A31 are being used to select a BYTE(0-3) group.*/ + enum + { // Defined and User Defined Address Modifier Values, The rest us Reserved between 0x00 and 0x3F + AMOD_EXTENDED_NON_PRIV_DATA = 0x09, + AMOD_EXTENDED_NON_PRIV_PRG = 0x0A, + AMOD_EXTENDED_NON_PRIV_BLK = 0x0B, + AMOD_EXTENDED_SUPERVIS_DATA = 0x0D, + AMOD_EXTENDED_SUPERVIS_PRG = 0x0E, + AMOD_EXTENDED_SUPERVIS_BLK = 0x0F, + AMOD_USER_DEFINED_FIRST = 0x10, + AMOD_USER_DEFINED_LAST = 0x1F, + AMOD_SHORT_NON_PRIV_ACCESS = 0x29, + AMOD_SHORT_SUPERVIS_ACCESS = 0x2D, + AMOD_STANDARD_NON_PRIV_DATA = 0x39, + AMOD_STANDARD_NON_PRIV_PRG = 0x3A, + AMOD_STANDARD_NON_PRIV_BLK = 0x3B, + AMOD_STANDARD_SUPERVIS_DATA = 0x3D, + AMOD_STANDARD_SUPERVIS_PRG = 0x3E, + AMOD_STANDARD_SUPERVIS_BLK = 0x3F + }; +}; + +SLOT_INTERFACE_EXTERN(vme_p1_slot1); + +#define MCFG_VME_P1_SLOT_ADD(_tag, _slot_tag, _slot_intf,_def_slot) \ + MCFG_DEVICE_ADD(_slot_tag, VME_P1_SLOT, 0) \ + MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \ + vme_p1_slot_device::static_set_vme_p1_slot(*device, _tag, _slot_tag); + +#define MCFG_VME_P1_SLOT_REMOVE(_tag) \ + MCFG_DEVICE_REMOVE(_tag) + + +#if 0 +// Callbacks to the board from the VME bus comes through here +#define MCFG_VME_J2_CB(_devcb) \ + devcb = &vme_p2_slot_device::static_set_j2_callback(*device, DEVCB_##_devcb); + +class device_vme_p2_interface; // This interface often has custom/propritary A and C rows + +class vme_p2_slot_device : public device_t, + public device_slot_interface +{ +public: + + // construction/destruction + vme_p2_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + template static devcb_base &static_set_vme_j2_callback(device_t &device, _Object object) { return downcast(device).m_vme_j2_callback.set_callback(object); } + + // device-level overrides + virtual void device_start() override; + + // callbacks + devcb_write_line m_vme_j2_callback; +private: + device_vme_p2_interface *m_vme_p2; +}; + +// device type definition +extern const device_type VME_P2_SLOT; + +class device_vme_p2_interface : public device_slot_card_interface +{ +public: + // construction/destruction + device_vme_p2_interface(const machine_config &mconfig, device_t &device); + virtual ~device_vme_p2_interface(); + + virtual DECLARE_READ32_MEMBER(read32); + virtual DECLARE_WRITE32_MEMBER(write32); +}; + +#define MCFG_VME_P2_ADD(_tag,_slot_intf,_def_slot) \ + MCFG_DEVICE_ADD(_tag, VME_P2_SLOT, 0) \ + MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) + +#define MCFG_VME_P2_REMOVE(_tag) \ + MCFG_DEVICE_REMOVE(_tag) +#endif +#if 0 +//************************************************************************** +// INTERFACE CONFIGURATION MACROS +//************************************************************************** + +#define MCFG_VME16_SLOT_ADD(_vmetag, _tag, _slot_intf, _def_slot, _fixed) \ + MCFG_DEVICE_ADD(_tag, VME16_SLOT, 0) \ + MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, _fixed) \ + vme16_slot_device::static_set_vme16_slot(*device, _vmetag, _tag); + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +class device_vme16_card_interface; + +// +// The VME device +// +class vme_device : public device_t +,public device_memory_interface +{ +public: + // construction/destruction + vme_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + vme_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source); + + // inline configuration + static void static_set_cputag(device_t &device, const char *tag); + + void install_device(offs_t start, offs_t end, offs_t mask, offs_t mirror, read8_delegate rhandler, write8_delegate whandler); + void install_device(offs_t start, offs_t end, offs_t mask, offs_t mirror, read16_delegate rhandler, write16_delegate whandler); + void install_device(offs_t start, offs_t end, offs_t mask, offs_t mirror, read32_delegate rhandler, write32_delegate whandler); + void install_bank(offs_t start, offs_t end, offs_t mask, offs_t mirror, const char *tag, uint8_t *data); + void unmap_bank(offs_t start, offs_t end, offs_t mask, offs_t mirror); + void install_rom(device_t *dev, offs_t start, offs_t end, offs_t mask, offs_t mirror, const char *tag, const char *region); + void install_memory(offs_t start, offs_t end, offs_t mask, offs_t mirror, read8_delegate rhandler, write8_delegate whandler); + void set_irq_line(int slot, int state); +protected: + void install_space(address_spacenum spacenum, offs_t start, offs_t end, offs_t mask, offs_t mirror, read8_delegate rhandler, write8_delegate whandler); + + // address spaces + address_space *m_prgspace; + int m_prgwidth; + bool m_allocspaces; + + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + // internal state + cpu_device *m_maincpu; + const address_space_config m_program16_config; + const address_space_config m_program24_config; + const address_space_config m_program32_config; +}; + +class vme16_device : public vme_device +{ + public: + vme16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + vme16_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source); + + virtual const address_space_config *memory_space_config(address_spacenum spacenum) const override; + + DECLARE_READ16_MEMBER ( vme_r ); + DECLARE_WRITE16_MEMBER( vme_w ); + + void add_vme16_card(device_vme16_card_interface *card); +}; + +class vme24_device : public vme_device +{ + public: + vme24_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + vme24_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source); + + virtual const address_space_config *memory_space_config(address_spacenum spacenum) const override; + + DECLARE_READ16_MEMBER ( vme_r ); + DECLARE_WRITE16_MEMBER( vme_w ); + + void add_vme24_card(device_vme16_card_interface *card); +}; + +class vme32_device : public vme_device +{ + public: + vme32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + vme32_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source); + + virtual const address_space_config *memory_space_config(address_spacenum spacenum) const override; + + DECLARE_READ32_MEMBER ( vme_r ); + DECLARE_WRITE32_MEMBER( vme_w ); + + // void add_vme32_card(device_vme16_card_interface *card); +}; + +// +// The SLOT device +// +class vme16_slot_device : public device_t, + public device_slot_interface +{ +public: + // construction/destruction + vme16_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + vme16_slot_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source); + virtual ~vme16_slot_device(); + + //template static devcb_base &set_out_irq2_callback(device_t &device, _Object object) { return downcast(device).m_out_irq2_cb.set_callback(object); } + + //DECLARE_WRITE_LINE_MEMBER( irq2_w ); + + // inline configuration + static void static_set_vme16_slot(device_t &device, const char *tag, const char *slottag); + + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + +protected: + + // configuration + const char *m_vme16_tag, *m_vme16_slottag; + + device_vme16_card_interface *m_slot; +}; + + +// device type definition +extern const device_type VME16_SLOT; +extern const device_type VME16; +extern const device_type VME24; +extern const device_type VME32; + +// +// The CARD device +// +class device_vme16_card_interface : public device_slot_card_interface +{ + friend class vme16_device; +public: + // construction/destruction + device_vme16_card_interface(const machine_config &mconfig, device_t &device); + virtual ~device_vme16_card_interface(); + + device_vme16_card_interface *next() const { return m_next; } + + void set_vme_device(); + + // inline configuration + static void static_set_vmebus(device_t &device, device_t *vme_device); +public: + vme16_device *m_vme; + device_t *m_vme_dev; + device_vme16_card_interface *m_next; +}; + +#if 0 + // reset + virtual void vme16_reset_w() { }; + +}; +#endif +#endif + + +#endif /* VME_H_ */ diff --git a/src/devices/bus/vme/vme_mvme350.c b/src/devices/bus/vme/vme_mvme350.c new file mode 100644 index 00000000000..69bbbe618d7 --- /dev/null +++ b/src/devices/bus/vme/vme_mvme350.c @@ -0,0 +1,257 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom +/*************************************************************************** + * + * Motorola MVME-350 6U Intelligent Tape Controller driver, initially derived + * from hk68v10.c + * + * 31/08/2015 + * + * I baught this board from http://www.retrotechnology.com without documentation. + * It has a Motorola 68010 CPU @ 10MHz, 128 Mb RAM and two 2764 EPROMS with + * QIC-02 tape controller firmware. The board also populates a 68230 PIT and loads + * of descrete TTL components. + * + * + * || + * || || + * ||||--|| + * ||||--|| + * || ||__________________________________________________________ ___ + * ||_______________________________________________________ |_| | + * || |74F74 | xxxxx | xxxxx | 74LS245 | 74ALS645| | | | + * || |______|________|_________|___________| ________| | | | + * || |74F74 | xxxxx | xxxxx | 74LS245 | 74ALS645| | | | + * || |______|________|_________|___________| ________| | | | + * || |74LS02| 74LS08||Am25LS251| 74S38 |74LS20|Jumpers | | | + * || |______|_______||_________|_______|______|______| | |VME| + * || |74F04 | 74LS32||74LS374 | 74LS374 |74S244 | | | | + * ||+---+ |______|_______||_________|___________|_________| | |P1 | + * |||CON| |74F04 | 74LS85||74S244 | 74S240 |PAL | | | | + * ||| | |______|_______||_________|___________|_________| | | | + * ||| | |74LS04| | |74S244 | | | | + * ||| | |______| | PIT |_________| | | | + * ||| | |74LS125 | MC68230L10 |74LS145 | | | | + * ||| | |______| __|_______________________|---------| | | | + * ||| | |74LS74| |25LS251 | | RAM |74S244 | |_| | + * ||+---+ ---------- |---------- | HM6264P-12 |---------| |___| + * || | PAL | | 74245 | |______________|74S244 | | + * || +--------- |_________| | U40 27128 |---------| | + * || | 74F32 | | || System ROM |74LS682 | | + * Red || +-------- | CPU || |-+-------| | + * FAIL ||LED | 74F138| | MC68010 |+--------------+ |DIPSW__| | + * Red || +-------- | || RAM | |74S38 | | + * HALT ||LED | 74F32 | |__________|| HM6264P-12 | |______ | | + * Green || +-------+ |74245 |+--------------+ |74F08 | | + * RUN ||LED |XTAL | |__________|| U47 27128 | |______ | |___ + * ||+---+|20MHz | |74244 || System ROM | |74F00 | _| | + * |||CON|--------+___|__________|+--------------+_|_______| | | | + * ||| |74LS08 |74F74 |74LS148| |PAL | | PAL | | | | + * ||| |________|________|_______| |________|_|_________| | | | + * ||| | 74LS138|74F32 | PAL | |74F74 |Am29823 | | | | + * ||| |________|________|_______| |________|-+---------| | |VME| + * ||| | 74LS11 |74F04 |74LS374| |74LS374 | |74S240 | | | | + * ||| |________|________|_______| |________|_|---------| | |P2 | + * ||| | 74F138 |BLANK |74LS374| |74LS374 |74S240 | | | | + * ||| |________|________|_______| +----------+---------| | | | + * ||| | 74LS08 |74F32 |74LS11|74LS393|74LS393|resistors | | | + * ||| |________|________|______|______ |_______|________| | | | + * ||| |DM2585 |74F74 |DM2230| 74LS00| 74F02 |74F32 | | | | + * ||+---+--------+--------+------+-------+---------+------| | | | + * || |74LS74 |74F20 |74S260| 74S74 | 74F08 |74LS02| | | | + * || +------------------------------------------+------| | | | + * || |DM2353 |74F10 |74F32 | 74LS32| 74F08 |DM2353| |_| | + * || +------------------------------------------+------+-+ |___| + * || ||------------------------------------------------------------+-+ + * ||||--|| + * ||||--|| + * || + * + * History of Motorola VME division (https://en.wikipedia.org/wiki/VMEbus) + *--------------------------------- + * When Motorola released the 68000 processor 1979 the ambition of the deisgners + * was also to standardize a versatile CPU bus to be able to build computer + * systems without constructing PCB:s from scratch. This become VersaBus but the + * boards was really too big and the computer world already saw the systems shrink + * in size. Motorola's design center in Munich proposed to use the smaller and + * already used Euroboard form factor and call it Versabus-E. This later became + * VME which was standardized in the VITA organization 1981 + * + * Misc links about Motorola VME division and this board: + * http://bitsavers.trailing-edge.com/pdf/motorola/_dataBooks/1987_Microcomputer_Systems_and_Components.pdf + * + * Description + * ------------ + * Streaming Tape Controller released 1984 with the following feature set + * + * - Double High (6U) VMEmodule + * - QIC-02 Streaming Tape Interface + * - Supports One 01C-02 compatible 1/4-inch Streaming Tape Drive + * - Standard VMEbus Interface + * - Supports 24- or 32-bit DMA Addressing/16-bit Data + * - Generates Seven Levels of VMEbus Interrupts with Programmable Interrupt Vector + * - 10 MHz MC68010 Microprocessor + * - 90Kb/s Continuous Transfer Rate for QIC-02 Interface, 200Kb/s Burst rate + * - Controls Tape Cartridges Offering 20Mb, 45Mb and 60Mb of Formatted Data Storage + * - MC68230 PIT-based Timer + * - 16Kb of Static RAM Provides Buffer Storage and CPU Workspace + * - Multitasking Kernel-based Firmware Package + * - Buffered Pipe Communication Protocol Allows Multiple Hosts to Oueue Commands Without Interlock + * - High Level Command/Status Packets offer efficient Operating System Support + * - Permits Chaining of Host Command + * + * Address Map + * -------------------------------------------------------------------------- + * Local to VME Decscription + * -------------------------------------------------------------------------- + * 0x000000 Up to 128Kb System ROM with RESET vector + * 0x020000 RAM with vectors + * 0x020500 RAM Top of stack + * 0x040000 PIT device? + * 0x060000 RAM? + * 0x080000 PIT device? + * -------------------------------------------------------------------------- + * + * Interrupt sources MVME + * ---------------------------------------------------------- + * Description Device Lvl IRQ VME board + * /Board Vector Address + * ---------------------------------------------------------- + * On board Sources + * + * Off board Sources (other VME boards) + * + * ---------------------------------------------------------- + * + * DMAC Channel Assignments + * ---------------------------------------------------------- + * Channel M10 V10 + * ---------------------------------------------------------- + * + * + * TODO: + * - Dump the ROMs (DONE) + * - Setup a working address map (STARTED) + * - Get documentation for VME interface + * - Add VME bus driver + * - Hook up a CPU board that supports boot from tape (ie MVME-162, MVME 147) + * - Get a tape file with a bootable data on it. + * + ****************************************************************************/ + +#include "emu.h" +#include "cpu/m68000/m68000.h" +#include "machine/68230pit.h" + +#define LOG(x) x + +class mvme350_state : public driver_device +{ +public: +mvme350_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device (mconfig, type, tag), + m_maincpu (*this, "maincpu"), + m_pit(*this, "pit") +{ +} + +DECLARE_READ16_MEMBER (vme_a24_r); +DECLARE_WRITE16_MEMBER (vme_a24_w); +DECLARE_READ16_MEMBER (vme_a16_r); +DECLARE_WRITE16_MEMBER (vme_a16_w); +virtual void machine_start (); +virtual void machine_reset (); +protected: + +private: + required_device m_maincpu; + required_device m_pit; + +}; + +static ADDRESS_MAP_START (mvme350_mem, AS_PROGRAM, 16, mvme350_state) +ADDRESS_MAP_UNMAP_HIGH + AM_RANGE (0x000000, 0x01ffff) AM_ROM /* 128 Mb ROM */ + AM_RANGE (0x020000, 0x03ffff) AM_RAM /* 128 Mb RAM */ +#if 1 + AM_RANGE(0x040000, 0x040035) AM_DEVREADWRITE8("pit", pit68230_device, read, write, 0x00ff) /* PIT ?*/ + AM_RANGE(0x060000, 0x06001f) AM_RAM /* Area is cleared on start */ + AM_RANGE(0x080000, 0x080035) AM_DEVREADWRITE8("pit", pit68230_device, read, write, 0x00ff) /* PIT ?*/ +#endif +//AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */ +//AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */ +ADDRESS_MAP_END + +/* Input ports */ +static INPUT_PORTS_START (mvme350) +INPUT_PORTS_END + +/* Start it up */ +void mvme350_state::machine_start () +{ + LOG (logerror ("machine_start\n")); +} + +void mvme350_state::machine_reset () +{ + LOG (logerror ("machine_reset\n")); +} + +#if 0 +/* Dummy VME access methods until the VME bus device is ready for use */ +READ16_MEMBER (mvme350_state::vme_a24_r){ + LOG (logerror ("vme_a24_r\n")); + return (uint16_t) 0; +} + +WRITE16_MEMBER (mvme350_state::vme_a24_w){ + LOG (logerror ("vme_a24_w\n")); +} + +READ16_MEMBER (mvme350_state::vme_a16_r){ + LOG (logerror ("vme_16_r\n")); + return (uint16_t) 0; +} + +WRITE16_MEMBER (mvme350_state::vme_a16_w){ + LOG (logerror ("vme_a16_w\n")); +} +#endif + +/* + * Machine configuration + */ +static MACHINE_CONFIG_START (mvme350, mvme350_state) + /* basic machine hardware */ + MCFG_CPU_ADD ("maincpu", M68010, XTAL_10MHz) + MCFG_CPU_PROGRAM_MAP (mvme350_mem) + /* PIT Parallel Interface and Timer device, assuming strapped for on board clock */ + MCFG_DEVICE_ADD("pit", PIT68230, XTAL_16MHz / 2) + +MACHINE_CONFIG_END + +/* ROM definitions */ +ROM_START (mvme350) +ROM_REGION (0x1000000, "maincpu", 0) + +ROM_LOAD16_BYTE ("mvme350U40v2.3.bin", 0x0000, 0x4000, CRC (bcef82ef) SHA1 (e6fdf26e4714cbaeb3e97d7b5acf02d64d8ad744)) +ROM_LOAD16_BYTE ("mvme350U47v2.3.bin", 0x0001, 0x4000, CRC (582ce095) SHA1 (d0929dbfeb0cfda63df6b5bc29ee27fbf665def7)) + +/* + * System ROM information + * + * The ROMs known commands from different sources: + * + * It communicates with the master through data buffers in shared memory and VME bus interrupts + * as desribed in + * http://bitsavers.trailing-edge.com/pdf/motorola/_dataBooks/1987_Microcomputer_Systems_and_Components.pdf + * + * The board is pretty boring as stand alone, it initializes everything and then executes a STOP instruction + * awaiting a CPU on the VME bus to request its services. However, it enables boot from tape devices, we just + * need a MVME-131 and a dump of a VersaDOS or Motorola UNIX System V system tape and some work. + */ +ROM_END + +/* Driver */ +/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ +COMP (1984, mvme350, 0, 0, mvme350, mvme350, driver_device, 0, "Motorola", "MVME-350", MACHINE_NO_SOUND_HW | MACHINE_TYPE_COMPUTER ) diff --git a/src/devices/machine/z80sio.h b/src/devices/machine/z80sio.h index 69c7094fd36..e9dcd4bcb4f 100644 --- a/src/devices/machine/z80sio.h +++ b/src/devices/machine/z80sio.h @@ -62,6 +62,9 @@ // DEVICE CONFIGURATION MACROS //************************************************************************** +#define SIO_CHANA_TAG "cha" +#define SIO_CHANB_TAG "chb" + #define MCFG_Z80SIO_ADD(_tag, _clock, _rxa, _txa, _rxb, _txb) \ MCFG_DEVICE_ADD(_tag, Z80SIO, _clock) \ MCFG_Z80SIO_OFFSETS(_rxa, _txa, _rxb, _txb) diff --git a/src/mame/bus/vme/mzr8105.cpp b/src/mame/bus/vme/mzr8105.cpp new file mode 100644 index 00000000000..e0a722ab0eb --- /dev/null +++ b/src/mame/bus/vme/mzr8105.cpp @@ -0,0 +1,71 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom + +#include "emu.h" +#include "mzr8105.h" + +#define LOG_GENERAL 0x01 +#define LOG_SETUP 0x02 +#define LOG_PRINTF 0x04 + +#define VERBOSE 0 // (LOG_PRINTF | LOG_SETUP | LOG_GENERAL) + +#define LOGMASK(mask, ...) do { if (VERBOSE & mask) logerror(__VA_ARGS__); } while (0) +#define LOGLEVEL(mask, level, ...) do { if ((VERBOSE & mask) >= level) logerror(__VA_ARGS__); } while (0) + +#define LOG(...) LOGMASK(LOG_GENERAL, __VA_ARGS__) +#define LOGSETUP(...) LOGMASK(LOG_SETUP, __VA_ARGS__) + +#if VERBOSE & LOG_PRINTF +#define logerror printf +#endif + +#ifdef _MSC_VER +#define FUNCNAME __func__ +#else +#define FUNCNAME __PRETTY_FUNCTION__ +#endif + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +const device_type VME_MZR8105 = &device_creator; + +//------------------------------------------------- +// machine_config_additions - device-specific +// machine configurations +//------------------------------------------------- + +MACHINE_CONFIG_EXTERN( mzr8105 ); + +machine_config_constructor vme_mzr8105_card_device::device_mconfig_additions() const +{ + LOG("%s %s\n", tag(), FUNCNAME); + return MACHINE_CONFIG_NAME( mzr8105 ); +} + +vme_mzr8105_card_device::vme_mzr8105_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, VME_MZR8105, "Mizar 8105 68K CPU board", tag, owner, clock, "mzr8105", __FILE__), + device_vme_p1_card_interface(mconfig, *this) +{ + m_slot = 1; + LOG("%s %s\n", tag, FUNCNAME); +} + +vme_mzr8105_card_device::vme_mzr8105_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) : + device_t(mconfig, type, name, tag, owner, clock, shortname, source), + device_vme_p1_card_interface(mconfig, *this) +{ + LOG("%s %s\n", tag, FUNCNAME); +} + +void vme_mzr8105_card_device::device_start() +{ + LOG("%s %s\n", tag(), FUNCNAME); +} + +void vme_mzr8105_card_device::device_reset() +{ + LOG("%s %s\n", tag(), FUNCNAME); +} diff --git a/src/mame/bus/vme/mzr8105.h b/src/mame/bus/vme/mzr8105.h new file mode 100644 index 00000000000..57bfc523d4e --- /dev/null +++ b/src/mame/bus/vme/mzr8105.h @@ -0,0 +1,26 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom +#ifndef VME_MZR8105_H +#define VME_MZR8105_H +#pragma once + +#include "bus/vme/vme.h" +#include "includes/mzr8105.h" +#include "bus/vme/mzr8105.h" + +extern const device_type VME_MZR8105; + +class vme_mzr8105_card_device : public device_t + ,public device_vme_p1_card_interface +{ +public: + vme_mzr8105_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + vme_mzr8105_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source); + // optional information overrides + virtual machine_config_constructor device_mconfig_additions() const override; +private: + virtual void device_start() override; + virtual void device_reset() override; +}; + +#endif // VME_MZR8105_H diff --git a/src/mame/bus/vme/mzr8300.cpp b/src/mame/bus/vme/mzr8300.cpp new file mode 100644 index 00000000000..cadf5edc505 --- /dev/null +++ b/src/mame/bus/vme/mzr8300.cpp @@ -0,0 +1,87 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom + +#include "emu.h" +#include "mzr8300.h" +#include "machine/z80sio.h" + +#define LOG_GENERAL 0x01 +#define LOG_SETUP 0x02 +#define LOG_PRINTF 0x04 + +#define VERBOSE 0 // (LOG_PRINTF | LOG_SETUP | LOG_GENERAL) + +#define LOGMASK(mask, ...) do { if (VERBOSE & mask) logerror(__VA_ARGS__); } while (0) +#define LOGLEVEL(mask, level, ...) do { if ((VERBOSE & mask) >= level) logerror(__VA_ARGS__); } while (0) + +#define LOG(...) LOGMASK(LOG_GENERAL, __VA_ARGS__) +#define LOGSETUP(...) LOGMASK(LOG_SETUP, __VA_ARGS__) + +#if VERBOSE & LOG_PRINTF +#define logerror printf +#endif + +#ifdef _MSC_VER +#define FUNCNAME __func__ +#else +#define FUNCNAME __PRETTY_FUNCTION__ +#endif + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +const device_type VME_MZR8300 = &device_creator; + +vme_mzr8300_card_device::vme_mzr8300_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, VME_MZR8300, "Mizar 8300 SIO serial board", tag, owner, clock, "mzr8300", __FILE__), + device_vme_p1_card_interface(mconfig, *this) +{ + LOG("%s %s\n", tag, FUNCNAME); +} + +vme_mzr8300_card_device::vme_mzr8300_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) : + device_t(mconfig, type, name, tag, owner, clock, shortname, source), + device_vme_p1_card_interface(mconfig, *this) +{ + LOG("%s %s\n", tag, FUNCNAME); +} + +void vme_mzr8300_card_device::device_start() +{ + LOG("%s %s\n", tag(), FUNCNAME); + set_vme_p1_device(); + + /* Setup r/w handlers for first SIO */ + uint32_t base = 0xFF0000; + m_vme_p1->install_device(base, base + 3, + read8_delegate(FUNC(z80sio_device::ba_cd_r), subdevice("sio0")), + write8_delegate(FUNC(z80sio_device::ba_cd_w), subdevice("sio0")), 0xffffffff); +} + +void vme_mzr8300_card_device::device_reset() +{ + LOG("%s %s\n", tag(), FUNCNAME); +} + +//------------------------------------------------- +// machine_config_additions - device-specific +// machine configurations +//------------------------------------------------- + +MACHINE_CONFIG_EXTERN( mzr8300 ); + +machine_config_constructor vme_mzr8300_card_device::device_mconfig_additions() const +{ + LOG("%s %s\n", tag(), FUNCNAME); + return MACHINE_CONFIG_NAME( mzr8300 ); +} + +READ8_MEMBER (vme_mzr8300_card_device::read8){ + LOG("%s()\n", FUNCNAME); + return (uint8_t) 0; +} + +WRITE8_MEMBER (vme_mzr8300_card_device::write8){ + LOG("%s()\n", FUNCNAME); +} diff --git a/src/mame/bus/vme/mzr8300.h b/src/mame/bus/vme/mzr8300.h new file mode 100644 index 00000000000..3c2cceca760 --- /dev/null +++ b/src/mame/bus/vme/mzr8300.h @@ -0,0 +1,31 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom +#ifndef VME_MZR8300_H +#define VME_MZR8300_H +#pragma once + +#include "bus/vme/vme.h" +#include "includes/mzr8300.h" +#include "bus/vme/mzr8300.h" + +extern const device_type VME_MZR8300; + +class vme_mzr8300_card_device : + public device_t + ,public device_vme_p1_card_interface +{ +public: + vme_mzr8300_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + vme_mzr8300_card_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source); + // optional information overrides + + virtual machine_config_constructor device_mconfig_additions() const override; + virtual DECLARE_READ8_MEMBER (read8) override; + virtual DECLARE_WRITE8_MEMBER (write8) override; +protected: + virtual void device_start() override; + virtual void device_reset() override; +private: +}; + +#endif // VME_MZR8300_H diff --git a/src/mame/drivers/mzr8105.cpp b/src/mame/drivers/mzr8105.cpp index 295436fbbea..129146b6e7e 100644 --- a/src/mame/drivers/mzr8105.cpp +++ b/src/mame/drivers/mzr8105.cpp @@ -1,378 +1,42 @@ // license:BSD-3-Clause // copyright-holders:Joakim Larsson Edstrom -/*************************************************************************** - * - * Mizar VME8105 rev D 3U SBC driver, initially derived from force68k.c - * - * 19/08/2015 - * - * I baught this board from http://www.retrotechnology.com without documentation. - * It has a Motorola 68000 CPU @ 10MHz and two 27128 EPROMS with OS9 DEBUG labels - * and not much more except 16 or so TTLs, 2 PALs and a VME P1 connector. It is a - * 2 sided design so it shold be possible to trace the schematics quite easily. - * There is a date on the P1 Connector: "Feb 20 1987" - * - * || - * || - * || - * || - * ||____________________________________________________________ ___ - * || --------------K2|U6-7432|U7-7474|U14-7405|U21-74645 | |_| | - * || | 2764 - low |-+-------+-------+--------+-----------+ | | | - * || | OS9 DEBUG U4| +---------+ +--------+---------+ | | | - * || -------------- | | |U13-7474|U20-74645| | | | - * || ______________ | | +--------+---------+ | | | - * || | | | | ______________K4____ | | | - * || | U3| | | |U12-7438|U19-74244| | |VME| - * || -------------- | |+------K6---------K3---+ | | | - * || ______________ | ||U11-PAL20L10|U18-74244| | |P1 | - * || | 2764 - high | | |+-----021102-+---------+ | | | - * || | OS9 DEBUG U2| |MC68000L10+------------+---------+ | | | - * || |______________| | ||U10-PAL14L4 |U17-74244| | | | - * || | |+-----021001-+---------+ | | | - * || -------------- | |+----+_______|U16-74244|+--+| | | - * || | | | |XTAL |U9-7410+---------+| || | | - * ||K1 | U1| | |FOX100-------+---------+|K5||_| | - * || -------------- |_________|10MHz|U8-7404|U15-74148|| || |___| - * ||--||--------------------------------+----+-------+---------++--+ - * ||--|| - * || - * - * PAL:s - *------ - * The board has two PAL:s, a PAL20L10 and a PAL14L4. - * - * _____ _____ - * OD/CLK 1 |* \_/ | 20 VCC - * CPU A13 I0 2 | | 19 O0/LR A23 - * U9 7410p12 I1 3 | | 18 O1/A0 A22 - * CPU *AS I2 4 | | 17 02/A1 U2/U4 2764p22 *OE - * GND I3 5 | | 16 03/A2 U11 PAL20L10p6 I4 - * CPU A14 I4 6 | U10 | 15 A0/O0 U11 PAL20L10p7 I5 - * CPU A15 I5 7 | PAL14L4 | 14 A1/O1 U19 74LS244p11 I0b - * CPU A16 I6 8 | | 13 A2/O2 A18 - * CPU A17 I7 9 | | 12 LR/O3 A20 - * GND 10 |_____________| 11 CLK/OD A21 - * - * _____ _____ - * OD/CLK 1 |* \_/ | 24 VCC - * I0 2 | | 23 O0/LR - * CPU *AS I1 3 | | 22 O1/A0 - * U10 PAL14L4p3 I2 4 | | 21 02/A1 - * I3 5 | | 20 03/A2 - * U10 PAL14L4p16 I4 6 | U10 | 19 04/NC - * U10 PAL14L4p15 I5 7 | PAL20L10 | 18 NC/O0 - * I6 8 | | 17 A2/O1 - * I7 9 | | 16 A1/O2 - * I8 10 | | 15 A0/O3 - * I9 11 | | 14 LR/O4 - * GND 12 |_____________| 13 CLK/OD - * - * Trace is not fully completed and validated. - * - * History of Mizar - *------------------- - * Mizar was one of the first companies that released VME boards in 1982-3 together with - * Force Computers and Motorola. Their systems was often supported by OS9/68000 from Microware. - * In 1993 Mizar discontinued their OS9/CPU board product range and focused entirely on DSP - * boards. RTSI was founded by Mizar employees preserving the knowledge in OS9 as consultants. - * In 1998 Blue Wave resulted from the merger of Mizar and Loughborough Sound Images. - * Not much tech information availabe but I found some quotes about Mizar on the internet: - * - * From http://archive.org/stream/68micro-vol-11-num-02/V11N02_Feb1989_djvu.txt : - *-------------------------------------------------------------------------------- - * " Mizar provides complete OS-9 solutions for the VMEbus. Mizar's VME CPUs - * offer (he functions and performance your application demands. Our single - * height (3U) VME processors are uniquely configurable computing engines, - * Through Mizar's unique MXbus expansion interface, standard and custom side - * modules can be added to basic processors to create double-height (6U) boards - * tor specific applications, 3U CPU options include 68010, 66020, and 63030 - * microprocessors, up to one MB of DRAM, serial I/O, real-time clock, and - * mailbox interrupt support. Standard MXbus side modules include additional DRAM. - * SRAM, and I/O. - * - * Mizar's standard double- height (6U) processors provide additional features such - * as a high-speed cache to enhance 68030 performance, floating, point coprocessor - * support, up to four MB dual ported DRAM, VSB memory interface, Ethernet, and SCSI. - * - * Mizar also supports OS-9 with completely configured OS9 development systems and - * OS-9 application server systems. For more information, call Mizar today - * - * 800-635-0200 MIZAR 1419 Dunn Drive CarrolHon, TX 75006 214-446-2664" - * - * Known boards from Mizar: - * - * MZX 414 - * MZ 7122 - * MZ 7132 - * MZ 7300 Serial I/O Board (Z8530) - * EMX 7320 Serial I/O Board - * MZ 7400 Disk Controller Board (WD 2010; WD 1772) - * MZ 7500 IEEE-488 (GPIB) Interface Board - * EMX 7550 Ethernet Controller Board (AMD 7990 Lance) MAC: 00:80:F8 MIZAR, INC. - * MZ 7772 - * MZ 7810 I/O Expansion Module (6681 DUART) - * MZ 7831 SCSI Expansion Module (WD 33C93A) - * MZ 7850 Ethernet Expansion Module (WD 83C690) - * MZ 8000 ?? - * MZ 8105 3U 68000 CPU board - * MZ 8115 - * MZ 8300 3U serial board, 2 NEC 7201 and 1 AMD CTS9513 5 x 16 bit Counter/Timer - * MZ 8310 timing module 2 x AM9513 - * MZ 8505 IEEE-488 (GPIB) Interface Board" - * - * From http://www.megalextoria.com/forum2/index.php?t=msg&goto=73945& - *-------------------------------------------------------------------- - * Aug 20 1984 a report by James Jones from the OS/9 conferance in Des Moines: - * "... - * Mizar: is selling VME bus 68010 boards, running OS-9/68000; they also make - * various memory and I/O boards, disk controller boards, and and a NEC 7220-based - * graphics controller board...." - * - * Misc links about Mizar: - * http://www.vita.com/History - * http://www.verycomputer.com/154_e272024804bbe203_1.htm - * https://www.aihitdata.com/company/00814595/RTSI/overview - * - * Address Map - * -------------------------------------------------------------------------- - * Address Range Description/Assumption - * -------------------------------------------------------------------------- - * 0x000000 0x01ffff ROM because of fixed vectors - * 0x020000 0x03ffff RAM because bootvector stack starts at 0x21000 - * -- VME adresses--- - * 0xff0000 0xff0003 Bootstrap expects to find a UPD7201 serial device here - * -------------------------------------------------------------------------- - * - * Interrupt sources - * ---------------------------------------------------------- - * Description Device Lvl IRQ VME board - * /Board Vector Address - * ---------------------------------------------------------- - * On board Sources - * TBD - * Off board Sources (other VME boards) - * TBD - * ---------------------------------------------------------- - * - * TODO: - * - Dump the ROMs (DONE) - * - Setup a working address map (DONE) - * - Add VME bus driver (Faked one) - * - understand what other device is expected in VME space ff0011-13 - * - ****************************************************************************/ #include "emu.h" +#include "includes/mzr8105.h" +#include "bus/vme/mzr8300.h" #include "cpu/m68000/m68000.h" -#include "bus/rs232/rs232.h" #include "machine/clock.h" -#include "softlist.h" - -// The board needs a SIO board to get a user interface so lets fake one until the VME devices is done -#define FAKEVME 1 - -// There are two user prom sockets -#define CARDSLOT 0 - -#if FAKEVME -#include "machine/z80sio.h" -#endif - -#if CARDSLOT // Awaiting info on how to boot the user eproms -#include "bus/generic/slot.h" -#include "bus/generic/carts.h" -#endif - -#define VERBOSE 0 - -#define LOGPRINT(x) { do { if (VERBOSE) logerror x; } while (0); } -#define LOG(x) {} LOGPRINT(x) -#define LOGR(x) {} LOGPRINT(x) -#define LOGSETUP(x) {} LOGPRINT(x) -#define LOGINT(x) {} LOGPRINT(x) - -#if VERBOSE >= 2 -#define logerror printf -#endif - -#ifdef _MSC_VER -#define LLFORMAT "%I64%" -#define FUNCNAME __func__ -#else -#define LLFORMAT "%lld" -#define FUNCNAME __PRETTY_FUNCTION__ -#endif - -/* These values are borrowed just to get the terminal going and should be replaced - * once a proper serial board hardware (ie MZ 8300) is found and emulated. */ -#define BAUDGEN_CLOCK XTAL_19_6608MHz /* fake */ -#define UPD_CLOCK (BAUDGEN_CLOCK / 128) /* This will give prompt */ - -class mzr8105_state : public driver_device -{ -public: -mzr8105_state(const machine_config &mconfig, device_type type, const char *tag) : - driver_device (mconfig, type, tag) - ,m_maincpu (*this, "maincpu") - ,m_updterm(*this, "upd") -#if CARDSLOT - ,m_cart(*this, "exp_rom1") -#endif -{ -} - - DECLARE_READ16_MEMBER (vme_a24_r); - DECLARE_WRITE16_MEMBER (vme_a24_w); - DECLARE_READ16_MEMBER (vme_a16_r); - DECLARE_WRITE16_MEMBER (vme_a16_w); - virtual void machine_start () override; - DECLARE_WRITE_LINE_MEMBER (write_updterm_clock); - -#if CARDSLOT - // User EPROM/SRAM slot(s) - int mzr8105_load_cart(device_image_interface &image, generic_slot_device *slot); - DECLARE_DEVICE_IMAGE_LOAD_MEMBER (exp1_load) { return mzr8105_load_cart(image, m_cart); } - DECLARE_READ16_MEMBER (read16_rom); -#endif - -protected: - -private: - required_device m_maincpu; - required_device m_updterm; - -#if CARDSLOT - uint16_t *m_usrrom; - required_device m_cart; -#endif -}; static ADDRESS_MAP_START (mzr8105_mem, AS_PROGRAM, 16, mzr8105_state) ADDRESS_MAP_UNMAP_HIGH +/* The ROMs contains an OS9 bootloader. It is position independent but reset vector suggests that it sits flat on adress 0 (zero) */ AM_RANGE (0x000000, 0x003fff) AM_ROM AM_REGION("roms", 0x000000) /* System EPROM Area 16Kb OS9 DEBUG - not verified */ AM_RANGE (0x004000, 0x01ffff) AM_ROM AM_REGION("roms", 0x004000)/* System EPROM Area 112Kb for System ROM - not verified */ AM_RANGE (0x020000, 0x03ffff) AM_RAM /* Not verified */ -// AM_RANGE (0x0a0000, 0x0bffff) AM_ROM /* User EPROM/SRAM Area, max 128Kb mapped by a cartslot */ -// AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */ -// AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */ -#if FAKEVME -// Faking a Mizar 8300 SIO UPD7201 BOARD in VME A16 adress space - AM_RANGE (0xFF0000, 0xFF0001) AM_DEVREADWRITE8("upd", upd7201N_device, db_r, db_w, 0x00ff) - AM_RANGE (0xFF0002, 0xFF0003) AM_DEVREADWRITE8("upd", upd7201N_device, cb_r, cb_w, 0x00ff) - AM_RANGE (0xFF0004, 0xFF0005) AM_DEVREADWRITE8("upd", upd7201N_device, da_r, da_w, 0x00ff) - AM_RANGE (0xFF0006, 0xFF0007) AM_DEVREADWRITE8("upd", upd7201N_device, ca_r, ca_w, 0x00ff) -#endif +// AM_RANGE (0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */ +// AM_RANGE (0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) - not verified */ ADDRESS_MAP_END /* Input ports */ static INPUT_PORTS_START (mzr8105) INPUT_PORTS_END -/* Start it up */ -void mzr8105_state::machine_start () -{ - LOG(("%s()\n", FUNCNAME)); - -#if CARDSLOT - /* Map user ROM/RAM socket(s) */ - if (m_cart->exists()) - { - m_usrrom = (uint16_t*)m_cart->get_rom_base(); - m_maincpu->space(AS_PROGRAM).install_read_handler(0xa0000, 0xbffff, read16_delegate(FUNC(generic_slot_device::read16_rom), (generic_slot_device*)m_cart)); - } -#endif -} - -/* Dummy VME access methods until the VME bus device is ready for use */ -READ16_MEMBER (mzr8105_state::vme_a24_r){ - LOG(("%s()\n", FUNCNAME)); - return (uint16_t) 0; -} - -WRITE16_MEMBER (mzr8105_state::vme_a24_w){ - LOG(("%s()\n", FUNCNAME)); -} - -READ16_MEMBER (mzr8105_state::vme_a16_r){ - LOG(("%s()\n", FUNCNAME)); - return (uint16_t) 0; -} - -WRITE16_MEMBER (mzr8105_state::vme_a16_w){ - LOG(("%s()\n", FUNCNAME)); -} - -#if CARDSLOT -/* - * The USER EPROM Area - */ -// Implementation of static 2 x 64K EPROM in sockets U1/U3 as 16 bit wide cartridge for easier -// software handling. TODO: make configurable according to table above. -static MACHINE_CONFIG_FRAGMENT( mzr8105_eprom_sockets ) - MCFG_GENERIC_CARTSLOT_ADD("exp_rom1", generic_plain_slot, "mzr8105_cart") - MCFG_GENERIC_EXTENSIONS("bin,rom") - MCFG_GENERIC_WIDTH(GENERIC_ROM16_WIDTH) - MCFG_GENERIC_ENDIAN(ENDIANNESS_BIG) - MCFG_GENERIC_LOAD(mzr8105_state, exp1_load) -// MCFG_SOFTWARE_LIST_ADD("cart_list", "mzr8105_cart") -MACHINE_CONFIG_END - -/*************************** - Rom loading functions -****************************/ -int mzr8105_state::mzr8105_load_cart(device_image_interface &image, generic_slot_device *slot) -{ - uint32_t size = slot->common_get_size("rom"); - - if (size > 0x20000) // Max 128Kb - not verified - { - LOG(("Cartridge size exceeding max size (128Kb): %d\n", size) ); - image.seterror(IMAGE_ERROR_UNSPECIFIED, "Cartridge size exceeding max size (128Kb)"); - return IMAGE_INIT_FAIL; - } - - slot->rom_alloc(size, GENERIC_ROM16_WIDTH, ENDIANNESS_BIG); - slot->common_load_rom(slot->get_rom_base(), size, "rom"); - - return IMAGE_INIT_PASS; -} -#endif - -WRITE_LINE_MEMBER (mzr8105_state::write_updterm_clock){ - m_updterm->txcb_w (state); - m_updterm->rxcb_w (state); -} +static SLOT_INTERFACE_START(mzr8105_vme_cards) + SLOT_INTERFACE("mzr8300", VME_MZR8300) +SLOT_INTERFACE_END /* * Machine configuration */ -static MACHINE_CONFIG_START (mzr8105, mzr8105_state) +MACHINE_CONFIG_START (mzr8105, mzr8105_state) MCFG_CPU_ADD ("maincpu", M68000, XTAL_10MHz) MCFG_CPU_PROGRAM_MAP (mzr8105_mem) - -/* Terminal Port config */ - MCFG_UPD7201_ADD("upd", XTAL_4MHz, 0, 0, 0, 0 ) - MCFG_Z80SIO_OUT_TXDB_CB(DEVWRITELINE("rs232trm", rs232_port_device, write_txd)) - MCFG_Z80SIO_OUT_DTRB_CB(DEVWRITELINE("rs232trm", rs232_port_device, write_dtr)) - MCFG_Z80SIO_OUT_RTSB_CB(DEVWRITELINE("rs232trm", rs232_port_device, write_rts)) - - MCFG_RS232_PORT_ADD ("rs232trm", default_rs232_devices, "terminal") - MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("upd", upd7201N_device, rxb_w)) - MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("upd", upd7201N_device, ctsb_w)) - - MCFG_DEVICE_ADD ("updterm_clock", CLOCK, UPD_CLOCK) - MCFG_CLOCK_SIGNAL_HANDLER (WRITELINE (mzr8105_state, write_updterm_clock)) - -#if CARDSLOT -// EPROM sockets - MCFG_FRAGMENT_ADD(mzr8105_eprom_sockets) -#endif - + MCFG_VME_P1_DEVICE_ADD("vme") + MCFG_VME_P1_SLOT_ADD ("vme", "slot1", mzr8105_vme_cards, nullptr) MACHINE_CONFIG_END /* ROM definitions */ -/* UPD7201 init sequence +/* mzr8300 UPD7201 init sequence * :upd B Reg 02 <- 04 Interrupt vector * :upd B Reg 06 <- 00 Sync byte * :upd B Reg 07 <- 00 Sync byte @@ -382,11 +46,8 @@ MACHINE_CONFIG_END */ ROM_START (mzr8105) ROM_REGION (0x20000, "roms", 0) - -/* The ROMs contains an OS9 bootloader. It is position independent but reset vector suggests that it sits flat on adress 0 (zero) */ ROM_LOAD16_BYTE ("mzros9LB.bin", 0x000000, 0x2000, CRC (7c6a354d) SHA1 (2721eb649c8046dbcb517a36a97dc0816cd133f2)) ROM_LOAD16_BYTE ("mzros9HB.bin", 0x000001, 0x2000, CRC (d18e69a6) SHA1 (a00b68f4d649bcc09a29361f8692e52be12b3792)) - ROM_END /* Driver */ diff --git a/src/mame/includes/mzr8105.h b/src/mame/includes/mzr8105.h new file mode 100644 index 00000000000..6b597ff4e25 --- /dev/null +++ b/src/mame/includes/mzr8105.h @@ -0,0 +1,30 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom +/******************************************************************************** + * + * mame/includes/mzr8105 + * + ********************************************************************************/ + +#ifndef MZR8105_H +#define MZR8105_H +#pragma once + +#include "bus/vme/vme.h" + +class mzr8105_state : public driver_device +{ +public: +mzr8105_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device (mconfig, type, tag) + ,m_maincpu (*this, "maincpu") + { + } + + virtual void machine_start() override; +private: + required_device m_maincpu; +}; + + +#endif // MZR8105_H diff --git a/src/mame/includes/mzr8300.h b/src/mame/includes/mzr8300.h new file mode 100644 index 00000000000..29a5014d3d6 --- /dev/null +++ b/src/mame/includes/mzr8300.h @@ -0,0 +1,36 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom +/******************************************************************************** + * + * mame/includes/mzr8105 + * + ********************************************************************************/ + +#ifndef MZR8300_H +#define MZR8300_H +#pragma once + +#include "emu.h" +#include "bus/vme/vme.h" + +class vme_p1_mzr8300_device : + public device_t, + public device_vme_p1_card_interface +{ +public: + // construction/destruction + vme_p1_mzr8300_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + vme_p1_mzr8300_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source); + + // optional information overrides + virtual machine_config_constructor device_mconfig_additions() const override; + + DECLARE_READ8_MEMBER(mzr8300_r); + DECLARE_WRITE8_MEMBER(mzr8300_w); +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; +}; + +#endif // MZR8300_H diff --git a/src/mame/machine/mzr8105.cpp b/src/mame/machine/mzr8105.cpp new file mode 100644 index 00000000000..4e645c3acf5 --- /dev/null +++ b/src/mame/machine/mzr8105.cpp @@ -0,0 +1,192 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom +/*************************************************************************** + * + * Mizar VME8105 rev D 3U SBC board driver + * + * 19/08/2015 + * + * I baught this board from http://www.retrotechnology.com without documentation. + * It has a Motorola 68000 CPU @ 10MHz and two 27128 EPROMS with OS9 DEBUG labels + * and not much more except 16 or so TTLs, 2 PALs and a VME P1 connector. It is a + * 2 layered pcb so it shold be possible to trace the schematics quite easily. + * There is a date on the P1 Connector: "Feb 20 1987" + * + * || + * || + * || + * || + * ||____________________________________________________________ ___ + * || --------------K2|U6-7432|U7-7474|U14-7405|U21-74645 | |_| | + * || | 2764 - low |-+-------+-------+--------+-----------+ | | | + * || | OS9 DEBUG U4| +---------+ +--------+---------+ | | | + * || -------------- | | |U13-7474|U20-74645| | | | + * || ______________ | | +--------+---------+ | | | + * || | | | | ______________K4____ | | | + * || | U3| | | |U12-7438|U19-74244| | |VME| + * || -------------- | |+------K6---------K3---+ | | | + * || ______________ | ||U11-PAL20L10|U18-74244| | |P1 | + * || | 2764 - high | | |+-----021102-+---------+ | | | + * || | OS9 DEBUG U2| |MC68000L10+------------+---------+ | | | + * || |______________| | ||U10-PAL14L4 |U17-74244| | | | + * || | |+-----021001-+---------+ | | | + * || -------------- | |+----+_______|U16-74244|+--+| | | + * || | | | |XTAL |U9-7410+---------+| || | | + * ||K1 | U1| | |FOX100-------+---------+|K5||_| | + * || -------------- |_________|10MHz|U8-7404|U15-74148|| || |___| + * ||--||--------------------------------+----+-------+---------++--+ + * ||--|| + * || + * + * PAL:s + *------ + * The board has two PAL:s, a PAL20L10 and a PAL14L4. + * + * _____ _____ + * OD/CLK 1 |* \_/ | 20 VCC + * CPU A13 I0 2 | | 19 O0/LR A23 + * U9 7410p12 I1 3 | | 18 O1/A0 A22 + * CPU *AS I2 4 | | 17 02/A1 U2/U4 2764p22 *OE + * GND I3 5 | | 16 03/A2 U11 PAL20L10p6 I4 + * CPU A14 I4 6 | U10 | 15 A0/O0 U11 PAL20L10p7 I5 + * CPU A15 I5 7 | PAL14L4 | 14 A1/O1 U19 74LS244p11 I0b + * CPU A16 I6 8 | | 13 A2/O2 A18 + * CPU A17 I7 9 | | 12 LR/O3 A20 + * GND 10 |_____________| 11 CLK/OD A21 + * + * _____ _____ + * OD/CLK 1 |* \_/ | 24 VCC + * I0 2 | | 23 O0/LR + * CPU *AS I1 3 | | 22 O1/A0 + * U10 PAL14L4p3 I2 4 | | 21 02/A1 + * I3 5 | | 20 03/A2 + * U10 PAL14L4p16 I4 6 | U10 | 19 04/NC + * U10 PAL14L4p15 I5 7 | PAL20L10 | 18 NC/O0 + * I6 8 | | 17 A2/O1 + * I7 9 | | 16 A1/O2 + * I8 10 | | 15 A0/O3 + * I9 11 | | 14 LR/O4 + * GND 12 |_____________| 13 CLK/OD + * + * Trace is not fully completed and validated. + * + * History of Mizar + *------------------- + * Mizar was one of the first companies that released VME boards in 1982-3 together with + * Force Computers and Motorola. Their systems was often supported by OS9/68000 from Microware. + * In 1993 Mizar discontinued their OS9/CPU board product range and focused entirely on DSP + * boards. RTSI was founded by Mizar employees preserving the knowledge in OS9 as consultants. + * In 1998 Blue Wave resulted from the merger of Mizar and Loughborough Sound Images. + * Not much tech information availabe but I found some quotes about Mizar on the internet: + * + * From http://archive.org/stream/68micro-vol-11-num-02/V11N02_Feb1989_djvu.txt : + *-------------------------------------------------------------------------------- + * " Mizar provides complete OS-9 solutions for the VMEbus. Mizar's VME CPUs + * offer (he functions and performance your application demands. Our single + * height (3U) VME processors are uniquely configurable computing engines, + * Through Mizar's unique MXbus expansion interface, standard and custom side + * modules can be added to basic processors to create double-height (6U) boards + * tor specific applications, 3U CPU options include 68010, 66020, and 63030 + * microprocessors, up to one MB of DRAM, serial I/O, real-time clock, and + * mailbox interrupt support. Standard MXbus side modules include additional DRAM. + * SRAM, and I/O. + * + * Mizar's standard double- height (6U) processors provide additional features such + * as a high-speed cache to enhance 68030 performance, floating, point coprocessor + * support, up to four MB dual ported DRAM, VSB memory interface, Ethernet, and SCSI. + * + * Mizar also supports OS-9 with completely configured OS9 development systems and + * OS-9 application server systems. For more information, call Mizar today + * + * 800-635-0200 MIZAR 1419 Dunn Drive CarrolHon, TX 75006 214-446-2664" + * + * Known boards from Mizar: + * + * MZX 414 + * MZ 7122 + * MZ 7132 + * MZ 7300 Serial I/O Board (Z8530) + * EMX 7320 Serial I/O Board + * MZ 7400 Disk Controller Board (WD 2010; WD 1772) + * MZ 7500 IEEE-488 (GPIB) Interface Board + * EMX 7550 Ethernet Controller Board (AMD 7990 Lance) MAC: 00:80:F8 MIZAR, INC. + * MZ 7772 + * MZ 7810 I/O Expansion Module (6681 DUART) + * MZ 7831 SCSI Expansion Module (WD 33C93A) + * MZ 7850 Ethernet Expansion Module (WD 83C690) + * MZ 8000 ?? + * MZ 8105 3U 68000 CPU board + * MZ 8115 + * MZ 8300 3U serial board, 2 NEC 7201 and 1 AMD CTS9513 5 x 16 bit Counter/Timer + * MZ 8310 timing module 2 x AM9513 + * MZ 8505 IEEE-488 (GPIB) Interface Board" + * + * From http://www.megalextoria.com/forum2/index.php?t=msg&goto=73945& + *-------------------------------------------------------------------- + * Aug 20 1984 a report by James Jones from the OS/9 conferance in Des Moines: + * "... + * Mizar: is selling VME bus 68010 boards, running OS-9/68000; they also make + * various memory and I/O boards, disk controller boards, and and a NEC 7220-based + * graphics controller board...." + * + * Misc links about Mizar: + * http://www.vita.com/History + * http://www.verycomputer.com/154_e272024804bbe203_1.htm + * https://www.aihitdata.com/company/00814595/RTSI/overview + * + * Address Map + * -------------------------------------------------------------------------- + * Address Range Description/Assumption + * -------------------------------------------------------------------------- + * 0x000000 0x01ffff ROM because of fixed vectors + * 0x020000 0x03ffff RAM because bootvector stack starts at 0x21000 + * -- VME adresses--- + * 0xff0000 0xff0003 Bootstrap expects to find a UPD7201 serial device here + * -------------------------------------------------------------------------- + * + * Interrupt sources + * ---------------------------------------------------------- + * Description Device Lvl IRQ VME board + * /Board Vector Address + * ---------------------------------------------------------- + * On board Sources + * TBD + * Off board Sources (other VME boards) + * TBD + * ---------------------------------------------------------- + * + * TODO: + * - Dump the ROMs (DONE) + * - Setup a working address map (DONE) + * - Add VME bus driver (Faked one) + * - understand what other device is expected in VME space ff0011-13 + * + ****************************************************************************/ +#include "emu.h" +#include "includes/mzr8105.h" +#include "cpu/m68000/m68000.h" +#include "machine/clock.h" + +#define VERBOSE 0 + +#define LOGPRINT(...) do { if (VERBOSE) logerror(__VA_ARGS__); } while (0) +#define LOG(...) LOGPRINT(__VA_ARGS__) + +#if VERBOSE >= 2 +#define logerror printf +#endif + +#ifdef _MSC_VER +#define LLFORMAT "%I64%" +#define FUNCNAME __func__ +#else +#define LLFORMAT "%lld" +#define FUNCNAME __PRETTY_FUNCTION__ +#endif + +/* Start it up */ +void mzr8105_state::machine_start() +{ + LOG("%s()\n", FUNCNAME); +} + diff --git a/src/mame/machine/mzr8300.cpp b/src/mame/machine/mzr8300.cpp new file mode 100644 index 00000000000..dc939f34dca --- /dev/null +++ b/src/mame/machine/mzr8300.cpp @@ -0,0 +1,169 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom +/*************************************************************************** + * + * Mizar VME8300 rev G 3U VME slave slot device + * + * 23/09/2015 + * + * This device was drycoded based on OS9 boot strap code on a Mizar mz8105 board + * which expects to find a SIO on the VME bus + photos of a Mizar 8300 board on Ebay + * I have found no formal documents for this board so far, so needs verification. + * + * || + * || + * || + * || + * ||____________________________________________________________ ___ + * \+++====|| U2|AM26LS32| | NEC | |74LS04N||74LS645 ||_| | + * \=/- o|| +--------+ | D7201C | ++-----+++----------+| | | + * | | || +-------+ +--------------------+ | | |SN74LS374N|| | | + * | | || U1| xxx | ____________________ | | +----------+| | | + * | | || +-------+ | NEC | |AMD | |SN74LS374N|| | | + * | | || | 7201C | |AM9513++----------+| | | + * | | || K10 +--------------------+ | APC ||PAL14L8 || |VME| + * | |==|| +-------+ K5 _______ | |+-----------+| | | + * | |==|| |MC1488P| K4 |SN74S38|| STC ||PAL20L8 || |P1 | + * | | || ++-------+--------+-+------++| |+-----------+| | | + * | | || K2 |AM26LS32|AM26LS32| 74S74 | |_____| |SN74LS244N|| | | + * | | || +--------+--------+--------+_______ +----------+| | | + * | | || | 74S74 | 74F85 | | | | + * | | || +-------+--------++-------++-------+ +----------+| | | + * /=\- o||J1 K1 U4| xxx | xxx | 74LS164| K6 |AM25LS2521|| | | + * /+++====|| J2 +-------+--------+--------+--------+ +----------+|_| | + * ||Rev G U3| MC1488| MC1488 | 74LS161| 74F85 | K8 | |___| + * ||-----------+-------+----------------------------------------- + * || + * || + * + * + * Misc links about this board: + * http://www.ebay.com/itm/MIZAR-INC-8300-0-01-REV-J-INTERFACE-CONTROL-BOARD-W-RIBBON-AND-PLATE-/231508658429?hash=item35e6fdc8fd + * + * Description + * ------------ + * The Mizar mz8300 is a Quad Serial board. + * + * - Single High (3U) VME Slave board + * - Two upd7201 SIO Serial Input/Ouput + * - One AM9513 STC System Timing Controller + * + * Address Map (just guesses based on driver software behaviours) + * -------------------------------------------------------------------------- + * Local VME Decscription + * ------------------------------------------------------------------------- + * n/a 0xff0000 0xff0003 mzr8105.c Bootstrap expects to find a + * UPD7201 serial device here - configurable! + * -------------------------------------------------------------------------- + * + * Interrupt sources MVME + * ---------------------------------------------------------- + * Description Device Lvl IRQ VME board + * /Board Vector Address + * ---------------------------------------------------------- + * On board Sources + * + * Off board Sources (other VME boards) + * + * ---------------------------------------------------------- + * + * DMAC Channel Assignments + * ---------------------------------------------------------- + * Channel + * ---------------------------------------------------------- + * + * TODO: + * - Setup a working address map (STARTED) + * - Get documentation for the board + * - Add VME bus interface + * - Hook up a CPU board that supports this board (mzr8105.c) + * - Get terminal working through this device over the VME interface + * + ****************************************************************************/ +#include "emu.h" +#include "includes/mzr8300.h" +#include "machine/z80sio.h" +#include "machine/clock.h" + +#define VERBOSE 0 + +#define LOGPRINT(...) do { if (VERBOSE) logerror(__VA_ARGS__); } while (0) +#define LOG(...) LOGPRINT(__VA_ARGS__) + +#if VERBOSE >= 2 +#define logerror printf +#endif + +#ifdef _MSC_VER +#define LLFORMAT "%I64%" +#define FUNCNAME __func__ +#else +#define LLFORMAT "%lld" +#define FUNCNAME __PRETTY_FUNCTION__ +#endif + +MACHINE_CONFIG_FRAGMENT( mzr8300 ) + MCFG_Z80SIO_ADD("sio0", XTAL_4MHz, 0, 0, 0, 0 ) + MCFG_Z80SIO_ADD("sio1", XTAL_4MHz, 0, 0, 0, 0 ) +MACHINE_CONFIG_END + +const device_type VME_P1_MZR8300 = &device_creator; + +machine_config_constructor vme_p1_mzr8300_device::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( mzr8300 ); +} + +vme_p1_mzr8300_device::vme_p1_mzr8300_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, VME_P1_MZR8300, "Mizar 8300 quad channel SIO board", tag, owner, clock, "vme_mzr8300", __FILE__) + ,device_vme_p1_card_interface(mconfig, *this) +{ +} + +vme_p1_mzr8300_device::vme_p1_mzr8300_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) : + device_t(mconfig, type, name, tag, owner, clock, shortname, source) + ,device_vme_p1_card_interface(mconfig, *this) +{ +} + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void vme_p1_mzr8300_device::device_start() +{ + // uint32_t slotspace; + + // set_nubus_device makes m_slot valid + //set_vme_p1_device(); + + // slotspace = get_slotspace(); + + /* Setup r/w handlers for first SIO */ + // uint32_t base = 0xFF0000; + // m_vme_p1->install_device(base, base + 3, + // read8_delegate(FUNC(vme_p1_mzr8300_device::mzr8300_r), this), + // write8_delegate(FUNC(vme_p1_mzr8300_device::mzr8300_w), this), 0xffffffff); +// read8_delegate(FUNC(z80sio_device::ba_cd_r), subdevice("sio0")), +// write8_delegate(FUNC(z80sio_device::ba_cd_w), subdevice("sio0")), 0xffffffff); +// m_vme_p1->install_device(base + 3, base + 7, +// read8_delegate(FUNC(z80sio_device::ba_cd_r), subdevice("sio1")), +// write8_delegate(FUNC(z80sio_device::ba_cd_w), subdevice("sio1")), 0xffffffff); +} + +READ8_MEMBER(vme_p1_mzr8300_device::mzr8300_r) +{ + return 0; +} + +WRITE8_MEMBER(vme_p1_mzr8300_device::mzr8300_w) +{ +} + +//------------------------------------------------- +// device_reset - device-specific reset +//------------------------------------------------- + +void vme_p1_mzr8300_device::device_reset() +{ +}