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apple/scsidma.cpp: Greatly increased handshake SCSI performance by smarter control of instruction restarts. [R. Belmont]

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apple/maciifx.cpp: Fixed ordering of software lists so hard disks have priority over CD-ROMs like all other Macs. [R. Belmont]
This commit is contained in:
arbee 2024-07-09 23:04:41 -04:00
parent 93060d50e3
commit 92868a2178
3 changed files with 58 additions and 13 deletions
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8
src/mame/apple/maciifx.cpp
View File

@ -430,9 +430,6 @@ void maciifx_state::maciifx(machine_config &config)
applefdintf_device::add_35_hd(config, m_floppy[0]);
applefdintf_device::add_35_nc(config, m_floppy[1]);
SOFTWARE_LIST(config, "flop35hd_list").set_original("mac_hdflop");
SOFTWARE_LIST(config, "cd_list").set_original("mac_cdrom").set_filter("MC68030,MC68030_32");
SCC85C30(config, m_scc, C7M);
m_scc->configure_channels(3'686'400, 3'686'400, 3'686'400, 3'686'400);
m_scc->out_txda_callback().set("printer", FUNC(rs232_port_device::write_txd));
@ -452,8 +449,6 @@ void maciifx_state::maciifx(machine_config &config)
m_scsidma->set_maincpu_tag("maincpu");
m_scsidma->write_irq().set(FUNC(maciifx_state::oss_interrupt<9>));
SOFTWARE_LIST(config, "hdd_list").set_original("mac_hdd");
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
ASC(config, m_asc, C15M, asc_device::asc_type::ASC);
@ -493,6 +488,9 @@ void maciifx_state::maciifx(machine_config &config)
m_ram->set_default_size("4M");
m_ram->set_extra_options("8M,16M,32M,64M,96M,128M");
SOFTWARE_LIST(config, "hdd_list").set_original("mac_hdd");
SOFTWARE_LIST(config, "cd_list").set_original("mac_cdrom").set_filter("MC68030,MC68030_32");
SOFTWARE_LIST(config, "flop35hd_list").set_original("mac_hdflop");
SOFTWARE_LIST(config, "flop_mac35_orig").set_original("mac_flop_orig");
SOFTWARE_LIST(config, "flop_mac35_clean").set_original("mac_flop_clcracked");
SOFTWARE_LIST(config, "flop35_list").set_original("mac_flop");

62
src/mame/apple/scsidma.cpp
View File

@ -78,7 +78,9 @@ scsidma_device::scsidma_device(const machine_config &mconfig, const char *tag, d
m_scsi_irq(0),
m_control(0),
m_holding(0),
m_holding_remaining(0)
m_holding_remaining(0),
m_is_write(false),
m_drq_completed(false)
{
}
@ -89,6 +91,8 @@ void scsidma_device::device_start()
save_item(NAME(m_control));
save_item(NAME(m_holding));
save_item(NAME(m_holding_remaining));
save_item(NAME(m_is_write));
save_item(NAME(m_drq_completed));
}
void scsidma_device::device_reset()
@ -96,6 +100,7 @@ void scsidma_device::device_reset()
m_control = 0;
m_holding = 0;
m_holding_remaining = 0;
m_drq_completed = false;
}
u32 scsidma_device::control_r()
@ -133,6 +138,14 @@ void scsidma_device::scsi_w(offs_t offset, u8 data)
u32 scsidma_device::handshake_r(offs_t offset, u32 mem_mask)
{
// if the DRQ handler completed this transfer while we were out, just return the result now
if (m_drq_completed)
{
LOGMASKED(LOG_HANDSHAKE, "%s: Completed read in DRQ, returning\n", tag());
m_drq_completed = false;
return m_holding;
}
if (mem_mask == 0xff000000)
{
if (m_control & CTRL_HNDSHK)
@ -145,7 +158,7 @@ u32 scsidma_device::handshake_r(offs_t offset, u32 mem_mask)
{
LOGMASKED(LOG_HANDSHAKE, "Handshaking single byte, no DRQ\n");
m_maincpu->restart_this_instruction();
m_maincpu->spin_until_time(attotime::from_usec(50));
m_maincpu->suspend_until_trigger(1, true);
return 0xffffffff;
}
}
@ -176,10 +189,11 @@ u32 scsidma_device::handshake_r(offs_t offset, u32 mem_mask)
{
m_holding_remaining = 2;
}
m_is_write = false;
}
// is a new byte available?
while (m_drq && m_holding_remaining)
if (m_drq && m_holding_remaining)
{
m_holding <<= 8;
m_holding |= m_ncr->dma_r();
@ -194,7 +208,7 @@ u32 scsidma_device::handshake_r(offs_t offset, u32 mem_mask)
LOGMASKED(LOG_HANDSHAKE, "Handshaking %d byte read\n", m_holding_remaining);
m_maincpu->restart_this_instruction();
m_maincpu->spin_until_time(attotime::from_usec(50));
m_maincpu->suspend_until_trigger(1, true);
return 0xffffffff;
}
fatalerror("%s: Unhandled handshake read mask %08x\n", tag(), mem_mask);
@ -203,6 +217,14 @@ u32 scsidma_device::handshake_r(offs_t offset, u32 mem_mask)
void scsidma_device::handshake_w(offs_t offset, u32 data, u32 mem_mask)
{
// if the DRQ handler completed this transfer while we were out, we're done
if (m_drq_completed)
{
LOGMASKED(LOG_HANDSHAKE, "%s: Completed write in DRQ, returning\n", tag());
m_drq_completed = false;
return;
}
if (mem_mask == 0xff000000)
{
if (m_control & CTRL_HNDSHK)
@ -216,7 +238,7 @@ void scsidma_device::handshake_w(offs_t offset, u32 data, u32 mem_mask)
{
LOGMASKED(LOG_HANDSHAKE, "Handshake single byte write\n");
m_maincpu->restart_this_instruction();
m_maincpu->spin_until_time(attotime::from_usec(50));
m_maincpu->suspend_until_trigger(1, true);
return;
}
}
@ -249,6 +271,7 @@ void scsidma_device::handshake_w(offs_t offset, u32 data, u32 mem_mask)
{
m_holding_remaining = 2;
}
m_is_write = true;
}
// is a new byte available?
@ -265,9 +288,9 @@ void scsidma_device::handshake_w(offs_t offset, u32 data, u32 mem_mask)
return;
}
LOGMASKED(LOG_HANDSHAKE, "Handshaking %d byte write\n", m_holding_remaining);
LOGMASKED(LOG_HANDSHAKE, "Handshaking %d byte write %08x\n", m_holding_remaining, m_holding);
m_maincpu->restart_this_instruction();
m_maincpu->spin_until_time(attotime::from_usec(50));
m_maincpu->suspend_until_trigger(1, true);
return;
}
fatalerror("%s: Unhandled handshake write mask %08x\n", tag(), mem_mask);
@ -287,6 +310,29 @@ void scsidma_device::scsi_irq_w(int state)
void scsidma_device::scsi_drq_w(int state)
{
LOGMASKED(LOG_DRQ, "%s: 53C80 DRQ %d (was %d)\n", tag(), state, m_drq);
LOGMASKED(LOG_DRQ, "%s: 53C80 DRQ %d (was %d) (remain %d write %d)\n", tag(), state, m_drq, m_holding_remaining, m_is_write);
if ((state) && (m_holding_remaining > 0))
{
if (m_is_write)
{
m_ncr->dma_w(m_holding >> 24);
m_holding <<= 8;
m_holding_remaining--;
LOGMASKED(LOG_HANDSHAKE, "DRQ: Holding write %08x, remain %d\n", m_holding, m_holding_remaining);
}
else
{
m_holding <<= 8;
m_holding |= m_ncr->dma_r();
m_holding_remaining--;
LOGMASKED(LOG_HANDSHAKE, "DRQ: Holding %08x, remain %d\n", m_holding, m_holding_remaining);
}
if (m_holding_remaining == 0)
{
m_drq_completed = true;
m_maincpu->trigger(1);
}
}
m_drq = state;
}

1
src/mame/apple/scsidma.h
View File

@ -48,6 +48,7 @@ private:
u32 m_control;
u32 m_holding;
u8 m_holding_remaining;
bool m_is_write, m_drq_completed;
};
// device type definition