cpu/pps4 - machine/pxa255, r10696, r10788, ra17xx, rf5c296, roc10937, rp5c01, rp5c15, rp5h01, rtc4543, rtc65271, rtc9701, s2636, s3520cf, s3c2400, s3c2410, s3c2440, sa1043, scnxx562: removed MCFG macros (nw)

This commit is contained in:
Ivan Vangelista 2018-10-29 18:39:36 +01:00
parent 9586346438
commit 93308b483e
81 changed files with 416 additions and 872 deletions

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@ -275,10 +275,11 @@ ROM_START (fcisio1)
ROM_LOAD16_BYTE ("isio-1_v2.1_u.bin", 0xf00000, 0x4000, CRC (67986768) SHA1 (215f7ff90d9dbe2bea54510e3722fb33d4e54193))
ROM_END
MACHINE_CONFIG_START(vme_fcisio1_card_device::device_add_mconfig)
void vme_fcisio1_card_device::device_add_mconfig(machine_config &config)
{
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", M68010, CPU_CLOCK / 2)
MCFG_DEVICE_PROGRAM_MAP (fcisio1_mem)
M68010(config, m_maincpu, CPU_CLOCK / 2);
m_maincpu->set_addrmap(AS_PROGRAM, &vme_fcisio1_card_device::fcisio1_mem);
/* DUSCC channels */
#define RS232P1_TAG "rs232p1"
@ -290,15 +291,16 @@ MACHINE_CONFIG_START(vme_fcisio1_card_device::device_add_mconfig)
#define RS232P7_TAG "rs232p7"
#define RS232P8_TAG "rs232p8"
MCFG_DUSCC68562_ADD("duscc0", DUSCC_CLOCK, 0, 0, 0, 0 )
DUSCC68562(config, m_duscc0, DUSCC_CLOCK);
m_duscc0->configure_channels(0, 0, 0, 0);
/* Port 1 on DUSCC 0 Port A */
MCFG_DUSCC_OUT_TXDA_CB(WRITELINE(RS232P1_TAG, rs232_port_device, write_txd))
MCFG_DUSCC_OUT_DTRA_CB(WRITELINE(RS232P1_TAG, rs232_port_device, write_dtr))
MCFG_DUSCC_OUT_RTSA_CB(WRITELINE(RS232P1_TAG, rs232_port_device, write_rts))
m_duscc0->out_txda_callback().set(RS232P1_TAG, FUNC(rs232_port_device::write_txd));
m_duscc0->out_dtra_callback().set(RS232P1_TAG, FUNC(rs232_port_device::write_dtr));
m_duscc0->out_rtsa_callback().set(RS232P1_TAG, FUNC(rs232_port_device::write_rts));
/* Port 2 on DUSCC 0 Port B */
MCFG_DUSCC_OUT_TXDB_CB(WRITELINE(RS232P2_TAG, rs232_port_device, write_txd))
MCFG_DUSCC_OUT_DTRB_CB(WRITELINE(RS232P2_TAG, rs232_port_device, write_dtr))
MCFG_DUSCC_OUT_RTSB_CB(WRITELINE(RS232P2_TAG, rs232_port_device, write_rts))
m_duscc0->out_txdb_callback().set(RS232P2_TAG, FUNC(rs232_port_device::write_txd));
m_duscc0->out_dtrb_callback().set(RS232P2_TAG, FUNC(rs232_port_device::write_dtr));
m_duscc0->out_rtsb_callback().set(RS232P2_TAG, FUNC(rs232_port_device::write_rts));
/* RS232 for DUSCC 0 */
rs232_port_device &rs232p1(RS232_PORT(config, RS232P1_TAG, default_rs232_devices, "terminal"));
rs232p1.rxd_handler().set(m_duscc0, FUNC(duscc68562_device::rxa_w));
@ -308,15 +310,16 @@ MACHINE_CONFIG_START(vme_fcisio1_card_device::device_add_mconfig)
rs232p2.rxd_handler().set(m_duscc0, FUNC(duscc68562_device::rxb_w));
rs232p2.cts_handler().set(m_duscc0, FUNC(duscc68562_device::ctsb_w));
MCFG_DUSCC68562_ADD("duscc1", DUSCC_CLOCK, 0, 0, 0, 0 )
DUSCC68562(config, m_duscc1, DUSCC_CLOCK);
m_duscc1->configure_channels(0, 0, 0, 0);
/* Port 3 on DUSCC 1 Port A */
MCFG_DUSCC_OUT_TXDA_CB(WRITELINE(RS232P3_TAG, rs232_port_device, write_txd))
MCFG_DUSCC_OUT_DTRA_CB(WRITELINE(RS232P3_TAG, rs232_port_device, write_dtr))
MCFG_DUSCC_OUT_RTSA_CB(WRITELINE(RS232P3_TAG, rs232_port_device, write_rts))
m_duscc1->out_txda_callback().set(RS232P3_TAG, FUNC(rs232_port_device::write_txd));
m_duscc1->out_dtra_callback().set(RS232P3_TAG, FUNC(rs232_port_device::write_dtr));
m_duscc1->out_rtsa_callback().set(RS232P3_TAG, FUNC(rs232_port_device::write_rts));
/* Port 4 on DUSCC 1 Port B */
MCFG_DUSCC_OUT_TXDB_CB(WRITELINE(RS232P4_TAG, rs232_port_device, write_txd))
MCFG_DUSCC_OUT_DTRB_CB(WRITELINE(RS232P4_TAG, rs232_port_device, write_dtr))
MCFG_DUSCC_OUT_RTSB_CB(WRITELINE(RS232P4_TAG, rs232_port_device, write_rts))
m_duscc1->out_txdb_callback().set(RS232P4_TAG, FUNC(rs232_port_device::write_txd));
m_duscc1->out_dtrb_callback().set(RS232P4_TAG, FUNC(rs232_port_device::write_dtr));
m_duscc1->out_rtsb_callback().set(RS232P4_TAG, FUNC(rs232_port_device::write_rts));
/* RS232 for DUSCC 1 */
rs232_port_device &rs232p3(RS232_PORT(config, RS232P3_TAG, default_rs232_devices, nullptr));
rs232p3.rxd_handler().set(m_duscc1, FUNC(duscc68562_device::rxa_w));
@ -326,15 +329,16 @@ MACHINE_CONFIG_START(vme_fcisio1_card_device::device_add_mconfig)
rs232p4.rxd_handler().set(m_duscc1, FUNC(duscc68562_device::rxb_w));
rs232p4.cts_handler().set(m_duscc1, FUNC(duscc68562_device::ctsb_w));
MCFG_DUSCC68562_ADD("duscc2", DUSCC_CLOCK, 0, 0, 0, 0 )
DUSCC68562(config, m_duscc2, DUSCC_CLOCK);
m_duscc2->configure_channels(0, 0, 0, 0);
/* Port 5 on DUSCC 2 Port A */
MCFG_DUSCC_OUT_TXDA_CB(WRITELINE(RS232P5_TAG, rs232_port_device, write_txd))
MCFG_DUSCC_OUT_DTRA_CB(WRITELINE(RS232P5_TAG, rs232_port_device, write_dtr))
MCFG_DUSCC_OUT_RTSA_CB(WRITELINE(RS232P5_TAG, rs232_port_device, write_rts))
m_duscc2->out_txda_callback().set(RS232P5_TAG, FUNC(rs232_port_device::write_txd));
m_duscc2->out_dtra_callback().set(RS232P5_TAG, FUNC(rs232_port_device::write_dtr));
m_duscc2->out_rtsa_callback().set(RS232P5_TAG, FUNC(rs232_port_device::write_rts));
/* Port 6 on DUSCC 2 Port B */
MCFG_DUSCC_OUT_TXDB_CB(WRITELINE(RS232P6_TAG, rs232_port_device, write_txd))
MCFG_DUSCC_OUT_DTRB_CB(WRITELINE(RS232P6_TAG, rs232_port_device, write_dtr))
MCFG_DUSCC_OUT_RTSB_CB(WRITELINE(RS232P6_TAG, rs232_port_device, write_rts))
m_duscc2->out_txdb_callback().set(RS232P6_TAG, FUNC(rs232_port_device::write_txd));
m_duscc2->out_dtrb_callback().set(RS232P6_TAG, FUNC(rs232_port_device::write_dtr));
m_duscc2->out_rtsb_callback().set(RS232P6_TAG, FUNC(rs232_port_device::write_rts));
/* RS232 for DUSCC 2 */
rs232_port_device &rs232p5(RS232_PORT(config, RS232P5_TAG, default_rs232_devices, nullptr));
rs232p5.rxd_handler().set(m_duscc2, FUNC(duscc68562_device::rxa_w));
@ -344,15 +348,16 @@ MACHINE_CONFIG_START(vme_fcisio1_card_device::device_add_mconfig)
rs232p6.rxd_handler().set(m_duscc2, FUNC(duscc68562_device::rxb_w));
rs232p6.cts_handler().set(m_duscc2, FUNC(duscc68562_device::ctsb_w));
MCFG_DUSCC68562_ADD("duscc3", DUSCC_CLOCK, 0, 0, 0, 0 )
DUSCC68562(config, m_duscc3, DUSCC_CLOCK);
m_duscc3->configure_channels(0, 0, 0, 0);
/* Port 7 on DUSCC 3 Port A */
MCFG_DUSCC_OUT_TXDA_CB(WRITELINE(RS232P7_TAG, rs232_port_device, write_txd))
MCFG_DUSCC_OUT_DTRA_CB(WRITELINE(RS232P7_TAG, rs232_port_device, write_dtr))
MCFG_DUSCC_OUT_RTSA_CB(WRITELINE(RS232P7_TAG, rs232_port_device, write_rts))
m_duscc3->out_txda_callback().set(RS232P7_TAG, FUNC(rs232_port_device::write_txd));
m_duscc3->out_dtra_callback().set(RS232P7_TAG, FUNC(rs232_port_device::write_dtr));
m_duscc3->out_rtsa_callback().set(RS232P7_TAG, FUNC(rs232_port_device::write_rts));
/* Port 8 on DUSCC 3 Port B */
MCFG_DUSCC_OUT_TXDB_CB(WRITELINE(RS232P8_TAG, rs232_port_device, write_txd))
MCFG_DUSCC_OUT_DTRB_CB(WRITELINE(RS232P8_TAG, rs232_port_device, write_dtr))
MCFG_DUSCC_OUT_RTSB_CB(WRITELINE(RS232P8_TAG, rs232_port_device, write_rts))
m_duscc3->out_txdb_callback().set(RS232P8_TAG, FUNC(rs232_port_device::write_txd));
m_duscc3->out_dtrb_callback().set(RS232P8_TAG, FUNC(rs232_port_device::write_dtr));
m_duscc3->out_rtsb_callback().set(RS232P8_TAG, FUNC(rs232_port_device::write_rts));
/* RS232 for DUSCC 4 */
rs232_port_device &rs232p7(RS232_PORT(config, RS232P7_TAG, default_rs232_devices, nullptr));
rs232p7.rxd_handler().set(m_duscc3, FUNC(duscc68562_device::rxa_w));
@ -365,8 +370,8 @@ MACHINE_CONFIG_START(vme_fcisio1_card_device::device_add_mconfig)
PIT68230(config, m_pit, XTAL(20'000'000) / 2);
m_pit->pb_in_callback().set(FUNC(vme_fcisio1_card_device::config_rd));
MC68153(config, "bim", XTAL(20'000'000) / 2);
MACHINE_CONFIG_END
MC68153(config, m_bim, XTAL(20'000'000) / 2);
}
const tiny_rom_entry *vme_fcisio1_card_device::device_rom_region() const
{

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@ -122,18 +122,20 @@ ioport_constructor vme_hcpu30_card_device::device_input_ports() const
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(vme_hcpu30_card_device::device_add_mconfig)
MCFG_DEVICE_ADD("maincpu", M68030, 2*16670000)
MCFG_DEVICE_PROGRAM_MAP(hcpu30_mem)
void vme_hcpu30_card_device::device_add_mconfig(machine_config &config)
{
M68030(config, m_maincpu, 2*16670000);
m_maincpu->set_addrmap(AS_PROGRAM, &vme_hcpu30_card_device::hcpu30_mem);
MCFG_DUSCC68562_ADD("duscc", DUSCC_CLOCK, 0, 0, 0, 0)
MCFG_DUSCC_OUT_TXDA_CB(WRITELINE(RS232P1_TAG, rs232_port_device, write_txd))
MCFG_DUSCC_OUT_DTRA_CB(WRITELINE(RS232P1_TAG, rs232_port_device, write_dtr))
MCFG_DUSCC_OUT_RTSA_CB(WRITELINE(RS232P1_TAG, rs232_port_device, write_rts))
MCFG_DUSCC_OUT_TXDB_CB(WRITELINE(RS232P2_TAG, rs232_port_device, write_txd))
MCFG_DUSCC_OUT_DTRB_CB(WRITELINE(RS232P2_TAG, rs232_port_device, write_dtr))
MCFG_DUSCC_OUT_RTSB_CB(WRITELINE(RS232P2_TAG, rs232_port_device, write_rts))
// MCFG_DUSCC_OUT_INT_CB(WRITELINE()
DUSCC68562(config, m_dusccterm, DUSCC_CLOCK);
m_dusccterm->configure_channels(0, 0, 0, 0);
m_dusccterm->out_txda_callback().set(RS232P1_TAG, FUNC(rs232_port_device::write_txd));
m_dusccterm->out_dtra_callback().set(RS232P1_TAG, FUNC(rs232_port_device::write_dtr));
m_dusccterm->out_rtsa_callback().set(RS232P1_TAG, FUNC(rs232_port_device::write_rts));
m_dusccterm->out_txdb_callback().set(RS232P2_TAG, FUNC(rs232_port_device::write_txd));
m_dusccterm->out_dtrb_callback().set(RS232P2_TAG, FUNC(rs232_port_device::write_dtr));
m_dusccterm->out_rtsb_callback().set(RS232P2_TAG, FUNC(rs232_port_device::write_rts));
// m_dusccterm->out_int_callback(),set(FUNC());
rs232_port_device &rs232p1(RS232_PORT(config, RS232P1_TAG, default_rs232_devices, "terminal"));
rs232p1.rxd_handler().set(m_dusccterm, FUNC(duscc68562_device::rxa_w));
@ -142,7 +144,7 @@ MACHINE_CONFIG_START(vme_hcpu30_card_device::device_add_mconfig)
rs232_port_device &rs232p2(RS232_PORT(config, RS232P2_TAG, default_rs232_devices, nullptr));
rs232p2.rxd_handler().set(m_dusccterm, FUNC(duscc68562_device::rxb_w));
rs232p2.cts_handler().set(m_dusccterm, FUNC(duscc68562_device::ctsb_w));
MACHINE_CONFIG_END
}
/* Boot vector handler, the PCB hardwires the first 8 bytes from 0xff800000 to 0x0 at reset */
READ32_MEMBER(vme_hcpu30_card_device::bootvect_r)

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@ -24,18 +24,6 @@ enum
PPS4_Ip
};
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_PPS4_DISCRETE_INPUT_A_CB(_devcb) \
downcast<pps4_device &>(*device).set_dia_cb(DEVCB_##_devcb);
#define MCFG_PPS4_DISCRETE_INPUT_B_CB(_devcb) \
downcast<pps4_device &>(*device).set_dib_cb(DEVCB_##_devcb);
#define MCFG_PPS4_DISCRETE_OUTPUT_CB(_devcb) \
downcast<pps4_device &>(*device).set_do_cb(DEVCB_##_devcb);
//**************************************************************************
// DEVICE TYPE DEFINITIONS
@ -55,9 +43,9 @@ public:
pps4_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
// configuration helpers
template <class Object> devcb_base &set_dia_cb(Object &&cb) { return m_dia_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_dib_cb(Object &&cb) { return m_dib_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_do_cb(Object &&cb) { return m_do_cb.set_callback(std::forward<Object>(cb)); }
auto dia_cb() { return m_dia_cb.bind(); }
auto dib_cb() { return m_dib_cb.bind(); }
auto do_cb() { return m_do_cb.bind(); }
DECLARE_READ16_MEMBER(address_bus_r);

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@ -21,14 +21,6 @@
#include "pxa255defs.h"
#define MCFG_PXA255_GPIO0_SET_CALLBACK(_devcb) \
downcast<pxa255_periphs_device &>(*device).set_gpio0_set_cb(DEVCB_##_devcb);
#define MCFG_PXA255_GPIO0_CLEAR_CALLBACK(_devcb) \
downcast<pxa255_periphs_device &>(*device).set_gpio0_clear_cb(DEVCB_##_devcb);
#define MCFG_PXA255_GPIO0_IN_CALLBACK(_devcb) \
downcast<pxa255_periphs_device &>(*device).set_gpio0_in_cb(DEVCB_##_devcb);
class pxa255_periphs_device : public device_t
{
@ -42,9 +34,9 @@ public:
pxa255_periphs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_gpio0_set_cb(Object &&cb) { return m_gpio0_set_func.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_gpio0_clear_cb(Object &&cb) { return m_gpio0_clear_func.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_gpio0_in_cb(Object &&cb) { return m_gpio0_in_func.set_callback(std::forward<Object>(cb)); }
auto gpio0_set_cb() { return m_gpio0_set_func.bind(); }
auto gpio0_clear_cb() { return m_gpio0_clear_func.bind(); }
auto gpio0_in_cb() { return m_gpio0_in_func.bind(); }
DECLARE_READ32_MEMBER(pxa255_i2s_r);
DECLARE_WRITE32_MEMBER(pxa255_i2s_w);

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@ -20,16 +20,6 @@
#include "device.h"
/*************************************
*
* Device configuration macros
*
*************************************/
/* Set the read and write group (4-bit; nibble) delegates */
#define MCFG_R10696_IO(_devcb_rd,_devcb_wr) \
downcast<r10696_device &>(*device).set_iord(DEVCB_##_devcb_rd); \
downcast<r10696_device &>(*device).set_iowr(DEVCB_##_devcb_wr);
class r10696_device : public device_t
{
@ -39,8 +29,9 @@ public:
DECLARE_READ8_MEMBER ( io_r );
DECLARE_WRITE8_MEMBER( io_w );
template <class Object> devcb_base &set_iord(Object &&cb) { return m_iord.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_iowr(Object &&cb) { return m_iowr.set_callback(std::forward<Object>(cb)); }
/* Set the read and write group (4-bit; nibble) delegates */
auto iord_cb() { return m_iord.bind(); }
auto iowr_cb() { return m_iowr.bind(); }
protected:
// device-level overrides

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@ -19,15 +19,6 @@
#include "device.h"
/*************************************
*
* Device configuration macros
*
*************************************/
/* Set the writer used to update a display digit */
#define MCFG_R10788_UPDATE(devcb) \
downcast<r10788_device &>(*device).set_update(DEVCB_##devcb);
class r10788_device : public device_t
{
@ -48,7 +39,7 @@ public:
DECLARE_READ8_MEMBER ( io_r );
DECLARE_WRITE8_MEMBER( io_w );
template <class Object> devcb_base &set_update(Object &&cb) { return m_display.set_callback(std::forward<Object>(cb)); }
auto update_cb() { return m_display.bind(); } /* Set the writer used to update a display digit */
protected:
// device-level overrides

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@ -19,21 +19,6 @@
#include "device.h"
#include "cpu/pps4/pps4.h"
/*************************************
*
* Device configuration macros
*
*************************************/
// Set the read line handler
#define MCFG_RA17XX_READ(devcb) \
downcast<ra17xx_device &>(*device).set_iord(DEVCB_##devcb);
// Set the write line handler
#define MCFG_RA17XX_WRITE(devcb) \
downcast<ra17xx_device &>(*device).set_iowr(DEVCB_##devcb);
#define MCFG_RA17XX_CPU(tag) \
downcast<ra17xx_device &>(*device).set_cpu_tag(tag);
class ra17xx_device : public device_t
{
@ -43,9 +28,9 @@ public:
DECLARE_READ8_MEMBER ( io_r );
DECLARE_WRITE8_MEMBER( io_w );
template <class Object> devcb_base &set_iord(Object &&cb) { return m_iord.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_iowr(Object &&cb) { return m_iowr.set_callback(std::forward<Object>(cb)); }
void set_cpu_tag(const char *tag) { m_cpu.set_tag(tag); }
auto iord_cb() { return m_iord.bind(); }
auto iowr_cb() { return m_iowr.bind(); }
template <typename T> void set_cpu_tag(T &&tag) { m_cpu.set_tag(std::forward<T>(tag)); }
protected:
// device-level overrides

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@ -7,8 +7,6 @@
#include "pccard.h"
#define MCFG_RF5C296_SLOT(name) \
downcast<rf5c296_device &>(*device).set_pccard(name);
class rf5c296_device : public device_t
{

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@ -12,51 +12,6 @@
#pragma once
#define MCFG_ROC10937_ADD(_tag,_val) \
MCFG_DEVICE_ADD(_tag, ROC10937,60)\
MCFG_ROC10937_PORT(_val)
#define MCFG_ROC10937_PORT(_val) \
downcast<roc10937_device &>(*device).set_port_value(_val);
#define MCFG_ROC10937_REMOVE(_tag) \
MCFG_DEVICE_REMOVE(_tag)
#define MCFG_ROC10957_ADD(_tag,_val) \
MCFG_DEVICE_ADD(_tag, ROC10957,60)\
MCFG_ROC10957_PORT(_val)
#define MCFG_ROC10957_PORT(_val) \
downcast<roc10957_device &>(*device).set_port_value(_val);
#define MCFG_ROC10957_REMOVE(_tag) \
MCFG_DEVICE_REMOVE(_tag)
#define MCFG_MSC1937_ADD(_tag,_val) \
MCFG_DEVICE_ADD(_tag, MSC1937,60)\
MCFG_MSC1937_PORT(_val)
#define MCFG_MSC1937_PORT(_val) \
downcast<msc1937_device &>(*device).set_port_value(_val);
#define MCFG_MSC1937_REMOVE(_tag) \
MCFG_DEVICE_REMOVE(_tag)
#define MCFG_MIC10937_ADD(_tag,_val) \
MCFG_DEVICE_ADD(_tag, MIC10937,60)\
MCFG_MIC10937_PORT(_val)
#define MCFG_MIC10937_PORT(_val) \
downcast<mic10937_device &>(*device).set_port_value(_val);
#define MCFG_MIC10937_REMOVE(_tag) \
MCFG_DEVICE_REMOVE(_tag)
#define MCFG_S16LF01_ADD(_tag,_val) \
MCFG_DEVICE_ADD(_tag, S16LF01,60)\
MCFG_S16LF01_PORT(_val)
#define MCFG_S16LF01_PORT(_val) \
downcast<s16lf01_device &>(*device).set_port_value(_val);
class rocvfd_device : public device_t
{
public:

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@ -26,19 +26,6 @@
#include "dirtc.h"
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_RP5C01_OUT_ALARM_CB(_devcb) \
downcast<rp5c01_device &>(*device).set_out_alarm_callback(DEVCB_##_devcb);
// include this macro if the chip is not battery backed
#define MCFG_RP5C01_REMOVE_BATTERY() \
downcast<rp5c01_device &>(*device).remove_battery();
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -53,7 +40,7 @@ public:
// construction/destruction
rp5c01_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_out_alarm_callback(Object &&cb) { return m_out_alarm_cb.set_callback(std::forward<Object>(cb)); }
auto out_alarm_callback() { return m_out_alarm_cb.bind(); }
void remove_battery() { m_battery_backed = false; }
DECLARE_READ8_MEMBER( read );

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@ -32,8 +32,6 @@ public:
// construction/destruction
rp5c15_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_out_alarm_callback(Object &&cb) { return m_out_alarm_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_clkout_callback(Object &&cb) { return m_out_clkout_cb.set_callback(std::forward<Object>(cb)); }
auto alarm() { return m_out_alarm_cb.bind(); }
auto clkout() { return m_out_clkout_cb.bind(); }

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@ -68,9 +68,6 @@ private:
DECLARE_DEVICE_TYPE(RP5H01, rp5h01_device)
#define MCFG_RP5H01_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, RP5H01, 0)
/*
* Device uses memory region
* with the same tag as the one

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@ -57,7 +57,7 @@ rtc4543_device::rtc4543_device(const machine_config &mconfig, const char *tag, d
rtc4543_device::rtc4543_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, type, tag, owner, clock)
, device_rtc_interface(mconfig, *this)
, data_cb(*this)
, m_data_cb(*this)
, m_ce(0), m_clk(0), m_wr(0), m_data(0), m_curbit(0)
, m_clock_timer(nullptr)
{
@ -70,7 +70,7 @@ rtc4543_device::rtc4543_device(const machine_config &mconfig, device_type type,
void rtc4543_device::device_start()
{
data_cb.resolve_safe();
m_data_cb.resolve_safe();
// allocate timers
m_clock_timer = timer_alloc();
@ -279,7 +279,7 @@ void rtc4543_device::load_bit(int reg)
// shift data bit
m_data = (m_regs[reg] >> bit) & 1;
data_cb(m_data);
m_data_cb(m_data);
}

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@ -15,22 +15,6 @@
#include "dirtc.h"
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_RTC4543_ADD(tag, clock) \
MCFG_DEVICE_ADD((tag), RTC4543, (clock))
#define MCFG_RTC4543_DATA_CALLBACK(cb) \
downcast<rtc4543_device &>(*device).set_data_cb(DEVCB_##cb);
#define MCFG_JRC6355E_ADD(tag, clock) \
MCFG_DEVICE_ADD((tag), JRC6355E, (clock))
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -52,7 +36,7 @@ public:
DECLARE_READ_LINE_MEMBER( data_r );
DECLARE_WRITE_LINE_MEMBER( data_w );
template <class Object> devcb_base &set_data_cb(Object &&cb) { return data_cb.set_callback(std::forward<Object>(cb)); }
auto data_cb() { return m_data_cb.bind(); }
protected:
rtc4543_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@ -76,7 +60,7 @@ protected:
void advance_bit();
void update_effective();
devcb_write_line data_cb;
devcb_write_line m_data_cb;
int m_ce;
int m_clk;

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@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Raphael Nabet, R. Belmont
/*
rtc65271.h: include file for rtc65271.c
rtc65271.h: include file for rtc65271.cpp
*/
#ifndef MAME_MACHINE_RTC65271_H
@ -10,14 +10,6 @@
#pragma once
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_RTC65271_INTERRUPT_CB(cb) \
downcast<rtc65271_device &>(*device).set_interrupt_callback(DEVCB_##cb);
// ======================> rtc65271_device
class rtc65271_device : public device_t,
@ -27,7 +19,6 @@ public:
// construction/destruction
rtc65271_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_interrupt_callback(Object &&cb) { return m_interrupt_cb.set_callback(std::forward<Object>(cb)); }
auto interrupt_cb() { return m_interrupt_cb.bind(); }
DECLARE_READ8_MEMBER( rtc_r );

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@ -14,14 +14,6 @@
#pragma once
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_RTC9701_ADD(tag) \
MCFG_DEVICE_ADD((tag), RTC9701, XTAL(32'768))
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -34,7 +26,7 @@ class rtc9701_device : public device_t,
{
public:
// construction/destruction
rtc9701_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
rtc9701_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 32'768);
// I/O operations

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@ -16,22 +16,6 @@
#define S2636_PIXEL_COLOR(p) ((p) & 0x07)
/*************************************
*
* Device configuration macros
*
*************************************/
#define MCFG_S2636_OFFSETS(yoffs, xoffs) \
downcast<s2636_device &>(*device).set_offsets((yoffs), (xoffs));
#define MCFG_S2636_DIVIDER(divider) \
downcast<s2636_device &>(*device).set_divider((divider));
#define MCFG_S2623_SET_INTREQ_CALLBACK(cb) \
downcast<s2636_device &>(*device).set_intreq_cb(DEVCB_##cb);
/*************************************
*
* Device state class
@ -49,7 +33,7 @@ public:
void set_divider(int divider) { m_divider = divider; }
template <class Object> devcb_base &set_intreq_cb(Object &&cb) { return m_intreq_cb.set_callback(std::forward<Object>(cb)); }
auto intreq_cb() { return m_intreq_cb.bind(); }
// returns a BITMAP_FORMAT_IND16 bitmap the size of the screen
// D0-D2 of each pixel is the pixel color

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@ -12,14 +12,6 @@ Seiko/Epson S-3520CF
#pragma once
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_S3520CF_ADD(tag) \
MCFG_DEVICE_ADD((tag), S3520CF, XTAL(32'768))
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -30,7 +22,7 @@ class s3520cf_device : public device_t
{
public:
// construction/destruction
s3520cf_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
s3520cf_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 32'768);
// I/O operations
DECLARE_READ_LINE_MEMBER( read_bit );

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@ -15,48 +15,6 @@
#include "emupal.h"
/*******************************************************************************
MACROS / CONSTANTS
*******************************************************************************/
#define S3C2400_TAG "s3c2400"
#define MCFG_S3C2400_PALETTE(palette_tag) \
downcast<s3c2400_device &>(*device).set_palette_tag(palette_tag);
#define MCFG_S3C2400_SCREEN(screen_tag) \
downcast<s3c2400_device &>(*device).set_screen_tag(screen_tag);
#define MCFG_S3C2400_CORE_PIN_R_CB(cb) \
downcast<s3c2400_device &>(*device).set_core_pin_r_callback(DEVCB_##cb);
#define MCFG_S3C2400_CORE_PIN_W_CB(cb) \
downcast<s3c2400_device &>(*device).set_core_pin_w_callback(DEVCB_##cb);
#define MCFG_S3C2400_GPIO_PORT_R_CB(cb) \
downcast<s3c2400_device &>(*device).set_gpio_port_r_callback(DEVCB_##cb);
#define MCFG_S3C2400_GPIO_PORT_W_CB(cb) \
downcast<s3c2400_device &>(*device).set_gpio_port_w_callback(DEVCB_##cb);
#define MCFG_S3C2400_I2C_SCL_W_CB(cb) \
downcast<s3c2400_device &>(*device).set_i2c_scl_w_callback(DEVCB_##cb);
#define MCFG_S3C2400_I2C_SDA_R_CB(cb) \
downcast<s3c2400_device &>(*device).set_i2c_sda_r_callback(DEVCB_##cb);
#define MCFG_S3C2400_I2C_SDA_W_CB(cb) \
downcast<s3c2400_device &>(*device).set_i2c_sda_w_callback(DEVCB_##cb);
#define MCFG_S3C2400_ADC_DATA_R_CB(cb) \
downcast<s3c2400_device &>(*device).set_adc_data_r_callback(DEVCB_##cb);
#define MCFG_S3C2400_I2S_DATA_W_CB(cb) \
downcast<s3c2400_device &>(*device).set_i2s_data_w_callback(DEVCB_##cb);
#define MCFG_S3C2400_LCD_FLAGS(flags) \
downcast<s3c2400_device &>(*device).set_lcd_flags((flags));
enum
{
S3C2400_GPIO_PORT_A = 0,
@ -162,17 +120,17 @@ public:
~s3c2400_device();
// configuration
void set_palette_tag(const char *tag) { m_palette.set_tag(tag); }
void set_screen_tag(const char *tag) { m_screen.set_tag(tag); }
template <class Object> devcb_base &set_core_pin_r_callback(Object &&cb) { return m_pin_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_core_pin_w_callback(Object &&cb) { return m_pin_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_gpio_port_r_callback(Object &&cb) { return m_port_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_gpio_port_w_callback(Object &&cb) { return m_port_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_i2c_scl_w_callback(Object &&cb) { return m_scl_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_i2c_sda_r_callback(Object &&cb) { return m_sda_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_i2c_sda_w_callback(Object &&cb) { return m_sda_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_adc_data_r_callback(Object &&cb) { return m_data_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_i2s_data_w_callback(Object &&cb) { return m_data_w_cb.set_callback(std::forward<Object>(cb)); }
template <typename T> void set_palette_tag(T &&tag) { m_palette.set_tag(std::forward<T>(tag)); }
template <typename T> void set_screen_tag(T &&tag) { m_screen.set_tag(std::forward<T>(tag)); }
auto core_pin_r_callback() { return m_pin_r_cb.bind(); }
auto core_pin_w_callback() { return m_pin_w_cb.bind(); }
auto gpio_port_r_callback() { return m_port_r_cb.bind(); }
auto gpio_port_w_callback() { return m_port_w_cb.bind(); }
auto i2c_scl_w_callback() { return m_scl_w_cb.bind(); }
auto i2c_sda_r_callback() { return m_sda_r_cb.bind(); }
auto i2c_sda_w_callback() { return m_sda_w_cb.bind(); }
auto adc_data_r_callback() { return m_data_r_cb.bind(); }
auto i2s_data_w_callback() { return m_data_w_cb.bind(); }
void set_lcd_flags(int flags) { m_flags = flags; }
protected:

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@ -15,60 +15,6 @@
#include "emupal.h"
/*******************************************************************************
MACROS / CONSTANTS
*******************************************************************************/
#define S3C2410_TAG "s3c2410"
#define MCFG_S3C2410_PALETTE(palette_tag) \
downcast<s3c2410_device &>(*device).set_palette_tag(palette_tag);
#define MCFG_S3C2410_SCREEN(screen_tag) \
downcast<s3c2410_device &>(*device).set_screen_tag(screen_tag);
#define MCFG_S3C2410_CORE_PIN_R_CB(cb) \
downcast<s3c2410_device &>(*device).set_core_pin_r_callback(DEVCB_##cb);
#define MCFG_S3C2410_CORE_PIN_W_CB(cb) \
downcast<s3c2410_device &>(*device).set_core_pin_w_callback(DEVCB_##cb);
#define MCFG_S3C2410_GPIO_PORT_R_CB(cb) \
downcast<s3c2410_device &>(*device).set_gpio_port_r_callback(DEVCB_##cb);
#define MCFG_S3C2410_GPIO_PORT_W_CB(cb) \
downcast<s3c2410_device &>(*device).set_gpio_port_w_callback(DEVCB_##cb);
#define MCFG_S3C2410_I2C_SCL_W_CB(cb) \
downcast<s3c2410_device &>(*device).set_i2c_scl_w_callback(DEVCB_##cb);
#define MCFG_S3C2410_I2C_SDA_R_CB(cb) \
downcast<s3c2410_device &>(*device).set_i2c_sda_r_callback(DEVCB_##cb);
#define MCFG_S3C2410_I2C_SDA_W_CB(cb) \
downcast<s3c2410_device &>(*device).set_i2c_sda_w_callback(DEVCB_##cb);
#define MCFG_S3C2410_ADC_DATA_R_CB(cb) \
downcast<s3c2410_device &>(*device).set_adc_data_r_callback(DEVCB_##cb);
#define MCFG_S3C2410_I2S_DATA_W_CB(cb) \
downcast<s3c2410_device &>(*device).set_i2s_data_w_callback(DEVCB_##cb);
#define MCFG_S3C2410_NAND_COMMAND_W_CB(cb) \
downcast<s3c2410_device &>(*device).set_nand_command_w_callback(DEVCB_##cb);
#define MCFG_S3C2410_NAND_ADDRESS_W_CB(cb) \
downcast<s3c2410_device &>(*device).set_nand_address_w_callback(DEVCB_##cb);
#define MCFG_S3C2410_NAND_DATA_R_CB(cb) \
downcast<s3c2410_device &>(*device).set_nand_data_r_callback(DEVCB_##cb);
#define MCFG_S3C2410_NAND_DATA_W_CB(cb) \
downcast<s3c2410_device &>(*device).set_nand_data_w_callback(DEVCB_##cb);
#define MCFG_S3C2410_LCD_FLAGS(flags) \
downcast<s3c2410_device &>(*device).set_lcd_flags((flags));
enum
{
S3C2410_GPIO_PORT_A = 0,
@ -192,21 +138,21 @@ public:
~s3c2410_device();
// configuration
void set_palette_tag(const char *tag) { m_palette.set_tag(tag); }
void set_screen_tag(const char *tag) { m_screen.set_tag(tag); }
template <class Object> devcb_base &set_core_pin_r_callback(Object &&cb) { return m_pin_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_core_pin_w_callback(Object &&cb) { return m_pin_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_gpio_port_r_callback(Object &&cb) { return m_port_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_gpio_port_w_callback(Object &&cb) { return m_port_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_i2c_scl_w_callback(Object &&cb) { return m_scl_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_i2c_sda_r_callback(Object &&cb) { return m_sda_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_i2c_sda_w_callback(Object &&cb) { return m_sda_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_adc_data_r_callback(Object &&cb) { return m_data_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_i2s_data_w_callback(Object &&cb) { return m_data_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_nand_command_w_callback(Object &&cb) { return m_command_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_nand_address_w_callback(Object &&cb) { return m_address_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_nand_data_r_callback(Object &&cb) { return m_nand_data_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_nand_data_w_callback(Object &&cb) { return m_nand_data_w_cb.set_callback(std::forward<Object>(cb)); }
template <typename T> void set_palette_tag(T &&tag) { m_palette.set_tag(std::forward<T>(tag)); }
template <typename T> void set_screen_tag(T &&tag) { m_screen.set_tag(std::forward<T>(tag)); }
auto core_pin_r_callback() { return m_pin_r_cb.bind(); }
auto core_pin_w_callback() { return m_pin_w_cb.bind(); }
auto gpio_port_r_callback() { return m_port_r_cb.bind(); }
auto gpio_port_w_callback() { return m_port_w_cb.bind(); }
auto i2c_scl_w_callback() { return m_scl_w_cb.bind(); }
auto i2c_sda_r_callback() { return m_sda_r_cb.bind(); }
auto i2c_sda_w_callback() { return m_sda_w_cb.bind(); }
auto adc_data_r_callback() { return m_data_r_cb.bind(); }
auto i2s_data_w_callback() { return m_data_w_cb.bind(); }
auto nand_command_w_callback() { return m_command_w_cb.bind(); }
auto nand_address_w_callback() { return m_address_w_cb.bind(); }
auto nand_data_r_callback() { return m_nand_data_r_cb.bind(); }
auto nand_data_w_callback() { return m_nand_data_w_cb.bind(); }
void set_lcd_flags(int flags) { m_flags = flags; }
DECLARE_WRITE_LINE_MEMBER( frnb_w );

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@ -14,60 +14,9 @@
#include "s3c24xx.h"
#include "emupal.h"
/*******************************************************************************
MACROS / CONSTANTS
*******************************************************************************/
#define S3C2440_TAG "s3c2440"
#define MCFG_S3C2440_PALETTE(_palette_tag) \
downcast<s3c2440_device &>(*device).set_palette_tag(_palette_tag);
#define MCFG_S3C2440_SCREEN(screen_tag) \
downcast<s3c2440_device &>(*device).set_screen_tag(screen_tag);
#define MCFG_S3C2440_CORE_PIN_R_CB(_devcb) \
downcast<s3c2440_device &>(*device).set_core_pin_r_callback(DEVCB_##_devcb);
#define MCFG_S3C2440_CORE_PIN_W_CB(_devcb) \
downcast<s3c2440_device &>(*device).set_core_pin_w_callback(DEVCB_##_devcb);
#define MCFG_S3C2440_GPIO_PORT_R_CB(_devcb) \
downcast<s3c2440_device &>(*device).set_gpio_port_r_callback(DEVCB_##_devcb);
#define MCFG_S3C2440_GPIO_PORT_W_CB(_devcb) \
downcast<s3c2440_device &>(*device).set_gpio_port_w_callback(DEVCB_##_devcb);
#define MCFG_S3C2440_I2C_SCL_W_CB(_devcb) \
downcast<s3c2440_device &>(*device).set_i2c_scl_w_callback(DEVCB_##_devcb);
#define MCFG_S3C2440_I2C_SDA_R_CB(_devcb) \
downcast<s3c2440_device &>(*device).set_i2c_sda_r_callback(DEVCB_##_devcb);
#define MCFG_S3C2440_I2C_SDA_W_CB(_devcb) \
downcast<s3c2440_device &>(*device).set_i2c_sda_w_callback(DEVCB_##_devcb);
#define MCFG_S3C2440_ADC_DATA_R_CB(_devcb) \
downcast<s3c2440_device &>(*device).set_adc_data_r_callback(DEVCB_##_devcb);
#define MCFG_S3C2440_I2S_DATA_W_CB(_devcb) \
downcast<s3c2440_device &>(*device).set_i2s_data_w_callback(DEVCB_##_devcb);
#define MCFG_S3C2440_NAND_COMMAND_W_CB(_devcb) \
downcast<s3c2440_device &>(*device).set_nand_command_w_callback(DEVCB_##_devcb);
#define MCFG_S3C2440_NAND_ADDRESS_W_CB(_devcb) \
downcast<s3c2440_device &>(*device).set_nand_address_w_callback(DEVCB_##_devcb);
#define MCFG_S3C2440_NAND_DATA_R_CB(_devcb) \
downcast<s3c2440_device &>(*device).set_nand_data_r_callback(DEVCB_##_devcb);
#define MCFG_S3C2440_NAND_DATA_W_CB(_devcb) \
downcast<s3c2440_device &>(*device).set_nand_data_w_callback(DEVCB_##_devcb);
#define MCFG_S3C2440_LCD_FLAGS(_flags) \
downcast<s3c2440_device &>(*device).set_lcd_flags(_flags);
enum
{
S3C2440_GPIO_PORT_A = 0,
@ -209,21 +158,21 @@ public:
~s3c2440_device();
// configuration
void set_palette_tag(const char *tag) { m_palette.set_tag(tag); }
void set_screen_tag(const char *tag) { m_screen.set_tag(tag); }
template <class Object> devcb_base &set_core_pin_r_callback(Object &&cb) { return m_pin_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_core_pin_w_callback(Object &&cb) { return m_pin_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_gpio_port_r_callback(Object &&cb) { return m_port_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_gpio_port_w_callback(Object &&cb) { return m_port_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_i2c_scl_w_callback(Object &&cb) { return m_scl_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_i2c_sda_r_callback(Object &&cb) { return m_sda_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_i2c_sda_w_callback(Object &&cb) { return m_sda_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_adc_data_r_callback(Object &&cb) { return m_data_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_i2s_data_w_callback(Object &&cb) { return m_data_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_nand_command_w_callback(Object &&cb) { return m_command_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_nand_address_w_callback(Object &&cb) { return m_address_w_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_nand_data_r_callback(Object &&cb) { return m_nand_data_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_nand_data_w_callback(Object &&cb) { return m_nand_data_w_cb.set_callback(std::forward<Object>(cb)); }
template <typename T> void set_palette_tag(T &&tag) { m_palette.set_tag(std::forward<T>(tag)); }
template <typename T> void set_screen_tag(T &&tag) { m_screen.set_tag(std::forward<T>(tag)); }
auto core_pin_r_callback() { return m_pin_r_cb.bind(); }
auto core_pin_w_callback() { return m_pin_w_cb.bind(); }
auto gpio_port_r_callback() { return m_port_r_cb.bind(); }
auto gpio_port_w_callback() { return m_port_w_cb.bind(); }
auto i2c_scl_w_callback() { return m_scl_w_cb.bind(); }
auto i2c_sda_r_callback() { return m_sda_r_cb.bind(); }
auto i2c_sda_w_callback() { return m_sda_w_cb.bind(); }
auto adc_data_r_callback() { return m_data_r_cb.bind(); }
auto i2s_data_w_callback() { return m_data_w_cb.bind(); }
auto nand_command_w_callback() { return m_command_w_cb.bind(); }
auto nand_address_w_callback() { return m_address_w_cb.bind(); }
auto nand_data_r_callback() { return m_nand_data_r_cb.bind(); }
auto nand_data_w_callback() { return m_nand_data_w_cb.bind(); }
void set_lcd_flags(int flags) { m_flags = flags; }
DECLARE_WRITE_LINE_MEMBER( frnb_w );

View File

@ -32,69 +32,6 @@
#pragma once
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
// NB: This is effectively an aggregate of the X and Y inputs.
#define MCFG_SAA1043_TYPE(_type) \
&downcast<saa1043_device &>(*device).set_type(_type);
#define MCFG_SAA1043_BC_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_bc_callback(DEVCB_##_write);
#define MCFG_SAA1043_FH2_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_fh2_callback(DEVCB_##_write);
#define MCFG_SAA1043_FH3_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_fh3_callback(DEVCB_##_write);
#define MCFG_SAA1043_FH80_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_fh80_callback(DEVCB_##_write);
#define MCFG_SAA1043_PH_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_ph_callback(DEVCB_##_write);
#define MCFG_SAA1043_NS_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_ns_callback(DEVCB_##_write);
#define MCFG_SAA1043_RI_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_ri_callback(DEVCB_##_write);
#define MCFG_SAA1043_WMP_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_wmp_callback(DEVCB_##_write);
#define MCFG_SAA1043_RR_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_rr_callback(DEVCB_##_write);
#define MCFG_SAA1043_V1_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_v1_callback(DEVCB_##_write);
#define MCFG_SAA1043_V2_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_v2_callback(DEVCB_##_write);
#define MCFG_SAA1043_CLP_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_clp_callback(DEVCB_##_write);
#define MCFG_SAA1043_DL_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_dl_callback(DEVCB_##_write);
#define MCFG_SAA1043_H1_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_h1_callback(DEVCB_##_write);
#define MCFG_SAA1043_H2_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_h2_callback(DEVCB_##_write);
#define MCFG_SAA1043_CB_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_cb_callback(DEVCB_##_write);
#define MCFG_SAA1043_CS_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_cs_callback(DEVCB_##_write);
#define MCFG_SAA1043_ID_CALLBACK(_write) \
downcast<saa1043_device &>(*device).set_id_callback(DEVCB_##_write);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -141,24 +78,24 @@ public:
void set_type(signal_type type) { m_type = type; }
template <class Object> devcb_base &set_bc_callback(Object &&cb) { m_outputs_hooked[BC] = true; return m_outputs[BC].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_fh2_callback(Object &&cb) { m_outputs_hooked[FH2] = true; return m_outputs[FH2].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_fh3_callback(Object &&cb) { m_outputs_hooked[FH3] = true; return m_outputs[FH3].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_fh80_callback(Object &&cb) { m_outputs_hooked[FH80] = true; return m_outputs[FH80].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_ph_callback(Object &&cb) { m_outputs_hooked[PH] = true; return m_outputs[PH].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_ns_callback(Object &&cb) { m_outputs_hooked[NS] = true; return m_outputs[NS].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_ri_callback(Object &&cb) { m_outputs_hooked[RI] = true; return m_outputs[RI].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_wmp_callback(Object &&cb) { m_outputs_hooked[WMP] = true; return m_outputs[WMP].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_rr_callback(Object &&cb) { m_outputs_hooked[RR] = true; return m_outputs[RR].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_v1_callback(Object &&cb) { m_outputs_hooked[V1] = true; return m_outputs[V1].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_v2_callback(Object &&cb) { m_outputs_hooked[V2] = true; return m_outputs[V2].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_clp_callback(Object &&cb) { m_outputs_hooked[CLP] = true; return m_outputs[CLP].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_dl_callback(Object &&cb) { m_outputs_hooked[DL] = true; return m_outputs[DL].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_h1_callback(Object &&cb) { m_outputs_hooked[H1] = true; return m_outputs[H1].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_h2_callback(Object &&cb) { m_outputs_hooked[H2] = true; return m_outputs[H2].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_cb_callback(Object &&cb) { m_outputs_hooked[CB] = true; return m_outputs[CB].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_cs_callback(Object &&cb) { m_outputs_hooked[CS] = true; return m_outputs[CS].set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_id_callback(Object &&cb) { m_outputs_hooked[ID] = true; return m_outputs[ID].set_callback(std::forward<Object>(cb)); }
auto bc_callback() { m_outputs_hooked[BC] = true; return m_outputs[BC].bind(); }
auto fh2_callback() { m_outputs_hooked[FH2] = true; return m_outputs[FH2].bind(); }
auto fh3_callback() { m_outputs_hooked[FH3] = true; return m_outputs[FH3].bind(); }
auto fh80_callback() { m_outputs_hooked[FH80] = true; return m_outputs[FH80].bind(); }
auto ph_callback() { m_outputs_hooked[PH] = true; return m_outputs[PH].bind(); }
auto ns_callback() { m_outputs_hooked[NS] = true; return m_outputs[NS].bind(); }
auto ri_callback() { m_outputs_hooked[RI] = true; return m_outputs[RI].bind(); }
auto wmp_callback() { m_outputs_hooked[WMP] = true; return m_outputs[WMP].bind(); }
auto rr_callback() { m_outputs_hooked[RR] = true; return m_outputs[RR].bind(); }
auto v1_callback() { m_outputs_hooked[V1] = true; return m_outputs[V1].bind(); }
auto v2_callback() { m_outputs_hooked[V2] = true; return m_outputs[V2].bind(); }
auto clp_callback() { m_outputs_hooked[CLP] = true; return m_outputs[CLP].bind(); }
auto dl_callback() { m_outputs_hooked[DL] = true; return m_outputs[DL].bind(); }
auto h1_callback() { m_outputs_hooked[H1] = true; return m_outputs[H1].bind(); }
auto h2_callback() { m_outputs_hooked[H2] = true; return m_outputs[H2].bind(); }
auto cb_callback() { m_outputs_hooked[CB] = true; return m_outputs[CB].bind(); }
auto cs_callback() { m_outputs_hooked[CS] = true; return m_outputs[CS].bind(); }
auto id_callback() { m_outputs_hooked[ID] = true; return m_outputs[ID].bind(); }
protected:
// device-level overrides

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@ -44,78 +44,6 @@
#include "machine/z80daisy.h"
#include "diserial.h"
//**************************************************************************
// DEVICE CONFIGURATION MACROS
//**************************************************************************
//#define LOCAL_BRG 0 FIXME - what is this for? the name is overly generic and shouldn't be in global namespace
/* Variant ADD macros - use the right one to enable the right feature set! */
#define MCFG_DUSCC26562_ADD(_tag, _clock, _rxa, _txa, _rxb, _txb) \
MCFG_DEVICE_ADD(_tag, DUSCC26562, _clock) \
MCFG_DUSCC_OFFSETS(_rxa, _txa, _rxb, _txb)
#define MCFG_DUSCC26C562_ADD(_tag, _clock, _rxa, _txa, _rxb, _txb) \
MCFG_DEVICE_ADD(_tag, DUSCC26C562, _clock) \
MCFG_DUSCC_OFFSETS(_rxa, _txa, _rxb, _txb)
#define MCFG_DUSCC68562_ADD(_tag, _clock, _rxa, _txa, _rxb, _txb) \
MCFG_DEVICE_ADD(_tag, DUSCC68562, _clock) \
MCFG_DUSCC_OFFSETS(_rxa, _txa, _rxb, _txb)
#define MCFG_DUSCC68C562_ADD(_tag, _clock, _rxa, _txa, _rxb, _txb) \
MCFG_DEVICE_ADD(_tag, DUSCC68C562, _clock) \
MCFG_DUSCC_OFFSETS(_rxa, _txa, _rxb, _txb)
/* generic ADD macro - Avoid using it directly, see above for correct variant instead */
#define MCFG_DUSCC_ADD(_tag, _clock, _rxa, _txa, _rxb, _txb) \
MCFG_DEVICE_ADD(_tag, DUSCC, _clock) \
MCFG_DUSCC_OFFSETS(_rxa, _txa, _rxb, _txb)
/* Generic macros */
#define MCFG_DUSCC_OFFSETS(_rxa, _txa, _rxb, _txb) \
downcast<duscc_device &>(*device).configure_channels(_rxa, _txa, _rxb, _txb);
// Port A callbacks
#define MCFG_DUSCC_OUT_TXDA_CB(_devcb) \
downcast<duscc_device &>(*device).set_out_txda_callback(DEVCB_##_devcb);
#define MCFG_DUSCC_OUT_DTRA_CB(_devcb) \
downcast<duscc_device &>(*device).set_out_dtra_callback(DEVCB_##_devcb);
#define MCFG_DUSCC_OUT_RTSA_CB(_devcb) \
downcast<duscc_device &>(*device).set_out_rtsa_callback(DEVCB_##_devcb);
#define MCFG_DUSCC_OUT_SYNCA_CB(_devcb) \
downcast<duscc_device &>(*device).set_out_synca_callback(DEVCB_##_devcb);
#define MCFG_DUSCC_OUT_TRXCA_CB(_devcb) \
downcast<duscc_device &>(*device).set_out_trxca_callback(DEVCB_##_devcb);
#define MCFG_DUSCC_OUT_RTXCA_CB(_devcb) \
downcast<duscc_device &>(*device).set_out_rtxca_callback(DEVCB_##_devcb);
// Port B callbacks
#define MCFG_DUSCC_OUT_TXDB_CB(_devcb) \
downcast<duscc_device &>(*device).set_out_txdb_callback(DEVCB_##_devcb);
#define MCFG_DUSCC_OUT_DTRB_CB(_devcb) \
downcast<duscc_device &>(*device).set_out_dtrb_callback(DEVCB_##_devcb);
#define MCFG_DUSCC_OUT_RTSB_CB(_devcb) \
downcast<duscc_device &>(*device).set_out_rtsb_callback(DEVCB_##_devcb);
#define MCFG_DUSCC_OUT_SYNCB_CB(_devcb) \
downcast<duscc_device &>(*device).set_out_syncb_callback(DEVCB_##_devcb);
#define MCFG_DUSCC_OUT_TRXCB_CB(_devcb) \
downcast<duscc_device &>(*device).set_out_trxcb_callback(DEVCB_##_devcb);
#define MCFG_DUSCC_OUT_RTXCB_CB(_devcb) \
downcast<duscc_device &>(*device).set_out_rtxcb_callback(DEVCB_##_devcb);
#define MCFG_DUSCC_OUT_INT_CB(_devcb) \
downcast<duscc_device &>(*device).set_out_int_callback(DEVCB_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
@ -608,20 +536,20 @@ public:
// construction/destruction
duscc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_out_txda_callback(Object &&cb) { return m_out_txda_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_dtra_callback(Object &&cb) { return m_out_dtra_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_rtsa_callback(Object &&cb) { return m_out_rtsa_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_synca_callback(Object &&cb) { return m_out_synca_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_rtxca_callback(Object &&cb) { return m_out_rtxca_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_trxca_callback(Object &&cb) { return m_out_trxca_cb.set_callback(std::forward<Object>(cb)); }
auto out_txda_callback() { return m_out_txda_cb.bind(); }
auto out_dtra_callback() { return m_out_dtra_cb.bind(); }
auto out_rtsa_callback() { return m_out_rtsa_cb.bind(); }
auto out_synca_callback() { return m_out_synca_cb.bind(); }
auto out_rtxca_callback() { return m_out_rtxca_cb.bind(); }
auto out_trxca_callback() { return m_out_trxca_cb.bind(); }
template <class Object> devcb_base &set_out_txdb_callback(Object &&cb) { return m_out_txdb_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_dtrb_callback(Object &&cb) { return m_out_dtrb_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_rtsb_callback(Object &&cb) { return m_out_rtsb_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_syncb_callback(Object &&cb) { return m_out_syncb_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_rtxcb_callback(Object &&cb) { return m_out_rtxcb_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_trxcb_callback(Object &&cb) { return m_out_trxcb_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_int_callback(Object &&cb) { return m_out_int_cb.set_callback(std::forward<Object>(cb)); }
auto out_txdb_callback() { return m_out_txdb_cb.bind(); }
auto out_dtrb_callback() { return m_out_dtrb_cb.bind(); }
auto out_rtsb_callback() { return m_out_rtsb_cb.bind(); }
auto out_syncb_callback() { return m_out_syncb_cb.bind(); }
auto out_rtxcb_callback() { return m_out_rtxcb_cb.bind(); }
auto out_trxcb_callback() { return m_out_trxcb_cb.bind(); }
auto out_int_callback() { return m_out_int_cb.bind(); }
void configure_channels(int rxa, int txa, int rxb, int txb)
{

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@ -273,17 +273,18 @@ MACHINE_START_MEMBER(_39in1_state,60in1)
}
}
MACHINE_CONFIG_START(_39in1_state::_39in1)
MCFG_DEVICE_ADD("maincpu", PXA255, 200000000)
MCFG_DEVICE_PROGRAM_MAP(_39in1_map)
void _39in1_state::_39in1(machine_config &config)
{
PXA255(config, m_maincpu, 200000000);
m_maincpu->set_addrmap(AS_PROGRAM, &_39in1_state::_39in1_map);
EEPROM_93C66_16BIT(config, "eeprom");
MCFG_DEVICE_ADD("pxa_periphs", PXA255_PERIPHERALS, 200000000, "maincpu")
MCFG_PXA255_GPIO0_SET_CALLBACK(WRITE32(*this, _39in1_state, eeprom_set_w))
MCFG_PXA255_GPIO0_CLEAR_CALLBACK(WRITE32(*this, _39in1_state, eeprom_clear_w))
MCFG_PXA255_GPIO0_IN_CALLBACK(READ32(*this, _39in1_state, eeprom_r))
MACHINE_CONFIG_END
PXA255_PERIPHERALS(config, m_pxa_periphs, 200000000, m_maincpu);
m_pxa_periphs->gpio0_set_cb().set(FUNC(_39in1_state::eeprom_set_w));
m_pxa_periphs->gpio0_clear_cb().set(FUNC(_39in1_state::eeprom_clear_w));
m_pxa_periphs->gpio0_in_cb().set(FUNC(_39in1_state::eeprom_r));
}
MACHINE_CONFIG_START(_39in1_state::_60in1)
_39in1(config);

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@ -1855,7 +1855,7 @@ MACHINE_CONFIG_START(a3000_state::a3000)
ADDRESS_MAP_BANK(config, "overlay").set_map(&amiga_state::overlay_1mb_map32).set_options(ENDIANNESS_BIG, 32, 22, 0x200000);
// real-time clock
MCFG_DEVICE_ADD("rtc", RP5C01, XTAL(32'768))
RP5C01(config, "rtc", XTAL(32'768));
// todo: zorro3 slots, super dmac, scsi
@ -2056,7 +2056,7 @@ MACHINE_CONFIG_START(a4000_state::a4000)
MCFG_VIDEO_START_OVERRIDE(amiga_state, amiga_aga)
// real-time clock
MCFG_DEVICE_ADD("rtc", RP5C01, XTAL(32'768))
RP5C01(config, "rtc", XTAL(32'768));
// ide
ata_interface_device &ata(ATA_INTERFACE(config, "ata").options(ata_devices, "hdd", nullptr, false));

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@ -2126,7 +2126,7 @@ MACHINE_CONFIG_START(megast_state::megast)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
// devices
MCFG_DEVICE_ADD(RP5C15_TAG, RP5C15, XTAL(32'768))
RP5C15(config, RP5C15_TAG, XTAL(32'768));
WD1772(config, m_fdc, Y2/4);
m_fdc->intrq_wr_callback().set(m_mfp, FUNC(mc68901_device::i5_w)).invert();
@ -2297,7 +2297,7 @@ MACHINE_CONFIG_START(megaste_state::megaste)
ste(config);
MCFG_DEVICE_MODIFY(M68000_TAG)
MCFG_DEVICE_PROGRAM_MAP(megaste_map)
MCFG_DEVICE_ADD(RP5C15_TAG, RP5C15, XTAL(32'768))
RP5C15(config, RP5C15_TAG, XTAL(32'768));
SCC8530(config, Z8530_TAG, Y2/4);
/* internal ram */

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@ -790,8 +790,8 @@ MACHINE_CONFIG_START(avigo_state::avigo)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
/* real time clock */
MCFG_DEVICE_ADD("rtc", TC8521, XTAL(32'768))
MCFG_RP5C01_OUT_ALARM_CB(WRITELINE(*this, avigo_state, tc8521_alarm_int))
tc8521_device &rtc(TC8521(config, "rtc", XTAL(32'768)));
rtc.out_alarm_callback().set(FUNC(avigo_state::tc8521_alarm_int));
/* flash ROMs */
AMD_29F080(config, "flash0");

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@ -404,7 +404,7 @@ MACHINE_CONFIG_START(bfmsys85_state::bfmsys85)
MCFG_DEVICE_ADD("maincpu", M6809, MASTER_CLOCK/4) // 6809 CPU at 1 Mhz
MCFG_DEVICE_PROGRAM_MAP(memmap) // setup read and write memorymap
MCFG_DEVICE_PERIODIC_INT_DRIVER(bfmsys85_state, timer_irq, 1000) // generate 1000 IRQ's per second
MCFG_MSC1937_ADD("vfd",0)
MSC1937(config, m_vfd);
ACIA6850(config, m_acia6850_0, 0);
m_acia6850_0->txd_handler().set(FUNC(bfmsys85_state::sys85_data_w));

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@ -475,7 +475,7 @@ MACHINE_CONFIG_START(cv1k_state::cv1k)
MCFG_DEVICE_IO_MAP(cv1k_port)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", cv1k_state, irq2_line_hold)
MCFG_RTC9701_ADD("eeprom")
RTC9701(config, m_eeprom);
SERFLASH(config, m_serflash, 0);
/* video hardware */

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@ -160,7 +160,7 @@ READ8_MEMBER(cvs_state::cvs_s2636_0_or_character_ram_r)
if (m_s2650_flag)
return m_character_ram[(0 * 0x800) | 0x400 | m_character_ram_page_start | offset];
else
return m_s2636_0->read_data(space, offset);
return m_s2636[0]->read_data(space, offset);
}
WRITE8_MEMBER(cvs_state::cvs_s2636_0_or_character_ram_w)
@ -172,7 +172,7 @@ WRITE8_MEMBER(cvs_state::cvs_s2636_0_or_character_ram_w)
m_gfxdecode->gfx(1)->mark_dirty((offset / 8) % 256);
}
else
m_s2636_0->write_data(space, offset, data);
m_s2636[0]->write_data(space, offset, data);
}
@ -181,7 +181,7 @@ READ8_MEMBER(cvs_state::cvs_s2636_1_or_character_ram_r)
if (m_s2650_flag)
return m_character_ram[(1 * 0x800) | 0x400 | m_character_ram_page_start | offset];
else
return m_s2636_1->read_data(space, offset);
return m_s2636[1]->read_data(space, offset);
}
WRITE8_MEMBER(cvs_state::cvs_s2636_1_or_character_ram_w)
@ -193,7 +193,7 @@ WRITE8_MEMBER(cvs_state::cvs_s2636_1_or_character_ram_w)
m_gfxdecode->gfx(1)->mark_dirty((offset / 8) % 256);
}
else
m_s2636_1->write_data(space, offset, data);
m_s2636[1]->write_data(space, offset, data);
}
@ -202,7 +202,7 @@ READ8_MEMBER(cvs_state::cvs_s2636_2_or_character_ram_r)
if (m_s2650_flag)
return m_character_ram[(2 * 0x800) | 0x400 | m_character_ram_page_start | offset];
else
return m_s2636_2->read_data(space, offset);
return m_s2636[2]->read_data(space, offset);
}
WRITE8_MEMBER(cvs_state::cvs_s2636_2_or_character_ram_w)
@ -214,7 +214,7 @@ WRITE8_MEMBER(cvs_state::cvs_s2636_2_or_character_ram_w)
m_gfxdecode->gfx(1)->mark_dirty((offset / 8) % 256);
}
else
m_s2636_2->write_data(space, offset, data);
m_s2636[2]->write_data(space, offset, data);
}
@ -1005,14 +1005,14 @@ MACHINE_CONFIG_START(cvs_state::cvs)
MCFG_SCREEN_UPDATE_DRIVER(cvs_state, screen_update_cvs)
MCFG_SCREEN_PALETTE("palette")
MCFG_DEVICE_ADD("s2636_0", S2636, 0)
MCFG_S2636_OFFSETS(CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET)
S2636(config, m_s2636[0], 0);
m_s2636[0]->set_offsets(CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
MCFG_DEVICE_ADD("s2636_1", S2636, 0)
MCFG_S2636_OFFSETS(CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET)
S2636(config, m_s2636[1], 0);
m_s2636[1]->set_offsets(CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
MCFG_DEVICE_ADD("s2636_2", S2636, 0)
MCFG_S2636_OFFSETS(CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET)
S2636(config, m_s2636[2], 0);
m_s2636[2]->set_offsets(CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
/* audio hardware */
SPEAKER(config, "speaker").front_center();

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@ -638,7 +638,7 @@ MACHINE_CONFIG_START(digel804_state::digel804)
MCFG_DEVICE_IO_MAP(z80_io_1_4)
MCFG_QUANTUM_TIME(attotime::from_hz(60))
MCFG_ROC10937_ADD("vfd",0) // RIGHT_TO_LEFT
ROC10937(config, m_vfd); // RIGHT_TO_LEFT
/* video hardware */
config.set_default_layout(layout_digel804);

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@ -689,29 +689,31 @@ MACHINE_CONFIG_START(cpu30_state::cpu30)
#define RS232P3_TAG "rs232p3"
#define RS232P4_TAG "rs232p4"
MCFG_DUSCC68562_ADD("duscc", DUSCC_CLOCK, 0, 0, 0, 0 )
DUSCC68562(config, m_dusccterm, DUSCC_CLOCK);
m_dusccterm->configure_channels(0, 0, 0, 0);
/* Port 1 on Port B */
MCFG_DUSCC_OUT_TXDB_CB(WRITELINE(RS232P1_TAG, rs232_port_device, write_txd))
MCFG_DUSCC_OUT_DTRB_CB(WRITELINE(RS232P1_TAG, rs232_port_device, write_dtr))
MCFG_DUSCC_OUT_RTSB_CB(WRITELINE(RS232P1_TAG, rs232_port_device, write_rts))
m_dusccterm->out_txdb_callback().set(RS232P1_TAG, FUNC(rs232_port_device::write_txd));
m_dusccterm->out_dtrb_callback().set(RS232P1_TAG, FUNC(rs232_port_device::write_dtr));
m_dusccterm->out_rtsb_callback().set(RS232P1_TAG, FUNC(rs232_port_device::write_rts));
/* Port 4 on Port A */
MCFG_DUSCC_OUT_TXDA_CB(WRITELINE(RS232P4_TAG, rs232_port_device, write_txd))
MCFG_DUSCC_OUT_DTRA_CB(WRITELINE(RS232P4_TAG, rs232_port_device, write_dtr))
MCFG_DUSCC_OUT_RTSA_CB(WRITELINE(RS232P4_TAG, rs232_port_device, write_rts))
m_dusccterm->out_txda_callback().set(RS232P4_TAG, FUNC(rs232_port_device::write_txd));
m_dusccterm->out_dtra_callback().set(RS232P4_TAG, FUNC(rs232_port_device::write_dtr));
m_dusccterm->out_rtsa_callback().set(RS232P4_TAG, FUNC(rs232_port_device::write_rts));
/* DUSCC1 interrupt signal REQN is connected to LOCAL IRQ4 of the FGA-002 and level is programmable */
MCFG_DUSCC_OUT_INT_CB(WRITELINE("fga002", fga002_device, lirq4_w))
m_dusccterm->out_int_callback().set(m_fga002, FUNC(fga002_device::lirq4_w));
MCFG_DUSCC68562_ADD("duscc2", DUSCC_CLOCK, 0, 0, 0, 0 )
duscc68562_device &duscc2(DUSCC68562(config, "duscc2", DUSCC_CLOCK));
duscc2.configure_channels(0, 0, 0, 0);
/* Port 2 on Port A */
MCFG_DUSCC_OUT_TXDA_CB(WRITELINE(RS232P2_TAG, rs232_port_device, write_txd))
MCFG_DUSCC_OUT_DTRA_CB(WRITELINE(RS232P2_TAG, rs232_port_device, write_dtr))
MCFG_DUSCC_OUT_RTSA_CB(WRITELINE(RS232P2_TAG, rs232_port_device, write_rts))
duscc2.out_txda_callback().set(RS232P2_TAG, FUNC(rs232_port_device::write_txd));
duscc2.out_dtra_callback().set(RS232P2_TAG, FUNC(rs232_port_device::write_dtr));
duscc2.out_rtsa_callback().set(RS232P2_TAG, FUNC(rs232_port_device::write_rts));
/* Port 3 on Port B */
MCFG_DUSCC_OUT_TXDB_CB(WRITELINE(RS232P3_TAG, rs232_port_device, write_txd))
MCFG_DUSCC_OUT_DTRB_CB(WRITELINE(RS232P3_TAG, rs232_port_device, write_dtr))
MCFG_DUSCC_OUT_RTSB_CB(WRITELINE(RS232P3_TAG, rs232_port_device, write_rts))
duscc2.out_txdb_callback().set(RS232P3_TAG, FUNC(rs232_port_device::write_txd));
duscc2.out_dtrb_callback().set(RS232P3_TAG, FUNC(rs232_port_device::write_dtr));
duscc2.out_rtsb_callback().set(RS232P3_TAG, FUNC(rs232_port_device::write_rts));
/* DUSCC2 interrupt signal REQN is connected to LOCAL IRQ5 of the FGA-002 and level is programmable */
MCFG_DUSCC_OUT_INT_CB(WRITELINE("fga002", fga002_device, lirq5_w))
duscc2.out_int_callback().set(m_fga002, FUNC(fga002_device::lirq5_w));
rs232_port_device &rs232p1(RS232_PORT(config, RS232P1_TAG, default_rs232_devices, "terminal"));
rs232p1.rxd_handler().set(m_dusccterm, FUNC(duscc68562_device::rxb_w));
@ -736,7 +738,7 @@ MACHINE_CONFIG_START(cpu30_state::cpu30)
m_pit1->pb_out_callback().set(FUNC(cpu30_state::flop_dmac_w));
m_pit1->pc_in_callback().set(FUNC(cpu30_state::pit1c_r));
m_pit1->pc_out_callback().set(FUNC(cpu30_state::pit1c_w));
// m_pit1->timer_irq_callback().set("fga002", FUNC(fga002_device::lirq2_w)); // The timer interrupt seems to silence the terminal interrupt, needs invectigation
// m_pit1->timer_irq_callback().set(m_fga002, FUNC(fga002_device::lirq2_w)); // The timer interrupt seems to silence the terminal interrupt, needs invectigation
PIT68230(config, m_pit2, XTAL(16'000'000) / 2); // Th PIT clock is not verified on schema but reversed from behaviour
m_pit2->pb_in_callback().set(FUNC(cpu30_state::board_mem_id_rd));
@ -744,7 +746,7 @@ MACHINE_CONFIG_START(cpu30_state::cpu30)
m_pit2->pa_out_callback().set(FUNC(cpu30_state::pit2a_w));
m_pit2->pc_in_callback().set(FUNC(cpu30_state::pit2c_r));
m_pit2->pc_out_callback().set(FUNC(cpu30_state::pit2c_w));
// m_pit2->timer_irq_callback().set("fga002", FUNC(fga002_device::lirq3_w)); // The timer interrupt seems to silence the terminal interrupt, needs invectigation
// m_pit2->timer_irq_callback().set(m_fga002, FUNC(fga002_device::lirq3_w)); // The timer interrupt seems to silence the terminal interrupt, needs invectigation
/* FGA-002, Force Gate Array */
fga002_device &fga002(FGA002(config, m_fga002, 0));

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@ -313,7 +313,7 @@ MACHINE_CONFIG_START(feversoc_state::feversoc)
EEPROM_93C56_16BIT(config, "eeprom");
MCFG_JRC6355E_ADD("rtc", XTAL(32'768))
JRC6355E(config, m_rtc, XTAL(32'768));
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);

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@ -1185,7 +1185,7 @@ MACHINE_CONFIG_START(firebeat_state::firebeat)
MCFG_MACHINE_START_OVERRIDE(firebeat_state,firebeat)
MCFG_MACHINE_RESET_OVERRIDE(firebeat_state,firebeat)
MCFG_DEVICE_ADD("rtc", RTC65271, 0)
RTC65271(config, "rtc", 0);
FUJITSU_29F016A(config, "flash_main");
FUJITSU_29F016A(config, "flash_snd1");
@ -1243,7 +1243,7 @@ MACHINE_CONFIG_START(firebeat_state::firebeat2)
MCFG_MACHINE_START_OVERRIDE(firebeat_state,firebeat)
MCFG_MACHINE_RESET_OVERRIDE(firebeat_state,firebeat)
MCFG_DEVICE_ADD("rtc", RTC65271, 0)
RTC65271(config, "rtc", 0);
FUJITSU_29F016A(config, "flash_main");
FUJITSU_29F016A(config, "flash_snd1");

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@ -147,9 +147,9 @@ void galaxia_state::galaxia_mem_map(address_map &map)
{
map(0x0000, 0x13ff).rom();
map(0x1400, 0x14ff).mirror(0x6000).ram().share("bullet_ram");
map(0x1500, 0x15ff).mirror(0x6000).rw(m_s2636_0, FUNC(s2636_device::read_data), FUNC(s2636_device::write_data));
map(0x1600, 0x16ff).mirror(0x6000).rw(m_s2636_1, FUNC(s2636_device::read_data), FUNC(s2636_device::write_data));
map(0x1700, 0x17ff).mirror(0x6000).rw(m_s2636_2, FUNC(s2636_device::read_data), FUNC(s2636_device::write_data));
map(0x1500, 0x15ff).mirror(0x6000).rw(m_s2636[0], FUNC(s2636_device::read_data), FUNC(s2636_device::write_data));
map(0x1600, 0x16ff).mirror(0x6000).rw(m_s2636[1], FUNC(s2636_device::read_data), FUNC(s2636_device::write_data));
map(0x1700, 0x17ff).mirror(0x6000).rw(m_s2636[2], FUNC(s2636_device::read_data), FUNC(s2636_device::write_data));
map(0x1800, 0x1bff).mirror(0x6000).r(FUNC(galaxia_state::cvs_video_or_color_ram_r)).w(FUNC(galaxia_state::galaxia_video_w)).share("video_ram");
map(0x1c00, 0x1fff).mirror(0x6000).ram();
map(0x2000, 0x33ff).rom();
@ -160,7 +160,7 @@ void galaxia_state::astrowar_mem_map(address_map &map)
{
map(0x0000, 0x13ff).rom();
map(0x1400, 0x14ff).mirror(0x6000).ram();
map(0x1500, 0x15ff).mirror(0x6000).rw(m_s2636_0, FUNC(s2636_device::read_data), FUNC(s2636_device::write_data));
map(0x1500, 0x15ff).mirror(0x6000).rw(m_s2636[0], FUNC(s2636_device::read_data), FUNC(s2636_device::write_data));
map(0x1800, 0x1bff).mirror(0x6000).r(FUNC(galaxia_state::cvs_video_or_color_ram_r)).w(FUNC(galaxia_state::galaxia_video_w)).share("video_ram");
map(0x1c00, 0x1cff).mirror(0x6000).ram().share("bullet_ram");
map(0x2000, 0x33ff).rom();
@ -327,17 +327,17 @@ MACHINE_CONFIG_START(galaxia_state::galaxia)
MCFG_PALETTE_INIT_OWNER(galaxia_state,galaxia)
MCFG_VIDEO_START_OVERRIDE(galaxia_state,galaxia)
MCFG_DEVICE_ADD("s2636_0", S2636, 0)
MCFG_S2636_OFFSETS(-13, -26)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
S2636(config, m_s2636[0], 0);
m_s2636[0]->set_offsets(-13, -26);
m_s2636[0]->add_route(ALL_OUTPUTS, "mono", 0.25);
MCFG_DEVICE_ADD("s2636_1", S2636, 0)
MCFG_S2636_OFFSETS(-13, -26)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
S2636(config, m_s2636[1], 0);
m_s2636[1]->set_offsets(-13, -26);
m_s2636[1]->add_route(ALL_OUTPUTS, "mono", 0.25);
MCFG_DEVICE_ADD("s2636_2", S2636, 0)
MCFG_S2636_OFFSETS(-13, -26)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
S2636(config, m_s2636[2], 0);
m_s2636[2]->set_offsets(-13, -26);
m_s2636[2]->add_route(ALL_OUTPUTS, "mono", 0.25);
/* sound hardware */
SPEAKER(config, "mono").front_center();
@ -371,9 +371,9 @@ MACHINE_CONFIG_START(galaxia_state::astrowar)
MCFG_PALETTE_INIT_OWNER(galaxia_state,astrowar)
MCFG_VIDEO_START_OVERRIDE(galaxia_state,astrowar)
MCFG_DEVICE_ADD("s2636_0", S2636, 0)
MCFG_S2636_OFFSETS(-13, -8)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
S2636(config, m_s2636[0], 0);
m_s2636[0]->set_offsets(-13, -8);
m_s2636[0]->add_route(ALL_OUTPUTS, "mono", 0.25);
/* sound hardware */
SPEAKER(config, "mono").front_center();

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@ -615,20 +615,19 @@ MACHINE_CONFIG_START(ghosteo_state::ghosteo)
MCFG_PALETTE_ADD("palette", 256)
MCFG_DEVICE_ADD(m_s3c2410, S3C2410, 12000000)
MCFG_S3C2410_PALETTE("palette")
MCFG_S3C2410_SCREEN("screen")
MCFG_S3C2410_CORE_PIN_R_CB(READ32(*this, ghosteo_state, s3c2410_core_pin_r))
MCFG_S3C2410_GPIO_PORT_R_CB(READ32(*this, ghosteo_state, s3c2410_gpio_port_r))
MCFG_S3C2410_GPIO_PORT_W_CB(WRITE32(*this, ghosteo_state, s3c2410_gpio_port_w))
MCFG_S3C2410_I2C_SCL_W_CB(WRITELINE(*this, ghosteo_state, s3c2410_i2c_scl_w))
MCFG_S3C2410_I2C_SDA_R_CB(READLINE(*this, ghosteo_state, s3c2410_i2c_sda_r))
MCFG_S3C2410_I2C_SDA_W_CB(WRITELINE(*this, ghosteo_state, s3c2410_i2c_sda_w))
MCFG_S3C2410_NAND_COMMAND_W_CB(WRITE8(*this, ghosteo_state, s3c2410_nand_command_w))
MCFG_S3C2410_NAND_ADDRESS_W_CB(WRITE8(*this, ghosteo_state, s3c2410_nand_address_w))
MCFG_S3C2410_NAND_DATA_R_CB(READ8(*this, ghosteo_state, s3c2410_nand_data_r))
MCFG_S3C2410_NAND_DATA_W_CB(WRITE8(*this, ghosteo_state, s3c2410_nand_data_w))
S3C2410(config, m_s3c2410, 12000000);
m_s3c2410->set_palette_tag("palette");
m_s3c2410->set_screen_tag("screen");
m_s3c2410->core_pin_r_callback().set(FUNC(ghosteo_state::s3c2410_core_pin_r));
m_s3c2410->gpio_port_r_callback().set(FUNC(ghosteo_state::s3c2410_gpio_port_r));
m_s3c2410->gpio_port_w_callback().set(FUNC(ghosteo_state::s3c2410_gpio_port_w));
m_s3c2410->i2c_scl_w_callback().set(FUNC(ghosteo_state::s3c2410_i2c_scl_w));
m_s3c2410->i2c_sda_r_callback().set(FUNC(ghosteo_state::s3c2410_i2c_sda_r));
m_s3c2410->i2c_sda_w_callback().set(FUNC(ghosteo_state::s3c2410_i2c_sda_w));
m_s3c2410->nand_command_w_callback().set(FUNC(ghosteo_state::s3c2410_nand_command_w));
m_s3c2410->nand_address_w_callback().set(FUNC(ghosteo_state::s3c2410_nand_address_w));
m_s3c2410->nand_data_r_callback().set(FUNC(ghosteo_state::s3c2410_nand_data_r));
m_s3c2410->nand_data_w_callback().set(FUNC(ghosteo_state::s3c2410_nand_data_w));
// nand_device &nand(NAND(config, "nand", 0));
// nand.set_nand_type(nand_device::chip::K9F5608U0D); // or another variant with ID 0xEC 0x75 ?

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@ -204,11 +204,11 @@ MACHINE_CONFIG_START(gizmondo_state::gizmondo)
MCFG_GF4500_ADD("gf4500")
MCFG_DEVICE_ADD("s3c2440", S3C2440, 12000000)
MCFG_S3C2440_PALETTE("palette")
MCFG_S3C2440_SCREEN("screen")
MCFG_S3C2440_GPIO_PORT_R_CB(READ32(*this, gizmondo_state, s3c2440_gpio_port_r))
MCFG_S3C2440_GPIO_PORT_W_CB(WRITE32(*this, gizmondo_state, s3c2440_gpio_port_w))
S3C2440(config, m_s3c2440, 12000000);
m_s3c2440->set_palette_tag("palette");
m_s3c2440->set_screen_tag("screen");
m_s3c2440->gpio_port_r_callback().set(FUNC(gizmondo_state::s3c2440_gpio_port_r));
m_s3c2440->gpio_port_w_callback().set(FUNC(gizmondo_state::s3c2440_gpio_port_w));
MCFG_DISKONCHIP_G3_ADD("diskonchip", 64)

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@ -68,13 +68,14 @@ INPUT_PORTS_END
/******************************************************************************/
MACHINE_CONFIG_START(globalfr_state::globalfr)
void globalfr_state::globalfr(machine_config &config)
{
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", M37702S1, 4000000)
MCFG_DEVICE_PROGRAM_MAP(globalfr_map)
MCFG_S16LF01_ADD("vfd",0)
M37702S1(config, m_maincpu, 4000000);
m_maincpu->set_addrmap(AS_PROGRAM, &globalfr_state::globalfr_map);
S16LF01(config, m_vfd);
config.set_default_layout(layout_globalfr);
MACHINE_CONFIG_END
}
/******************************************************************************/

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@ -697,49 +697,50 @@ WRITE8_MEMBER(gts1_state::gts1_do_w)
}
MACHINE_CONFIG_START(gts1_state::gts1)
void gts1_state::gts1(machine_config & config)
{
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", PPS4_2, XTAL(3'579'545)) // divided by 18 in the CPU
MCFG_DEVICE_PROGRAM_MAP(gts1_map)
MCFG_DEVICE_DATA_MAP(gts1_data)
MCFG_DEVICE_IO_MAP(gts1_io)
MCFG_PPS4_DISCRETE_INPUT_A_CB(READ8(*this, gts1_state, gts1_pa_r))
MCFG_PPS4_DISCRETE_OUTPUT_CB(WRITE8(*this, gts1_state, gts1_do_w))
pps4_2_device &maincpu(PPS4_2(config, m_maincpu, XTAL(3'579'545))); // divided by 18 in the CPU
maincpu.set_addrmap(AS_PROGRAM, &gts1_state::gts1_map);
maincpu.set_addrmap(AS_DATA, &gts1_state::gts1_data);
maincpu.set_addrmap(AS_IO, &gts1_state::gts1_io);
maincpu.dia_cb().set(FUNC(gts1_state::gts1_pa_r));
maincpu.do_cb().set(FUNC(gts1_state::gts1_do_w));
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
/* A1753CE 2048 x 8 ROM (000-7ff), 128 x 4 RAM (00-7f) and 16 I/O lines (20 ... 2f) */
MCFG_DEVICE_ADD( "u5", RA17XX, 0 )
MCFG_RA17XX_READ ( READ8 (*this, gts1_state,gts1_switches_r) )
MCFG_RA17XX_WRITE( WRITE8(*this, gts1_state,gts1_switches_w) )
MCFG_RA17XX_CPU("maincpu")
ra17xx_device &u5(RA17XX(config, "u5", 0));
u5.iord_cb().set(FUNC(gts1_state::gts1_switches_r));
u5.iowr_cb().set(FUNC(gts1_state::gts1_switches_w));
u5.set_cpu_tag(m_maincpu);
/* A1752CF 2048 x 8 ROM (800-fff), 128 x 4 RAM (80-ff) and 16 I/O lines (40 ... 4f) */
MCFG_DEVICE_ADD( "u4", RA17XX, 0 )
MCFG_RA17XX_READ ( READ8 (*this, gts1_state,gts1_solenoid_r) )
MCFG_RA17XX_WRITE( WRITE8(*this, gts1_state,gts1_solenoid_w) )
MCFG_RA17XX_CPU("maincpu")
ra17xx_device &u4(RA17XX(config, "u4", 0));
u4.iord_cb().set(FUNC(gts1_state::gts1_solenoid_r));
u4.iowr_cb().set(FUNC(gts1_state::gts1_solenoid_w));
u4.set_cpu_tag(m_maincpu);
/* 10696 General Purpose Input/Output */
MCFG_DEVICE_ADD( "u2", R10696, 0 )
MCFG_R10696_IO( READ8 (*this, gts1_state,gts1_nvram_r),
WRITE8(*this, gts1_state,gts1_nvram_w) )
r10696_device &u2(R10696(config, "u2", 0));
u2.iord_cb().set(FUNC(gts1_state::gts1_nvram_r));
u2.iowr_cb().set(FUNC(gts1_state::gts1_nvram_w));
/* 10696 General Purpose Input/Output */
MCFG_DEVICE_ADD( "u3", R10696, 0 )
MCFG_R10696_IO( READ8 (*this, gts1_state,gts1_lamp_apm_r),
WRITE8(*this, gts1_state,gts1_lamp_apm_w) )
r10696_device &u3(R10696(config, "u3", 0));
u3.iord_cb().set(FUNC(gts1_state::gts1_lamp_apm_r));
u3.iowr_cb().set(FUNC(gts1_state::gts1_lamp_apm_w));
/* 10788 General Purpose Display and Keyboard */
MCFG_DEVICE_ADD( "u6", R10788, XTAL(3'579'545) / 18 ) // divided in the circuit
MCFG_R10788_UPDATE( WRITE8(*this, gts1_state,gts1_display_w) )
r10788_device &u6(R10788(config, "u6", XTAL(3'579'545) / 18 )); // divided in the circuit
u6.update_cb().set(FUNC(gts1_state::gts1_display_w));
/* Video */
config.set_default_layout(layout_gts1);
/* Sound */
genpin_audio(config);
MACHINE_CONFIG_END
}
ROM_START( gts1 )

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@ -263,18 +263,18 @@ MACHINE_CONFIG_START(hapyfish_state::hapyfish)
MCFG_SOUND_ROUTE(0, "ldac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "ldac", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "rdac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "rdac", -1.0, DAC_VREF_NEG_INPUT)
MCFG_DEVICE_ADD("s3c2440", S3C2440, 12000000)
MCFG_S3C2440_PALETTE("palette")
MCFG_S3C2440_SCREEN("screen")
MCFG_S3C2440_CORE_PIN_R_CB(READ32(*this, hapyfish_state, s3c2440_core_pin_r))
MCFG_S3C2440_GPIO_PORT_R_CB(READ32(*this, hapyfish_state, s3c2440_gpio_port_r))
MCFG_S3C2440_GPIO_PORT_W_CB(WRITE32(*this, hapyfish_state, s3c2440_gpio_port_w))
MCFG_S3C2440_ADC_DATA_R_CB(READ32(*this, hapyfish_state, s3c2440_adc_data_r))
MCFG_S3C2440_I2S_DATA_W_CB(WRITE16(*this, hapyfish_state, s3c2440_i2s_data_w))
MCFG_S3C2440_NAND_COMMAND_W_CB(WRITE8(*this, hapyfish_state, s3c2440_nand_command_w))
MCFG_S3C2440_NAND_ADDRESS_W_CB(WRITE8(*this, hapyfish_state, s3c2440_nand_address_w))
MCFG_S3C2440_NAND_DATA_R_CB(READ8(*this, hapyfish_state, s3c2440_nand_data_r))
MCFG_S3C2440_NAND_DATA_W_CB(WRITE8(*this, hapyfish_state, s3c2440_nand_data_w))
S3C2440(config, m_s3c2440, 12000000);
m_s3c2440->set_palette_tag("palette");
m_s3c2440->set_screen_tag("screen");
m_s3c2440->core_pin_r_callback().set(FUNC(hapyfish_state::s3c2440_core_pin_r));
m_s3c2440->gpio_port_r_callback().set(FUNC(hapyfish_state::s3c2440_gpio_port_r));
m_s3c2440->gpio_port_w_callback().set(FUNC(hapyfish_state::s3c2440_gpio_port_w));
m_s3c2440->adc_data_r_callback().set(FUNC(hapyfish_state::s3c2440_adc_data_r));
m_s3c2440->i2s_data_w_callback().set(FUNC(hapyfish_state::s3c2440_i2s_data_w));
m_s3c2440->nand_command_w_callback().set(FUNC(hapyfish_state::s3c2440_nand_command_w));
m_s3c2440->nand_address_w_callback().set(FUNC(hapyfish_state::s3c2440_nand_address_w));
m_s3c2440->nand_data_r_callback().set(FUNC(hapyfish_state::s3c2440_nand_data_r));
m_s3c2440->nand_data_w_callback().set(FUNC(hapyfish_state::s3c2440_nand_data_w));
NAND(config, m_nand, 0);
m_nand->set_nand_type(nand_device::chip::K9LAG08U0M);

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@ -296,12 +296,12 @@ MACHINE_CONFIG_START(hp49gp_state::hp49gp)
MCFG_SCREEN_VISIBLE_AREA(0, 131 - 1, 0, 80 - 1)
MCFG_SCREEN_UPDATE_DEVICE("s3c2410", s3c2410_device, screen_update)
MCFG_DEVICE_ADD("s3c2410", S3C2410, 12000000)
MCFG_S3C2410_PALETTE("palette")
MCFG_S3C2410_SCREEN("screen")
MCFG_S3C2410_GPIO_PORT_R_CB(READ32(*this, hp49gp_state, s3c2410_gpio_port_r))
MCFG_S3C2410_GPIO_PORT_W_CB(WRITE32(*this, hp49gp_state, s3c2410_gpio_port_w))
MCFG_S3C2410_LCD_FLAGS(S3C24XX_INTERFACE_LCD_REVERSE)
S3C2410(config, m_s3c2410, 12000000);
m_s3c2410->set_palette_tag("palette");
m_s3c2410->set_screen_tag("screen");
m_s3c2410->gpio_port_r_callback().set(FUNC(hp49gp_state::s3c2410_gpio_port_r));
m_s3c2410->gpio_port_w_callback().set(FUNC(hp49gp_state::s3c2410_gpio_port_w));
m_s3c2410->set_lcd_flags(S3C24XX_INTERFACE_LCD_REVERSE);
MACHINE_CONFIG_END
static INPUT_PORTS_START( hp49gp )

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@ -1316,7 +1316,7 @@ MACHINE_CONFIG_START(jpmimpct_state::impctawp)
MCFG_DEVICE_PROGRAM_MAP(awp68k_program_map)
MCFG_QUANTUM_TIME(attotime::from_hz(30000))
MCFG_S16LF01_ADD("vfd",0)
S16LF01(config, m_vfd);
MCFG_MACHINE_START_OVERRIDE(jpmimpct_state,impctawp)
MCFG_MACHINE_RESET_OVERRIDE(jpmimpct_state,impctawp)

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@ -611,7 +611,7 @@ MACHINE_CONFIG_START(jpmsys5v_state::jpmsys5v)
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
MCFG_S16LF01_ADD("vfd",0)//for debug ports
S16LF01(config, m_vfd); //for debug ports
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(XTAL(40'000'000) / 4, 676, 20*4, 147*4, 256, 0, 254)
@ -831,7 +831,7 @@ MACHINE_CONFIG_START(jpmsys5_state::jpmsys5_ym)
acia_clock.signal_handler().append(m_acia6850[2], FUNC(acia6850_device::write_rxc));
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
MCFG_S16LF01_ADD("vfd",0)
S16LF01(config, m_vfd);
SPEAKER(config, "mono").front_center();
@ -889,7 +889,7 @@ MACHINE_CONFIG_START(jpmsys5_state::jpmsys5)
acia_clock.signal_handler().append(m_acia6850[2], FUNC(acia6850_device::write_rxc));
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
MCFG_S16LF01_ADD("vfd",0)
S16LF01(config, m_vfd);
SPEAKER(config, "mono").front_center();

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@ -1537,7 +1537,7 @@ MACHINE_CONFIG_START(tandy200_state::tandy200)
i8155.in_pc_callback().set(FUNC(tandy200_state::i8155_pc_r));
i8155.out_to_callback().set(FUNC(tandy200_state::i8155_to_w));
MCFG_DEVICE_ADD(RP5C01A_TAG, RP5C01, XTAL(32'768))
RP5C01(config, m_rtc, XTAL(32'768));
i8251_device &i8251(I8251(config, I8251_TAG, 0)); /*XTAL(4'915'200)/2,*/
i8251.txd_handler().set(RS232_TAG, FUNC(rs232_port_device::write_txd));

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@ -177,9 +177,9 @@ void laserbat_state_base::laserbat_map(address_map &map)
map(0x7800, 0x7bff).rom();
map(0x1400, 0x14ff).mirror(0x6000).nopw();
map(0x1500, 0x15ff).mirror(0x6000).rw(m_pvi1, FUNC(s2636_device::read_data), FUNC(s2636_device::write_data));
map(0x1600, 0x16ff).mirror(0x6000).rw(m_pvi2, FUNC(s2636_device::read_data), FUNC(s2636_device::write_data));
map(0x1700, 0x17ff).mirror(0x6000).rw(m_pvi3, FUNC(s2636_device::read_data), FUNC(s2636_device::write_data));
map(0x1500, 0x15ff).mirror(0x6000).rw(m_pvi[0], FUNC(s2636_device::read_data), FUNC(s2636_device::write_data));
map(0x1600, 0x16ff).mirror(0x6000).rw(m_pvi[1], FUNC(s2636_device::read_data), FUNC(s2636_device::write_data));
map(0x1700, 0x17ff).mirror(0x6000).rw(m_pvi[2], FUNC(s2636_device::read_data), FUNC(s2636_device::write_data));
map(0x1800, 0x1bff).mirror(0x6000).w(FUNC(laserbat_state_base::videoram_w));
map(0x1c00, 0x1fff).mirror(0x6000).ram();
}
@ -480,17 +480,17 @@ MACHINE_CONFIG_START(laserbat_state_base::laserbat_base)
MCFG_PLS100_ADD(m_gfxmix)
MCFG_DEVICE_ADD(m_pvi1, S2636, XTAL(14'318'181)/3)
MCFG_S2636_OFFSETS(-8, -16)
MCFG_S2636_DIVIDER(3)
S2636(config, m_pvi[0], XTAL(14'318'181)/3);
m_pvi[0]->set_offsets(-8, -16);
m_pvi[0]->set_divider(3);
MCFG_DEVICE_ADD(m_pvi2, S2636, XTAL(14'318'181)/3)
MCFG_S2636_OFFSETS(-8, -16)
MCFG_S2636_DIVIDER(3)
S2636(config, m_pvi[1], XTAL(14'318'181)/3);
m_pvi[1]->set_offsets(-8, -16);
m_pvi[1]->set_divider(3);
MCFG_DEVICE_ADD(m_pvi3, S2636, XTAL(14'318'181)/3)
MCFG_S2636_OFFSETS(-8, -16)
MCFG_S2636_DIVIDER(3)
S2636(config, m_pvi[2], XTAL(14'318'181)/3);
m_pvi[2]->set_offsets(-8, -16);
m_pvi[2]->set_divider(3);
MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, "palette", gfx_laserbat)
@ -620,7 +620,7 @@ ROM_END
/*
Zaccaria "Cat 'N Mouse" 1982
similar to "Quasar" execept it uses an 82s100 for color table lookup
similar to "Quasar" except it uses an 82s100 for color table lookup
and has a larger program prom

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@ -260,7 +260,7 @@ MACHINE_CONFIG_START(lcmate2_state::lcmate2)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
/* Devices */
MCFG_DEVICE_ADD("rtc", RP5C15, XTAL(32'768))
RP5C15(config, m_rtc, XTAL(32'768));
MACHINE_CONFIG_END
/* ROM definition */

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@ -318,13 +318,13 @@ MACHINE_CONFIG_START(malzak_state::malzak)
MCFG_PALETTE_ADD(m_palette, 128)
MCFG_PALETTE_INIT_OWNER(malzak_state, malzak)
MCFG_DEVICE_ADD(m_s2636[0], S2636, 0)
MCFG_S2636_OFFSETS(0, -16) // -8, -16
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
S2636(config, m_s2636[0], 0);
m_s2636[0]->set_offsets(0, -16); // -8, -16
m_s2636[0]->add_route(ALL_OUTPUTS, "mono", 0.25);
MCFG_DEVICE_ADD(m_s2636[1], S2636, 0)
MCFG_S2636_OFFSETS(0, -16) // -9, -16
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
S2636(config, m_s2636[1], 0);
m_s2636[1]->set_offsets(0, -16); // -9, -16
m_s2636[1]->add_route(ALL_OUTPUTS, "mono", 0.25);
MCFG_DEVICE_ADD(m_trom, SAA5050, 6000000)
MCFG_SAA5050_D_CALLBACK(READ8(*this, malzak_state, videoram_r))

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@ -792,7 +792,7 @@ MACHINE_CONFIG_START(maygay1b_state::maygay_m1)
mainlatch.q_out_cb<5>().set(FUNC(maygay1b_state::wdog_w)); // WDog
mainlatch.q_out_cb<6>().set(FUNC(maygay1b_state::srsel_w)); // Srsel
MCFG_S16LF01_ADD("vfd",0)
S16LF01(config, m_vfd);
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
MCFG_DEVICE_ADD("aysnd", YM2149, M1_MASTER_CLOCK)

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@ -247,18 +247,18 @@ MACHINE_CONFIG_START(mini2440_state::mini2440)
MCFG_SOUND_ROUTE(0, "ldac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "ldac", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE(0, "rdac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "rdac", -1.0, DAC_VREF_NEG_INPUT)
MCFG_DEVICE_ADD("s3c2440", S3C2440, 12000000)
MCFG_S3C2440_PALETTE("palette")
MCFG_S3C2440_SCREEN("screen")
MCFG_S3C2440_CORE_PIN_R_CB(READ32(*this, mini2440_state, s3c2440_core_pin_r))
MCFG_S3C2440_GPIO_PORT_R_CB(READ32(*this, mini2440_state, s3c2440_gpio_port_r))
MCFG_S3C2440_GPIO_PORT_W_CB(WRITE32(*this, mini2440_state, s3c2440_gpio_port_w))
MCFG_S3C2440_ADC_DATA_R_CB(READ32(*this, mini2440_state, s3c2440_adc_data_r))
MCFG_S3C2440_I2S_DATA_W_CB(WRITE16(*this, mini2440_state, s3c2440_i2s_data_w))
MCFG_S3C2440_NAND_COMMAND_W_CB(WRITE8(*this, mini2440_state, s3c2440_nand_command_w))
MCFG_S3C2440_NAND_ADDRESS_W_CB(WRITE8(*this, mini2440_state, s3c2440_nand_address_w))
MCFG_S3C2440_NAND_DATA_R_CB(READ8(*this, mini2440_state, s3c2440_nand_data_r))
MCFG_S3C2440_NAND_DATA_W_CB(WRITE8(*this, mini2440_state, s3c2440_nand_data_w))
S3C2440(config, m_s3c2440, 12000000);
m_s3c2440->set_palette_tag("palette");
m_s3c2440->set_screen_tag("screen");
m_s3c2440->core_pin_r_callback().set(FUNC(mini2440_state::s3c2440_core_pin_r));
m_s3c2440->gpio_port_r_callback().set(FUNC(mini2440_state::s3c2440_gpio_port_r));
m_s3c2440->gpio_port_w_callback().set(FUNC(mini2440_state::s3c2440_gpio_port_w));
m_s3c2440->adc_data_r_callback().set(FUNC(mini2440_state::s3c2440_adc_data_r));
m_s3c2440->i2s_data_w_callback().set(FUNC(mini2440_state::s3c2440_i2s_data_w));
m_s3c2440->nand_command_w_callback().set(FUNC(mini2440_state::s3c2440_nand_command_w));
m_s3c2440->nand_address_w_callback().set(FUNC(mini2440_state::s3c2440_nand_address_w));
m_s3c2440->nand_data_r_callback().set(FUNC(mini2440_state::s3c2440_nand_data_r));
m_s3c2440->nand_data_w_callback().set(FUNC(mini2440_state::s3c2440_nand_data_w));
NAND(config, m_nand, 0);
m_nand->set_nand_type(nand_device::chip::K9F1G08U0B);

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@ -841,7 +841,7 @@ MACHINE_CONFIG_START(mpu3_state::mpu3base)
MCFG_DEVICE_ADD("maincpu", M6808, MPU3_MASTER_CLOCK)///4)
MCFG_DEVICE_PROGRAM_MAP(mpu3_basemap)
MCFG_MSC1937_ADD("vfd",0)
MSC1937(config, m_vfd);
MCFG_TIMER_DRIVER_ADD_PERIODIC("50hz", mpu3_state, gen_50hz, attotime::from_hz(100))
MCFG_TIMER_DRIVER_ADD_PERIODIC("555_ic10", mpu3_state, ic10_callback, PERIOD_OF_555_ASTABLE(10000,1000,0.0000001))

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@ -471,8 +471,8 @@ MACHINE_CONFIG_START(mstation_state::mstation)
// IRQ 1 is used for scan the kb and for cursor blinking
MCFG_TIMER_DRIVER_ADD_PERIODIC("kb_timer", mstation_state, mstation_kb_timer, attotime::from_hz(50))
MCFG_DEVICE_ADD("rtc", RP5C01, XTAL(32'768))
MCFG_RP5C01_OUT_ALARM_CB(WRITELINE(*this, mstation_state, rtc_irq))
rp5c01_device &rtc(RP5C01(config, "rtc", XTAL(32'768)));
rtc.out_alarm_callback().set(FUNC(mstation_state::rtc_irq));
ADDRESS_MAP_BANK(config, "bank0").set_map(&mstation_state::mstation_banked_map).set_options(ENDIANNESS_LITTLE, 8, 32, 0x4000);
ADDRESS_MAP_BANK(config, "bank1").set_map(&mstation_state::mstation_banked_map).set_options(ENDIANNESS_LITTLE, 8, 32, 0x4000);

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@ -1455,7 +1455,7 @@ MACHINE_CONFIG_START(msx2_state::msx2)
MCFG_CASSETTE_INTERFACE("msx_cass")
/* real time clock */
MCFG_DEVICE_ADD("rtc", RP5C01, 32.768_kHz_XTAL)
RP5C01(config, m_rtc, 32.768_kHz_XTAL);
/* Software lists */
MCFG_SOFTWARE_LIST_ADD("cass_list", "msx2_cass")
@ -1514,7 +1514,7 @@ MACHINE_CONFIG_START(msx2_state::msx2p)
MCFG_CASSETTE_INTERFACE("msx_cass")
/* real time clock */
MCFG_DEVICE_ADD("rtc", RP5C01, 32.768_kHz_XTAL)
RP5C01(config, m_rtc, 32.768_kHz_XTAL);
/* Software lists */
MCFG_SOFTWARE_LIST_ADD("cass_list", "msx2_cass")

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@ -769,7 +769,7 @@ MACHINE_CONFIG_START(nakajies_state::nakajies210)
MCFG_SOUND_ROUTE( ALL_OUTPUTS, "mono", 1.00 )
/* rtc */
MCFG_DEVICE_ADD("rtc", RP5C01, XTAL(32'768))
RP5C01(config, "rtc", XTAL(32'768));
MCFG_TIMER_DRIVER_ADD_PERIODIC("kb_timer", nakajies_state, kb_timer, attotime::from_hz(250))
MACHINE_CONFIG_END

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@ -1733,8 +1733,8 @@ MACHINE_CONFIG_START(namcos12_state::namcos12_mobo)
MCFG_NAMCO_SETTINGS_ADD("namco_settings")
MCFG_RTC4543_ADD(m_rtc, XTAL(32'768))
MCFG_RTC4543_DATA_CALLBACK(WRITELINE("sub:sci1", h8_sci_device, rx_w))
RTC4543(config, m_rtc, XTAL(32'768));
m_rtc->data_cb().set("sub:sci1", FUNC(h8_sci_device::rx_w));
// FIXME: need better syntax for configuring H8 onboard devices
h8_sci_device &sub_sci1(*m_sub->subdevice<h8_sci_device>("sci1"));

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@ -3623,8 +3623,8 @@ MACHINE_CONFIG_START(namcos23_state::gorgon)
MCFG_NAMCO_SETTINGS_ADD("namco_settings")
MCFG_RTC4543_ADD(m_rtc, XTAL(32'768))
MCFG_RTC4543_DATA_CALLBACK(WRITELINE("subcpu:sci1", h8_sci_device, rx_w))
RTC4543(config, m_rtc, XTAL(32'768));
m_rtc->data_cb().set("subcpu:sci1", FUNC(h8_sci_device::rx_w));
// FIXME: need better syntax for configuring H8 onboard devices
h8_sci_device &subcpu_sci1(*m_subcpu->subdevice<h8_sci_device>("sci1"));
@ -3691,8 +3691,8 @@ MACHINE_CONFIG_START(namcos23_state::s23)
MCFG_NAMCO_SETTINGS_ADD("namco_settings")
MCFG_RTC4543_ADD(m_rtc, XTAL(32'768))
MCFG_RTC4543_DATA_CALLBACK(WRITELINE("subcpu:sci1", h8_sci_device, rx_w))
RTC4543(config, m_rtc, XTAL(32'768));
m_rtc->data_cb().set("subcpu:sci1", FUNC(h8_sci_device::rx_w));
// FIXME: need better syntax for configuring H8 onboard devices
h8_sci_device &subcpu_sci1(*m_subcpu->subdevice<h8_sci_device>("sci1"));
@ -3772,8 +3772,8 @@ MACHINE_CONFIG_START(namcos23_state::ss23)
MCFG_NAMCO_SETTINGS_ADD("namco_settings")
MCFG_RTC4543_ADD(m_rtc, XTAL(32'768))
MCFG_RTC4543_DATA_CALLBACK(WRITELINE("subcpu:sci1", h8_sci_device, rx_w))
RTC4543(config, m_rtc, XTAL(32'768));
m_rtc->data_cb().set("subcpu:sci1", FUNC(h8_sci_device::rx_w));
// FIXME: need better syntax for configuring H8 onboard devices
h8_sci_device &subcpu_sci1(*m_subcpu->subdevice<h8_sci_device>("sci1"));

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@ -2,7 +2,7 @@
// copyright-holders:Wilbert Pol, Kevin Thacker
/******************************************************************************
nc.c
nc.cpp
NC100/NC150/NC200 Notepad computer
@ -18,7 +18,7 @@
NC100 I/O Specification by Cliff Lawson,
NC100EM by Russell Marks
NC200:
Dissassembly of the NC200 ROM + e-mail
Disassembly of the NC200 ROM + e-mail
exchange with Russell Marks
@ -26,7 +26,7 @@
Hardware:
- Z80 CPU, 6 MHz
- memory powered by lithium batterys!
- memory powered by lithium batteries!
- 2 channel tone (programmable frequency beep's)
- LCD screen
- laptop/portable computer
@ -1443,8 +1443,8 @@ MACHINE_CONFIG_START(nc100_state::nc100)
m_uart->txrdy_handler().set(FUNC(nc100_state::nc100_txrdy_callback));
/* rtc */
MCFG_DEVICE_ADD("rtc", TC8521, 32.768_kHz_XTAL)
MCFG_RP5C01_OUT_ALARM_CB(WRITELINE(*this, nc100_state, nc100_tc8521_alarm_callback))
tc8521_device &rtc(TC8521(config, "rtc", XTAL(32'768)));
rtc.out_alarm_callback().set(FUNC(nc100_state::nc100_tc8521_alarm_callback));
MACHINE_CONFIG_END
static const floppy_format_type ibmpc_floppy_formats[] = {

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@ -850,8 +850,8 @@ MACHINE_CONFIG_START(nss_state::nss)
MCFG_DEVICE_IO_MAP(bios_io_map)
MCFG_M50458_ADD("m50458", 4000000, "osd") /* TODO: correct clock */
MCFG_S3520CF_ADD("s3520cf") /* RTC */
MCFG_RP5H01_ADD("rp5h01")
S3520CF(config, m_s3520cf); /* RTC */
RP5H01(config, m_rp5h01, 0);
M6M80011AP(config, "m6m80011ap");
/* sound hardware */

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@ -302,17 +302,17 @@ MACHINE_CONFIG_START(palmz22_state::palmz22)
MCFG_SCREEN_UPDATE_DEVICE("s3c2410", s3c2410_device, screen_update)
MCFG_DEVICE_ADD(m_s3c2410, S3C2410, 12000000)
MCFG_S3C2410_PALETTE("palette")
MCFG_S3C2410_SCREEN("screen")
MCFG_S3C2410_CORE_PIN_R_CB(READ32(*this, palmz22_state, s3c2410_core_pin_r))
MCFG_S3C2410_GPIO_PORT_R_CB(READ32(*this, palmz22_state, s3c2410_gpio_port_r))
MCFG_S3C2410_GPIO_PORT_W_CB(WRITE32(*this, palmz22_state, s3c2410_gpio_port_w))
MCFG_S3C2410_ADC_DATA_R_CB(READ32(*this, palmz22_state, s3c2410_adc_data_r))
MCFG_S3C2410_NAND_COMMAND_W_CB(WRITE8(*this, palmz22_state, s3c2410_nand_command_w))
MCFG_S3C2410_NAND_ADDRESS_W_CB(WRITE8(*this, palmz22_state, s3c2410_nand_address_w))
MCFG_S3C2410_NAND_DATA_R_CB(READ8(*this, palmz22_state, s3c2410_nand_data_r))
MCFG_S3C2410_NAND_DATA_W_CB(WRITE8(*this, palmz22_state, s3c2410_nand_data_w))
S3C2410(config, m_s3c2410, 12000000);
m_s3c2410->set_palette_tag("palette");
m_s3c2410->set_screen_tag("screen");
m_s3c2410->core_pin_r_callback().set(FUNC(palmz22_state::s3c2410_core_pin_r));
m_s3c2410->gpio_port_r_callback().set(FUNC(palmz22_state::s3c2410_gpio_port_r));
m_s3c2410->gpio_port_w_callback().set(FUNC(palmz22_state::s3c2410_gpio_port_w));
m_s3c2410->adc_data_r_callback().set(FUNC(palmz22_state::s3c2410_adc_data_r));
m_s3c2410->nand_command_w_callback().set(FUNC(palmz22_state::s3c2410_nand_command_w));
m_s3c2410->nand_address_w_callback().set(FUNC(palmz22_state::s3c2410_nand_address_w));
m_s3c2410->nand_data_r_callback().set(FUNC(palmz22_state::s3c2410_nand_data_r));
m_s3c2410->nand_data_w_callback().set(FUNC(palmz22_state::s3c2410_nand_data_w));
NAND(config, m_nand, 0);
m_nand->set_nand_type(nand_device::chip::K9F5608U0D_J);

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@ -240,7 +240,7 @@ MACHINE_CONFIG_START(pc4_state::pc4)
MCFG_DEVICE_ADD( "beeper", BEEP, 3250 )
MCFG_SOUND_ROUTE( ALL_OUTPUTS, "mono", 1.00 )
MCFG_DEVICE_ADD("rtc", RP5C01, XTAL(32'768))
RP5C01(config, "rtc", XTAL(32'768));
MACHINE_CONFIG_END
ROM_START( pc4 )

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@ -695,7 +695,7 @@ MACHINE_CONFIG_START(playch10_state::playch10)
SPEAKER(config, "mono").front_center();
MCFG_RP5H01_ADD("rp5h01")
RP5H01(config, m_rp5h01, 0);
MACHINE_CONFIG_END
void playch10_state::playchnv(machine_config &config)

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@ -271,7 +271,7 @@ MACHINE_CONFIG_START(proconn_state::proconn)
m_maincpu->set_addrmap(AS_PROGRAM, &proconn_state::proconn_map);
m_maincpu->set_addrmap(AS_IO, &proconn_state::proconn_portmap);
MCFG_S16LF01_ADD("vfd",0)
S16LF01(config, m_vfd);
Z80PIO(config, m_z80pio[0], 4000000); /* ?? Mhz */
m_z80pio[0]->out_int_callback().set(FUNC(proconn_state::pio_1_m_out_int_w));

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@ -688,9 +688,9 @@ MACHINE_CONFIG_START(punchout_state::spnchout)
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_IO_MAP(spnchout_io_map)
MCFG_DEVICE_ADD("rtc", RP5C01, 0) // OSCIN -> Vcc
MCFG_RP5C01_REMOVE_BATTERY()
MCFG_RP5H01_ADD("rp5h01")
RP5C01(config, m_rtc, 0); // OSCIN -> Vcc
m_rtc->remove_battery();
RP5H01(config, m_rp5h01, 0);
MCFG_MACHINE_RESET_OVERRIDE(punchout_state, spnchout)
MACHINE_CONFIG_END

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@ -333,14 +333,14 @@ MACHINE_CONFIG_START(quasar_state::quasar)
MCFG_PALETTE_INDIRECT_ENTRIES(0x500)
MCFG_PALETTE_INIT_OWNER(quasar_state,quasar)
MCFG_DEVICE_ADD("s2636_0", S2636, 0)
MCFG_S2636_OFFSETS(CVS_S2636_Y_OFFSET - 8, CVS_S2636_X_OFFSET - 9)
S2636(config, m_s2636[0], 0);
m_s2636[0]->set_offsets(CVS_S2636_Y_OFFSET - 8, CVS_S2636_X_OFFSET - 9);
MCFG_DEVICE_ADD("s2636_1", S2636, 0)
MCFG_S2636_OFFSETS(CVS_S2636_Y_OFFSET - 8, CVS_S2636_X_OFFSET - 9)
S2636(config, m_s2636[1], 0);
m_s2636[1]->set_offsets(CVS_S2636_Y_OFFSET - 8, CVS_S2636_X_OFFSET - 9);
MCFG_DEVICE_ADD("s2636_2", S2636, 0)
MCFG_S2636_OFFSETS(CVS_S2636_Y_OFFSET - 8, CVS_S2636_X_OFFSET - 9)
S2636(config, m_s2636[2], 0);
m_s2636[2]->set_offsets(CVS_S2636_Y_OFFSET - 8, CVS_S2636_X_OFFSET - 9);
MCFG_VIDEO_START_OVERRIDE(quasar_state,quasar)

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@ -937,8 +937,8 @@ MACHINE_CONFIG_START(rex6000_state::rex6000)
/* quickload */
MCFG_QUICKLOAD_ADD("quickload", rex6000_state, rex6000, "rex,ds2", 0)
MCFG_DEVICE_ADD(TC8521_TAG, TC8521, XTAL(32'768))
MCFG_RP5C01_OUT_ALARM_CB(WRITELINE(*this, rex6000_state, alarm_irq))
tc8521_device &rtc(TC8521(config, TC8521_TAG, XTAL(32'768)));
rtc.out_alarm_callback().set(FUNC(rex6000_state::alarm_irq));
/*
Fujitsu 29DL16X has a feature which is capable of reading data from one
@ -1002,8 +1002,8 @@ MACHINE_CONFIG_START(oz750_state::oz750)
/* quickload */
MCFG_QUICKLOAD_ADD("quickload", oz750_state, oz750, "wzd", 0)
MCFG_DEVICE_ADD(TC8521_TAG, TC8521, XTAL(32'768))
MCFG_RP5C01_OUT_ALARM_CB(WRITELINE(*this, rex6000_state, alarm_irq))
tc8521_device &rtc(TC8521(config, TC8521_TAG, XTAL(32'768)));
rtc.out_alarm_callback().set(FUNC(rex6000_state::alarm_irq));
SHARP_LH28F016S(config, m_flash0a);
SHARP_LH28F016S(config, m_flash1a);

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@ -488,9 +488,9 @@ MACHINE_CONFIG_START(seabattl_state::seabattl)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", seabattl_state, seabattl_interrupt)
MCFG_S2650_SENSE_INPUT(READLINE("screen", screen_device, vblank))
MCFG_DEVICE_ADD("s2636", S2636, 0)
MCFG_S2636_OFFSETS(-13, -29)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.10)
S2636(config, m_s2636, 0);
m_s2636->set_offsets(-13, -29);
m_s2636->add_route(ALL_OUTPUTS, "mono", 0.10);
MCFG_DEVICE_ADD("sc_thousand", DM9368, 0)
MCFG_DM9368_UPDATE_CALLBACK(WRITE8(*this, seabattl_state, digit_w<0>))

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@ -303,7 +303,7 @@ MACHINE_CONFIG_START(seibucats_state::seibucats)
EEPROM_93C46_16BIT(config, "eeprom");
//MCFG_JRC6355E_ADD("rtc", XTAL(32'768))
//JRC6355E(config, m_rtc, XTAL(32'768));
MCFG_DEVICE_ADD("usart1", I8251, 0)
MCFG_DEVICE_ADD("usart2", I8251, 0)

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@ -474,7 +474,7 @@ MACHINE_CONFIG_START(sfcbox_state::sfcbox)
MCFG_DEVICE_IO_MAP(sfcbox_io)
MCFG_MB90082_ADD("mb90082",XTAL(12'000'000) / 2) /* TODO: correct clock */
MCFG_S3520CF_ADD("s3520cf") /* RTC */
S3520CF(config, m_s3520cf); /* RTC */
/* sound hardware */
SPEAKER(config, "lspeaker").front_left();

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@ -151,10 +151,9 @@ MACHINE_CONFIG_START(subhuntr_state::subhuntr)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", subhuntr_state, subhuntr_interrupt)
MCFG_S2650_SENSE_INPUT(READLINE("screen", screen_device, vblank))
// MCFG_DEVICE_ADD("s2636", S2636, 0)
// MCFG_S2636_WORKRAM_SIZE(0x100)
// MCFG_S2636_OFFSETS(3, -21)
// MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.10)
s2636_device &s2636(S2636(config, "s2636", 0));
s2636.set_offsets(3, -21);
s2636.add_route(ALL_OUTPUTS, "mono", 0.10);
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

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@ -3546,7 +3546,7 @@ MACHINE_CONFIG_START(taitof2_state::yesnoj)
MCFG_TC0100SCN_GFXDECODE("gfxdecode")
MCFG_TC0100SCN_PALETTE("palette")
MCFG_DEVICE_ADD("rtc", TC8521, XTAL(32'768))
TC8521(config, "rtc", XTAL(32'768));
MACHINE_CONFIG_END

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@ -715,8 +715,7 @@ MACHINE_CONFIG_START(taitogn_state::coh3002t)
m_znmcu->analog2_handler().set_ioport("ANALOG2");
MCFG_DEVICE_ADD("at28c16", AT28C16, 0)
MCFG_DEVICE_ADD("rf5c296", RF5C296, 0)
MCFG_RF5C296_SLOT("pccard")
RF5C296(config, "rf5c296", 0).set_pccard("pccard");
MCFG_DEVICE_ADD("pccard", PCCARD_SLOT, 0)
MCFG_DEVICE_SLOT_INTERFACE(slot_ataflash, nullptr, false)

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@ -266,7 +266,7 @@ MACHINE_CONFIG_START(tosh1000_state::tosh1000)
MCFG_IBM5160_MOTHERBOARD_ADD("mb", "maincpu")
MCFG_DEVICE_ADD("rtc", TC8521, XTAL(32'768))
TC8521(config, "rtc", XTAL(32'768));
// FIXME: determine ISA bus clock
MCFG_DEVICE_ADD("isa1", ISA8_SLOT, 0, "mb:isa", pc_isa8_cards, "cga", false)

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@ -540,8 +540,8 @@ MACHINE_CONFIG_START(vp415_state::vp415)
MCFG_DEVICE_ADD(CHARGEN_TAG, MB88303, 0)
MCFG_DEVICE_ADD(SYNCGEN_TAG, SAA1043, XTAL(5'000'000))
MCFG_SAA1043_V2_CALLBACK(WRITELINE(*this, vp415_state, refv_w))
saa1043_device &saa1043(SAA1043(config, SYNCGEN_TAG, XTAL(5'000'000)));
saa1043.v2_callback().set(FUNC(vp415_state::refv_w));
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(50)

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@ -1522,7 +1522,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(zaurus_state::rtc_irq_callback)
MACHINE_CONFIG_START(zaurus_state::zaurus)
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu",PXA255,MAIN_CLOCK)
MCFG_DEVICE_ADD(m_maincpu,PXA255,MAIN_CLOCK)
MCFG_DEVICE_PROGRAM_MAP(zaurus_map)
MCFG_TIMER_DRIVER_ADD_PERIODIC("rtc_timer", zaurus_state, rtc_irq_callback, attotime::from_hz(XTAL(32'768)))
@ -1542,7 +1542,7 @@ MACHINE_CONFIG_START(zaurus_state::zaurus)
// MCFG_DEVICE_ADD("aysnd", AY8910, MAIN_CLOCK/4)
// MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
MCFG_DEVICE_ADD("pxa_periphs", PXA255_PERIPHERALS, MAIN_CLOCK, "maincpu")
PXA255_PERIPHERALS(config, m_pxa_periphs, MAIN_CLOCK, m_maincpu);
MACHINE_CONFIG_END

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@ -38,9 +38,7 @@ public:
, m_dac2(*this, "dac2")
, m_dac3(*this, "dac3")
, m_tms5110(*this, "tms")
, m_s2636_0(*this, "s2636_0")
, m_s2636_1(*this, "s2636_1")
, m_s2636_2(*this, "s2636_2")
, m_s2636(*this, "s2636%u", 0U)
, m_gfxdecode(*this, "gfxdecode")
, m_screen(*this, "screen")
, m_palette(*this, "palette")
@ -141,9 +139,7 @@ protected:
optional_device<dac_byte_interface> m_dac2;
optional_device<dac_bit_interface> m_dac3;
optional_device<tms5110_device> m_tms5110;
optional_device<s2636_device> m_s2636_0;
optional_device<s2636_device> m_s2636_1;
optional_device<s2636_device> m_s2636_2;
optional_device_array<s2636_device, 3> m_s2636;
required_device<gfxdecode_device> m_gfxdecode;
required_device<screen_device> m_screen;
required_device<palette_device> m_palette;

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@ -26,8 +26,8 @@ public:
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_acia6850(*this, "acia6850_%u", 0U),
m_upd7759(*this, "upd7759"),
m_vfd(*this, "vfd"),
m_upd7759(*this, "upd7759"),
m_direct_port(*this, "DIRECT"),
m_meters(*this, "meters"),
m_lamps(*this, "lamp%u", 0U),
@ -58,6 +58,7 @@ protected:
required_device<cpu_device> m_maincpu;
required_device_array<acia6850_device, 3> m_acia6850;
optional_device<s16lf01_device> m_vfd;
void jpm_sys5_common_map(address_map &map);
@ -76,7 +77,6 @@ private:
void m68000_awp_map_saa(address_map &map);
required_device<upd7759_device> m_upd7759;
optional_device<s16lf01_device> m_vfd;
required_ioport m_direct_port;
optional_device<meters_device> m_meters; //jpmsys5v doesn't use this
output_finder<16 * 16> m_lamps;

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@ -33,9 +33,7 @@ public:
, m_screen(*this, "screen")
, m_palette(*this, "palette")
, m_gfxmix(*this, "gfxmix")
, m_pvi1(*this, "pvi1")
, m_pvi2(*this, "pvi2")
, m_pvi3(*this, "pvi3")
, m_pvi(*this, "pvi%u", 1U)
, m_gfxdecode(*this, "gfxdecode")
, m_scanline_timer(nullptr)
, m_gfx1(nullptr)
@ -107,13 +105,11 @@ protected:
required_device<cpu_device> m_maincpu;
// video devices
required_device<screen_device> m_screen;
required_device<palette_device> m_palette;
required_device<pla_device> m_gfxmix;
required_device<s2636_device> m_pvi1;
required_device<s2636_device> m_pvi2;
required_device<s2636_device> m_pvi3;
required_device<gfxdecode_device> m_gfxdecode;
required_device<screen_device> m_screen;
required_device<palette_device> m_palette;
required_device<pla_device> m_gfxmix;
required_device_array<s2636_device, 3> m_pvi;
required_device<gfxdecode_device> m_gfxdecode;
// stuff for rendering video
emu_timer *m_scanline_timer;

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@ -2984,7 +2984,7 @@ void mpu4_state::mpu4_bwb_7reel(machine_config &config)
MACHINE_CONFIG_START(mpu4_state::mpu4_common)
MCFG_TIMER_DRIVER_ADD_PERIODIC("50hz", mpu4_state, gen_50hz, attotime::from_hz(100))
MCFG_MSC1937_ADD("vfd",0)
MSC1937(config, m_vfd);
/* 6840 PTM */
PTM6840(config, m_6840ptm, MPU4_MASTER_CLOCK / 4);
m_6840ptm->set_external_clocks(0, 0, 0);

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@ -2,7 +2,7 @@
// copyright-holders:Mike Coates, Couriersud
/***************************************************************************
video\cvs.c
video\cvs.cpp
Functions to emulate the video hardware of the machine.
@ -190,9 +190,9 @@ uint32_t cvs_state::screen_update_cvs(screen_device &screen, bitmap_ind16 &bitma
copyscrollbitmap(m_scrolled_collision_background, m_collision_background, 0, nullptr, 8, scroll, cliprect);
/* update the S2636 chips */
bitmap_ind16 const &s2636_0_bitmap = m_s2636_0->update(cliprect);
bitmap_ind16 const &s2636_1_bitmap = m_s2636_1->update(cliprect);
bitmap_ind16 const &s2636_2_bitmap = m_s2636_2->update(cliprect);
bitmap_ind16 const &s2636_0_bitmap = m_s2636[0]->update(cliprect);
bitmap_ind16 const &s2636_1_bitmap = m_s2636[1]->update(cliprect);
bitmap_ind16 const &s2636_2_bitmap = m_s2636[2]->update(cliprect);
/* Bullet Hardware */
for (offs = 8; offs < 256; offs++ )

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@ -112,9 +112,9 @@ uint32_t galaxia_state::screen_update_galaxia(screen_device &screen, bitmap_ind1
{
int x, y;
bitmap_ind16 const &s2636_0_bitmap = m_s2636_0->update(cliprect);
bitmap_ind16 const &s2636_1_bitmap = m_s2636_1->update(cliprect);
bitmap_ind16 const &s2636_2_bitmap = m_s2636_2->update(cliprect);
bitmap_ind16 const &s2636_0_bitmap = m_s2636[0]->update(cliprect);
bitmap_ind16 const &s2636_1_bitmap = m_s2636[1]->update(cliprect);
bitmap_ind16 const &s2636_2_bitmap = m_s2636[2]->update(cliprect);
bitmap.fill(0, cliprect);
cvs_update_stars(bitmap, cliprect, STAR_PEN, 1);
@ -178,7 +178,7 @@ uint32_t galaxia_state::screen_update_astrowar(screen_device &screen, bitmap_ind
// astrowar has only one S2636
int x, y;
bitmap_ind16 const &s2636_0_bitmap = m_s2636_0->update(cliprect);
bitmap_ind16 const &s2636_0_bitmap = m_s2636[0]->update(cliprect);
bitmap.fill(0, cliprect);
cvs_update_stars(bitmap, cliprect, STAR_PEN, 1);

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@ -231,19 +231,19 @@ TIMER_CALLBACK_MEMBER(laserbat_state_base::video_line)
// update the PVIs
if (!y)
{
m_pvi1->render_first_line();
m_pvi2->render_first_line();
m_pvi3->render_first_line();
m_pvi[0]->render_first_line();
m_pvi[1]->render_first_line();
m_pvi[2]->render_first_line();
}
else
{
m_pvi1->render_next_line();
m_pvi2->render_next_line();
m_pvi3->render_next_line();
m_pvi[0]->render_next_line();
m_pvi[1]->render_next_line();
m_pvi[2]->render_next_line();
}
uint16_t const *const pvi1_row = &m_pvi1->bitmap().pix16(y);
uint16_t const *const pvi2_row = &m_pvi2->bitmap().pix16(y);
uint16_t const *const pvi3_row = &m_pvi3->bitmap().pix16(y);
uint16_t const *const pvi1_row = &m_pvi[0]->bitmap().pix16(y);
uint16_t const *const pvi2_row = &m_pvi[1]->bitmap().pix16(y);
uint16_t const *const pvi3_row = &m_pvi[2]->bitmap().pix16(y);
// don't draw outside the visible area
m_bitmap.plot_box(0, y, m_bitmap.width(), 1, 0);

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@ -2,7 +2,7 @@
// copyright-holders:Mike Coates, Pierpaolo Prazzoli
/***************************************************************************
video\quasar.c
video\quasar.cpp
Functions to emulate the video hardware of the machine.
@ -142,9 +142,9 @@ uint32_t quasar_state::screen_update_quasar(screen_device &screen, bitmap_ind16
}
/* update the S2636 chips */
bitmap_ind16 const &s2636_0_bitmap = m_s2636_0->update(cliprect);
bitmap_ind16 const &s2636_1_bitmap = m_s2636_1->update(cliprect);
bitmap_ind16 const &s2636_2_bitmap = m_s2636_2->update(cliprect);
bitmap_ind16 const &s2636_0_bitmap = m_s2636[0]->update(cliprect);
bitmap_ind16 const &s2636_1_bitmap = m_s2636[1]->update(cliprect);
bitmap_ind16 const &s2636_2_bitmap = m_s2636[2]->update(cliprect);
/* Bullet Hardware */
for (offs = 8; offs < 256; offs++ )