New machines marked as NOT_WORKING

----------------------------------
Super 97 (Ver. 1.00) [Ioannis Bampoulas]

- hexion.cpp: used finders and other small cleanups

- powerins.cpp: corrected one sprite ROM for powerinsc
This commit is contained in:
Ivan Vangelista 2022-04-14 18:08:32 +02:00
parent 539c135078
commit 935fe6b797
8 changed files with 328 additions and 313 deletions

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@ -2466,8 +2466,6 @@ files {
MAME_DIR .. "src/mame/video/gyruss.cpp",
MAME_DIR .. "src/mame/drivers/hcastle.cpp",
MAME_DIR .. "src/mame/drivers/hexion.cpp",
MAME_DIR .. "src/mame/includes/hexion.h",
MAME_DIR .. "src/mame/video/hexion.cpp",
MAME_DIR .. "src/mame/drivers/hornet.cpp",
MAME_DIR .. "src/mame/machine/konppc.cpp",
MAME_DIR .. "src/mame/machine/konppc.h",

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@ -111,6 +111,7 @@ public:
void init_maxidbl();
void init_cj3play();
void init_surpr5();
void init_super97();
void init_texasrls();
void init_cjbj();
void init_megadblj();
@ -2463,6 +2464,29 @@ ROM_START( surpr5 ) // CJ-8L REV-D, same PCB as cjffruit and texasrls
ROM_LOAD( "gal16v8d_dec.u70", 0x000, 0x117, NO_DUMP )
ROM_END
ROM_START( super97 ) // CJ-8L REV-B, all labels but the MCU's one handwritten
ROM_REGION( 0x80000, "maincpu", 0 ) // 68000 code
ROM_LOAD16_WORD( "super 97 1.00-a.u65", 0x00000, 0x80000, CRC(934a121f) SHA1(9490537946364de38cae6428e2c212c7d2ee8588) ) // 27C040, 1ST AND 2ND HALF IDENTICAL
ROM_REGION( 0x2000, "mcu", 0 ) // 68HC705C8P code
ROM_LOAD( "cj-super97 2.2 for cj-8l 10-02-1997.u30", 0x0000, 0x2000, NO_DUMP )
ROM_REGION16_BE( 0x200000, "blitter", ROMREGION_ERASE00 ) // data for the blitter
ROM_LOAD16_BYTE( "super97 0.02-d.u68", 0x000000, 0x80000, CRC(97526727) SHA1(12a39695aa7401e82e071c5d6fbb81d6ea6caaff) ) // 27C040
ROM_LOAD16_BYTE( "super97 0.02-c.u75", 0x000001, 0x80000, CRC(96d5f53a) SHA1(c160a44f4851fc5d333772b62ae4bf5a9298baf4) ) // 27C040
// u51 and u61 not populated
ROM_REGION( 0x40000, "samples", 0 ) // 8 bit unsigned
ROM_LOAD( "super97 0.02-g.u50", 0x00000, 0x40000, CRC(f97c2cc5) SHA1(e9b8d689aaac8e2e35f6a471b4b6a709617d9ec1) ) // 27C020, 1xxxxxxxxxxxxxxxxx = 0xFF
ROM_REGION( 0x117, "plds", 0 )
ROM_LOAD( "gal16v8d_vdp.u15", 0x000, 0x117, NO_DUMP )
ROM_LOAD( "gal16v8d_vdo.u53", 0x000, 0x117, NO_DUMP )
ROM_LOAD( "gal16v8d_ck2.u64", 0x000, 0x117, NO_DUMP )
ROM_LOAD( "gal16v8d_ck1.u69", 0x000, 0x117, NO_DUMP )
ROM_LOAD( "gal16v8d_dec.u70", 0x000, 0x117, NO_DUMP )
ROM_END
ROM_START( cjplus )
ROM_REGION( 0x80000, "maincpu", 0 ) // 68000 code
ROM_LOAD16_WORD( "a.u65", 0x00000, 0x80000, CRC(7a98f02d) SHA1(60f6b6ae91f9be7ebff84b7f55d04045931bdb4e) )
@ -3112,6 +3136,17 @@ void blitz68k_state::init_surpr5()
rom[0x1fd56/2] = 0x6054;
}
void blitz68k_state::init_super97()
{
uint16_t *rom = (uint16_t *)memregion("maincpu")->base();
// WRONG C8 #1
rom[0x9e9c/2] = 0x6028;
// ERROR CHECKSUM ROM PROGRAM
rom[0x17158/2] = 0x6054;
}
void blitz68k_state::init_cjplus()
{
uint16_t *rom = (uint16_t *)memregion("maincpu")->base();
@ -3233,6 +3268,7 @@ GAME( 1995, dualgame, 0, dualgame, dualgame, blitz68k_state, init_dualgam
GAME( 1995, hermit, 0, hermit, hermit, blitz68k_state, init_hermit, ROT0, "Dugamex", "The Hermit (Ver. 1.14)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_NO_SOUND ) // APRIL 1995
GAME( 1997, deucesw2, 0, deucesw2, deucesw2, blitz68k_state, init_deucesw2, ROT0, "<unknown>", "Deuces Wild 2 - American Heritage (Ver. 2.02F)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_NO_SOUND ) // APRIL 10TH, 1997
GAME( 1997, surpr5, 0, cjffruit, surpr5, blitz68k_state, init_surpr5, ROT0, "Cadillac Jack", "Surprise 5 (Ver. 1.19)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_NO_SOUND ) // APRIL 25TH, 1997
GAME( 1997, super97, 0, cjffruit, surpr5, blitz68k_state, init_super97, ROT0, "Cadillac Jack", "Super 97 (Ver. 1.00)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_NO_SOUND ) // OCTOBER 22ND, 1997
GAME( 1998, cj3play, 0, cjffruit, cjffruit, blitz68k_state, init_cj3play, ROT0, "Cadillac Jack", "Triple Play (Ver. 1.10)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_NO_SOUND ) // FEBRUARY 24TH, 1999
GAME( 1998, cjffruit, 0, cjffruit, cjffruit, blitz68k_state, init_cjffruit, ROT0, "Cadillac Jack", "Funny Fruit (Ver. 1.13)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_NO_SOUND ) // APRIL 21ST, 1999
GAME( 1998, texasrls, 0, texasrls, cjffruit, blitz68k_state, init_texasrls, ROT0, "Cadillac Jack", "Texas Reels (Ver. 2.00)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_NO_SOUND ) // OCTOBER 15TH, 2002

View File

@ -79,30 +79,267 @@ Notes:
***************************************************************************/
#include "emu.h"
#include "includes/hexion.h"
#include "includes/konamipt.h"
#include "cpu/z80/z80.h"
#include "machine/k053252.h"
#include "machine/timer.h"
#include "machine/watchdog.h"
#include "sound/okim6295.h"
#include "sound/k051649.h"
#include "sound/okim6295.h"
#include "emupal.h"
#include "speaker.h"
#include "tilemap.h"
// configurable logging
#define LOG_UNKWRITE (1U << 1)
#define LOG_BANKEDRAM (1U << 2)
#define LOG_CCU (1U << 3)
//#define VERBOSE (LOG_GENERAL | LOG_UNKWRITE | LOG_BANKEDRAM | LOG_CCU)
#include "logmacro.h"
#define LOGUNKWRITE(...) LOGMASKED(LOG_UNKWRITE, __VA_ARGS__)
#define LOGBANKEDRAM(...) LOGMASKED(LOG_BANKEDRAM, __VA_ARGS__)
#define LOGCCU(...) LOGMASKED(LOG_CCU, __VA_ARGS__)
namespace {
class hexion_state : public driver_device
{
public:
hexion_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_k053252(*this, "k053252"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
m_vram(*this, "vram%u", 0U, 0x2000U, ENDIANNESS_LITTLE),
m_unkram(*this, "unkram", 0x800, ENDIANNESS_LITTLE),
m_rombank(*this, "rombank"),
m_tilesrom(*this, "tiles")
{ }
void hexion(machine_config &config);
void hexionb(machine_config &config);
protected:
virtual void video_start() override;
private:
required_device<cpu_device> m_maincpu;
required_device<k053252_device> m_k053252;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
memory_share_array_creator<uint8_t, 2> m_vram;
memory_share_creator<uint8_t> m_unkram;
required_memory_bank m_rombank;
required_region_ptr<uint8_t> m_tilesrom;
uint8_t m_bankctrl = 0;
uint8_t m_rambank = 0;
uint8_t m_pmcbank = 0;
uint8_t m_gfxrom_select = 0;
uint8_t m_ccu_int_time = 0;
int16_t m_ccu_int_time_count = 0;
tilemap_t *m_bg_tilemap[2]{};
void coincntr_w(uint8_t data);
void bankswitch_w(uint8_t data);
uint8_t bankedram_r(offs_t offset);
void bankedram_w(offs_t offset, uint8_t data);
void bankctrl_w(uint8_t data);
void gfxrom_select_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(irq_ack_w);
DECLARE_WRITE_LINE_MEMBER(nmi_ack_w);
void ccu_int_time_w(uint8_t data);
template <uint8_t Which> TILE_GET_INFO_MEMBER(get_tile_info);
TIMER_DEVICE_CALLBACK_MEMBER(scanline);
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void base_map(address_map &map);
void hexion_map(address_map &map);
void hexionb_map(address_map &map);
};
// video
/***************************************************************************
Callbacks for the TileMap code
***************************************************************************/
template <uint8_t Which>
TILE_GET_INFO_MEMBER(hexion_state::get_tile_info)
{
tile_index *= 4;
tileinfo.set(0,
m_vram[Which][tile_index] + ((m_vram[Which][tile_index + 1] & 0x3f) << 8),
m_vram[Which][tile_index + 2] & 0x0f,
0);
}
/***************************************************************************
Start the video hardware emulation.
***************************************************************************/
void hexion_state::video_start()
{
m_bg_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(hexion_state::get_tile_info<0>)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32);
m_bg_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(hexion_state::get_tile_info<1>)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32);
m_bg_tilemap[0]->set_transparent_pen(0);
m_bg_tilemap[1]->set_scrollx(0, -4);
m_bg_tilemap[1]->set_scrolly(0, 4);
m_rombank->configure_entries(0, 16, memregion("maincpu")->base(), 0x2000);
m_gfxrom_select = 0;
save_item(NAME(m_bankctrl));
save_item(NAME(m_rambank));
save_item(NAME(m_pmcbank));
save_item(NAME(m_gfxrom_select));
save_item(NAME(m_ccu_int_time));
save_item(NAME(m_ccu_int_time_count));
}
/***************************************************************************
Memory handlers
***************************************************************************/
void hexion_state::bankswitch_w(uint8_t data)
{
// bits 0-3 select ROM bank
m_rombank->set_entry(data & 0x0f);
// does bit 6 trigger the 052591?
if (data & 0x40)
{
int bank = m_unkram[0] & 1;
memset(m_vram[bank], m_unkram[1], 0x2000);
m_bg_tilemap[bank]->mark_all_dirty();
}
// bit 7 = PMC-BK
m_pmcbank = (data & 0x80) >> 7;
// other bits unknown
if (data & 0x30)
LOGUNKWRITE("bankswitch %02x", data & 0xf0);
}
uint8_t hexion_state::bankedram_r(offs_t offset)
{
if (m_gfxrom_select && offset < 0x1000)
{
return m_tilesrom[((m_gfxrom_select & 0x7f) << 12) + offset];
}
else if (m_bankctrl == 0)
{
return m_vram[m_rambank][offset];
}
else if (m_bankctrl == 2 && offset < 0x800)
{
return m_unkram[offset];
}
else
{
LOGBANKEDRAM("%s: bankedram_r offset %04x, bankctrl = %02x\n", m_maincpu->pc(), offset, m_bankctrl);
return 0;
}
}
void hexion_state::bankedram_w(offs_t offset, uint8_t data)
{
if (m_bankctrl == 3 && offset == 0 && (data & 0xfe) == 0)
{
LOGBANKEDRAM("%s: bankedram_w offset %04x, data %02x, bankctrl = %02x\n", m_maincpu->pc(), offset, data, m_bankctrl);
m_rambank = data & 1;
}
else if (m_bankctrl == 0)
{
if (m_pmcbank)
{
LOGBANKEDRAM("%s: bankedram_w offset %04x, data %02x, bankctrl = %02x\n", m_maincpu->pc(), offset, data, m_bankctrl);
m_vram[m_rambank][offset] = data;
m_bg_tilemap[m_rambank]->mark_tile_dirty(offset/4);
}
else
LOGBANKEDRAM("%04x pmc internal ram %04x = %02x\n", m_maincpu->pc(), offset, data);
}
else if (m_bankctrl == 2 && offset < 0x800)
{
if (m_pmcbank)
{
LOGBANKEDRAM("%s: unkram_w offset %04x, data %02x, bankctrl = %02x\n", m_maincpu->pc(), offset, data, m_bankctrl);
m_unkram[offset] = data;
}
else
LOGBANKEDRAM("%04x pmc internal ram %04x = %02x\n", m_maincpu->pc(), offset, data);
}
else
LOGBANKEDRAM("%s: bankedram_w offset %04x, data %02x, bankctrl = %02x\n", m_maincpu->pc(), offset, data, m_bankctrl);
}
void hexion_state::bankctrl_w(uint8_t data)
{
LOGBANKEDRAM("%s: bankctrl_w %02x\n", m_maincpu->pc(), data);
m_bankctrl = data;
}
void hexion_state::gfxrom_select_w(uint8_t data)
{
LOGBANKEDRAM("%s: gfxrom_select_w %02x\n", m_maincpu->pc(), data);
m_gfxrom_select = data;
}
/***************************************************************************
Display refresh
***************************************************************************/
uint32_t hexion_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
m_bg_tilemap[1]->draw(screen, bitmap, cliprect, 0, 0);
m_bg_tilemap[0]->draw(screen, bitmap, cliprect, 0, 0);
return 0;
}
// machine
void hexion_state::coincntr_w(uint8_t data)
{
//logerror("%04x: coincntr_w %02x\n",m_maincpu->pc(),data);
/* bits 0/1 = coin counters */
// bits 0/1 = coin counters
machine().bookkeeping().coin_counter_w(0, data & 0x01);
machine().bookkeeping().coin_counter_w(1, data & 0x02);
/* bit 5 = flip screen */
// bit 5 = flip screen
flip_screen_set(data & 0x20);
/* other bit unknown */
if ((data & 0xdc) != 0x10) popmessage("coincntr %02x",data);
// other bits unknown
if ((data & 0xdc) != 0x10) LOGUNKWRITE("coincntr %02x", data);
}
WRITE_LINE_MEMBER(hexion_state::irq_ack_w)
@ -117,19 +354,18 @@ WRITE_LINE_MEMBER(hexion_state::nmi_ack_w)
void hexion_state::ccu_int_time_w(uint8_t data)
{
logerror("ccu_int_time rewritten with value of %02x\n", data);
LOGCCU("ccu_int_time rewritten with value of %02x\n", data);
m_ccu_int_time = data;
}
void hexion_state::hexion_map(address_map &map)
void hexion_state::base_map(address_map &map)
{
map(0x0000, 0x7fff).rom();
map(0x8000, 0x9fff).bankr("bank1");
map(0x8000, 0x9fff).bankr(m_rombank);
map(0xa000, 0xbfff).ram();
map(0xc000, 0xdffe).rw(FUNC(hexion_state::bankedram_r), FUNC(hexion_state::bankedram_w));
map(0xdfff, 0xdfff).w(FUNC(hexion_state::bankctrl_w));
map(0xe000, 0xe000).noprw();
map(0xe800, 0xe8ff).m("k051649", FUNC(k051649_device::scc_map));
map(0xf000, 0xf00f).rw(m_k053252, FUNC(k053252_device::read), FUNC(k053252_device::write));
map(0xf200, 0xf200).w("oki", FUNC(okim6295_device::write));
map(0xf400, 0xf400).portr("DSW1");
@ -144,31 +380,22 @@ void hexion_state::hexion_map(address_map &map)
map(0xf540, 0xf540).r("watchdog", FUNC(watchdog_timer_device::reset_r));
}
void hexion_state::hexion_map(address_map &map)
{
base_map(map);
map(0xe800, 0xe8ff).m("k051649", FUNC(k051649_device::scc_map));
}
void hexion_state::hexionb_map(address_map &map)
{
map(0x0000, 0x7fff).rom();
map(0x8000, 0x9fff).bankr("bank1");
map(0xa000, 0xbfff).ram();
map(0xc000, 0xdffe).rw(FUNC(hexion_state::bankedram_r), FUNC(hexion_state::bankedram_w));
map(0xdfff, 0xdfff).w(FUNC(hexion_state::bankctrl_w));
map(0xe000, 0xe000).noprw();
base_map(map);
map(0xe800, 0xe87f).noprw(); // all the code to use the k051649 is still present
map(0xe880, 0xe889).noprw(); // but the bootleg has an additional M6295 @ 0xf5c0 instead
map(0xe88a, 0xe88e).noprw();
map(0xe88f, 0xe88f).noprw();
map(0xe8e0, 0xe8ff).noprw();
map(0xf000, 0xf00f).rw(m_k053252, FUNC(k053252_device::read), FUNC(k053252_device::write));
map(0xf200, 0xf200).w("oki", FUNC(okim6295_device::write));
map(0xf400, 0xf400).portr("DSW1");
map(0xf401, 0xf401).portr("DSW2");
map(0xf402, 0xf402).portr("P1");
map(0xf403, 0xf403).portr("P2");
map(0xf440, 0xf440).portr("DSW3");
map(0xf441, 0xf441).portr("SYSTEM");
map(0xf480, 0xf480).w(FUNC(hexion_state::bankswitch_w));
map(0xf4c0, 0xf4c0).w(FUNC(hexion_state::coincntr_w));
map(0xf500, 0xf500).w(FUNC(hexion_state::gfxrom_select_w));
map(0xf540, 0xf540).r("watchdog", FUNC(watchdog_timer_device::reset_r));
map(0xf5c0, 0xf5c0).w("oki2", FUNC(okim6295_device::write));
}
@ -208,7 +435,7 @@ static INPUT_PORTS_START( hexion )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) /* 052591? game waits for it to be 0 */
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) // 052591? game waits for it to be 0
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
@ -229,7 +456,7 @@ static const gfx_layout charlayout =
};
static GFXDECODE_START( gfx_hexion )
GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 16 )
GFXDECODE_ENTRY( "tiles", 0, charlayout, 0, 16 )
GFXDECODE_END
TIMER_DEVICE_CALLBACK_MEMBER(hexion_state::scanline)
@ -253,18 +480,18 @@ TIMER_DEVICE_CALLBACK_MEMBER(hexion_state::scanline)
void hexion_state::hexion(machine_config &config)
{
/* basic machine hardware */
Z80(config, m_maincpu, XTAL(24'000'000)/4); /* Z80B 6 MHz @ 17F, xtal verified, divider not verified */
// basic machine hardware
Z80(config, m_maincpu, XTAL(24'000'000) / 4); // Z80B 6 MHz @ 17F, xtal verified, divider not verified
m_maincpu->set_addrmap(AS_PROGRAM, &hexion_state::hexion_map);
TIMER(config, "scantimer").configure_scanline(FUNC(hexion_state::scanline), "screen", 0, 1);
WATCHDOG_TIMER(config, "watchdog");
K053252(config, m_k053252, XTAL(24'000'000)/2); /* K053252, X0-010(?) @8D, xtal verified, divider not verified */
K053252(config, m_k053252, XTAL(24'000'000 )/ 2); // K053252, X0-010(?) @8D, xtal verified, divider not verified
m_k053252->int1_ack().set(FUNC(hexion_state::irq_ack_w));
m_k053252->int2_ack().set(FUNC(hexion_state::nmi_ack_w));
m_k053252->int_time().set(FUNC(hexion_state::ccu_int_time_w));
/* video hardware */
// video hardware
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_refresh_hz(60);
screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
@ -276,13 +503,13 @@ void hexion_state::hexion(machine_config &config)
GFXDECODE(config, m_gfxdecode, m_palette, gfx_hexion);
PALETTE(config, "palette", palette_device::RGB_444_PROMS, "proms", 256);
/* sound hardware */
// sound hardware
SPEAKER(config, "mono").front_center();
/* MSM6295GS @ 5E, clock frequency & pin 7 not verified */
// MSM6295GS @ 5E, clock frequency & pin 7 not verified
OKIM6295(config, "oki", 1056000, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "mono", 0.5);
/* KONAMI 051649 // 2212P003 // JAPAN 8910EAJ @ 1D, xtal verified, divider not verified */
// KONAMI 051649 // 2212P003 // JAPAN 8910EAJ @ 1D, xtal verified, divider not verified
K051649(config, "k051649", XTAL(24'000'000) / 8).add_route(ALL_OUTPUTS, "mono", 0.5);
}
@ -305,40 +532,38 @@ void hexion_state::hexionb(machine_config &config)
***************************************************************************/
ROM_START( hexion )
ROM_REGION( 0x34800, "maincpu", 0 ) /* ROMs + space for additional RAM */
ROM_LOAD( "122__j_a__b01.16f", 0x00000, 0x20000, CRC(eabc6dd1) SHA1(e74c1f1f2fcf8973f0741a2d544f25c8639448bf) ) /* "122 // J A // B01" @16F (27c010?) */
ROM_RELOAD( 0x10000, 0x20000 ) /* banked at 8000-9fff */
ROM_REGION( 0x20000, "maincpu", 0 )
ROM_LOAD( "122__j_a__b01.16f", 0x00000, 0x20000, CRC(eabc6dd1) SHA1(e74c1f1f2fcf8973f0741a2d544f25c8639448bf) ) // "122 // J A // B01" @16F (27c010?)
ROM_REGION( 0x80000, "gfx1", 0 ) /* addressable by the main CPU */
ROM_LOAD( "122a07.1h", 0x00000, 0x40000, CRC(22ae55e3) SHA1(41bdc990f69416b639542e2186a3610c16389063) ) /* Later pcbs have mask roms labeled: "KONAMI // 055066 // 122A07 // 233505" @1H (maybe mismarked 2H on pcb?) */
ROM_LOAD( "122a06.1g", 0x40000, 0x40000, CRC(438f4388) SHA1(9e23805c9642a237daeaf106187d1e1e0692434d) ) /* Later pcbs have mask roms labeled: "KONAMI // 055065 // 122A06 // 233506" @1G */
ROM_REGION( 0x80000, "tiles", 0 ) // addressable by the main CPU
ROM_LOAD( "122a07.1h", 0x00000, 0x40000, CRC(22ae55e3) SHA1(41bdc990f69416b639542e2186a3610c16389063) ) // Later PCBs have mask ROMs labeled: "KONAMI // 055066 // 122A07 // 233505" @1H (maybe mismarked 2H on PCB?)
ROM_LOAD( "122a06.1g", 0x40000, 0x40000, CRC(438f4388) SHA1(9e23805c9642a237daeaf106187d1e1e0692434d) ) // Later PCBs have mask ROMs labeled: "KONAMI // 055065 // 122A06 // 233506" @1G
ROM_REGION( 0x40000, "oki", 0 ) /* OKIM6295 samples */
ROM_LOAD( "122a05.2f", 0x0000, 0x40000, CRC(bcc831bf) SHA1(c3382065dd0069a4dc0bde2d9931ec85b0bffc73) ) /* Later pcbs have mask roms labeled: "KONAMI // 055064 // 122A05 // 233507" @2F (maybe 2G? marking isn't visible in the picture I have) */
ROM_REGION( 0x40000, "oki", 0 )
ROM_LOAD( "122a05.2f", 0x0000, 0x40000, CRC(bcc831bf) SHA1(c3382065dd0069a4dc0bde2d9931ec85b0bffc73) ) // Later PCBs have mask ROMs labeled: "KONAMI // 055064 // 122A05 // 233507" @2F (maybe 2G? marking isn't visible in the picture I have)
ROM_REGION( 0x0300, "proms", 0 )
ROM_LOAD( "122a04.10b", 0x0000, 0x0100, CRC(506eb8c6) SHA1(3bff7cf286942d8bdbc3998245c3de20981fbecb) ) // AMD27S21 == 82S129
ROM_LOAD( "122a03.11b", 0x0100, 0x0100, CRC(590c4f64) SHA1(db4b34f8c5fdfea034a94d65873f6fb842f123e9) ) // AMD27S21 == 82S129
ROM_LOAD( "122a02.13b", 0x0200, 0x0100, CRC(5734305c) SHA1(c72e59acf79a4db1a5a9d827eef899c0675336f2) ) // AMD27S21 == 82S129
// there are also two PALs of unknown type on the pcb:
// there are also two PALs of unknown type on the PCB:
//054843 @12F
//054844 @12H(12I?)
ROM_END
ROM_START( hexionb )
ROM_REGION( 0x34800, "maincpu", 0 ) /* ROMs + space for additional RAM */
ROM_REGION( 0x20000, "maincpu", 0 )
ROM_LOAD( "hexionb.u2", 0x00000, 0x20000, CRC(93edc5d4) SHA1(d14c5be85a67eebddda9103bdf19de8c3c05d3af) )
ROM_RELOAD( 0x10000, 0x20000 ) /* banked at 8000-9fff */
ROM_REGION( 0x80000, "gfx1", 0 ) /* addressable by the main CPU */
ROM_REGION( 0x80000, "tiles", 0 ) // addressable by the main CPU
ROM_LOAD( "hexionb.u30", 0x00000, 0x40000, CRC(22ae55e3) SHA1(41bdc990f69416b639542e2186a3610c16389063) ) // == 122a07.1h
ROM_LOAD( "hexionb.u29", 0x40000, 0x40000, CRC(438f4388) SHA1(9e23805c9642a237daeaf106187d1e1e0692434d) ) // == 122a06.1g
ROM_REGION( 0x40000, "oki", 0 ) /* OKIM6295 samples */
ROM_REGION( 0x40000, "oki", 0 )
ROM_LOAD( "hexionb.u16", 0x0000, 0x40000, CRC(bcc831bf) SHA1(c3382065dd0069a4dc0bde2d9931ec85b0bffc73) ) // == 122a05.2f
ROM_REGION( 0x40000, "oki2", 0 ) /* OKIM6295 samples */
ROM_REGION( 0x40000, "oki2", 0 )
ROM_LOAD( "hexionb.u18", 0x0000, 0x40000, CRC(c179d315) SHA1(b39d5ec8a90b7ae06763191b8324f32fe1d0ca9b) )
ROM_REGION( 0x0300, "proms", 0 )
@ -351,5 +576,8 @@ ROM_START( hexionb )
//PAL20L10 @U31
ROM_END
GAME( 1992, hexion, 0, hexion, hexion, hexion_state, empty_init, ROT0, "Konami", "Hexion (Japan ver JAB)", 0 )
GAME( 1992, hexionb, hexion, hexionb, hexion, hexion_state, empty_init, ROT0, "bootleg (Impeuropex Corp.)", "Hexion (Asia ver AAA, bootleg)", 0 ) // we're missing an original Asia AAA
} // anonymous namespace
GAME( 1992, hexion, 0, hexion, hexion, hexion_state, empty_init, ROT0, "Konami", "Hexion (Japan ver JAB)", MACHINE_SUPPORTS_SAVE )
GAME( 1992, hexionb, hexion, hexionb, hexion, hexion_state, empty_init, ROT0, "bootleg (Impeuropex Corp.)", "Hexion (Asia ver AAA, bootleg)", MACHINE_SUPPORTS_SAVE ) // we're missing an original Asia AAA

View File

@ -234,9 +234,9 @@ static GFXDECODE_START( gfx_powerins )
GFXDECODE_END
static GFXDECODE_START( gfx_powerinsc )
GFXDECODE_ENTRY( "bgtile", 0x280000, gfx_8x8x4_packed_msb, 0x200, 0x10 ) // [1] Tiles
GFXDECODE_ENTRY( "bgtile", 0, gfx_8x8x4_col_2x2_group_packed_msb, 0x000, 0x20 ) // [0] Tiles
GFXDECODE_ENTRY( "sprites", 0, gfx_8x8x4_col_2x2_group_packed_msb, 0x400, 0x40 ) // [2] Sprites
GFXDECODE_ENTRY( "bgtile", 0x280000, gfx_8x8x4_packed_lsb, 0x200, 0x10 ) // [1] Tiles
GFXDECODE_ENTRY( "bgtile", 0, gfx_8x8x4_col_2x2_group_packed_lsb, 0x000, 0x20 ) // [0] Tiles
GFXDECODE_ENTRY( "sprites", 0, gfx_8x8x4_col_2x2_group_packed_lsb, 0x400, 0x40 ) // [2] Sprites, TODO: wrong decode and ROM loading
GFXDECODE_END
/***************************************************************************
@ -250,17 +250,6 @@ MACHINE_START_MEMBER(powerins_state, powerinsa)
m_okibank[0]->configure_entries(0, 5, memregion("oki1")->base() + 0x30000, 0x10000);
}
void powerins_state::init_powerinsc()
{
u8 *bgtile = memregion("bgtile")->base();
for (int i = 0; i < 0x300000; i++)
{
u8 x = bgtile[i];
bgtile[i] = bitswap(x, 3, 2, 1, 0, 7, 6, 5, 4);
}
}
void powerins_state::powerins(machine_config &config)
{
/* basic machine hardware */
@ -788,7 +777,7 @@ ROM_START( powerinsc )
ROM_LOAD16_BYTE( "15.040.u81", 0x400001, 0x80000, CRC(035316d3) SHA1(c1c6f243213f05a53f0fc4f3df530895c34355a9) )
ROM_LOAD16_BYTE( "25.040.u94", 0x500000, 0x80000, CRC(a250dea8) SHA1(6b4c5ad35f4f4cdab516118a21c58617044c3208) )
ROM_LOAD16_BYTE( "14.040.u96", 0x500001, 0x80000, CRC(dd976689) SHA1(ba7e80a94e6c6bb7a5b569fb5440e774cd89b79d) )
ROM_LOAD16_BYTE( "24.040.u95", 0x600000, 0x80000, CRC(dd976689) SHA1(ba7e80a94e6c6bb7a5b569fb5440e774cd89b79d) )
ROM_LOAD16_BYTE( "24.040.u95", 0x600000, 0x80000, CRC(851008f4) SHA1(cd6e5d8e6807fc3224022ca53f02f390e1232b06) )
ROM_LOAD16_BYTE( "13.040.u89", 0x600001, 0x80000, CRC(867262d6) SHA1(bf0b13a5bb818741150d09be44968779c55c5b96) )
ROM_LOAD16_BYTE( "23.040.u96", 0x700000, 0x80000, CRC(625c5b7b) SHA1(ddac164cd92459bdce5905b31eccded9b1c06086) )
ROM_LOAD16_BYTE( "12.040.u92", 0x700001, 0x80000, CRC(08c4e478) SHA1(172dd9532a9240014afb4817b61a3e8122be8f0c) )
@ -813,4 +802,4 @@ GAME( 1993, powerinspu, powerins, powerins, powerinj, powerins_state, empty_ini
GAME( 1993, powerinspj, powerins, powerins, powerinj, powerins_state, empty_init, ROT0, "Atlus", "Gouketsuji Ichizoku (Japan, prototype)", MACHINE_SUPPORTS_SAVE ) // boots as 93.10.20 just like the other sets, but code is different
GAME( 1993, powerinsa, powerins, powerinsa, powerins, powerins_state, empty_init, ROT0, "bootleg", "Power Instinct (USA, bootleg set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1993, powerinsb, powerins, powerinsb, powerins, powerins_state, empty_init, ROT0, "bootleg", "Power Instinct (USA, bootleg set 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1993, powerinsc, powerins, powerinsc, powerins, powerins_state, init_powerinsc, ROT0, "bootleg", "Power Instinct (USA, bootleg set 3)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // different sprites' format not implemented
GAME( 1993, powerinsc, powerins, powerinsc, powerins, powerins_state, empty_init, ROT0, "bootleg", "Power Instinct (USA, bootleg set 3)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // different sprites' format not implemented

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@ -1,67 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:Nicola Salmoria
#ifndef MAME_INCLUDES_HEXION_H
#define MAME_INCLUDES_HEXION_H
#pragma once
#include "machine/k053252.h"
#include "machine/timer.h"
#include "emupal.h"
#include "tilemap.h"
class hexion_state : public driver_device
{
public:
hexion_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_k053252(*this, "k053252"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette")
{ }
void hexion(machine_config &config);
void hexionb(machine_config &config);
protected:
virtual void video_start() override;
private:
required_device<cpu_device> m_maincpu;
required_device<k053252_device> m_k053252;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
uint8_t *m_vram[2]{};
uint8_t *m_unkram = nullptr;
int m_bankctrl = 0;
int m_rambank = 0;
int m_pmcbank = 0;
int m_gfxrom_select = 0;
int m_ccu_int_time = 0;
int m_ccu_int_time_count = 0;
tilemap_t *m_bg_tilemap[2]{};
void coincntr_w(uint8_t data);
void bankswitch_w(uint8_t data);
uint8_t bankedram_r(offs_t offset);
void bankedram_w(offs_t offset, uint8_t data);
void bankctrl_w(uint8_t data);
void gfxrom_select_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(irq_ack_w);
DECLARE_WRITE_LINE_MEMBER(nmi_ack_w);
void ccu_int_time_w(uint8_t data);
TILE_GET_INFO_MEMBER(get_tile_info0);
TILE_GET_INFO_MEMBER(get_tile_info1);
TIMER_DEVICE_CALLBACK_MEMBER(scanline);
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
inline void get_tile_info(tile_data &tileinfo,int tile_index,uint8_t *ram);
void hexion_map(address_map &map);
void hexionb_map(address_map &map);
};
#endif // MAME_INCLUDES_HEXION_H

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@ -21,8 +21,6 @@ public:
void powerinsb(machine_config &config);
void powerinsc(machine_config &config);
void init_powerinsc();
private:
void powerinsa_okibank_w(u8 data);
u8 powerinsb_fake_ym2203_r();

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@ -9470,6 +9470,7 @@ megadble // (c) 1990 Blitz Systems Inc.
megadblj // (c) 1990 Blitz Systems Inc.
megastrp // (c) 1992 Blitz Systems Inc.
poker52 // (c) 1993 Blitz Systems Inc. ?
super97 // (c) 1997 Cadillac Jack
surpr5 // (c) 1997 Cadillac Jack
steaser // (c) 1993 unknown
texasrls // (c) 1998 Cadillac Jack

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@ -1,168 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:Nicola Salmoria
#include "emu.h"
#include "includes/hexion.h"
/***************************************************************************
Callbacks for the TileMap code
***************************************************************************/
inline void hexion_state::get_tile_info(tile_data &tileinfo,int tile_index,uint8_t *ram)
{
tile_index *= 4;
tileinfo.set(0,
ram[tile_index] + ((ram[tile_index+1] & 0x3f) << 8),
ram[tile_index+2] & 0x0f,
0);
}
TILE_GET_INFO_MEMBER(hexion_state::get_tile_info0)
{
get_tile_info(tileinfo,tile_index,m_vram[0]);
}
TILE_GET_INFO_MEMBER(hexion_state::get_tile_info1)
{
get_tile_info(tileinfo,tile_index,m_vram[1]);
}
/***************************************************************************
Start the video hardware emulation.
***************************************************************************/
void hexion_state::video_start()
{
m_bg_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(hexion_state::get_tile_info0)), TILEMAP_SCAN_ROWS,8,8,64,32);
m_bg_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(hexion_state::get_tile_info1)), TILEMAP_SCAN_ROWS, 8,8,64,32);
m_bg_tilemap[0]->set_transparent_pen(0);
m_bg_tilemap[1]->set_scrollx(0,-4);
m_bg_tilemap[1]->set_scrolly(0,4);
m_vram[0] = memregion("maincpu")->base() + 0x30000;
m_vram[1] = m_vram[0] + 0x2000;
m_unkram = m_vram[1] + 0x2000;
membank("bank1")->configure_entries(0, 16, memregion("maincpu")->base() + 0x10000, 0x2000);
m_gfxrom_select = 0;
}
/***************************************************************************
Memory handlers
***************************************************************************/
void hexion_state::bankswitch_w(uint8_t data)
{
/* bits 0-3 select ROM bank */
membank("bank1")->set_entry(data & 0x0f);
/* does bit 6 trigger the 052591? */
if (data & 0x40)
{
int bank = m_unkram[0]&1;
memset(m_vram[bank],m_unkram[1],0x2000);
m_bg_tilemap[bank]->mark_all_dirty();
}
/* bit 7 = PMC-BK */
m_pmcbank = (data & 0x80) >> 7;
/* other bits unknown */
if (data & 0x30)
popmessage("bankswitch %02x",data&0xf0);
//logerror("%s: bankswitch_w %02x\n",m_maincpu->pc(),data);
}
uint8_t hexion_state::bankedram_r(offs_t offset)
{
if (m_gfxrom_select && offset < 0x1000)
{
return memregion("gfx1")->base()[((m_gfxrom_select & 0x7f) << 12) + offset];
}
else if (m_bankctrl == 0)
{
return m_vram[m_rambank][offset];
}
else if (m_bankctrl == 2 && offset < 0x800)
{
return m_unkram[offset];
}
else
{
//logerror("%s: bankedram_r offset %04x, bankctrl = %02x\n",m_maincpu->pc(),offset,m_bankctrl);
return 0;
}
}
void hexion_state::bankedram_w(offs_t offset, uint8_t data)
{
if (m_bankctrl == 3 && offset == 0 && (data & 0xfe) == 0)
{
//logerror("%s: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",m_maincpu->pc(),offset,data,m_bankctrl);
m_rambank = data & 1;
}
else if (m_bankctrl == 0)
{
if (m_pmcbank)
{
//logerror("%s: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",m_maincpu->pc(),offset,data,m_bankctrl);
m_vram[m_rambank][offset] = data;
m_bg_tilemap[m_rambank]->mark_tile_dirty(offset/4);
}
else
logerror("%04x pmc internal ram %04x = %02x\n",m_maincpu->pc(),offset,data);
}
else if (m_bankctrl == 2 && offset < 0x800)
{
if (m_pmcbank)
{
//logerror("%s: unkram_w offset %04x, data %02x, bankctrl = %02x\n",m_maincpu->pc(),offset,data,m_bankctrl);
m_unkram[offset] = data;
}
else
logerror("%04x pmc internal ram %04x = %02x\n",m_maincpu->pc(),offset,data);
}
else
logerror("%s: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",m_maincpu->pc(),offset,data,m_bankctrl);
}
void hexion_state::bankctrl_w(uint8_t data)
{
//logerror("%s: bankctrl_w %02x\n",m_maincpu->pc(),data);
m_bankctrl = data;
}
void hexion_state::gfxrom_select_w(uint8_t data)
{
//logerror("%s: gfxrom_select_w %02x\n",m_maincpu->pc(),data);
m_gfxrom_select = data;
}
/***************************************************************************
Display refresh
***************************************************************************/
uint32_t hexion_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
m_bg_tilemap[1]->draw(screen, bitmap, cliprect, 0,0);
m_bg_tilemap[0]->draw(screen, bitmap, cliprect, 0,0);
return 0;
}