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https://github.com/holub/mame
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vp101: Implemented ATA DMA [R. Belmont]
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@ -34,12 +34,21 @@ public:
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m_ata(*this, "ata")
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{ }
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virtual void machine_reset() override;
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virtual void machine_start() override;
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DECLARE_READ32_MEMBER(tty_ready_r);
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DECLARE_WRITE32_MEMBER(tty_w);
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DECLARE_READ32_MEMBER(test_r) { return 0xffffffff; }
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DECLARE_READ32_MEMBER(pic_r);
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DECLARE_WRITE32_MEMBER(pic_w);
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DECLARE_WRITE32_MEMBER(dmaaddr_w);
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DECLARE_WRITE_LINE_MEMBER(dmarq_w);
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uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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@ -54,8 +63,51 @@ protected:
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virtual void video_start() override;
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int pic_cmd;
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int pic_state;
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int m_dmarq_state;
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uint32_t m_dma_ptr;
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};
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void vp10x_state::machine_reset()
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{
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m_dmarq_state = 0;
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pic_cmd = pic_state = 0;
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}
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void vp10x_state::machine_start()
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{
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m_maincpu->mips3drc_set_options(MIPS3DRC_FASTEST_OPTIONS);
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m_maincpu->add_fastram(0x00000000, 0x07ffffff, false, m_mainram);
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}
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WRITE32_MEMBER(vp10x_state::dmaaddr_w)
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{
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m_dma_ptr = (data & 0x07ffffff);
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}
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WRITE_LINE_MEMBER(vp10x_state::dmarq_w)
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{
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if (state != m_dmarq_state)
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{
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m_dmarq_state = state;
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if (state)
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{
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uint16_t *RAMbase = (uint16_t *)&m_mainram[0];
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uint16_t *RAM = &RAMbase[m_dma_ptr>>1];
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m_ata->write_dmack(ASSERT_LINE);
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while (m_dmarq_state)
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{
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*RAM++ = m_ata->read_dma();
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m_dma_ptr += 2; // pointer must advance
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}
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m_ata->write_dmack(CLEAR_LINE);
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}
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}
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}
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READ32_MEMBER(vp10x_state::pic_r)
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{
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static const uint8_t vers[5] = { 0x00, 0x01, 0x00, 0x00, 0x00 };
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@ -92,7 +144,6 @@ WRITE32_MEMBER(vp10x_state::pic_w)
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void vp10x_state::video_start()
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{
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pic_cmd = pic_state = 0;
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}
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uint32_t vp10x_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
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@ -127,7 +178,7 @@ WRITE32_MEMBER(vp10x_state::tty_w) // set breakpoint at bfc01430 to catch when
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{
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// uncomment to see startup messages - it says "RAM OK" and "EPI RSS Ver 4.5.1" followed by "<RSS active>" and then lots of dots
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// Special Forces also says "<inited tv_cap> = 00000032"
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// printf("%c", data);
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printf("%c", data);
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}
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static ADDRESS_MAP_START( main_map, AS_PROGRAM, 32, vp10x_state )
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@ -140,6 +191,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 32, vp10x_state )
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AM_RANGE(0x1ca0000c, 0x1ca0000f) AM_READ_PORT("IN0")
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AM_RANGE(0x1ca00010, 0x1ca00013) AM_READ(test_r) // bits here cause various test mode stuff
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AM_RANGE(0x1cf00000, 0x1cf00003) AM_NOP AM_READNOP
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AM_RANGE(0x1d000030, 0x1d000033) AM_WRITE(dmaaddr_w) // ATA DMA destination address
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AM_RANGE(0x1d000040, 0x1d00005f) AM_DEVREADWRITE16("ata", ata_interface_device, read_cs0, write_cs0, 0x0000ffff)
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AM_RANGE(0x1d000060, 0x1d00007f) AM_DEVREADWRITE16("ata", ata_interface_device, read_cs1, write_cs1, 0x0000ffff)
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AM_RANGE(0x1f200000, 0x1f200003) AM_READWRITE(pic_r, pic_w)
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@ -173,6 +225,7 @@ static MACHINE_CONFIG_START( vp101, vp10x_state )
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MCFG_SCREEN_VISIBLE_AREA(0, 319, 0, 239)
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MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", nullptr, false)
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MCFG_ATA_INTERFACE_DMARQ_HANDLER(WRITELINE(vp10x_state, dmarq_w))
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MCFG_NVRAM_ADD_0FILL("nvram")
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MACHINE_CONFIG_END
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