Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-07-03 17:08:39 +03:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

Merge branch 'master' of https://github.com/mamedev/mame

Browse Source
This commit is contained in:
Lord-Nightmare 2015-06-12 10:20:49 -04:00
commit 93b52fe579
5 changed files with 358 additions and 243 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

386
src/emu/bus/isa/hdc.c
View File

@ -112,9 +112,20 @@ static const char *const hdc_command_names[] =
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL /* 0xF8-0xFF */ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL /* 0xF8-0xFF */
}; };
static MACHINE_CONFIG_FRAGMENT( hdc_config ) static MACHINE_CONFIG_FRAGMENT( xt_hdc_config )
MCFG_HARDDISK_ADD("primary") MCFG_DEVICE_ADD("hdc",XT_HDC,0)
MCFG_HARDDISK_ADD("slave") MCFG_XTHDC_IRQ_HANDLER(WRITELINE(isa8_hdc_device,irq_w))
MCFG_XTHDC_DRQ_HANDLER(WRITELINE(isa8_hdc_device,drq_w))
MCFG_HARDDISK_ADD("hdc:primary")
MCFG_HARDDISK_ADD("hdc:slave")
MACHINE_CONFIG_END
static MACHINE_CONFIG_FRAGMENT( ec1841_hdc_config )
MCFG_DEVICE_ADD("hdc",EC1841_HDC,0)
MCFG_XTHDC_IRQ_HANDLER(WRITELINE(isa8_hdc_ec1841_device,irq_w))
MCFG_XTHDC_DRQ_HANDLER(WRITELINE(isa8_hdc_ec1841_device,drq_w))
MCFG_HARDDISK_ADD("hdc:primary")
MCFG_HARDDISK_ADD("hdc:slave")
MACHINE_CONFIG_END MACHINE_CONFIG_END
ROM_START( hdc ) ROM_START( hdc )
@ -146,86 +157,41 @@ static INPUT_PORTS_START( isa_hdc )
PORT_DIPSETTING( 0x00, DEF_STR(No) ) PORT_DIPSETTING( 0x00, DEF_STR(No) )
INPUT_PORTS_END INPUT_PORTS_END
//************************************************************************** const device_type XT_HDC = &device_creator<xt_hdc_device>;
// GLOBAL VARIABLES const device_type EC1841_HDC = &device_creator<ec1841_device>;
//**************************************************************************
const device_type ISA8_HDC = &device_creator<isa8_hdc_device>; xt_hdc_device::xt_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
const device_type ISA8_HDC_EC1841 = &device_creator<isa8_hdc_ec1841_device>; device_t(mconfig, XT_HDC, "Generic PC-XT Fixed Disk Controller", tag, owner, clock, "xt_hdc", __FILE__),
m_irq_handler(*this),
//------------------------------------------------- m_drq_handler(*this)
// machine_config_additions - device-specific
// machine configurations
//-------------------------------------------------
machine_config_constructor isa8_hdc_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( hdc_config );
}
//-------------------------------------------------
// rom_region - device-specific ROM region
//-------------------------------------------------
const rom_entry *isa8_hdc_device::device_rom_region() const
{
return ROM_NAME( hdc );
}
//-------------------------------------------------
// input_ports - device-specific input ports
//-------------------------------------------------
ioport_constructor isa8_hdc_device::device_input_ports() const
{
return INPUT_PORTS_NAME( isa_hdc );
}
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
//-------------------------------------------------
// isa8_hdc_device - constructor
//-------------------------------------------------
isa8_hdc_device::isa8_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, ISA8_HDC, "Fixed Disk Controller Card", tag, owner, clock, "hdc", __FILE__),
device_isa8_card_interface(mconfig, *this)
{ {
m_type = STANDARD; m_type = STANDARD;
} }
isa8_hdc_device::isa8_hdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) : xt_hdc_device::xt_hdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
device_t(mconfig, type, name, tag, owner, clock, shortname, source), device_t(mconfig, type, name, tag, owner, clock, shortname, source),
device_isa8_card_interface(mconfig, *this) m_irq_handler(*this),
m_drq_handler(*this)
{ {
} }
isa8_hdc_ec1841_device::isa8_hdc_ec1841_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : ec1841_device::ec1841_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
isa8_hdc_device( mconfig, ISA8_HDC_EC1841, "EC1841 HDC", tag, owner, clock, "hdc_ec1841", __FILE__) xt_hdc_device(mconfig, EC1841_HDC, "EC1841 Fixed Disk Controller", tag, owner, clock, "ec1481", __FILE__),
m_irq_handler(*this),
m_drq_handler(*this)
{ {
m_type = EC1841; m_type = EC1841;
} }
//------------------------------------------------- void xt_hdc_device::device_start()
// device_start - device-specific startup
//-------------------------------------------------
void isa8_hdc_device::device_start()
{ {
set_isa_device();
m_isa->install_device(0x0320, 0x0323, 0, 0, read8_delegate( FUNC(isa8_hdc_device::pc_hdc_r), this ), write8_delegate( FUNC(isa8_hdc_device::pc_hdc_w), this ) );
m_isa->set_dma_channel(3, this, FALSE);
buffer.resize(17*4*512); buffer.resize(17*4*512);
timer = timer_alloc(); timer = timer_alloc();
m_irq_handler.resolve_safe();
m_drq_handler.resolve_safe();
} }
//------------------------------------------------- void xt_hdc_device::device_reset()
// device_reset - device-specific reset
//-------------------------------------------------
void isa8_hdc_device::device_reset()
{ {
drv = 0; drv = 0;
data_cnt = 0; data_cnt = 0;
@ -250,13 +216,9 @@ void isa8_hdc_device::device_reset()
csb = 0; csb = 0;
status = 0; status = 0;
error = 0; error = 0;
dip = ioport("HDD")->read();
if (ioport("ROM")->read() == 1)
m_isa->install_rom(this, 0xc8000, 0xc9fff, 0, 0, "hdc", "hdc");
} }
hard_disk_file *isa8_hdc_device::pc_hdc_file(int id) hard_disk_file *xt_hdc_device::pc_hdc_file(int id)
{ {
harddisk_image_device *img = NULL; harddisk_image_device *img = NULL;
switch( id ) switch( id )
@ -277,14 +239,12 @@ hard_disk_file *isa8_hdc_device::pc_hdc_file(int id)
return img->get_hard_disk_file(); return img->get_hard_disk_file();
} }
void isa8_hdc_device::pc_hdc_result(int set_error_info) void xt_hdc_device::pc_hdc_result(int set_error_info)
{ {
if ( ( hdc_control & 0x02 )) { if ( ( hdc_control & 0x02 ))
{
// dip switch selected IRQ 5 or 2 // dip switch selected IRQ 5 or 2
if (BIT(dip, 6)) m_irq_handler(1);
m_isa->irq5_w(1);
else
m_isa->irq2_w(1);
} }
if (LOG_HDC_STATUS) if (LOG_HDC_STATUS)
@ -318,14 +278,14 @@ void isa8_hdc_device::pc_hdc_result(int set_error_info)
int isa8_hdc_device::no_dma(void) int xt_hdc_device::no_dma(void)
{ {
return (hdc_control & CTL_DMA) == 0; return (hdc_control & CTL_DMA) == 0;
} }
int isa8_hdc_device::get_lbasector() int xt_hdc_device::get_lbasector()
{ {
hard_disk_info *info; hard_disk_info *info;
hard_disk_file *file; hard_disk_file *file;
@ -342,8 +302,6 @@ int isa8_hdc_device::get_lbasector()
return lbasector; return lbasector;
} }
/******************************************************************** /********************************************************************
* *
* Read a number of sectors to the address set up for DMA chan #3 * Read a number of sectors to the address set up for DMA chan #3
@ -354,7 +312,7 @@ int isa8_hdc_device::get_lbasector()
* implementation that threw the idea of "emulating the hardware" to the wind * implementation that threw the idea of "emulating the hardware" to the wind
*/ */
int isa8_hdc_device::pc_hdc_dack_r() int xt_hdc_device::dack_r()
{ {
UINT8 result; UINT8 result;
hard_disk_info *info; hard_disk_info *info;
@ -392,7 +350,7 @@ int isa8_hdc_device::pc_hdc_dack_r()
if (!no_dma()) if (!no_dma())
{ {
m_isa->drq3_w((hdcdma_read || hdcdma_size ) ? 1 : 0); m_drq_handler((hdcdma_read || hdcdma_size ) ? 1 : 0);
if(!(hdcdma_read || hdcdma_size)) pc_hdc_result(0); if(!(hdcdma_read || hdcdma_size)) pc_hdc_result(0);
} }
@ -401,7 +359,7 @@ int isa8_hdc_device::pc_hdc_dack_r()
void isa8_hdc_device::pc_hdc_dack_w(int data) void xt_hdc_device::dack_w(int data)
{ {
hard_disk_info *info; hard_disk_info *info;
hard_disk_file *file; hard_disk_file *file;
@ -434,14 +392,14 @@ void isa8_hdc_device::pc_hdc_dack_w(int data)
if (!no_dma()) if (!no_dma())
{ {
m_isa->drq3_w(hdcdma_size ? 1 : 0); m_drq_handler(hdcdma_size ? 1 : 0);
if(!hdcdma_size) pc_hdc_result(1); if(!hdcdma_size) pc_hdc_result(1);
} }
} }
void isa8_hdc_device::pc_hdc_dack_ws(int data) void xt_hdc_device::dack_ws(int data)
{ {
*(hdcdma_dst++) = data; *(hdcdma_dst++) = data;
@ -454,14 +412,14 @@ void isa8_hdc_device::pc_hdc_dack_ws(int data)
if (!no_dma()) if (!no_dma())
{ {
m_isa->drq3_w(hdcdma_size ? 1 : 0); m_drq_handler(hdcdma_size ? 1 : 0);
if(!hdcdma_size) pc_hdc_result(1); if(!hdcdma_size) pc_hdc_result(1);
} }
} }
void isa8_hdc_device::execute_read() void xt_hdc_device::execute_read()
{ {
hard_disk_file *disk = NULL; hard_disk_file *disk = NULL;
int size = sector_cnt[drv] * 512; int size = sector_cnt[drv] * 512;
@ -479,18 +437,18 @@ void isa8_hdc_device::execute_read()
{ {
do do
{ {
buffer[data_cnt++] = pc_hdc_dack_r(); buffer[data_cnt++] = dack_r();
} while (hdcdma_read || hdcdma_size); } while (hdcdma_read || hdcdma_size);
} }
else else
{ {
m_isa->drq3_w(1); m_drq_handler(1);
} }
} }
void isa8_hdc_device::execute_write() void xt_hdc_device::execute_write()
{ {
hard_disk_file *disk = NULL; hard_disk_file *disk = NULL;
int size = sector_cnt[drv] * 512; int size = sector_cnt[drv] * 512;
@ -508,19 +466,19 @@ void isa8_hdc_device::execute_write()
{ {
do do
{ {
pc_hdc_dack_w(buffer[data_cnt++]); dack_w(buffer[data_cnt++]);
} }
while (hdcdma_write || hdcdma_size); while (hdcdma_write || hdcdma_size);
} }
else else
{ {
m_isa->drq3_w(1); m_drq_handler(1);
} }
} }
void isa8_hdc_device::execute_writesbuff() void xt_hdc_device::execute_writesbuff()
{ {
hdcdma_dst = hdcdma_data; hdcdma_dst = hdcdma_data;
hdcdma_write = 512; hdcdma_write = 512;
@ -530,19 +488,19 @@ void isa8_hdc_device::execute_writesbuff()
{ {
do do
{ {
pc_hdc_dack_ws(buffer[data_cnt++]); dack_ws(buffer[data_cnt++]);
} }
while (hdcdma_write || hdcdma_size); while (hdcdma_write || hdcdma_size);
} }
else else
{ {
m_isa->drq3_w(1); m_drq_handler(1);
} }
} }
void isa8_hdc_device::get_drive() void xt_hdc_device::get_drive()
{ {
drv = (buffer[1] >> 5) & 1; drv = (buffer[1] >> 5) & 1;
csb = (drv) ? CSB_LUN : 0x00; csb = (drv) ? CSB_LUN : 0x00;
@ -550,7 +508,7 @@ void isa8_hdc_device::get_drive()
void isa8_hdc_device::get_chsn() void xt_hdc_device::get_chsn()
{ {
head[drv] = buffer[1] & 0x1f; head[drv] = buffer[1] & 0x1f;
sector[drv] = buffer[2] & 0x3f; sector[drv] = buffer[2] & 0x3f;
@ -562,7 +520,7 @@ void isa8_hdc_device::get_chsn()
error = 0x80; /* a potential error has C/H/S/N info */ error = 0x80; /* a potential error has C/H/S/N info */
} }
int isa8_hdc_device::test_ready() int xt_hdc_device::test_ready()
{ {
if( !pc_hdc_file(drv) ) if( !pc_hdc_file(drv) )
{ {
@ -573,7 +531,7 @@ int isa8_hdc_device::test_ready()
return 1; return 1;
} }
void isa8_hdc_device::hdc_command() void xt_hdc_device::command()
{ {
int set_error_info = 1; int set_error_info = 1;
int old_error = error; /* Previous error data is needed for CMD_SENSE */ int old_error = error; /* Previous error data is needed for CMD_SENSE */
@ -684,9 +642,9 @@ void isa8_hdc_device::hdc_command()
} }
void isa8_hdc_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) void xt_hdc_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{ {
hdc_command(); command();
} }
@ -710,7 +668,7 @@ void isa8_hdc_device::device_timer(emu_timer &timer, device_timer_id id, int par
* cccccccc write precomp l * cccccccc write precomp l
* eeeeeeee ecc * eeeeeeee ecc
*/ */
void isa8_hdc_device::pc_hdc_data_w(int data) void xt_hdc_device::data_w(int data)
{ {
if( data_cnt == 0 ) if( data_cnt == 0 )
{ {
@ -786,7 +744,7 @@ void isa8_hdc_device::pc_hdc_data_w(int data)
void isa8_hdc_device::pc_hdc_reset_w(int data) void xt_hdc_device::reset_w(int data)
{ {
cylinder[0] = cylinder[1] = 0; cylinder[0] = cylinder[1] = 0;
head[0] = head[1] = 0; head[0] = head[1] = 0;
@ -800,7 +758,7 @@ void isa8_hdc_device::pc_hdc_reset_w(int data)
void isa8_hdc_device::pc_hdc_select_w(int data) void xt_hdc_device::select_w(int data)
{ {
status &= ~STA_INTERRUPT; status &= ~STA_INTERRUPT;
status |= STA_SELECT; status |= STA_SELECT;
@ -808,7 +766,7 @@ void isa8_hdc_device::pc_hdc_select_w(int data)
void isa8_hdc_device::pc_hdc_control_w(int data) void xt_hdc_device::control_w(int data)
{ {
if (LOG_HDC_STATUS) if (LOG_HDC_STATUS)
logerror("%s: pc_hdc_control_w(): control write %d\n", machine().describe_context(), data); logerror("%s: pc_hdc_control_w(): control write %d\n", machine().describe_context(), data);
@ -817,16 +775,13 @@ void isa8_hdc_device::pc_hdc_control_w(int data)
if (!(hdc_control & 0x02)) if (!(hdc_control & 0x02))
{ {
if (BIT(dip, 6)) m_irq_handler(0);
m_isa->irq5_w(0);
else
m_isa->irq2_w(0);
} }
} }
UINT8 isa8_hdc_device::pc_hdc_data_r() UINT8 xt_hdc_device::data_r()
{ {
UINT8 data = 0xff; UINT8 data = 0xff;
if( data_cnt ) if( data_cnt )
@ -846,12 +801,158 @@ UINT8 isa8_hdc_device::pc_hdc_data_r()
UINT8 isa8_hdc_device::pc_hdc_status_r() UINT8 xt_hdc_device::status_r()
{ {
return status; return status;
} }
void xt_hdc_device::set_ready()
{
status |= STA_READY; // XXX
}
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
const device_type ISA8_HDC = &device_creator<isa8_hdc_device>;
const device_type ISA8_HDC_EC1841 = &device_creator<isa8_hdc_ec1841_device>;
//-------------------------------------------------
// machine_config_additions - device-specific
// machine configurations
//-------------------------------------------------
machine_config_constructor isa8_hdc_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( xt_hdc_config );
}
machine_config_constructor isa8_hdc_ec1841_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( ec1841_hdc_config );
}
//-------------------------------------------------
// rom_region - device-specific ROM region
//-------------------------------------------------
const rom_entry *isa8_hdc_device::device_rom_region() const
{
return ROM_NAME( hdc );
}
//-------------------------------------------------
// input_ports - device-specific input ports
//-------------------------------------------------
ioport_constructor isa8_hdc_device::device_input_ports() const
{
return INPUT_PORTS_NAME( isa_hdc );
}
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
//-------------------------------------------------
// isa8_hdc_device - constructor
//-------------------------------------------------
isa8_hdc_device::isa8_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, ISA8_HDC, "Fixed Disk Controller Card", tag, owner, clock, "hdc", __FILE__),
device_isa8_card_interface(mconfig, *this),
m_hdc(*this,"hdc")
{
}
isa8_hdc_device::isa8_hdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
device_t(mconfig, type, name, tag, owner, clock, shortname, source),
device_isa8_card_interface(mconfig, *this),
m_hdc(*this,"hdc")
{
}
isa8_hdc_ec1841_device::isa8_hdc_ec1841_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
isa8_hdc_device( mconfig, ISA8_HDC_EC1841, "EC1841 HDC", tag, owner, clock, "hdc_ec1841", __FILE__),
m_hdc(*this,"hdc")
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void isa8_hdc_device::device_start()
{
set_isa_device();
m_isa->install_device(0x0320, 0x0323, 0, 0, read8_delegate( FUNC(isa8_hdc_device::pc_hdc_r), this ), write8_delegate( FUNC(isa8_hdc_device::pc_hdc_w), this ) );
m_isa->set_dma_channel(3, this, FALSE);
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void isa8_hdc_device::device_reset()
{
dip = ioport("HDD")->read();
if (ioport("ROM")->read() == 1)
m_isa->install_rom(this, 0xc8000, 0xc9fff, 0, 0, "hdc", "hdc");
}
/*************************************************************************
*
* HDC
* hard disk controller
*
*************************************************************************/
READ8_MEMBER( isa8_hdc_device::pc_hdc_r )
{
UINT8 data = 0xff;
switch( offset )
{
case 0: data = m_hdc->data_r(); break;
case 1: data = m_hdc->status_r(); break;
case 2: data = pc_hdc_dipswitch_r(); break;
case 3: break;
}
if (LOG_HDC_CALL)
logerror("%s pc_hdc_r(): offs=%d result=0x%02x\n", machine().describe_context(), offset, data);
return data;
}
WRITE8_MEMBER( isa8_hdc_device::pc_hdc_w )
{
if (LOG_HDC_CALL)
logerror("%s pc_hdc_w(): offs=%d data=0x%02x\n", machine().describe_context(), offset, data);
switch( offset )
{
case 0: m_hdc->data_w(data); break;
case 1: m_hdc->reset_w(data); break;
case 2: m_hdc->select_w(data); break;
case 3: m_hdc->control_w(data); break;
}
}
UINT8 isa8_hdc_device::dack_r(int line)
{
return m_hdc->dack_r();
}
void isa8_hdc_device::dack_w(int line,UINT8 data)
{
if (m_hdc->get_command() == CMD_WRITESBUFF)
m_hdc->dack_ws(data);
else
m_hdc->dack_w(data);
}
/* /*
Dipswitch configuration Dipswitch configuration
@ -870,62 +971,21 @@ UINT8 isa8_hdc_device::pc_hdc_status_r()
UINT8 isa8_hdc_device::pc_hdc_dipswitch_r() UINT8 isa8_hdc_device::pc_hdc_dipswitch_r()
{ {
status |= STA_READY; // XXX m_hdc->set_ready();
if (LOG_HDC_STATUS) if (LOG_HDC_STATUS)
logerror("%s: pc_hdc_dipswitch_r: status $%02X\n", machine().describe_context(), status); logerror("%s: pc_hdc_dipswitch_r: status $%02X\n", machine().describe_context(), m_hdc->status_r());
return dip; return dip;
} }
WRITE_LINE_MEMBER( isa8_hdc_device::irq_w )
/*************************************************************************
*
* HDC
* hard disk controller
*
*************************************************************************/
READ8_MEMBER( isa8_hdc_device::pc_hdc_r )
{ {
UINT8 data = 0xff; if (BIT(dip, 6))
m_isa->irq5_w(state);
switch( offset )
{
case 0: data = pc_hdc_data_r(); break;
case 1: data = pc_hdc_status_r(); break;
case 2: data = pc_hdc_dipswitch_r(); break;
case 3: break;
}
if (LOG_HDC_CALL)
logerror("%s pc_hdc_r(): offs=%d result=0x%02x\n", machine().describe_context(), offset, data);
return data;
}
WRITE8_MEMBER( isa8_hdc_device::pc_hdc_w )
{
if (LOG_HDC_CALL)
logerror("%s pc_hdc_w(): offs=%d data=0x%02x\n", machine().describe_context(), offset, data);
switch( offset )
{
case 0: pc_hdc_data_w(data); break;
case 1: pc_hdc_reset_w(data); break;
case 2: pc_hdc_select_w(data); break;
case 3: pc_hdc_control_w(data); break;
}
}
UINT8 isa8_hdc_device::dack_r(int line)
{
return pc_hdc_dack_r();
}
void isa8_hdc_device::dack_w(int line,UINT8 data)
{
if (buffer[0] == CMD_WRITESBUFF)
pc_hdc_dack_ws(data);
else else
pc_hdc_dack_w(data); m_isa->irq2_w(state);
}
WRITE_LINE_MEMBER( isa8_hdc_device::drq_w )
{
m_isa->drq3_w(state);
} }

181
src/emu/bus/isa/hdc.h
View File

@ -18,6 +18,108 @@
// TYPE DEFINITIONS // TYPE DEFINITIONS
//************************************************************************** //**************************************************************************
// XT HD controller device
#define MCFG_XTHDC_IRQ_HANDLER(_devcb) \
devcb = &xt_hdc_device::set_irq_handler(*device, DEVCB_##_devcb);
#define MCFG_XTHDC_DRQ_HANDLER(_devcb) \
devcb = &xt_hdc_device::set_drq_handler(*device, DEVCB_##_devcb);
class xt_hdc_device :
public device_t
{
public:
// construction/destruction
xt_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
xt_hdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
template<class _Object> static devcb_base &set_irq_handler(device_t &device, _Object object) { return downcast<xt_hdc_device &>(device).m_irq_handler.set_callback(object); }
template<class _Object> static devcb_base &set_drq_handler(device_t &device, _Object object) { return downcast<xt_hdc_device &>(device).m_drq_handler.set_callback(object); }
int dack_r();
void dack_w(int data);
void dack_ws(int data);
void command();
void data_w(int data);
void reset_w(int data);
void select_w(int data);
void control_w(int data);
UINT8 data_r();
UINT8 status_r();
void set_ready();
UINT8 get_command() { return buffer[0]; }
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
hard_disk_file *pc_hdc_file(int id);
void pc_hdc_result(int set_error_info);
int no_dma(void);
int get_lbasector();
void execute_read();
void execute_write();
void execute_writesbuff();
void get_drive();
void get_chsn();
int test_ready();
enum {
STANDARD,
EC1841
};
int m_type;
devcb_write_line m_irq_handler;
devcb_write_line m_drq_handler;
private:
int drv; /* 0 master, 1 slave drive */
int cylinders[2]; /* number of cylinders */
int rwc[2]; /* reduced write current from cyl */
int wp[2]; /* write precompensation from cyl */
int heads[2]; /* heads */
int ecc[2]; /* ECC bytes */
/* indexes */
int cylinder[2]; /* current cylinder */
int head[2]; /* current head */
int sector[2]; /* current sector */
int sector_cnt[2]; /* sector count */
int control[2]; /* control */
int csb; /* command status byte */
int status; /* drive status */
int error; /* error code */
emu_timer *timer;
int data_cnt; /* data count */
dynamic_buffer buffer; /* data buffer */
UINT8 *buffer_ptr; /* data pointer */
UINT8 hdc_control;
UINT8 hdcdma_data[512];
UINT8 *hdcdma_src;
UINT8 *hdcdma_dst;
int hdcdma_read;
int hdcdma_write;
int hdcdma_size;
};
class ec1841_device : public xt_hdc_device
{
public:
ec1841_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
devcb_write_line m_irq_handler;
devcb_write_line m_drq_handler;
};
extern const device_type XT_HDC;
extern const device_type EC1841_HDC;
// ======================> isa8_hdc_device // ======================> isa8_hdc_device
class isa8_hdc_device : class isa8_hdc_device :
@ -29,84 +131,26 @@ public:
isa8_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); isa8_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
isa8_hdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source); isa8_hdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
DECLARE_READ8_MEMBER(pc_hdc_r);
DECLARE_WRITE8_MEMBER(pc_hdc_w);
DECLARE_WRITE_LINE_MEMBER(irq_w);
DECLARE_WRITE_LINE_MEMBER(drq_w);
required_device<xt_hdc_device> m_hdc;
// optional information overrides // optional information overrides
virtual machine_config_constructor device_mconfig_additions() const; virtual machine_config_constructor device_mconfig_additions() const;
virtual const rom_entry *device_rom_region() const; virtual const rom_entry *device_rom_region() const;
DECLARE_READ8_MEMBER(pc_hdc_r);
DECLARE_WRITE8_MEMBER(pc_hdc_w);
virtual ioport_constructor device_input_ports() const; virtual ioport_constructor device_input_ports() const;
protected: protected:
// device-level overrides // device-level overrides
virtual void device_start(); virtual void device_start();
virtual void device_reset(); virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
int drv; /* 0 master, 1 slave drive */
int cylinders[2]; /* number of cylinders */
int rwc[2]; /* reduced write current from cyl */
int wp[2]; /* write precompensation from cyl */
int heads[2]; /* heads */
int ecc[2]; /* ECC bytes */
/* indexes */
int cylinder[2]; /* current cylinder */
int head[2]; /* current head */
int sector[2]; /* current sector */
int sector_cnt[2]; /* sector count */
int control[2]; /* control */
int csb; /* command status byte */
int status; /* drive status */
int error; /* error code */
int dip; /* dip switches */
emu_timer *timer;
int data_cnt; /* data count */
dynamic_buffer buffer; /* data buffer */
UINT8 *buffer_ptr; /* data pointer */
UINT8 hdc_control;
UINT8 hdcdma_data[512];
UINT8 *hdcdma_src;
UINT8 *hdcdma_dst;
int hdcdma_read;
int hdcdma_write;
int hdcdma_size;
// internal state
public: public:
virtual UINT8 dack_r(int line); virtual UINT8 dack_r(int line);
virtual void dack_w(int line,UINT8 data); virtual void dack_w(int line,UINT8 data);
protected:
hard_disk_file *pc_hdc_file(int id);
void pc_hdc_result(int set_error_info);
int no_dma(void);
int get_lbasector();
int pc_hdc_dack_r();
void pc_hdc_dack_w(int data);
void pc_hdc_dack_ws(int data);
void execute_read();
void execute_write();
void execute_writesbuff();
void get_drive();
void get_chsn();
int test_ready();
enum {
STANDARD,
EC1841
};
int m_type;
public:
void hdc_command();
void pc_hdc_data_w(int data);
void pc_hdc_reset_w(int data);
void pc_hdc_select_w(int data);
void pc_hdc_control_w(int data);
UINT8 pc_hdc_data_r();
UINT8 pc_hdc_status_r();
UINT8 pc_hdc_dipswitch_r(); UINT8 pc_hdc_dipswitch_r();
int dip; /* dip switches */
}; };
@ -114,6 +158,11 @@ class isa8_hdc_ec1841_device : public isa8_hdc_device
{ {
public: public:
isa8_hdc_ec1841_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); isa8_hdc_ec1841_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
required_device<ec1841_device> m_hdc;
}; };
// device type definition // device type definition

25
src/emu/machine/6532riot.c
View File

@ -114,17 +114,6 @@ UINT8 riot6532_device::get_timer()
/*-------------------------------------------------
timer_end_callback - callback to process the
timer
-------------------------------------------------*/
TIMER_CALLBACK( riot6532_device::timer_end_callback )
{
riot6532_device *via = reinterpret_cast<riot6532_device *>(ptr);
via->timer_end();
}
void riot6532_device::timer_end() void riot6532_device::timer_end()
{ {
assert(m_timerstate != TIMER_IDLE); assert(m_timerstate != TIMER_IDLE);
@ -429,7 +418,7 @@ void riot6532_device::device_start()
m_irq_cb.resolve_safe(); m_irq_cb.resolve_safe();
/* allocate timers */ /* allocate timers */
m_timer = machine().scheduler().timer_alloc(FUNC(timer_end_callback), (void *)this); m_timer = timer_alloc(TIMER_END_CB);
/* register for save states */ /* register for save states */
save_item(NAME(m_port[0].m_in)); save_item(NAME(m_port[0].m_in));
@ -480,3 +469,15 @@ void riot6532_device::device_reset()
m_timerstate = TIMER_COUNTING; m_timerstate = TIMER_COUNTING;
m_timer->adjust(attotime::from_ticks(256 << m_timershift, clock())); m_timer->adjust(attotime::from_ticks(256 << m_timershift, clock()));
} }
void riot6532_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
{
case TIMER_END_CB:
timer_end();
break;
default:
assert_always(FALSE, "Unknown id in riot6532_device::device_timer");
}
}

7
src/emu/machine/6532riot.h
View File

@ -84,10 +84,10 @@ protected:
// device-level overrides // device-level overrides
virtual void device_start(); virtual void device_start();
virtual void device_reset(); virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
virtual void device_post_load() { } virtual void device_post_load() { }
virtual void device_clock_changed() { } virtual void device_clock_changed() { }
static TIMER_CALLBACK( timer_end_callback );
private: private:
void update_irqstate(); void update_irqstate();
@ -113,6 +113,11 @@ private:
UINT8 m_timershift; UINT8 m_timershift;
UINT8 m_timerstate; UINT8 m_timerstate;
emu_timer * m_timer; emu_timer * m_timer;
enum
{
TIMER_END_CB
};
}; };

2
src/emu/video/315_5124.c
View File

@ -171,7 +171,7 @@ sega315_5124_device::sega315_5124_device(const machine_config &mconfig, const ch
sega315_5124_device::sega315_5124_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 cram_size, UINT8 palette_offset, bool supports_224_240, const char *shortname, const char *source) sega315_5124_device::sega315_5124_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 cram_size, UINT8 palette_offset, bool supports_224_240, const char *shortname, const char *source)
: device_t( mconfig, type, name, tag, owner, clock, shortname, __FILE__) : device_t( mconfig, type, name, tag, owner, clock, shortname, source)
, device_memory_interface(mconfig, *this) , device_memory_interface(mconfig, *this)
, device_video_interface(mconfig, *this) , device_video_interface(mconfig, *this)
, m_cram_size( cram_size ) , m_cram_size( cram_size )