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Populated tag and static_config parts of fake CPU device. Removed 'config'

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parameter from CPU_INIT. Modified CPU cores to pull config from the device
static_config.
This commit is contained in:
Aaron Giles 2008-11-09 07:12:24 +00:00
parent 70365a3886
commit 9407fecd2d
59 changed files with 184 additions and 177 deletions
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14
src/emu/cpu/adsp2100/adsp2100.c
View File

@ -574,7 +574,7 @@ static CPU_SET_CONTEXT( adsp21xx )
INITIALIZATION AND SHUTDOWN
***************************************************************************/
static adsp2100_state *adsp21xx_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback)
static adsp2100_state *adsp21xx_init(const device_config *device, int index, int clock, cpu_irq_callback irqcallback)
{
adsp2100_state *adsp = device->token;
@ -2068,7 +2068,7 @@ static void adsp21xx_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
static CPU_INIT( adsp2100 )
{
adsp2100_state *adsp = adsp21xx_init(device, index, clock, config, irqcallback);
adsp2100_state *adsp = adsp21xx_init(device, index, clock, irqcallback);
adsp->chip_type = CHIP_TYPE_ADSP2100;
adsp->mstat_mask = 0x0f;
adsp->imask_mask = 0x0f;
@ -2126,7 +2126,7 @@ CPU_GET_INFO( adsp2100 )
static CPU_INIT( adsp2101 )
{
adsp2100_state *adsp = adsp21xx_init(device, index, clock, config, irqcallback);
adsp2100_state *adsp = adsp21xx_init(device, index, clock, irqcallback);
adsp->chip_type = CHIP_TYPE_ADSP2101;
adsp->mstat_mask = 0x7f;
adsp->imask_mask = 0x3f;
@ -2196,7 +2196,7 @@ CPU_GET_INFO( adsp2101 )
static CPU_INIT( adsp2104 )
{
adsp2100_state *adsp = adsp21xx_init(device, index, clock, config, irqcallback);
adsp2100_state *adsp = adsp21xx_init(device, index, clock, irqcallback);
adsp->chip_type = CHIP_TYPE_ADSP2104;
adsp->mstat_mask = 0x7f;
adsp->imask_mask = 0x3f;
@ -2271,7 +2271,7 @@ CPU_GET_INFO( adsp2104 )
static CPU_INIT( adsp2105 )
{
adsp2100_state *adsp = adsp21xx_init(device, index, clock, config, irqcallback);
adsp2100_state *adsp = adsp21xx_init(device, index, clock, irqcallback);
adsp->chip_type = CHIP_TYPE_ADSP2105;
adsp->mstat_mask = 0x7f;
adsp->imask_mask = 0x3f;
@ -2340,7 +2340,7 @@ CPU_GET_INFO( adsp2105 )
static CPU_INIT( adsp2115 )
{
adsp2100_state *adsp = adsp21xx_init(device, index, clock, config, irqcallback);
adsp2100_state *adsp = adsp21xx_init(device, index, clock, irqcallback);
adsp->chip_type = CHIP_TYPE_ADSP2115;
adsp->mstat_mask = 0x7f;
adsp->imask_mask = 0x3f;
@ -2415,7 +2415,7 @@ CPU_GET_INFO( adsp2115 )
static CPU_INIT( adsp2181 )
{
adsp2100_state *adsp = adsp21xx_init(device, index, clock, config, irqcallback);
adsp2100_state *adsp = adsp21xx_init(device, index, clock, irqcallback);
adsp->chip_type = CHIP_TYPE_ADSP2181;
adsp->mstat_mask = 0x7f;
adsp->imask_mask = 0x3ff;

2
src/emu/cpu/ccpu/ccpu.c
View File

@ -136,7 +136,7 @@ void ccpu_wdt_timer_trigger(void)
static CPU_INIT( ccpu )
{
const ccpu_config *configdata = config;
const ccpu_config *configdata = device->static_config;
/* copy input params */
ccpu.external_input = configdata->external_input ? configdata->external_input : read_jmi;

2
src/emu/cpu/cdp1802/cdp1802.c
View File

@ -67,7 +67,7 @@ static CPU_SET_CONTEXT( cdp1802 )
static CPU_INIT( cdp1802 )
{
cdp1802.intf = (cdp1802_interface *) config;
cdp1802.intf = (cdp1802_interface *) device->static_config;
cdp1802.mode = CDP1802_MODE_RESET;
cdp1802.prevmode = cdp1802.mode;

2
src/emu/cpu/cop400/cop410.c
View File

@ -222,7 +222,7 @@ static CPU_INIT( cop410 )
memset(&R, 0, sizeof(R));
R.intf = (cop400_interface *) config;
R.intf = (cop400_interface *) device->static_config;
assert(R.intf != NULL);

2
src/emu/cpu/cop400/cop420.c
View File

@ -310,7 +310,7 @@ static CPU_INIT( cop420 )
memset(&R, 0, sizeof(R));
R.intf = (cop400_interface *) config;
R.intf = (cop400_interface *) device->static_config;
assert(R.intf != NULL);

2
src/emu/cpu/cubeqcpu/cubeqcpu.c
View File

@ -337,7 +337,7 @@ static void cquestsnd_state_register(int index, const char *type)
static CPU_INIT( cquestsnd )
{
cubeqst_snd_config* _config = (cubeqst_snd_config*)config;
cubeqst_snd_config* _config = (cubeqst_snd_config*)device->static_config;
memset(&cquestsnd, 0, sizeof(cquestsnd));

1
src/emu/cpu/drcfe.c
View File

@ -19,6 +19,7 @@
#include <stddef.h>
#include "cpuintrf.h"
#include "mame.h"
#include "drcfe.h"

2
src/emu/cpu/dsp32/dsp32.c
View File

@ -349,7 +349,7 @@ static CPU_SET_CONTEXT( dsp32c )
static CPU_INIT( dsp32c )
{
const dsp32_config *configdata = config;
const dsp32_config *configdata = device->static_config;
/* copy in config data */
if (configdata)

2
src/emu/cpu/dsp56k/dsp56k.c
View File

@ -398,7 +398,7 @@ static CPU_INIT( dsp56k )
// state_save_register_item("dsp56k", index, modA_state);
// ...
//core.config = _config;
//core.config = device->static_config;
//core.irq_callback = irqcallback;
core.device = device;
}

38
src/emu/cpu/e132xs/e132xs.c
View File

@ -1565,7 +1565,7 @@ static void set_irq_line(int irqline, int state)
ISR &= ~(1 << irqline);
}
static void hyperstone_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback, int scale_mask)
static void hyperstone_init(const device_config *device, int index, int clock, cpu_irq_callback irqcallback, int scale_mask)
{
state_save_register_item_array("E132XS", index, hyperstone.global_regs);
state_save_register_item_array("E132XS", index, hyperstone.local_regs);
@ -1584,7 +1584,7 @@ static void hyperstone_init(const device_config *device, int index, int clock, c
}
#if (HAS_E116T || HAS_E116XT || HAS_E116XS || HAS_E116XSR || HAS_GMS30C2116 || HAS_GMS30C2216)
static void e116_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback, int scale_mask)
static void e116_init(const device_config *device, int index, int clock, cpu_irq_callback irqcallback, int scale_mask)
{
hyp_cpu_read_byte = program_read_byte_16be;
hyp_cpu_read_half_word = program_read_word_16be;
@ -1598,54 +1598,54 @@ static void e116_init(const device_config *device, int index, int clock, const v
hyp_type_16bit = 1;
hyperstone_init(device, index, clock, config, irqcallback, scale_mask);
hyperstone_init(device, index, clock, irqcallback, scale_mask);
}
#endif
#if (HAS_E116T)
static CPU_INIT( e116t )
{
e116_init(device, index, clock, config, irqcallback, 0);
e116_init(device, index, clock, irqcallback, 0);
}
#endif
#if (HAS_E116XT)
static CPU_INIT( e116xt )
{
e116_init(device, index, clock, config, irqcallback, 3);
e116_init(device, index, clock, irqcallback, 3);
}
#endif
#if (HAS_E116XS)
static CPU_INIT( e116xs )
{
e116_init(device, index, clock, config, irqcallback, 7);
e116_init(device, index, clock, irqcallback, 7);
}
#endif
#if (HAS_E116XSR)
static CPU_INIT( e116xsr )
{
e116_init(device, index, clock, config, irqcallback, 7);
e116_init(device, index, clock, irqcallback, 7);
}
#endif
#if (HAS_GMS30C2116)
static CPU_INIT( gms30c2116 )
{
e116_init(device, index, clock, config, irqcallback, 0);
e116_init(device, index, clock, irqcallback, 0);
}
#endif
#if (HAS_GMS30C2216)
static CPU_INIT( gms30c2216 )
{
e116_init(device, index, clock, config, irqcallback, 0);
e116_init(device, index, clock, irqcallback, 0);
}
#endif
#if (HAS_E132N || HAS_E132T || HAS_E132XN || HAS_E132XT || HAS_E132XS || HAS_E132XSR || HAS_GMS30C2132 || HAS_GMS30C2232)
static void e132_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback, int scale_mask)
static void e132_init(const device_config *device, int index, int clock, cpu_irq_callback irqcallback, int scale_mask)
{
hyp_cpu_read_byte = program_read_byte_32be;
hyp_cpu_read_half_word = program_read_word_32be;
@ -1659,63 +1659,63 @@ static void e132_init(const device_config *device, int index, int clock, const v
hyp_type_16bit = 0;
hyperstone_init(device, index, clock, config, irqcallback, scale_mask);
hyperstone_init(device, index, clock, irqcallback, scale_mask);
}
#endif
#if (HAS_E132N)
static CPU_INIT( e132n )
{
e132_init(device, index, clock, config, irqcallback, 0);
e132_init(device, index, clock, irqcallback, 0);
}
#endif
#if (HAS_E132T)
static CPU_INIT( e132t )
{
e132_init(device, index, clock, config, irqcallback, 0);
e132_init(device, index, clock, irqcallback, 0);
}
#endif
#if (HAS_E132XN)
static CPU_INIT( e132xn )
{
e132_init(device, index, clock, config, irqcallback, 3);
e132_init(device, index, clock, irqcallback, 3);
}
#endif
#if (HAS_E132XT)
static CPU_INIT( e132xt )
{
e132_init(device, index, clock, config, irqcallback, 3);
e132_init(device, index, clock, irqcallback, 3);
}
#endif
#if (HAS_E132XS)
static CPU_INIT( e132xs )
{
e132_init(device, index, clock, config, irqcallback, 7);
e132_init(device, index, clock, irqcallback, 7);
}
#endif
#if (HAS_E132XSR)
static CPU_INIT( e132xsr )
{
e132_init(device, index, clock, config, irqcallback, 7);
e132_init(device, index, clock, irqcallback, 7);
}
#endif
#if (HAS_GMS30C2132)
static CPU_INIT( gms30c2132 )
{
e132_init(device, index, clock, config, irqcallback, 0);
e132_init(device, index, clock, irqcallback, 0);
}
#endif
#if (HAS_GMS30C2232)
static CPU_INIT( gms30c2232 )
{
e132_init(device, index, clock, config, irqcallback, 0);
e132_init(device, index, clock, irqcallback, 0);
}
#endif

4
src/emu/cpu/i86/i286.c
View File

@ -291,8 +291,8 @@ static CPU_INIT( i80286 )
I.device = device;
/* If a reset parameter is given, take it as pointer to an address mask */
if( config )
I.amask = *(unsigned*)config;
if( device->static_config )
I.amask = *(unsigned*)device->static_config;
else
I.amask = 0x00ffff;

4
src/emu/cpu/jaguar/jaguar.c
View File

@ -433,7 +433,7 @@ static void jaguar_state_register(int index, const char *type)
static CPU_INIT( jaguargpu )
{
const jaguar_cpu_core *configdata = config;
const jaguar_cpu_core *configdata = device->static_config;
memset(&jaguar, 0, sizeof(jaguar));
@ -447,7 +447,7 @@ static CPU_INIT( jaguargpu )
static CPU_INIT( jaguardsp )
{
const jaguar_cpu_core *configdata = config;
const jaguar_cpu_core *configdata = device->static_config;
memset(&jaguar, 0, sizeof(jaguar));

2
src/emu/cpu/lh5801/lh5801.c
View File

@ -93,7 +93,7 @@ static LH5801_Regs lh5801= { 0 };
static CPU_INIT( lh5801 )
{
memset(&lh5801, 0, sizeof(lh5801));
lh5801.config = (const lh5801_cpu_core *) config;
lh5801.config = (const lh5801_cpu_core *) device->static_config;
}
static CPU_RESET( lh5801 )

2
src/emu/cpu/lr35902/lr35902.c
View File

@ -181,7 +181,7 @@ static const int CyclesCB[256] =
static CPU_INIT( lr35902 )
{
Regs.w.config = (const lr35902_cpu_core *) config;
Regs.w.config = (const lr35902_cpu_core *) device->static_config;
Regs.w.irq_callback = irqcallback;
Regs.w.device = device;
}

14
src/emu/cpu/m6502/m6502.c
View File

@ -132,7 +132,7 @@ static WRITE8_HANDLER( default_wdmem_id ) { program_write_byte_8le(offset, data)
*
*****************************************************************************/
static void m6502_common_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback, UINT8 subtype, void (*const *insn)(m6502_Regs *m6502), const char *type)
static void m6502_common_init(const device_config *device, int index, int clock, cpu_irq_callback irqcallback, UINT8 subtype, void (*const *insn)(m6502_Regs *m6502), const char *type)
{
m6502_Regs *m6502 = device->token;
@ -168,7 +168,7 @@ static void m6502_common_init(const device_config *device, int index, int clock,
static CPU_INIT( m6502 )
{
m6502_common_init(device, index, clock, config, irqcallback, SUBTYPE_6502, insn6502, "m6502");
m6502_common_init(device, index, clock, irqcallback, SUBTYPE_6502, insn6502, "m6502");
}
static CPU_RESET( m6502 )
@ -338,7 +338,7 @@ static void m6502_set_irq_line(m6502_Regs *m6502, int irqline, int state)
static CPU_INIT( n2a03 )
{
m6502_common_init(device, index, clock, config, irqcallback, SUBTYPE_2A03, insn2a03, "n2a03");
m6502_common_init(device, index, clock, irqcallback, SUBTYPE_2A03, insn2a03, "n2a03");
}
/* The N2A03 is integrally tied to its PSG (they're on the same die).
@ -361,7 +361,7 @@ void n2a03_irq()
static CPU_INIT( m6510 )
{
m6502_common_init(device, index, clock, config, irqcallback, SUBTYPE_6510, insn6510, "m6510");
m6502_common_init(device, index, clock, irqcallback, SUBTYPE_6510, insn6510, "m6510");
}
static CPU_RESET( m6510 )
@ -429,7 +429,7 @@ ADDRESS_MAP_END
static CPU_INIT( m65c02 )
{
m6502_common_init(device, index, clock, config, irqcallback, SUBTYPE_65C02, insn65c02, "m65c02");
m6502_common_init(device, index, clock, irqcallback, SUBTYPE_65C02, insn65c02, "m65c02");
}
static CPU_RESET( m65c02 )
@ -539,7 +539,7 @@ static void m65c02_set_irq_line(m6502_Regs *m6502, int irqline, int state)
#if (HAS_M65SC02)
static CPU_INIT( m65sc02 )
{
m6502_common_init(device, index, clock, config, irqcallback, SUBTYPE_65SC02, insn65sc02, "m65sc02");
m6502_common_init(device, index, clock, irqcallback, SUBTYPE_65SC02, insn65sc02, "m65sc02");
}
#endif
@ -550,7 +550,7 @@ static CPU_INIT( m65sc02 )
static CPU_INIT( deco16 )
{
m6502_common_init(device, index, clock, config, irqcallback, SUBTYPE_DECO16, insndeco16, "deco16");
m6502_common_init(device, index, clock, irqcallback, SUBTYPE_DECO16, insndeco16, "deco16");
}

8
src/emu/cpu/m68000/m68k.h
View File

@ -24,14 +24,6 @@
* http://kstenerud.cjb.net
*/
/* ======================================================================== */
/* ============================= CONFIGURATION ============================ */
/* ======================================================================== */
/* Import the configuration for this build */
#include "m68kconf.h"
/* ======================================================================== */
/* ============================ GENERAL DEFINES =========================== */

2
src/emu/cpu/mb86233/mb86233.c
View File

@ -117,7 +117,7 @@ static CPU_SET_CONTEXT( mb86233 )
static CPU_INIT( mb86233 )
{
mb86233_cpu_core * _config = (mb86233_cpu_core *)config;
mb86233_cpu_core * _config = (mb86233_cpu_core *)device->static_config;
(void)index;
(void)clock;
(void)irqcallback;

4
src/emu/cpu/mb88xx/mb88xx.c
View File

@ -121,9 +121,9 @@ static CPU_SET_CONTEXT( mb88 )
static CPU_INIT( mb88 )
{
if ( config )
if ( device->static_config )
{
const mb88_cpu_core *_config = (const mb88_cpu_core*)config;
const mb88_cpu_core *_config = (const mb88_cpu_core*)device->static_config;
mb88.PLA = _config->PLA_config;
}

10
src/emu/cpu/mcs48/mcs48.c
View File

@ -699,7 +699,7 @@ static const mcs48_opcode opcode_table[256]=
mcs48_init - generic MCS-48 initialization
-------------------------------------------------*/
static void mcs48_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback, UINT16 romsize)
static void mcs48_init(const device_config *device, int index, int clock, cpu_irq_callback irqcallback, UINT16 romsize)
{
mcs48_state *mcs48 = device->token;
@ -748,7 +748,7 @@ static void mcs48_init(const device_config *device, int index, int clock, const
#if (HAS_I8035 || HAS_MB8884)
static CPU_INIT( i8035 )
{
mcs48_init(device, index, clock, config, irqcallback, 0x0);
mcs48_init(device, index, clock, irqcallback, 0x0);
}
#endif
@ -762,7 +762,7 @@ static CPU_INIT( i8035 )
#if (HAS_I8048 || HAS_I8648 || HAS_I8748 || HAS_N7751)
static CPU_INIT( i8048 )
{
mcs48_init(device, index, clock, config, irqcallback, 0x400);
mcs48_init(device, index, clock, irqcallback, 0x400);
}
#endif
@ -776,7 +776,7 @@ static CPU_INIT( i8048 )
#if (HAS_I8039)
static CPU_INIT( i8039 )
{
mcs48_init(device, index, clock, config, irqcallback, 0x0);
mcs48_init(device, index, clock, irqcallback, 0x0);
}
#endif
@ -790,7 +790,7 @@ static CPU_INIT( i8039 )
#if (HAS_I8049 || HAS_I8749 || HAS_M58715)
static CPU_INIT( i8049 )
{
mcs48_init(device, index, clock, config, irqcallback, 0x800);
mcs48_init(device, index, clock, irqcallback, 0x800);
}
#endif

2
src/emu/cpu/mcs51/mcs51.c
View File

@ -2369,7 +2369,7 @@ static CPU_INIT( ds5002fp )
{
/* default configuration */
static const ds5002fp_config default_config = { 0x00, 0x00, 0x00 };
const ds5002fp_config *sconfig = config ? config : &default_config;
const ds5002fp_config *sconfig = device->static_config ? device->static_config : &default_config;
mcs51_regs *mcs51 = device->token;
CPU_INIT_CALL( mcs51 );

2
src/emu/cpu/minx/minx.c
View File

@ -112,7 +112,7 @@ static CPU_INIT( minx )
{
regs.irq_callback = irqcallback;
regs.device = device;
if ( config != NULL )
if ( device->static_config != NULL )
{
}
else

48
src/emu/cpu/mips/mips3.c
View File

@ -2154,16 +2154,16 @@ CPU_GET_INFO( mips3 )
#if (HAS_R4600)
static CPU_INIT( r4600be )
{
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4600, TRUE, device, index, clock, config, irqcallback, NULL);
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4600, TRUE, device, index, clock, irqcallback, NULL);
void *memory = auto_malloc(memsize);
mips3com_init(&mips3.core, MIPS3_TYPE_R4600, TRUE, index, clock, config, irqcallback, memory);
mips3com_init(&mips3.core, MIPS3_TYPE_R4600, TRUE, index, clock, irqcallback, memory);
}
static CPU_INIT( r4600le )
{
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4600, FALSE, device, index, clock, config, irqcallback, NULL);
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4600, FALSE, device, index, clock, irqcallback, NULL);
void *memory = auto_malloc(memsize);
mips3com_init(&mips3.core, MIPS3_TYPE_R4600, FALSE, index, clock, config, irqcallback, memory);
mips3com_init(&mips3.core, MIPS3_TYPE_R4600, FALSE, index, clock, irqcallback, memory);
}
CPU_GET_INFO( r4600be )
@ -2212,16 +2212,16 @@ CPU_GET_INFO( r4600le )
#if (HAS_R4650)
static CPU_INIT( r4650be )
{
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4650, TRUE, device, index, clock, config, irqcallback, NULL);
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4650, TRUE, device, index, clock, irqcallback, NULL);
void *memory = auto_malloc(memsize);
mips3com_init(&mips3.core, MIPS3_TYPE_R4650, TRUE, index, clock, config, irqcallback, memory);
mips3com_init(&mips3.core, MIPS3_TYPE_R4650, TRUE, index, clock, irqcallback, memory);
}
static CPU_INIT( r4650le )
{
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4650, FALSE, device, index, clock, config, irqcallback, NULL);
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4650, FALSE, device, index, clock, irqcallback, NULL);
void *memory = auto_malloc(memsize);
mips3com_init(&mips3.core, MIPS3_TYPE_R4650, FALSE, index, clock, config, irqcallback, memory);
mips3com_init(&mips3.core, MIPS3_TYPE_R4650, FALSE, index, clock, irqcallback, memory);
}
CPU_GET_INFO( r4650be )
@ -2270,16 +2270,16 @@ CPU_GET_INFO( r4650le )
#if (HAS_R4700)
static CPU_INIT( r4700be )
{
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4700, TRUE, device, index, clock, config, irqcallback, NULL);
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4700, TRUE, device, index, clock, irqcallback, NULL);
void *memory = auto_malloc(memsize);
mips3com_init(&mips3.core, MIPS3_TYPE_R4700, TRUE, index, clock, config, irqcallback, memory);
mips3com_init(&mips3.core, MIPS3_TYPE_R4700, TRUE, index, clock, irqcallback, memory);
}
static CPU_INIT( r4700le )
{
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4700, FALSE, device, index, clock, config, irqcallback, NULL);
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4700, FALSE, device, index, clock, irqcallback, NULL);
void *memory = auto_malloc(memsize);
mips3com_init(&mips3.core, MIPS3_TYPE_R4700, FALSE, index, clock, config, irqcallback, memory);
mips3com_init(&mips3.core, MIPS3_TYPE_R4700, FALSE, index, clock, irqcallback, memory);
}
CPU_GET_INFO( r4700be )
@ -2329,16 +2329,16 @@ CPU_GET_INFO( r4700le )
#if (HAS_R5000)
static CPU_INIT( r5000be )
{
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R5000, TRUE, device, index, clock, config, irqcallback, NULL);
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R5000, TRUE, device, index, clock, irqcallback, NULL);
void *memory = auto_malloc(memsize);
mips3com_init(&mips3.core, MIPS3_TYPE_R5000, TRUE, index, clock, config, irqcallback, memory);
mips3com_init(&mips3.core, MIPS3_TYPE_R5000, TRUE, index, clock, irqcallback, memory);
}
static CPU_INIT( r5000le )
{
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R5000, FALSE, device, index, clock, config, irqcallback, NULL);
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R5000, FALSE, device, index, clock, irqcallback, NULL);
void *memory = auto_malloc(memsize);
mips3com_init(&mips3.core, MIPS3_TYPE_R5000, FALSE, index, clock, config, irqcallback, memory);
mips3com_init(&mips3.core, MIPS3_TYPE_R5000, FALSE, index, clock, irqcallback, memory);
}
CPU_GET_INFO( r5000be )
@ -2387,16 +2387,16 @@ CPU_GET_INFO( r5000le )
#if (HAS_QED5271)
static CPU_INIT( qed5271be )
{
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, TRUE, device, index, clock, config, irqcallback, NULL);
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, TRUE, device, index, clock, irqcallback, NULL);
void *memory = auto_malloc(memsize);
mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, TRUE, index, clock, config, irqcallback, memory);
mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, TRUE, index, clock, irqcallback, memory);
}
static CPU_INIT( qed5271le )
{
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, FALSE, device, index, clock, config, irqcallback, NULL);
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, FALSE, device, index, clock, irqcallback, NULL);
void *memory = auto_malloc(memsize);
mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, FALSE, index, clock, config, irqcallback, memory);
mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, FALSE, index, clock, irqcallback, memory);
}
CPU_GET_INFO( qed5271be )
@ -2445,16 +2445,16 @@ CPU_GET_INFO( qed5271le )
#if (HAS_RM7000)
static CPU_INIT( rm7000be )
{
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, TRUE, device, index, clock, config, irqcallback, NULL);
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, TRUE, device, index, clock, irqcallback, NULL);
void *memory = auto_malloc(memsize);
mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, TRUE, index, clock, config, irqcallback, memory);
mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, TRUE, index, clock, irqcallback, memory);
}
static CPU_INIT( rm7000le )
{
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, FALSE, device, index, clock, config, irqcallback, NULL);
size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, FALSE, device, index, clock, irqcallback, NULL);
void *memory = auto_malloc(memsize);
mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, FALSE, index, clock, config, irqcallback, memory);
mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, FALSE, index, clock, irqcallback, memory);
}
CPU_GET_INFO( rm7000be )

3
src/emu/cpu/mips/mips3com.c
View File

@ -69,8 +69,9 @@ INLINE int tlb_entry_is_global(const mips3_tlb_entry *entry)
structure based on the configured type
-------------------------------------------------*/
void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, const device_config *device, int index, int clock, const mips3_config *config, cpu_irq_callback irqcallback)
void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, const device_config *device, int index, int clock, cpu_irq_callback irqcallback)
{
const mips3_config *config = device->static_config;
int tlbindex;
/* initialize based on the config */

2
src/emu/cpu/mips/mips3com.h
View File

@ -223,7 +223,7 @@ struct _mips3_state
FUNCTION PROTOTYPES
***************************************************************************/
void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, const device_config *device, int index, int clock, const mips3_config *config, cpu_irq_callback irqcallback);
void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, const device_config *device, int index, int clock, cpu_irq_callback irqcallback);
void mips3com_exit(mips3_state *mips);
void mips3com_reset(mips3_state *mips);

28
src/emu/cpu/mips/mips3drc.c
View File

@ -342,7 +342,7 @@ INLINE void save_fast_iregs(drcuml_block *block)
mips3_init - initialize the processor
-------------------------------------------------*/
static void mips3_init(mips3_flavor flavor, int bigendian, const device_config *device, int index, int clock, const mips3_config *config, cpu_irq_callback irqcallback)
static void mips3_init(mips3_flavor flavor, int bigendian, const device_config *device, int index, int clock, cpu_irq_callback irqcallback)
{
drcfe_config feconfig =
{
@ -366,7 +366,7 @@ static void mips3_init(mips3_flavor flavor, int bigendian, const device_config *
memset(mips3, 0, sizeof(*mips3));
/* initialize the core */
mips3com_init(mips3, flavor, bigendian, device, index, clock, config, irqcallback);
mips3com_init(mips3, flavor, bigendian, device, index, clock, irqcallback);
/* allocate the implementation-specific state from the full cache */
mips3->impstate = drccache_memory_alloc_near(cache, sizeof(*mips3->impstate));
@ -3621,12 +3621,12 @@ static void log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, i
#if (HAS_R4600)
static CPU_INIT( r4600be )
{
mips3_init(MIPS3_TYPE_R4600, TRUE, device, index, clock, config, irqcallback);
mips3_init(MIPS3_TYPE_R4600, TRUE, device, index, clock, irqcallback);
}
static CPU_INIT( r4600le )
{
mips3_init(MIPS3_TYPE_R4600, FALSE, device, index, clock, config, irqcallback);
mips3_init(MIPS3_TYPE_R4600, FALSE, device, index, clock, irqcallback);
}
CPU_GET_INFO( r4600be )
@ -3675,12 +3675,12 @@ CPU_GET_INFO( r4600le )
#if (HAS_R4650)
static CPU_INIT( r4650be )
{
mips3_init(MIPS3_TYPE_R4650, TRUE, device, index, clock, config, irqcallback);
mips3_init(MIPS3_TYPE_R4650, TRUE, device, index, clock, irqcallback);
}
static CPU_INIT( r4650le )
{
mips3_init(MIPS3_TYPE_R4650, FALSE, device, index, clock, config, irqcallback);
mips3_init(MIPS3_TYPE_R4650, FALSE, device, index, clock, irqcallback);
}
CPU_GET_INFO( r4650be )
@ -3729,12 +3729,12 @@ CPU_GET_INFO( r4650le )
#if (HAS_R4700)
static CPU_INIT( r4700be )
{
mips3_init(MIPS3_TYPE_R4700, TRUE, device, index, clock, config, irqcallback);
mips3_init(MIPS3_TYPE_R4700, TRUE, device, index, clock, irqcallback);
}
static CPU_INIT( r4700le )
{
mips3_init(MIPS3_TYPE_R4700, FALSE, device, index, clock, config, irqcallback);
mips3_init(MIPS3_TYPE_R4700, FALSE, device, index, clock, irqcallback);
}
CPU_GET_INFO( r4700be )
@ -3783,12 +3783,12 @@ CPU_GET_INFO( r4700le )
#if (HAS_R5000)
static CPU_INIT( r5000be )
{
mips3_init(MIPS3_TYPE_R5000, TRUE, device, index, clock, config, irqcallback);
mips3_init(MIPS3_TYPE_R5000, TRUE, device, index, clock, irqcallback);
}
static CPU_INIT( r5000le )
{
mips3_init(MIPS3_TYPE_R5000, FALSE, device, index, clock, config, irqcallback);
mips3_init(MIPS3_TYPE_R5000, FALSE, device, index, clock, irqcallback);
}
CPU_GET_INFO( r5000be )
@ -3837,12 +3837,12 @@ CPU_GET_INFO( r5000le )
#if (HAS_QED5271)
static CPU_INIT( qed5271be )
{
mips3_init(MIPS3_TYPE_QED5271, TRUE, device, index, clock, config, irqcallback);
mips3_init(MIPS3_TYPE_QED5271, TRUE, device, index, clock, irqcallback);
}
static CPU_INIT( qed5271le )
{
mips3_init(MIPS3_TYPE_QED5271, FALSE, device, index, clock, config, irqcallback);
mips3_init(MIPS3_TYPE_QED5271, FALSE, device, index, clock, irqcallback);
}
CPU_GET_INFO( qed5271be )
@ -3891,12 +3891,12 @@ CPU_GET_INFO( qed5271le )
#if (HAS_RM7000)
static CPU_INIT( rm7000be )
{
mips3_init(MIPS3_TYPE_RM7000, TRUE, device, index, clock, config, irqcallback);
mips3_init(MIPS3_TYPE_RM7000, TRUE, device, index, clock, irqcallback);
}
static CPU_INIT( rm7000le )
{
mips3_init(MIPS3_TYPE_RM7000, FALSE, device, index, clock, config, irqcallback);
mips3_init(MIPS3_TYPE_RM7000, FALSE, device, index, clock, irqcallback);
}
CPU_GET_INFO( rm7000be )

2
src/emu/cpu/mips/r3000.c
View File

@ -342,7 +342,7 @@ static CPU_SET_CONTEXT( r3000 )
static CPU_INIT( r3000 )
{
const r3000_cpu_core *configdata = config;
const r3000_cpu_core *configdata = device->static_config;
r3000_state *r3000 = device->token;
token = device->token; // temporary

10
src/emu/cpu/nec/nec.c
View File

@ -1108,9 +1108,9 @@ static CPU_DISASSEMBLE( nec )
return necv_dasm_one(buffer, pc, oprom, I.config);
}
static void nec_init(const device_config *device, int index, int clock, const void *_config, cpu_irq_callback irqcallback, int type)
static void nec_init(const device_config *device, int index, int clock, cpu_irq_callback irqcallback, int type)
{
const nec_config *config = _config ? _config : &default_config;
const nec_config *config = device->static_config ? device->static_config : &default_config;
static const char *const names[]={"V20","V30","V33"};
@ -1262,7 +1262,7 @@ static CPU_EXECUTE( necv )
#if (HAS_V20||HAS_V25)
static CPU_INIT( v20 )
{
nec_init(device, index, clock, config, irqcallback, 0);
nec_init(device, index, clock, irqcallback, 0);
configure_memory_8bit();
I.chip_type=V20;
I.prefetch_size = 4; /* 3 words */
@ -1273,7 +1273,7 @@ static CPU_INIT( v20 )
#if (HAS_V30||HAS_V35)
static CPU_INIT( v30 )
{
nec_init(device, index, clock, config, irqcallback, 1);
nec_init(device, index, clock, irqcallback, 1);
configure_memory_16bit();
I.chip_type=V30;
I.prefetch_size = 6; /* 3 words */
@ -1285,7 +1285,7 @@ static CPU_INIT( v30 )
#if (HAS_V33)
static CPU_INIT( v33 )
{
nec_init(device, index, clock, config, irqcallback, 2);
nec_init(device, index, clock, irqcallback, 2);
I.chip_type=V33;
I.prefetch_size = 6; /* ???? */
I.prefetch_cycles = 2; /* two cycles per byte / four per word */

2
src/emu/cpu/pdp1/pdp1.c
View File

@ -528,7 +528,7 @@ static void pdp1_set_irq_line (int irqline, int state)
static CPU_INIT( pdp1 )
{
const pdp1_reset_param_t *param = config;
const pdp1_reset_param_t *param = device->static_config;
int i;
/* clean-up */

8
src/emu/cpu/pdp1/tx0.c
View File

@ -127,10 +127,10 @@ static void tx0_write(offs_t address, int data)
;
}
static void tx0_init_common(int is_64kw, const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback)
static void tx0_init_common(int is_64kw, const device_config *device, int index, int clock, cpu_irq_callback irqcallback)
{
int i;
tx0_reset_param_t *param = (tx0_reset_param_t *) config;
tx0_reset_param_t *param = (tx0_reset_param_t *) device->static_config;
/* clean-up */
memset (&tx0, 0, sizeof (tx0));
@ -147,12 +147,12 @@ static void tx0_init_common(int is_64kw, const device_config *device, int index,
static CPU_INIT( tx0_64kw )
{
tx0_init_common(1, device, index, clock, config, irqcallback);
tx0_init_common(1, device, index, clock, irqcallback);
}
static CPU_INIT( tx0_8kw)
{
tx0_init_common(0, device, index, clock, config, irqcallback);
tx0_init_common(0, device, index, clock, irqcallback);
}
static CPU_RESET( tx0 )

1
src/emu/cpu/pic16c5x/16c5xdsm.c
View File

@ -27,6 +27,7 @@
#include <ctype.h>
#include "cpuintrf.h"
#include "mame.h"
static const UINT8 *rombase;
static const UINT8 *rambase;
static offs_t pcbase;

12
src/emu/cpu/powerpc/ppc.c
View File

@ -976,7 +976,7 @@ static void ppc_init(void)
#if HAS_PPC403
static CPU_INIT( ppc403 )
{
const ppc_config *configdata = config;
const ppc_config *configdata = device->static_config;
ppc_init();
@ -1024,7 +1024,7 @@ static CPU_EXIT( ppc403 )
#if (HAS_PPC603)
static CPU_INIT( ppc603 )
{
const ppc_config *configdata = config;
const ppc_config *configdata = device->static_config;
int pll_config = 0;
float multiplier;
int i ;
@ -1170,7 +1170,7 @@ static CPU_EXIT( ppc603 )
static CPU_INIT( ppc602 )
{
float multiplier;
const ppc_config *configdata = config;
const ppc_config *configdata = device->static_config;
int i ;
@ -1315,7 +1315,7 @@ static void mpc8240_tlbld(UINT32 op)
static CPU_INIT( mpc8240 )
{
float multiplier;
const ppc_config *configdata = config;
const ppc_config *configdata = device->static_config;
int i ;
@ -1447,7 +1447,7 @@ static CPU_EXIT( mpc8240 )
#if (HAS_PPC601)
static CPU_INIT( ppc601 )
{
const ppc_config *configdata = config;
const ppc_config *configdata = device->static_config;
float multiplier;
int i ;
@ -1576,7 +1576,7 @@ static CPU_EXIT( ppc601 )
#if (HAS_PPC604)
static CPU_INIT( ppc604 )
{
const ppc_config *configdata = config;
const ppc_config *configdata = device->static_config;
float multiplier;
int i ;

5
src/emu/cpu/powerpc/ppccom.c
View File

@ -7,6 +7,7 @@
***************************************************************************/
#include "ppccom.h"
#include "mame.h"
#include "deprecat.h"
@ -183,8 +184,10 @@ INLINE void set_decrementer(powerpc_state *ppc, UINT32 newdec)
structure based on the configured type
-------------------------------------------------*/
void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_divisor, const device_config *device, int index, int clock, const powerpc_config *config, cpu_irq_callback irqcallback)
void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_divisor, const device_config *device, int index, int clock, cpu_irq_callback irqcallback)
{
const powerpc_config *config = device->static_config;
/* initialize based on the config */
memset(ppc, 0, sizeof(*ppc));
ppc->cpunum = cpu_getactivecpu();

2
src/emu/cpu/powerpc/ppccom.h
View File

@ -571,7 +571,7 @@ struct _powerpc_state
FUNCTION PROTOTYPES
***************************************************************************/
void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_divisor, const device_config *device, int index, int clock, const powerpc_config *config, cpu_irq_callback irqcallback);
void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_divisor, const device_config *device, int index, int clock, cpu_irq_callback irqcallback);
void ppccom_exit(powerpc_state *ppc);
void ppccom_reset(powerpc_state *ppc);

22
src/emu/cpu/powerpc/ppcdrc.c
View File

@ -534,7 +534,7 @@ INLINE UINT32 compute_spr(UINT32 spr)
ppcdrc_init - initialize the processor
-------------------------------------------------*/
static void ppcdrc_init(powerpc_flavor flavor, UINT8 cap, int tb_divisor, const device_config *device, int index, int clock, const powerpc_config *config, cpu_irq_callback irqcallback)
static void ppcdrc_init(powerpc_flavor flavor, UINT8 cap, int tb_divisor, const device_config *device, int index, int clock, cpu_irq_callback irqcallback)
{
drcfe_config feconfig =
{
@ -558,7 +558,7 @@ static void ppcdrc_init(powerpc_flavor flavor, UINT8 cap, int tb_divisor, const
memset(ppc, 0, sizeof(*ppc));
/* initialize the core */
ppccom_init(ppc, flavor, cap, tb_divisor, device, index, clock, config, irqcallback);
ppccom_init(ppc, flavor, cap, tb_divisor, device, index, clock, irqcallback);
/* allocate the implementation-specific state from the full cache */
ppc->impstate = drccache_memory_alloc_near(cache, sizeof(*ppc->impstate));
@ -4220,7 +4220,7 @@ static CPU_SET_INFO( ppcdrc4xx )
static CPU_INIT( ppc403ga )
{
ppcdrc_init(PPC_MODEL_403GA, PPCCAP_4XX, 1, device, index, clock, config, irqcallback);
ppcdrc_init(PPC_MODEL_403GA, PPCCAP_4XX, 1, device, index, clock, irqcallback);
}
@ -4259,7 +4259,7 @@ CPU_GET_INFO( ppc403ga )
static CPU_INIT( ppc403gcx )
{
ppcdrc_init(PPC_MODEL_403GCX, PPCCAP_4XX, 1, device, index, clock, config, irqcallback);
ppcdrc_init(PPC_MODEL_403GCX, PPCCAP_4XX, 1, device, index, clock, irqcallback);
}
@ -4303,7 +4303,7 @@ CPU_GET_INFO( ppc403gcx )
static CPU_INIT( ppc601 )
{
ppcdrc_init(PPC_MODEL_601, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 0/* no TB */, device, index, clock, config, irqcallback);
ppcdrc_init(PPC_MODEL_601, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 0/* no TB */, device, index, clock, irqcallback);
}
@ -4341,7 +4341,7 @@ CPU_GET_INFO( ppc601 )
static CPU_INIT( ppc602 )
{
ppcdrc_init(PPC_MODEL_602, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, device, index, clock, config, irqcallback);
ppcdrc_init(PPC_MODEL_602, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, device, index, clock, irqcallback);
}
@ -4379,7 +4379,7 @@ CPU_GET_INFO( ppc602 )
static CPU_INIT( ppc603 )
{
ppcdrc_init(PPC_MODEL_603, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, device, index, clock, config, irqcallback);
ppcdrc_init(PPC_MODEL_603, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, device, index, clock, irqcallback);
}
@ -4417,7 +4417,7 @@ CPU_GET_INFO( ppc603 )
static CPU_INIT( ppc603e )
{
ppcdrc_init(PPC_MODEL_603E, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, device, index, clock, config, irqcallback);
ppcdrc_init(PPC_MODEL_603E, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, device, index, clock, irqcallback);
}
@ -4455,7 +4455,7 @@ CPU_GET_INFO( ppc603e )
static CPU_INIT( ppc603r )
{
ppcdrc_init(PPC_MODEL_603R, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, device, index, clock, config, irqcallback);
ppcdrc_init(PPC_MODEL_603R, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, device, index, clock, irqcallback);
}
@ -4493,7 +4493,7 @@ CPU_GET_INFO( ppc603r )
static CPU_INIT( ppc604 )
{
ppcdrc_init(PPC_MODEL_604, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 4, device, index, clock, config, irqcallback);
ppcdrc_init(PPC_MODEL_604, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 4, device, index, clock, irqcallback);
}
@ -4536,7 +4536,7 @@ CPU_GET_INFO( ppc604 )
static CPU_INIT( mpc8240 )
{
ppcdrc_init(PPC_MODEL_MPC8240, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 4/* unknown */, device, index, clock, config, irqcallback);
ppcdrc_init(PPC_MODEL_MPC8240, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 4/* unknown */, device, index, clock, irqcallback);
}

2
src/emu/cpu/rsp/rsp.c
View File

@ -347,7 +347,7 @@ static CPU_INIT( rsp )
{
int regIdx;
int accumIdx;
configdata = (rsp_config *)config;
configdata = (rsp_config *)device->static_config;
if (LOG_INSTRUCTION_EXECUTION)
exec_output = fopen("rsp_execute.txt", "wt");

2
src/emu/cpu/saturn/saturn.c
View File

@ -100,7 +100,7 @@ static Saturn_Regs saturn;
static CPU_INIT( saturn )
{
saturn.config = (saturn_cpu_core *) config;
saturn.config = (saturn_cpu_core *) device->static_config;
saturn.irq_callback = irqcallback;
saturn.device = device;

2
src/emu/cpu/sc61860/sc61860.c
View File

@ -88,7 +88,7 @@ static CPU_RESET( sc61860 )
static CPU_INIT( sc61860 )
{
sc61860.config = (sc61860_cpu_core *) config;
sc61860.config = (sc61860_cpu_core *) device->static_config;
timer_pulse(ATTOTIME_IN_HZ(500), NULL, 0, sc61860_2ms_tick);
}

2
src/emu/cpu/sh2/sh2.c
View File

@ -2277,7 +2277,7 @@ static CPU_INIT( sh2 )
memset(sh2, 0, sizeof(SH2));
/* initialize the common core parts */
sh2_common_init(0, device, index, clock, config, irqcallback);
sh2_common_init(0, device, index, clock, irqcallback);
}
/**************************************************************************

4
src/emu/cpu/sh2/sh2comn.c
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@ -698,9 +698,9 @@ void sh2_exception(const char *message, int irqline)
#endif
}
void sh2_common_init(int alloc, const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback)
void sh2_common_init(int alloc, const device_config *device, int index, int clock, cpu_irq_callback irqcallback)
{
const sh2_cpu_core *conf = config;
const sh2_cpu_core *conf = device->static_config;
if (alloc)
{

2
src/emu/cpu/sh2/sh2comn.h
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@ -170,7 +170,7 @@ typedef struct
TIMER_CALLBACK( sh2_timer_callback );
TIMER_CALLBACK( sh2_dmac_callback );
void sh2_common_init(int alloc, const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback);
void sh2_common_init(int alloc, const device_config *device, int index, int clock, cpu_irq_callback irqcallback);
void sh2_recalc_irq(void);
void sh2_set_irq_line(int irqline, int state);
void sh2_set_frt_input(int cpunum, int state);

2
src/emu/cpu/sh2/sh2drc.c
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@ -687,7 +687,7 @@ static CPU_INIT( sh2 )
memset(sh2, 0, sizeof(SH2));
/* initialize the common core parts */
sh2_common_init(0, device, index, clock, config, irqcallback);
sh2_common_init(0, device, index, clock, irqcallback);
/* allocate the implementation-specific state from the full cache */
sh2->cache = cache;

2
src/emu/cpu/sh4/sh4.c
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@ -3394,7 +3394,7 @@ static CPU_DISASSEMBLE( sh4 )
static CPU_INIT( sh4 )
{
const struct sh4_config *conf = config;
const struct sh4_config *conf = device->static_config;
sh4_common_init();

2
src/emu/cpu/sharc/sharc.c
View File

@ -421,7 +421,7 @@ static CPU_DISASSEMBLE( sharc )
static CPU_INIT( sharc )
{
const sharc_config *cfg = config;
const sharc_config *cfg = device->static_config;
int saveindex;
sharc.boot_mode = cfg->boot_mode;

6
src/emu/cpu/sm8500/sm8500.c
View File

@ -81,9 +81,9 @@ UINT8* sm8500_internal_ram( void )
static CPU_INIT( sm8500 ) {
regs.irq_callback = irqcallback;
regs.device = device;
if ( config != NULL ) {
regs.config.handle_dma = ((SM8500_CONFIG *)config)->handle_dma;
regs.config.handle_timers = ((SM8500_CONFIG *)config)->handle_timers;
if ( device->static_config != NULL ) {
regs.config.handle_dma = ((SM8500_CONFIG *)device->static_config)->handle_dma;
regs.config.handle_timers = ((SM8500_CONFIG *)device->static_config)->handle_timers;
} else {
regs.config.handle_dma = NULL;
regs.config.handle_timers = NULL;

2
src/emu/cpu/t11/t11.c
View File

@ -292,7 +292,7 @@ static CPU_INIT( t11 )
0xc000, 0x8000, 0x4000, 0x2000,
0x1000, 0x0000, 0xf600, 0xf400
};
const struct t11_setup *setup = config;
const struct t11_setup *setup = device->static_config;
t11.initial_pc = initial_pc[setup->mode >> 13];
t11.irq_callback = irqcallback;

2
src/emu/cpu/tms32031/tms32031.c
View File

@ -413,7 +413,7 @@ static CPU_SET_CONTEXT( tms32031 )
static CPU_INIT( tms32031 )
{
const struct tms32031_config *configdata = config;
const struct tms32031_config *configdata = device->static_config;
int i;
char namebuf[30];

2
src/emu/cpu/tms34010/tms34010.c
View File

@ -633,7 +633,7 @@ static void check_interrupt(void)
static CPU_INIT( tms34010 )
{
const tms34010_config *configdata = config ? config : &default_config;
const tms34010_config *configdata = device->static_config ? device->static_config : &default_config;
external_host_access = FALSE;

2
src/emu/cpu/tms9900/99xxcore.h
View File

@ -1280,7 +1280,7 @@ static void register_for_save_state(int index)
static CPU_INIT( tms99xx )
{
const TMS99XX_RESET_PARAM *param = (const TMS99XX_RESET_PARAM *) config;
const TMS99XX_RESET_PARAM *param = (const TMS99XX_RESET_PARAM *) device->static_config;
register_for_save_state(index);

2
src/emu/cpu/upd7810/upd7810.c
View File

@ -1532,7 +1532,7 @@ static void upd78c05_timers(int cycles)
static CPU_INIT( upd7810 )
{
upd7810.config = *(const UPD7810_CONFIG*) config;
upd7810.config = *(const UPD7810_CONFIG*) device->static_config;
upd7810.irq_callback = irqcallback;
upd7810.device = device;

4
src/emu/cpu/v30mz/v30mz.c
View File

@ -926,7 +926,7 @@ static CPU_DISASSEMBLE( nec )
return necv_dasm_one(buffer, pc, oprom);
}
static void nec_init(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback, int type)
static void nec_init(const device_config *device, int index, int clock, cpu_irq_callback irqcallback, int type)
{
static const char *const names[]={"V20","V30","V33","V30MZ"};
@ -953,7 +953,7 @@ static void nec_init(const device_config *device, int index, int clock, const vo
I.device = device;
}
static CPU_INIT( v30mz ) { nec_init(device, index, clock, config, irqcallback, 3); }
static CPU_INIT( v30mz ) { nec_init(device, index, clock, irqcallback, 3); }
static CPU_EXECUTE( v30mz )
{
nec_ICount=cycles;

1
src/emu/cpu/vtlb.c
View File

@ -11,6 +11,7 @@
***************************************************************************/
#include "vtlb.h"
#include "mame.h"

1
src/emu/cpu/x86log.c
View File

@ -11,6 +11,7 @@
***************************************************************************/
#include "x86log.h"
#include "mame.h"
#include <stddef.h>

4
src/emu/cpu/z180/z180.c
View File

@ -1901,8 +1901,8 @@ static void z180_write_iolines(UINT32 data)
static CPU_INIT( z180 )
{
Z180.daisy = NULL;
if (config)
Z180.daisy = z80daisy_init(Machine, Machine->config->cpu[cpu_getactivecpu()].tag, config);
if (device->static_config)
Z180.daisy = z80daisy_init(Machine, Machine->config->cpu[cpu_getactivecpu()].tag, device->static_config);
Z180.irq_callback = irqcallback;
Z180.device = device;

4
src/emu/cpu/z80/z80.c
View File

@ -3551,8 +3551,8 @@ static CPU_INIT( z80 )
/* Reset registers to their initial values */
memset(z80, 0, sizeof(*z80));
if (config != NULL)
z80->daisy = z80daisy_init(Machine, Machine->config->cpu[cpu_getactivecpu()].tag, config);
if (device->static_config != NULL)
z80->daisy = z80daisy_init(Machine, Machine->config->cpu[cpu_getactivecpu()].tag, device->static_config);
z80->irq_callback = irqcallback;
z80->device = device;
IX = IY = 0xffff; /* IX and IY are FFFF after a reset! */

1
src/emu/cpu/z80/z80daisy.c
View File

@ -7,6 +7,7 @@
***************************************************************************/
#include "cpuintrf.h"
#include "mame.h"
#include "z80daisy.h"

32
src/emu/cpuintrf.c
View File

@ -286,7 +286,7 @@ struct _cpuintrf_data
cpu_interface intf; /* copy of the interface data */
cpu_type cputype; /* type index of this CPU */
int family; /* family index of this CPU */
device_config device; /* dummy device for now */
device_config *device; /* dummy device for now */
int *icount;
};
@ -972,7 +972,7 @@ INLINE void set_cpu_context(running_machine *machine, int cpunum)
/* if we need to change contexts, save the one that was there */
if (oldcontext != cpunum && oldcontext != -1)
(*cpu[oldcontext].intf.get_context)(cpu[oldcontext].device.token);
(*cpu[oldcontext].intf.get_context)(cpu[oldcontext].device->token);
/* swap memory spaces */
activecpu = cpunum;
@ -981,7 +981,7 @@ INLINE void set_cpu_context(running_machine *machine, int cpunum)
/* if the new CPU's context is not swapped in, do it now */
if (oldcontext != cpunum)
{
(*cpu[cpunum].intf.set_context)(cpu[cpunum].device.token);
(*cpu[cpunum].intf.set_context)(cpu[cpunum].device->token);
cpu_active_context[newfamily] = cpunum;
}
}
@ -1185,15 +1185,21 @@ int cpuintrf_init_cpu(int cpunum, cpu_type cputype, int clock, const void *confi
cpuinfo info;
/* create a fake device for the CPU */
memset(&cpu[cpunum].device, 0, sizeof(cpu[cpunum].device));
cpu[cpunum].device.machine = Machine;
cpu[cpunum].device.token = auto_malloc(cpu[cpunum].intf.context_size);
memset(cpu[cpunum].device.token, 0, cpu[cpunum].intf.context_size);
cpu[cpunum].device = auto_malloc(sizeof(*cpu[cpunum].device) + strlen(Machine->config->cpu[cpunum].tag));
memset(cpu[cpunum].device, 0, sizeof(*cpu[cpunum].device));
strcpy(cpu[cpunum].device->tag, Machine->config->cpu[cpunum].tag);
cpu[cpunum].device->static_config = config;
cpu[cpunum].device->machine = Machine;
cpu[cpunum].device->token = auto_malloc(cpu[cpunum].intf.context_size);
memset(cpu[cpunum].device->token, 0, cpu[cpunum].intf.context_size);
/* put a pointer to the device in the machine */
Machine->cpu[cpunum] = cpu[cpunum].device;
/* initialize the CPU and stash the context */
activecpu = cpunum;
(*cpu[cpunum].intf.init)(&cpu[cpunum].device, cpunum, clock, config, irqcallback);
(*cpu[cpunum].intf.get_context)(cpu[cpunum].device.token);
(*cpu[cpunum].intf.init)(cpu[cpunum].device, cpunum, clock, irqcallback);
(*cpu[cpunum].intf.get_context)(cpu[cpunum].device->token);
activecpu = -1;
/* get the instruction count pointer */
@ -1221,7 +1227,7 @@ void cpuintrf_exit_cpu(int cpunum)
{
/* switch contexts to the CPU during the exit */
cpuintrf_push_context(cpunum);
(*cpu[cpunum].intf.exit)(&cpu[cpunum].device);
(*cpu[cpunum].intf.exit)(cpu[cpunum].device);
cpuintrf_pop_context();
}
}
@ -1549,7 +1555,7 @@ int cpunum_execute(int cpunum, int cycles)
cpuintrf_push_context(cpunum);
executingcpu = cpunum;
memory_set_opbase(activecpu_get_physical_pc_byte());
ran = (*cpu[cpunum].intf.execute)(&cpu[cpunum].device, cycles);
ran = (*cpu[cpunum].intf.execute)(cpu[cpunum].device, cycles);
executingcpu = -1;
cpuintrf_pop_context();
return ran;
@ -1565,7 +1571,7 @@ void cpunum_reset(int cpunum)
VERIFY_CPUNUM(cpunum_reset);
cpuintrf_push_context(cpunum);
memory_set_opbase(0);
(*cpu[cpunum].intf.reset)(&cpu[cpunum].device);
(*cpu[cpunum].intf.reset)(cpu[cpunum].device);
cpuintrf_pop_context();
}
@ -1605,7 +1611,7 @@ void cpunum_write_byte(int cpunum, offs_t address, UINT8 data)
void *cpunum_get_context_ptr(int cpunum)
{
VERIFY_CPUNUM(cpunum_get_context_ptr);
return (cpu_active_context[cpu[cpunum].family] == cpunum) ? NULL : cpu[cpunum].device.token;
return (cpu_active_context[cpu[cpunum].family] == cpunum) ? NULL : cpu[cpunum].device->token;
}

9
src/emu/cpuintrf.h
View File

@ -18,7 +18,6 @@
#include "cpuint.h"
#include "cpuexec.h"
#include "watchdog.h"
#include "mame.h"
#include "state.h"
@ -119,7 +118,7 @@ enum
CPUINFO_PTR_SET_INFO = CPUINFO_PTR_FIRST, /* R/O: void (*set_info)(UINT32 state, INT64 data, void *ptr) */
CPUINFO_PTR_GET_CONTEXT, /* R/O: void (*get_context)(void *buffer) */
CPUINFO_PTR_SET_CONTEXT, /* R/O: void (*set_context)(void *buffer) */
CPUINFO_PTR_INIT, /* R/O: void (*init)(int index, int clock, const void *config, int (*irqcallback)(int)) */
CPUINFO_PTR_INIT, /* R/O: void (*init)(int index, int clock, int (*irqcallback)(int)) */
CPUINFO_PTR_RESET, /* R/O: void (*reset)(void) */
CPUINFO_PTR_EXIT, /* R/O: void (*exit)(void) */
CPUINFO_PTR_EXECUTE, /* R/O: int (*execute)(int cycles) */
@ -228,8 +227,8 @@ enum
#define CPU_SET_CONTEXT_CALL(name) CPU_SET_CONTEXT_NAME(name)(buffer)
#define CPU_INIT_NAME(name) cpu_init_##name
#define CPU_INIT(name) void CPU_INIT_NAME(name)(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback)
#define CPU_INIT_CALL(name) CPU_INIT_NAME(name)(device, index, clock, config, irqcallback)
#define CPU_INIT(name) void CPU_INIT_NAME(name)(const device_config *device, int index, int clock, cpu_irq_callback irqcallback)
#define CPU_INIT_CALL(name) CPU_INIT_NAME(name)(device, index, clock, irqcallback)
#define CPU_RESET_NAME(name) cpu_reset_##name
#define CPU_RESET(name) void CPU_RESET_NAME(name)(const device_config *device)
@ -292,7 +291,7 @@ typedef void (*cpu_get_info_func)(UINT32 state, cpuinfo *info);
typedef void (*cpu_set_info_func)(UINT32 state, cpuinfo *info);
typedef void (*cpu_get_context_func)(void *buffer);
typedef void (*cpu_set_context_func)(void *buffer);
typedef void (*cpu_init_func)(const device_config *device, int index, int clock, const void *config, cpu_irq_callback irqcallback);
typedef void (*cpu_init_func)(const device_config *device, int index, int clock, cpu_irq_callback irqcallback);
typedef void (*cpu_reset_func)(const device_config *device);
typedef void (*cpu_exit_func)(const device_config *device);
typedef int (*cpu_execute_func)(const device_config *device, int cycles);

1
src/emu/driver.h
View File

@ -20,7 +20,6 @@
***************************************************************************/
#include "devintrf.h"
#include "mamecore.h"
#define DRIVER_INIT(name) void driver_init_##name(running_machine *machine)
#define DRIVER_INIT_CALL(name) driver_init_##name(machine)

2
src/emu/mame.h
View File

@ -18,6 +18,7 @@
#include "restrack.h"
#include "options.h"
#include "inptport.h"
#include "cpuintrf.h"
#include <stdarg.h>
#ifdef MESS
@ -140,6 +141,7 @@ struct _running_machine
/* configuration data */
const machine_config * config; /* points to the constructed machine_config */
const input_port_config *portconfig; /* points to a list of input port configurations */
const device_config * cpu[MAX_CPU]; /* array of CPU devices */
/* game-related information */
const game_driver * gamedrv; /* points to the definition of the game machine */