From 9464f1c59fd7999e98a6e2a44fe3f68fbbd6868d Mon Sep 17 00:00:00 2001 From: Ted Green Date: Sun, 2 Sep 2018 19:51:08 -0600 Subject: [PATCH] vrc5074: MCFG removal and define device clock. (nw) --- src/devices/machine/vrc5074.cpp | 16 ++++++++-------- src/devices/machine/vrc5074.h | 9 --------- src/mame/drivers/vegas.cpp | 24 +++++++++++------------- 3 files changed, 19 insertions(+), 30 deletions(-) diff --git a/src/devices/machine/vrc5074.cpp b/src/devices/machine/vrc5074.cpp index abc49566500..3bc82a67286 100644 --- a/src/devices/machine/vrc5074.cpp +++ b/src/devices/machine/vrc5074.cpp @@ -100,7 +100,7 @@ #define NINT_PCIS (14) #define NINT_PCIE (15) -#define TIMER_PERIOD attotime::from_hz(SYSTEM_CLOCK) +#define TIMER_PERIOD attotime::from_hz(clock()) #define PCI_BUS_CLOCK 33000000 // Number of dma words to transfer at a time, real hardware bursts 8 @@ -144,7 +144,7 @@ void vrc5074_device::target1_map(address_map &map) } MACHINE_CONFIG_START(vrc5074_device::device_add_mconfig) - MCFG_DEVICE_ADD("uart", NS16550, SYSTEM_CLOCK / 12) + MCFG_DEVICE_ADD("uart", NS16550, this->clock() / 12) MCFG_INS8250_OUT_INT_CB(WRITELINE(*this, vrc5074_device, uart_irq_callback)) MCFG_INS8250_OUT_TX_CB(WRITELINE("ttys00", rs232_port_device, write_txd)) MCFG_INS8250_OUT_DTR_CB(WRITELINE("ttys00", rs232_port_device, write_dtr)) @@ -833,7 +833,7 @@ READ32_MEMBER(vrc5074_device::cpu_reg_r) if (m_cpu_regs[offset - 1] & 1) { // Should check for cascaded timer - result = m_cpu_regs[offset] = m_timer[which]->remaining().as_double() * SYSTEM_CLOCK; + result = m_cpu_regs[offset] = m_timer[which]->remaining().as_double() * clock(); } if (LOG_TIMERS) logerror("%s NILE READ: timer %d counter(%03X) = %08X\n", machine().describe_context(), which, offset * 4, result); @@ -954,24 +954,24 @@ WRITE32_MEMBER(vrc5074_device::cpu_reg_w) which = (offset - NREG_T0CTRL) / 4; if (LOG_NILE | LOG_TIMERS) logerror("%s NILE WRITE: timer %d control(%03X) = %08X & %08X\n", machine().describe_context(), which, offset * 4, data, mem_mask); logit = 0; - m_timer_period[which] = (uint64_t(m_cpu_regs[NREG_T0CTRL + which * 4]) + 1) * attotime::from_hz(SYSTEM_CLOCK).as_double(); + m_timer_period[which] = (uint64_t(m_cpu_regs[NREG_T0CTRL + which * 4]) + 1) * attotime::from_hz(clock()).as_double(); if (m_cpu_regs[offset] & 2) { // Cascade timer uint32_t scaleSrc = (m_cpu_regs[offset] >> 2) & 0x3; - m_timer_period[which] += (uint64_t(m_cpu_regs[NREG_T0CTRL + scaleSrc * 4]) + 1) * attotime::from_hz(SYSTEM_CLOCK).as_double(); + m_timer_period[which] += (uint64_t(m_cpu_regs[NREG_T0CTRL + scaleSrc * 4]) + 1) * attotime::from_hz(clock()).as_double(); logerror("Timer scale: timer %d is scaled by %08X\n", which, m_cpu_regs[NREG_T0CTRL + which * 4]); } /* timer just enabled? */ if (!(olddata & 1) && (m_cpu_regs[offset] & 1)) { - m_timer[which]->adjust(attotime::from_hz(SYSTEM_CLOCK) * m_cpu_regs[NREG_T0CNTR + which * 4], which); + m_timer[which]->adjust(attotime::from_hz(clock()) * m_cpu_regs[NREG_T0CNTR + which * 4], which); if (LOG_TIMERS) logerror("Starting timer %d at a rate of %f Hz\n", which, ATTOSECONDS_TO_HZ(attotime::from_double(m_timer_period[which]).as_attoseconds())); } /* timer disabled? */ else if ((olddata & 1) && !(m_cpu_regs[offset] & 1)) { - m_cpu_regs[offset + 1] = m_timer[which]->remaining().as_double() * SYSTEM_CLOCK; + m_cpu_regs[offset + 1] = m_timer[which]->remaining().as_double() * clock(); m_timer[which]->adjust(attotime::never, which); } break; @@ -986,7 +986,7 @@ WRITE32_MEMBER(vrc5074_device::cpu_reg_w) if (m_cpu_regs[offset - 1] & 1) { - m_timer[which]->adjust(attotime::from_hz(SYSTEM_CLOCK) * m_cpu_regs[offset], which); + m_timer[which]->adjust(attotime::from_hz(clock()) * m_cpu_regs[offset], which); } break; } diff --git a/src/devices/machine/vrc5074.h b/src/devices/machine/vrc5074.h index 58a682b7f29..2a4882df69b 100644 --- a/src/devices/machine/vrc5074.h +++ b/src/devices/machine/vrc5074.h @@ -12,12 +12,6 @@ #include "machine/ins8250.h" #include "bus/rs232/rs232.h" -#define MCFG_VRC5074_SET_SDRAM(_index, _size) \ - downcast(*device).set_sdram_size(_index, _size); - -#define MCFG_VRC5074_SET_CS(_cs_num, _map) \ - downcast(*device).set_map(_cs_num, address_map_constructor(&_map, #_map, this), this); - class vrc5074_device : public pci_host_device { public: template @@ -80,9 +74,6 @@ protected: virtual void device_reset() override; private: - // This value is not verified to be correct - static constexpr unsigned SYSTEM_CLOCK = 100000000; - enum { AS_PCI_MEM = 1, diff --git a/src/mame/drivers/vegas.cpp b/src/mame/drivers/vegas.cpp index d6701470e1e..19252c7a4a9 100644 --- a/src/mame/drivers/vegas.cpp +++ b/src/mame/drivers/vegas.cpp @@ -1750,14 +1750,14 @@ MACHINE_CONFIG_START(vegas_state::vegascore) // PCI Bus Devices MCFG_DEVICE_ADD(":pci", PCI_ROOT, 0) - MCFG_DEVICE_ADD(PCI_ID_NILE, VRC5074, 0, m_maincpu) - MCFG_VRC5074_SET_SDRAM(0, 0x00800000) - MCFG_VRC5074_SET_CS(2, vegas_state::vegas_cs2_map) - MCFG_VRC5074_SET_CS(3, vegas_state::vegas_cs3_map) - MCFG_VRC5074_SET_CS(4, vegas_state::vegas_cs4_map) - MCFG_VRC5074_SET_CS(5, vegas_state::vegas_cs5_map) - MCFG_VRC5074_SET_CS(6, vegas_state::vegas_cs6_map) - MCFG_VRC5074_SET_CS(7, vegas_state::vegas_cs7_map) + VRC5074(config, m_nile, vegas_state::SYSTEM_CLOCK, m_maincpu); + m_nile->set_sdram_size(0, 0x00800000); + m_nile->set_map(2, address_map_constructor(&vegas_state::vegas_cs2_map, "vegas_cs2_map", this), this); + m_nile->set_map(3, address_map_constructor(&vegas_state::vegas_cs3_map, "vegas_cs3_map", this), this); + m_nile->set_map(4, address_map_constructor(&vegas_state::vegas_cs4_map, "vegas_cs4_map", this), this); + m_nile->set_map(5, address_map_constructor(&vegas_state::vegas_cs5_map, "vegas_cs5_map", this), this); + m_nile->set_map(6, address_map_constructor(&vegas_state::vegas_cs6_map, "vegas_cs6_map", this), this); + m_nile->set_map(7, address_map_constructor(&vegas_state::vegas_cs7_map, "vegas_cs7_map", this), this); ide_pci_device &ide(IDE_PCI(config, PCI_ID_IDE, 0, 0x10950646, 0x05, 0x0)); ide.irq_handler().set(PCI_ID_NILE, FUNC(vrc5074_device::pci_intr_d)); @@ -1802,8 +1802,7 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(vegas_state::vegas32m) vegas250(config); - MCFG_DEVICE_MODIFY(PCI_ID_NILE) - MCFG_VRC5074_SET_SDRAM(0, 0x02000000) + m_nile->set_sdram_size(0, 0x02000000); MACHINE_CONFIG_END @@ -1837,9 +1836,8 @@ MACHINE_CONFIG_START(vegas_state::denver) MCFG_MIPS3_DCACHE_SIZE(16384) MCFG_MIPS3_SYSTEM_CLOCK(vegas_state::SYSTEM_CLOCK) - MCFG_DEVICE_MODIFY(PCI_ID_NILE) - MCFG_VRC5074_SET_SDRAM(0, 0x02000000) - MCFG_VRC5074_SET_CS(8, vegas_state::vegas_cs8_map) + m_nile->set_sdram_size(0, 0x02000000); + m_nile->set_map(8, address_map_constructor(&vegas_state::vegas_cs8_map, "vegas_cs8_map", this), this); MCFG_DEVICE_REPLACE(PCI_ID_VIDEO, VOODOO_3_PCI, 0, m_maincpu, "screen") MCFG_VOODOO_PCI_FBMEM(16)