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New skeleton drivers added: Convergent NGEN CP-001, B28/38, 386i [Al Kossow, Barry Rodewald]
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mahlemiut
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251
src/mess/drivers/ngen.c
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251
src/mess/drivers/ngen.c
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/*
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Convergent NGen series
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10-11-14 - Skeleton driver
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*/
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#include "emu.h"
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#include "cpu/i86/i186.h"
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#include "cpu/i386/i386.h"
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#include "video/mc6845.h"
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#include "machine/i8251.h"
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#include "machine/am9517a.h"
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#include "machine/pic8259.h"
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#include "machine/pit8253.h"
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class ngen_state : public driver_device
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{
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public:
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ngen_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_maincpu(*this,"maincpu"),
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m_crtc(*this,"crtc"),
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m_viduart(*this,"videouart"),
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m_dmac(*this,"dmac"),
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m_pic(*this,"pic"),
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m_pit(*this,"pit")
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{}
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DECLARE_WRITE_LINE_MEMBER(pit_out0_w);
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DECLARE_WRITE_LINE_MEMBER(pit_out1_w);
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DECLARE_WRITE_LINE_MEMBER(pit_out2_w);
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DECLARE_WRITE16_MEMBER(cpu_peripheral_cb);
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DECLARE_WRITE16_MEMBER(peripheral_w);
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DECLARE_READ16_MEMBER(peripheral_r);
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DECLARE_WRITE16_MEMBER(port00_w);
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DECLARE_READ16_MEMBER(port00_r);
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MC6845_UPDATE_ROW(crtc_update_row);
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protected:
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private:
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required_device<cpu_device> m_maincpu;
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required_device<mc6845_device> m_crtc;
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required_device<i8251_device> m_viduart;
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required_device<am9517a_device> m_dmac;
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required_device<pic8259_device> m_pic;
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required_device<pit8254_device> m_pit;
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UINT16 m_peripheral;
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UINT16 m_upper;
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UINT16 m_middle;
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UINT16 m_port00;
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};
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WRITE_LINE_MEMBER(ngen_state::pit_out0_w)
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{
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m_pic->ir0_w(state);
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}
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WRITE_LINE_MEMBER(ngen_state::pit_out1_w)
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{
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}
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WRITE_LINE_MEMBER(ngen_state::pit_out2_w)
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{
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}
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WRITE16_MEMBER(ngen_state::cpu_peripheral_cb)
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{
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UINT32 addr;
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switch(offset)
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{
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case 0: // upper memory
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m_upper = data;
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break;
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case 2: // peripheral
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m_peripheral = data;
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addr = (m_peripheral & 0xffc0) << 4;
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if(m_middle & 0x0040)
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{
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m_maincpu->device_t::memory().space(AS_PROGRAM).install_readwrite_handler(addr, addr + 0x3ff, read16_delegate(FUNC(ngen_state::peripheral_r), this), write16_delegate(FUNC(ngen_state::peripheral_w), this));
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logerror("Mapped peripherals to memory 0x%08x\n",addr);
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}
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else
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{
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addr &= 0xffff;
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m_maincpu->device_t::memory().space(AS_IO).install_readwrite_handler(addr, addr + 0x3ff, read16_delegate(FUNC(ngen_state::peripheral_r), this), write16_delegate(FUNC(ngen_state::peripheral_w), this));
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logerror("Mapped peripherals to I/O 0x%04x\n",addr);
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}
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break;
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case 4:
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m_middle = data;
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break;
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}
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}
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// 80186 peripheral space
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WRITE16_MEMBER(ngen_state::peripheral_w)
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{
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switch(offset)
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{
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case 0x147:
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if(mem_mask & 0xff00)
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m_pic->write(space,0,(data >> 8) & 0xff);
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if(mem_mask & 0x00ff)
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m_pic->write(space,1,data & 0xff);
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break;
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}
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logerror("Peripheral write offset %04x data %04x mask %04x\n",offset,data,mem_mask);
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}
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READ16_MEMBER(ngen_state::peripheral_r)
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{
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UINT16 ret = 0xff;
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switch(offset)
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{
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case 0x146:
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if(mem_mask & 0x00ff)
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ret = m_pic->read(space,0);
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break;
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case 0x147:
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if(mem_mask & 0x00ff)
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ret = m_pic->read(space,1);
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break;
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}
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logerror("Peripheral read offset %04x mask %04x\n",offset,mem_mask);
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return ret;
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}
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// A sequencial number is written to this port, and keeps on going until an NMI is triggered.
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// Maybe this is a RAM test of some kind, and this would be a bank switch register?
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// Even though the system supports 1MB at the most, which would fit in the CPU's whole address space...
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WRITE16_MEMBER(ngen_state::port00_w)
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{
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m_port00 = data;
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if(data > 0)
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m_maincpu->set_input_line(INPUT_LINE_NMI,PULSE_LINE);
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logerror("SYS: Port 0 write %04x\n",data);
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}
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READ16_MEMBER(ngen_state::port00_r)
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{
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return m_port00;
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}
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MC6845_UPDATE_ROW( ngen_state::crtc_update_row )
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{
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}
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static ADDRESS_MAP_START( ngen_mem, AS_PROGRAM, 16, ngen_state )
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AM_RANGE(0x00000, 0xfdfff) AM_RAM
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AM_RANGE(0xfe000, 0xfffff) AM_ROM AM_REGION("bios",0)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( ngen_io, AS_IO, 16, ngen_state )
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AM_RANGE(0x0000, 0x0001) AM_READWRITE(port00_r,port00_w)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( ngen386_mem, AS_PROGRAM, 32, ngen_state )
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AM_RANGE(0x00000000, 0x000fdfff) AM_RAM
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AM_RANGE(0x000fe000, 0x000fffff) AM_ROM AM_REGION("bios",0)
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AM_RANGE(0xffffe000, 0xffffffff) AM_ROM AM_REGION("bios",0)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( ngen386i_mem, AS_PROGRAM, 32, ngen_state )
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AM_RANGE(0x00000000, 0x000fbfff) AM_RAM
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AM_RANGE(0x000fc000, 0x000fffff) AM_ROM AM_REGION("bios",0)
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AM_RANGE(0xffffc000, 0xffffffff) AM_ROM AM_REGION("bios",0)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( ngen386_io, AS_IO, 32, ngen_state )
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AM_RANGE(0xfd0c, 0xfd0f) AM_DEVREADWRITE8("pic",pic8259_device,read,write,0xffffffff)
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ADDRESS_MAP_END
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static INPUT_PORTS_START( ngen )
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INPUT_PORTS_END
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static MACHINE_CONFIG_START( ngen, ngen_state )
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// basic machine hardware
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MCFG_CPU_ADD("maincpu", I80186, XTAL_16MHz / 2)
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MCFG_CPU_PROGRAM_MAP(ngen_mem)
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MCFG_CPU_IO_MAP(ngen_io)
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MCFG_80186_CHIP_SELECT_CB(WRITE16(ngen_state, cpu_peripheral_cb))
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MCFG_80186_TMROUT1_HANDLER(WRITELINE(ngen_state, pit_out0_w))
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MCFG_PIC8259_ADD( "pic", INPUTLINE("maincpu", 0), VCC, NULL )
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MCFG_DEVICE_ADD("pit", PIT8254, 0)
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MCFG_PIT8253_CLK0(4772720/4) // correct?
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MCFG_PIT8253_OUT0_HANDLER(WRITELINE(ngen_state, pit_out0_w))
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MCFG_PIT8253_CLK0(4772720/4)
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MCFG_PIT8253_OUT0_HANDLER(WRITELINE(ngen_state, pit_out1_w))
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MCFG_PIT8253_CLK0(4772720/4)
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MCFG_PIT8253_OUT0_HANDLER(WRITELINE(ngen_state, pit_out2_w))
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MCFG_DEVICE_ADD("dmac", AM9517A, XTAL_14_7456MHz / 3) // NEC D8237A, divisor unknown
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// video board
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_SIZE(720,348)
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MCFG_SCREEN_REFRESH_RATE(60)
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MCFG_SCREEN_UPDATE_DEVICE("crtc",mc6845_device, screen_update)
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MCFG_MC6845_ADD("crtc", MC6845, NULL, 19980000 / 16) // divisor unknown
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MCFG_MC6845_SHOW_BORDER_AREA(false)
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MCFG_MC6845_CHAR_WIDTH(9)
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MCFG_MC6845_UPDATE_ROW_CB(ngen_state, crtc_update_row)
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MCFG_DEVICE_ADD("videouart", I8251, 19980000 / 16) // divisor unknown
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MACHINE_CONFIG_END
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static MACHINE_CONFIG_DERIVED( ngen386, ngen )
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MCFG_CPU_REPLACE("maincpu", I386, XTAL_50MHz / 2)
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MCFG_CPU_PROGRAM_MAP(ngen386_mem)
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MCFG_CPU_IO_MAP(ngen386_io)
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MACHINE_CONFIG_END
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static MACHINE_CONFIG_DERIVED( 386i, ngen386 )
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MCFG_CPU_MODIFY("maincpu")
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MCFG_CPU_PROGRAM_MAP(ngen386i_mem)
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MACHINE_CONFIG_END
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ROM_START( ngen )
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ROM_REGION( 0x2000, "bios", 0)
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ROM_LOAD16_BYTE( "72-00414_80186_cpu.bin", 0x000000, 0x001000, CRC(e1387a03) SHA1(ddca4eba67fbf8b731a8009c14f6b40edcbc3279) )
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ROM_LOAD16_BYTE( "72-00415_80186_cpu.bin", 0x000001, 0x001000, CRC(a6dde7d9) SHA1(b4d15c1bce31460ab5b92ff43a68c15ac5485816) )
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ROM_END
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// not sure just how similar these systems are to the 80186 model, but are here at the moment to document the dumps
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ROM_START( ngenb38 )
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ROM_REGION( 0x2000, "bios", 0)
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ROM_LOAD16_BYTE( "72-168_fpc_386_cpu.bin", 0x000000, 0x001000, CRC(250a3b68) SHA1(49c070514bac264fa4892f284f7d2c852ae6605d) )
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ROM_LOAD16_BYTE( "72-167_fpc_386_cpu.bin", 0x000001, 0x001000, CRC(4010cc4e) SHA1(74a3024d605569056484d08b63f19fbf8eaf31c6) )
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ROM_END
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ROM_START( 386i )
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ROM_REGION( 0x4000, "bios", 0)
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ROM_LOAD16_BYTE( "72-1561o_386i_cpu.bin", 0x000000, 0x002000, CRC(b5efd768) SHA1(8b250d47d9c6eb82e1afaeb2244d8c4134ecbc47) )
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ROM_LOAD16_BYTE( "72-1562e_386i_cpu.bin", 0x000001, 0x002000, CRC(002d0d3a) SHA1(31de8592999377db9251acbeff348390a2d2602a) )
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ROM_REGION( 0x2000, "video", 0)
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ROM_LOAD( "72-1630_gc-104_vga.bin", 0x000000, 0x002000, CRC(4e4d8ebe) SHA1(50c96ccb4d0bd1beb2d1aee0d18b2c462d25fc8f) )
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ROM_END
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COMP( 1983, ngen, 0, 0, ngen, ngen, driver_device, 0, "Convergent Technologies", "NGEN CP-001", GAME_IS_SKELETON | GAME_NOT_WORKING | GAME_NO_SOUND )
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COMP( 1991, ngenb38, ngen, 0, ngen386, ngen, driver_device, 0, "Financial Products Corp.", "B28/38", GAME_IS_SKELETON | GAME_NOT_WORKING | GAME_NO_SOUND )
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COMP( 1990, 386i, ngen, 0, 386i, ngen, driver_device, 0, "Convergent Technologies", "386i", GAME_IS_SKELETON | GAME_NOT_WORKING | GAME_NO_SOUND )
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@ -2133,6 +2133,11 @@ fanucspg // 1983
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fanucspgm // 1983
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fanucs15 // 1990
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// Convergent
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ngen // 1983
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ngenb38 // 1991
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386i // 199?
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//********** Misc **********************************************************
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ssem // Manchester Small-Scale Experimental Machine, "Baby"
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@ -1941,6 +1941,7 @@ $(MESSOBJ)/skeleton.a: \
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$(MESS_DRIVERS)/mx2178.o \
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$(MESS_DRIVERS)/mycom.o \
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$(MESS_DRIVERS)/myvision.o \
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$(MESS_DRIVERS)/ngen.o \
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$(MESS_DRIVERS)/octopus.o \
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$(MESS_DRIVERS)/onyx.o \
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$(MESS_DRIVERS)/okean240.o \
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