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https://github.com/holub/mame
synced 2025-07-06 10:29:38 +03:00
Very preliminary sound DMA hooked up. Born to be Wild!
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@ -323,7 +323,7 @@ public:
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UINT8 m_vblank;
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int m_scsp_last_line;
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UINT8 an_mux_data;
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UINT8 sound_data;
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DECLARE_READ32_MEMBER(sysh1_unk_r);
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DECLARE_WRITE32_MEMBER(sysh1_unk_w);
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@ -343,6 +343,7 @@ public:
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DECLARE_WRITE8_MEMBER(analog_mux_w);
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DECLARE_WRITE8_MEMBER(lamps_w);
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DECLARE_WRITE_LINE_MEMBER(scsp_to_main_irq);
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DECLARE_WRITE8_MEMBER(sound_to_sh1_w);
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DECLARE_DRIVER_INIT(coolridr);
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virtual void machine_start();
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virtual void machine_reset();
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@ -469,14 +470,78 @@ UINT32 coolridr_state::screen_update_coolridr2(screen_device &screen, bitmap_rgb
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/* unknown purpose */
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READ32_MEMBER(coolridr_state::sysh1_unk_r)
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{
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if(offset == 8)
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return sound_data;
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if(offset == 2 || offset == 6) // DMA status
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return 0;
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printf("%08x\n",offset);
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return m_h1_unk[offset];
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}
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WRITE32_MEMBER(coolridr_state::sysh1_unk_w)
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{
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address_space &main_space = m_maincpu->space(AS_PROGRAM);
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address_space &sound_space = m_soundcpu->space(AS_PROGRAM);
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if(offset == 8)
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{
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//bit 16 probably halts m68k
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return;
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}
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if(offset == 2)
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{
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if(!(data & 1) && (m_h1_unk[2] & 1)) // 1 -> 0 transition enables DMA
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{
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UINT32 src = m_h1_unk[0];
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UINT32 dst = m_h1_unk[1];
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UINT32 size = 0x200; // TODO
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if(src == 0x100000) // DMA for m68k program, TODO
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return;
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//printf("%08x %08x %08x\n",src,dst,size);
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for(int i = 0;i < size; i+=2)
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{
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sound_space.write_word(dst,main_space.read_word(src));
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src+=2;
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dst+=2;
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}
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}
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}
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if(offset == 6)
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{
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if(!(data & 1) && (m_h1_unk[6] & 1)) // 1 -> 0 transition enables DMA
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{
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UINT32 src = m_h1_unk[4];
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UINT32 dst = m_h1_unk[5];
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UINT32 size = 0x200; // TODO
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if(src == 0x100000) // DMA for m68k program, TODO
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return;
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//printf("%08x %08x %08x\n",src,dst,size);
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for(int i = 0;i < size; i+=2)
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{
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sound_space.write_word(dst,main_space.read_word(src));
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src+=2;
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dst+=2;
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}
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}
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}
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COMBINE_DATA(&m_h1_unk[offset]);
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//printf("%08x %08x\n",offset*4,m_h1_unk[offset]);
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}
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/* According to Guru, this is actually the same I/O chip of Sega Model 2 HW */
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#if 0
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READ32_MEMBER(coolridr_state::sysh1_ioga_r)
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@ -754,7 +819,7 @@ WRITE32_MEMBER(coolridr_state::sysh1_txt_blit_w)
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// it writes the palette for the bgs here, with fade effects?
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// is this the only way for the tile colours to be actually used, or does this just go to memory somewhere too?
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//printf("blit mode %02x %02x %08x\n", m_blitterMode, m_blitterSerialCount, data);
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sysh1_pal_w(space,m_textOffset,data,0xffffffff);
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m_textOffset++;
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@ -972,9 +1037,9 @@ static ADDRESS_MAP_START( coolridr_submap, AS_PROGRAM, 32, coolridr_state )
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AM_RANGE(0x03200000, 0x0327ffff) AM_READWRITE16(h1_soundram2_r, h1_soundram2_w,0xffffffff) //AM_SHARE("soundram2")
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AM_RANGE(0x03300000, 0x03300fff) AM_DEVREADWRITE16_LEGACY("scsp2", scsp_r, scsp_w, 0xffffffff)
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AM_RANGE(0x04000000, 0x0400001f) AM_DEVREADWRITE8("i8237", am9517a_device, read, write, 0xffffffff)
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AM_RANGE(0x04000020, 0x0400003f) AM_READWRITE(sysh1_unk_r,sysh1_unk_w) AM_SHARE("h1_unk")
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AM_RANGE(0x04200000, 0x0420003f) AM_RAM /* hi-word for DMA? */
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// AM_RANGE(0x04000000, 0x0400001f) AM_DEVREADWRITE8("i8237", am9517a_device, read, write, 0xffffffff)
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AM_RANGE(0x04000000, 0x0400003f) AM_READWRITE(sysh1_unk_r,sysh1_unk_w) AM_SHARE("h1_unk")
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// AM_RANGE(0x04200000, 0x0420003f) AM_RAM /* hi-word for DMA? */
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AM_RANGE(0x05000000, 0x05000fff) AM_RAM
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AM_RANGE(0x05200000, 0x052001ff) AM_RAM
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@ -995,16 +1060,18 @@ static ADDRESS_MAP_START( coolridr_submap, AS_PROGRAM, 32, coolridr_state )
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AM_RANGE(0x60000000, 0x600003ff) AM_WRITENOP
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ADDRESS_MAP_END
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// SH-1 or SH-2 almost certainly copies the program down to here: the ROM containing the program is 32-bit wide and the 68000 is 16-bit
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// the SCSP is believed to be hardcoded to decode the first 4 MB like this for a master/slave config
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// (see also Model 3):
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WRITE8_MEMBER(coolridr_state::sound_to_sh1_w)
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{
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sound_data = data;
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}
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static ADDRESS_MAP_START( system_h1_sound_map, AS_PROGRAM, 16, coolridr_state )
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AM_RANGE(0x000000, 0x07ffff) AM_RAM AM_REGION("scsp1",0) AM_SHARE("soundram")
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AM_RANGE(0x100000, 0x100fff) AM_DEVREADWRITE_LEGACY("scsp1", scsp_r, scsp_w)
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AM_RANGE(0x200000, 0x27ffff) AM_RAM AM_REGION("scsp2",0) AM_SHARE("soundram2")
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AM_RANGE(0x300000, 0x300fff) AM_DEVREADWRITE_LEGACY("scsp2", scsp_r, scsp_w)
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AM_RANGE(0x800000, 0x80ffff) AM_RAM
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AM_RANGE(0x900000, 0x900001) AM_WRITENOP
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AM_RANGE(0x900000, 0x900001) AM_WRITE8(sound_to_sh1_w,0x00ff)
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ADDRESS_MAP_END
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@ -1469,7 +1536,8 @@ static const scsp_interface scsp_config =
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static const scsp_interface scsp2_interface =
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{
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0,
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NULL
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NULL,
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DEVCB_DRIVER_LINE_MEMBER(coolridr_state, scsp_to_main_irq)
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};
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#define MAIN_CLOCK XTAL_28_63636MHz
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