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https://github.com/holub/mame
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commodore/c65.cpp: move DMA logic to emu_timer
This commit is contained in:
angelosa
parent
8c62a87b66
commit
955ecd040c
@ -4,6 +4,18 @@
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C=65 / C=64DX (c) 1991 Commodore
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TODO:
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- Fails interpreting BASIC commands
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\- DMA tries this COPY in ROM space $20200 but should really be in work RAM $206;
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\- PC=f27c stz $03d5 have Z=0 but transfers a 0x02?
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- Complete memory model;
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- Complete interrupts;
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- F011 FDC;
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- C=64 mode (with "GO64" at BASIC prompt);
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===================================================================================================
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References:
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Hardware infos can be found at:
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http://www.zimmers.net/cbmpics/cbm/c65/c65manual.txt
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http://www.zimmers.net/cbmpics/cbm/c65/c65faq20.txt
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@ -30,7 +42,7 @@ http://www.zimmers.net/anonftp/pub/cbm/schematics/computers/C64DX_aka_C65_System
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#define MAIN_CLOCK XTAL(28'375'160)/8
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// TODO: move to own file, subclass with f018a, use device_execute_interface
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// TODO: move to own file, subclass with f018a and f018b, use device_execute_interface
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class dmagic_f018_device : public device_t
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{
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public:
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@ -50,7 +62,21 @@ private:
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u32 m_dmalist_address = 0;
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void execute(u32 address);
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TIMER_CALLBACK_MEMBER(execute_cb);
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typedef enum {
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COPY,
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MIX,
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SWAP,
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FILL,
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IDLE,
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FETCH_PARAMS
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} dma_state_t;
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dma_state_t m_state;
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u32 m_src, m_dst, m_length, m_command, m_modulo;
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bool m_chained_transfer;
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emu_timer *m_dma_timer;
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void check_state(int next_cycles);
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};
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DEFINE_DEVICE_TYPE(DMAGIC_F018, dmagic_f018_device, "dmagic_f018", "DMAgic F018 Gate Array")
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@ -64,76 +90,135 @@ dmagic_f018_device::dmagic_f018_device(const machine_config &mconfig, const char
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void dmagic_f018_device::device_start()
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{
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save_item(NAME(m_dmalist_address));
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//save_item(NAME(m_state));
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m_dma_timer = timer_alloc(FUNC(dmagic_f018_device::execute_cb), this);
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}
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void dmagic_f018_device::device_reset()
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{}
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void dmagic_f018_device::execute(u32 address)
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{
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static const char *const dma_cmd_string[] =
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m_dma_timer->adjust(attotime::never);
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m_state = dma_state_t::IDLE;
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m_chained_transfer = false;
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m_dmalist_address = 0;
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}
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void dmagic_f018_device::check_state(int next_cycles)
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{
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if (m_length != 0)
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m_dma_timer->adjust(attotime::from_ticks((next_cycles), clock()));
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else
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{
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"COPY",
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"MIX",
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"SWAP",
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"FILL"
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};
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u8 cmd = m_space->read_byte(address++);
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u16 length = m_space->read_byte(address++);
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length |=(m_space->read_byte(address++)<<8);
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u32 src = m_space->read_byte(address++);
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src |=(m_space->read_byte(address++)<<8);
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src |=(m_space->read_byte(address++)<<16);
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u32 dst = m_space->read_byte(address++);
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dst |=(m_space->read_byte(address++)<<8);
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dst |=(m_space->read_byte(address++)<<16);
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if(cmd & 0xfc)
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logerror("%02x\n",cmd & 0xfc);
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switch(cmd & 3)
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{
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// copy
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// TODO: untested, is it even implemented in F018?
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case 0:
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{
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if(length != 1)
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logerror("DMAgic %s %02x -> %08x %04x (CHAIN=%s)\n",dma_cmd_string[cmd & 3],src,dst,length,cmd & 4 ? "yes" : "no");
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uint32_t SourceIndex;
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uint32_t DestIndex;
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uint16_t SizeIndex;
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SourceIndex = src & 0xfffff;
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DestIndex = dst & 0xfffff;
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SizeIndex = length;
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do
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{
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m_space->write_byte(DestIndex++,m_space->read_byte(SourceIndex++));
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SizeIndex--;
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}while(SizeIndex != 0);
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return;
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}
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// fill
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case 3:
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{
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// TODO: upper bits of source
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logerror("DMAgic %s %02x -> %08x %04x (CHAIN=%s)\n",dma_cmd_string[cmd & 3],src & 0xff,dst,length,cmd & 4 ? "yes" : "no");
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uint8_t FillValue;
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uint32_t DestIndex;
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uint16_t SizeIndex;
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FillValue = src & 0xff;
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DestIndex = dst & 0xfffff;
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SizeIndex = length;
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do
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{
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m_space->write_byte(DestIndex++,FillValue);
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SizeIndex--;
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}while(SizeIndex != 0);
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return;
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}
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m_chained_transfer = bool(BIT(m_command, 2));
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if (m_chained_transfer)
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popmessage("DMAgic: untested Chain Mode");
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m_state = m_chained_transfer ? FETCH_PARAMS : IDLE;
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m_dma_timer->adjust(m_chained_transfer ? attotime::from_ticks(12, clock()) : attotime::never);
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}
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}
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TIMER_CALLBACK_MEMBER(dmagic_f018_device::execute_cb)
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{
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switch(m_state)
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{
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case dma_state_t::IDLE:
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return;
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case dma_state_t::FETCH_PARAMS: {
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static const char *const dma_cmd_string[] =
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{
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"COPY",
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"MIX",
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"SWAP",
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"FILL"
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};
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u32 address = m_dmalist_address;
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logerror("%05x ", address);
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m_command = m_space->read_byte(address++);
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m_length = m_space->read_byte(address++);
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m_length |=(m_space->read_byte(address++)<<8);
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if (m_length == 0)
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m_length = 0x10000;
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m_src = m_space->read_byte(address++);
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m_src |=(m_space->read_byte(address++)<<8);
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m_src |=(m_space->read_byte(address++)<<16);
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m_dst = m_space->read_byte(address++);
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m_dst |=(m_space->read_byte(address++)<<8);
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m_dst |=(m_space->read_byte(address++)<<16);
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m_modulo = m_space->read_byte(address++);
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m_modulo |=(m_space->read_byte(address++)<<8);
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m_dmalist_address = address;
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m_state = (dma_state_t)(m_command & 3);
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logerror("DMAgic %s %06x -> %06x %04x %02x (CHAIN=%s)\n"
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, dma_cmd_string[m_command & 3]
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, m_src
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, m_dst
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, m_length
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, m_modulo
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, m_command & 4 ? "yes" : "no"
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);
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if (m_command & 0xf8)
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popmessage("DMAgic unhandled command %02x", m_command);
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// x--- I/O select
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// -x-- DIR
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// --x- MOD
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// ---x HOLD
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if ((m_src & 0xf0'0000 || m_dst & 0xf0'0000) && m_length != 1)
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{
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popmessage("DMAgic unhandled source %06x dst %06x length %05x", m_src, m_dst, m_length);
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machine().debug_break();
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}
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m_dma_timer->adjust(attotime::from_ticks((1), clock()));
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break;
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}
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// TODO: very limited use by the BIOS, not extensively tested
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// generally uses length == 1 (for copying BASIC strings from work RAM)
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// or length == 50 (for scrolling vertical text, cfr. c64dx)
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case dma_state_t::COPY: {
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m_space->write_byte(m_dst & 0xf'ffff, m_space->read_byte(m_src & 0xf'ffff));
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m_src = ((m_src + 1) & 0xffff) | (m_src & 0xf'0000);
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m_dst = ((m_dst + 1) & 0xffff) | (m_dst & 0xf'0000);
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m_length --;
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check_state(2);
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break;
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}
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case dma_state_t::MIX:
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popmessage("DMAgic: unimplemented MIX");
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break;
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case dma_state_t::SWAP: {
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popmessage("DMAgic: untested SWAP");
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const u8 tmp_src = m_space->read_byte(m_src & 0xf'ffff);
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const u8 tmp_dst = m_space->read_byte(m_dst & 0xf'ffff);
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m_space->write_byte(m_src & 0xf'ffff, tmp_dst);
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m_space->write_byte(m_dst & 0xf'ffff, tmp_src);
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m_src = ((m_src + 1) & 0xffff) | (m_src & 0xf'0000);
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m_dst = ((m_dst + 1) & 0xffff) | (m_dst & 0xf'0000);
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m_length --;
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check_state(4);
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break;
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}
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case dma_state_t::FILL:
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m_space->write_byte(m_dst & 0xf'ffff, m_src & 0xff);
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m_dst = ((m_dst + 1) & 0xffff) | (m_dst & 0xf'0000);
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m_length --;
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check_state(1);
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break;
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}
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logerror("DMAgic %s %08x %08x %04x (CHAIN=%s)\n",dma_cmd_string[cmd & 3],src,dst,length,cmd & 4 ? "yes" : "no");
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}
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@ -143,7 +228,8 @@ void dmagic_f018_device::map(address_map &map)
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NAME([this] (offs_t offset, u8 data) {
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m_dmalist_address &= 0xffff00;
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m_dmalist_address |= data;
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execute(m_dmalist_address);
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m_state = FETCH_PARAMS;
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m_dma_timer->adjust(attotime::from_ticks((12), clock()));
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})
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);
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map(1, 1).lw8(
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@ -158,7 +244,11 @@ void dmagic_f018_device::map(address_map &map)
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m_dmalist_address |= data << 16;
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})
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);
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// 3 read status
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map(3, 3).lr8(
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NAME([this] (offs_t offset) {
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return (m_state != IDLE) << 7 | (m_chained_transfer << 0);
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})
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);
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}
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namespace {
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@ -172,7 +262,7 @@ public:
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, m_cia(*this, "cia_%u", 0U)
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, m_sid(*this, "sid_%u", 0U)
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, m_dma(*this, "dma")
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, m_cia_view(*this, "cia_view")
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, m_cram_view(*this, "cram_view")
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, m_screen(*this, "screen")
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, m_palette(*this, "palette")
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, m_workram(*this, "work_ram")
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@ -189,7 +279,7 @@ public:
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required_device_array<mos6526_device, 2> m_cia;
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required_device_array<mos6581_device, 2> m_sid;
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required_device<dmagic_f018_device> m_dma;
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memory_view m_cia_view;
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memory_view m_cram_view;
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required_device<screen_device> m_screen;
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required_device<palette_device> m_palette;
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required_shared_ptr<uint8_t> m_workram;
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@ -237,6 +327,7 @@ private:
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uint8_t m_VIC2_EXTColor = 0U;
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uint8_t m_VIC2_VS_CB_Base = 0U;
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uint8_t m_VIC2_BK0_Color = 0U;
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uint8_t m_sprite_enable = 0U;
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/* 0x30: banking + PAL + EXT SYNC */
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uint8_t m_VIC3_ControlA = 0U;
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/* 0x31: video modes */
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@ -262,9 +353,12 @@ void c65_state::vic4567_map(address_map &map)
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return (m_screen->vpos() & 0xff);
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})
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);
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map(0x15, 0x15).lr8(
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NAME([] (offs_t offset) {
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return 0xff; // silence log for now
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map(0x15, 0x15).lrw8(
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NAME([this] (offs_t offset) {
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return m_sprite_enable;
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}),
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NAME([this] (offs_t offset, u8 data) {
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m_sprite_enable = data;
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})
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);
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map(0x18, 0x18).lrw8(
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@ -312,7 +406,7 @@ void c65_state::vic4567_map(address_map &map)
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/*
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* KEY register, handles vic-iii and vic-ii modes via two consecutive writes
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* 0xa5 -> 0x96 vic-iii mode
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* any other write vic-ii mode
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* any other write vic-ii mode (changes base memory map)
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*/
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// map(0x2f, 0x2f)
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map(0x30, 0x30).lrw8(
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@ -323,7 +417,8 @@ void c65_state::vic4567_map(address_map &map)
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if((data & 0xfe) != 0x64)
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logerror("CONTROL A %02x\n",data);
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m_VIC3_ControlA = data;
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m_cia_view.select(BIT(data, 0));
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// TODO: all the other bits
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m_cram_view.select(BIT(data, 0));
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})
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);
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map(0x31, 0x31).lrw8(
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@ -471,8 +566,9 @@ void c65_state::cia0_portb_w(uint8_t data)
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void c65_state::c65_map(address_map &map)
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{
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map(0x00000, 0x07fff).ram().share("work_ram"); // TODO: bank
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map(0x0c800, 0x0cfff).rom().region("ipl", 0xc800);
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map(0x00000, 0x07fff).ram().share("work_ram");
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map(0x08000, 0x0bfff).rom().region("ipl", 0x08000);
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map(0x0c800, 0x0cfff).rom().region("ipl", 0x0c800);
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map(0x0d000, 0x0d07f).m(*this, FUNC(c65_state::vic4567_map));
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// 0x0d080, 0x0d09f FDC
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// 0x0d0a0, 0x0d0ff Ram Expansion Control (REC)
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@ -480,24 +576,26 @@ void c65_state::c65_map(address_map &map)
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map(0x0d200, 0x0d2ff).ram().w(FUNC(c65_state::PalGreen_w)).share("greenpal"); // 0x0d200, 0x0d2ff Green Palette
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map(0x0d300, 0x0d3ff).ram().w(FUNC(c65_state::PalBlue_w)).share("bluepal"); // 0x0d300, 0x0d3ff Blue Palette
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// 0x0d400, 0x0d4*f Right SID
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map(0x0d400, 0x0d41f).rw(m_sid[1], FUNC(mos6581_device::read), FUNC(mos6581_device::write));
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// keyboard hold left shift will read to $d484 (?)
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map(0x0d400, 0x0d41f).mirror(0x80).rw(m_sid[1], FUNC(mos6581_device::read), FUNC(mos6581_device::write));
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// 0x0d440, 0x0d4*f Left SID
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map(0x0d440, 0x0d45f).rw(m_sid[0], FUNC(mos6581_device::read), FUNC(mos6581_device::write));
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map(0x0d440, 0x0d45f).mirror(0x80).rw(m_sid[0], FUNC(mos6581_device::read), FUNC(mos6581_device::write));
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map(0x0d600, 0x0d6ff).rw(FUNC(c65_state::uart_r), FUNC(c65_state::uart_w));
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// 0x0d700, 0x0d7** DMAgic
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map(0x0d700, 0x0d703).m(m_dma, FUNC(dmagic_f018_device::map));
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// 0x0d800, 0x0d8** Color matrix
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map(0x0d800, 0x0dfff).view(m_cia_view);
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map(0x0d800, 0x0dfff).view(m_cram_view);
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// maps lower 1024 bytes regardless of the setting (essentially touches $dc00 as overlay)
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m_cia_view[0](0x0d800, 0x0dbff).lrw8(
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m_cram_view[0](0x0d800, 0x0dbff).lrw8(
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NAME([this] (offs_t offset) { return m_cram[offset]; }),
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NAME([this] (offs_t offset, u8 data) { m_cram[offset] = data; })
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);
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m_cia_view[0](0x0dc00, 0x0dc0f).rw(m_cia[0], FUNC(mos6526_device::read), FUNC(mos6526_device::write));
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m_cia_view[0](0x0dd00, 0x0dd0f).rw(m_cia[1], FUNC(mos6526_device::read), FUNC(mos6526_device::write));
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m_cram_view[0](0x0dc00, 0x0dc0f).rw(m_cia[0], FUNC(mos6526_device::read), FUNC(mos6526_device::write));
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m_cram_view[0](0x0dd00, 0x0dd0f).rw(m_cia[1], FUNC(mos6526_device::read), FUNC(mos6526_device::write));
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// 0x0de00, 0x0de** Ext I/O Select 1
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// 0x0df00, 0x0df** Ext I/O Select 2 (RAM window?)
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m_cia_view[1](0x0d800, 0x0dfff).ram().share("cram");
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m_cram_view[1](0x0d800, 0x0dfff).ram().share("cram");
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map(0x0e000, 0x0ffff).rom().region("ipl", 0x0e000);
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map(0x10000, 0x1f7ff).ram();
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map(0x1f800, 0x1ffff).ram().share("cram");
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@ -621,7 +719,8 @@ void c65_state::machine_start()
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void c65_state::machine_reset()
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{
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m_cia_view.select(0);
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m_VIC3_ControlA = 0;
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m_cram_view.select(0);
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}
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@ -660,8 +759,6 @@ void c65_state::IRQCheck(uint8_t irq_cause)
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INTERRUPT_GEN_MEMBER(c65_state::vic3_vblank_irq)
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{
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IRQCheck(1);
|
||||
//if(m_VIC2_IRQMask & 1)
|
||||
// m_maincpu->set_input_line(M4510_IRQ_LINE,HOLD_LINE);
|
||||
}
|
||||
|
||||
void c65_state::cia0_irq(int state)
|
||||
@ -687,7 +784,9 @@ void c65_state::c65(machine_config &config)
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &c65_state::c65_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(c65_state::vic3_vblank_irq));
|
||||
|
||||
DMAGIC_F018(config, m_dma, MAIN_CLOCK);
|
||||
// TODO: multiply by x8 because with a more canonical x1 no transfer will complete in time.
|
||||
// is this thing a mixed burst/cycle steal really?
|
||||
DMAGIC_F018(config, m_dma, MAIN_CLOCK * 8);
|
||||
m_dma->set_space(m_maincpu, AS_PROGRAM);
|
||||
|
||||
MOS6526(config, m_cia[0], MAIN_CLOCK);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user