From 95800497848afe0d5d551efbef4af9d2dc39e1bc Mon Sep 17 00:00:00 2001 From: "R. Belmont" Date: Wed, 7 Jul 2010 01:27:54 +0000 Subject: [PATCH] Fix SH-2 interpreter [Atari Ace] --- src/emu/cpu/sh2/sh2.c | 933 +++++++++++++++++++------------------- src/emu/cpu/sh2/sh2comn.h | 3 +- 2 files changed, 479 insertions(+), 457 deletions(-) diff --git a/src/emu/cpu/sh2/sh2.c b/src/emu/cpu/sh2/sh2.c index d24b9277e38..bfa1e840e59 100644 --- a/src/emu/cpu/sh2/sh2.c +++ b/src/emu/cpu/sh2/sh2.c @@ -115,10 +115,17 @@ CPU_DISASSEMBLE( sh2 ); #define LOG(x) do { if (VERBOSE) logerror x; } while (0) -static int sh2_icount; -sh2_state *sh2; +INLINE sh2_state *get_safe_token(running_device *device) +{ + assert(device != NULL); + assert(device->token != NULL); + assert(device->type() == CPU); + assert(cpu_get_type(device) == CPU_SH1 || + cpu_get_type(device) == CPU_SH2); + return (sh2_state *)downcast(device)->token(); +} -INLINE UINT8 RB(offs_t A) +INLINE UINT8 RB(sh2_state *sh2, offs_t A) { if (A >= 0xe0000000) return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xff << (((~A) & 3)*8)) >> (((~A) & 3)*8); @@ -132,7 +139,7 @@ INLINE UINT8 RB(offs_t A) return memory_read_byte_32be(sh2->program, A & AM); } -INLINE UINT16 RW(offs_t A) +INLINE UINT16 RW(sh2_state *sh2, offs_t A) { if (A >= 0xe0000000) return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffff << (((~A) & 2)*8)) >> (((~A) & 2)*8); @@ -146,7 +153,7 @@ INLINE UINT16 RW(offs_t A) return memory_read_word_32be(sh2->program, A & AM); } -INLINE UINT32 RL(offs_t A) +INLINE UINT32 RL(sh2_state *sh2, offs_t A) { if (A >= 0xe0000000) return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffffffff); @@ -160,7 +167,7 @@ INLINE UINT32 RL(offs_t A) return memory_read_dword_32be(sh2->program, A & AM); } -INLINE void WB(offs_t A, UINT8 V) +INLINE void WB(sh2_state *sh2, offs_t A, UINT8 V) { if (A >= 0xe0000000) @@ -181,7 +188,7 @@ INLINE void WB(offs_t A, UINT8 V) memory_write_byte_32be(sh2->program, A & AM,V); } -INLINE void WW(offs_t A, UINT16 V) +INLINE void WW(sh2_state *sh2, offs_t A, UINT16 V) { if (A >= 0xe0000000) { @@ -201,7 +208,7 @@ INLINE void WW(offs_t A, UINT16 V) memory_write_word_32be(sh2->program, A & AM,V); } -INLINE void WL(offs_t A, UINT32 V) +INLINE void WL(sh2_state *sh2, offs_t A, UINT32 V) { if (A >= 0xe0000000) { @@ -225,7 +232,7 @@ INLINE void WL(offs_t A, UINT32 V) * 0011 nnnn mmmm 1100 1 - * ADD Rm,Rn */ -INLINE void ADD(UINT32 m, UINT32 n) +INLINE void ADD(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->r[n] += sh2->r[m]; } @@ -234,7 +241,7 @@ INLINE void ADD(UINT32 m, UINT32 n) * 0111 nnnn iiii iiii 1 - * ADD #imm,Rn */ -INLINE void ADDI(UINT32 i, UINT32 n) +INLINE void ADDI(sh2_state *sh2, UINT32 i, UINT32 n) { sh2->r[n] += (INT32)(INT16)(INT8)i; } @@ -243,7 +250,7 @@ INLINE void ADDI(UINT32 i, UINT32 n) * 0011 nnnn mmmm 1110 1 carry * ADDC Rm,Rn */ -INLINE void ADDC(UINT32 m, UINT32 n) +INLINE void ADDC(sh2_state *sh2, UINT32 m, UINT32 n) { UINT32 tmp0, tmp1; @@ -262,7 +269,7 @@ INLINE void ADDC(UINT32 m, UINT32 n) * 0011 nnnn mmmm 1111 1 overflow * ADDV Rm,Rn */ -INLINE void ADDV(UINT32 m, UINT32 n) +INLINE void ADDV(sh2_state *sh2, UINT32 m, UINT32 n) { INT32 dest, src, ans; @@ -296,7 +303,7 @@ INLINE void ADDV(UINT32 m, UINT32 n) * 0010 nnnn mmmm 1001 1 - * AND Rm,Rn */ -INLINE void AND(UINT32 m, UINT32 n) +INLINE void AND(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->r[n] &= sh2->r[m]; } @@ -306,7 +313,7 @@ INLINE void AND(UINT32 m, UINT32 n) * 1100 1001 iiii iiii 1 - * AND #imm,R0 */ -INLINE void ANDI(UINT32 i) +INLINE void ANDI(sh2_state *sh2, UINT32 i) { sh2->r[0] &= i; } @@ -315,27 +322,27 @@ INLINE void ANDI(UINT32 i) * 1100 1101 iiii iiii 1 - * AND.B #imm,@(R0,GBR) */ -INLINE void ANDM(UINT32 i) +INLINE void ANDM(sh2_state *sh2, UINT32 i) { UINT32 temp; sh2->ea = sh2->gbr + sh2->r[0]; - temp = i & RB( sh2->ea ); - WB( sh2->ea, temp ); - sh2_icount -= 2; + temp = i & RB( sh2, sh2->ea ); + WB( sh2, sh2->ea, temp ); + sh2->icount -= 2; } /* code cycles t-bit * 1000 1011 dddd dddd 3/1 - * BF disp8 */ -INLINE void BF(UINT32 d) +INLINE void BF(sh2_state *sh2, UINT32 d) { if ((sh2->sr & T) == 0) { INT32 disp = ((INT32)d << 24) >> 24; sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2; - sh2_icount -= 2; + sh2->icount -= 2; } } @@ -343,14 +350,14 @@ INLINE void BF(UINT32 d) * 1000 1111 dddd dddd 3/1 - * BFS disp8 */ -INLINE void BFS(UINT32 d) +INLINE void BFS(sh2_state *sh2, UINT32 d) { if ((sh2->sr & T) == 0) { INT32 disp = ((INT32)d << 24) >> 24; sh2->delay = sh2->pc; sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2; - sh2_icount--; + sh2->icount--; } } @@ -358,74 +365,74 @@ INLINE void BFS(UINT32 d) * 1010 dddd dddd dddd 2 - * BRA disp12 */ -INLINE void BRA(UINT32 d) +INLINE void BRA(sh2_state *sh2, UINT32 d) { INT32 disp = ((INT32)d << 20) >> 20; #if BUSY_LOOP_HACKS if (disp == -2) { - UINT32 next_opcode = RW(sh2->ppc & AM); + UINT32 next_opcode = RW( sh2, sh2->ppc & AM ); /* BRA $ * NOP */ if (next_opcode == 0x0009) - sh2_icount %= 3; /* cycles for BRA $ and NOP taken (3) */ + sh2->icount %= 3; /* cycles for BRA $ and NOP taken (3) */ } #endif sh2->delay = sh2->pc; sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2; - sh2_icount--; + sh2->icount--; } /* code cycles t-bit * 0000 mmmm 0010 0011 2 - * BRAF Rm */ -INLINE void BRAF(UINT32 m) +INLINE void BRAF(sh2_state *sh2, UINT32 m) { sh2->delay = sh2->pc; sh2->pc += sh2->r[m] + 2; - sh2_icount--; + sh2->icount--; } /* code cycles t-bit * 1011 dddd dddd dddd 2 - * BSR disp12 */ -INLINE void BSR(UINT32 d) +INLINE void BSR(sh2_state *sh2, UINT32 d) { INT32 disp = ((INT32)d << 20) >> 20; sh2->pr = sh2->pc + 2; sh2->delay = sh2->pc; sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2; - sh2_icount--; + sh2->icount--; } /* code cycles t-bit * 0000 mmmm 0000 0011 2 - * BSRF Rm */ -INLINE void BSRF(UINT32 m) +INLINE void BSRF(sh2_state *sh2, UINT32 m) { sh2->pr = sh2->pc + 2; sh2->delay = sh2->pc; sh2->pc += sh2->r[m] + 2; - sh2_icount--; + sh2->icount--; } /* code cycles t-bit * 1000 1001 dddd dddd 3/1 - * BT disp8 */ -INLINE void BT(UINT32 d) +INLINE void BT(sh2_state *sh2, UINT32 d) { if ((sh2->sr & T) != 0) { INT32 disp = ((INT32)d << 24) >> 24; sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2; - sh2_icount -= 2; + sh2->icount -= 2; } } @@ -433,14 +440,14 @@ INLINE void BT(UINT32 d) * 1000 1101 dddd dddd 2/1 - * BTS disp8 */ -INLINE void BTS(UINT32 d) +INLINE void BTS(sh2_state *sh2, UINT32 d) { if ((sh2->sr & T) != 0) { INT32 disp = ((INT32)d << 24) >> 24; sh2->delay = sh2->pc; sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2; - sh2_icount--; + sh2->icount--; } } @@ -448,7 +455,7 @@ INLINE void BTS(UINT32 d) * 0000 0000 0010 1000 1 - * CLRMAC */ -INLINE void CLRMAC(void) +INLINE void CLRMAC(sh2_state *sh2) { sh2->mach = 0; sh2->macl = 0; @@ -458,7 +465,7 @@ INLINE void CLRMAC(void) * 0000 0000 0000 1000 1 - * CLRT */ -INLINE void CLRT(void) +INLINE void CLRT(sh2_state *sh2) { sh2->sr &= ~T; } @@ -467,7 +474,7 @@ INLINE void CLRT(void) * 0011 nnnn mmmm 0000 1 comparison result * CMP_EQ Rm,Rn */ -INLINE void CMPEQ(UINT32 m, UINT32 n) +INLINE void CMPEQ(sh2_state *sh2, UINT32 m, UINT32 n) { if (sh2->r[n] == sh2->r[m]) sh2->sr |= T; @@ -479,7 +486,7 @@ INLINE void CMPEQ(UINT32 m, UINT32 n) * 0011 nnnn mmmm 0011 1 comparison result * CMP_GE Rm,Rn */ -INLINE void CMPGE(UINT32 m, UINT32 n) +INLINE void CMPGE(sh2_state *sh2, UINT32 m, UINT32 n) { if ((INT32) sh2->r[n] >= (INT32) sh2->r[m]) sh2->sr |= T; @@ -491,7 +498,7 @@ INLINE void CMPGE(UINT32 m, UINT32 n) * 0011 nnnn mmmm 0111 1 comparison result * CMP_GT Rm,Rn */ -INLINE void CMPGT(UINT32 m, UINT32 n) +INLINE void CMPGT(sh2_state *sh2, UINT32 m, UINT32 n) { if ((INT32) sh2->r[n] > (INT32) sh2->r[m]) sh2->sr |= T; @@ -503,7 +510,7 @@ INLINE void CMPGT(UINT32 m, UINT32 n) * 0011 nnnn mmmm 0110 1 comparison result * CMP_HI Rm,Rn */ -INLINE void CMPHI(UINT32 m, UINT32 n) +INLINE void CMPHI(sh2_state *sh2, UINT32 m, UINT32 n) { if ((UINT32) sh2->r[n] > (UINT32) sh2->r[m]) sh2->sr |= T; @@ -515,7 +522,7 @@ INLINE void CMPHI(UINT32 m, UINT32 n) * 0011 nnnn mmmm 0010 1 comparison result * CMP_HS Rm,Rn */ -INLINE void CMPHS(UINT32 m, UINT32 n) +INLINE void CMPHS(sh2_state *sh2, UINT32 m, UINT32 n) { if ((UINT32) sh2->r[n] >= (UINT32) sh2->r[m]) sh2->sr |= T; @@ -528,7 +535,7 @@ INLINE void CMPHS(UINT32 m, UINT32 n) * 0100 nnnn 0001 0101 1 comparison result * CMP_PL Rn */ -INLINE void CMPPL(UINT32 n) +INLINE void CMPPL(sh2_state *sh2, UINT32 n) { if ((INT32) sh2->r[n] > 0) sh2->sr |= T; @@ -540,7 +547,7 @@ INLINE void CMPPL(UINT32 n) * 0100 nnnn 0001 0001 1 comparison result * CMP_PZ Rn */ -INLINE void CMPPZ(UINT32 n) +INLINE void CMPPZ(sh2_state *sh2, UINT32 n) { if ((INT32) sh2->r[n] >= 0) sh2->sr |= T; @@ -552,7 +559,7 @@ INLINE void CMPPZ(UINT32 n) * 0010 nnnn mmmm 1100 1 comparison result * CMP_STR Rm,Rn */ -INLINE void CMPSTR(UINT32 m, UINT32 n) +INLINE void CMPSTR(sh2_state *sh2, UINT32 m, UINT32 n) { UINT32 temp; INT32 HH, HL, LH, LL; @@ -572,7 +579,7 @@ INLINE void CMPSTR(UINT32 m, UINT32 n) * 1000 1000 iiii iiii 1 comparison result * CMP/EQ #imm,R0 */ -INLINE void CMPIM(UINT32 i) +INLINE void CMPIM(sh2_state *sh2, UINT32 i) { UINT32 imm = (UINT32)(INT32)(INT16)(INT8)i; @@ -586,7 +593,7 @@ INLINE void CMPIM(UINT32 i) * 0010 nnnn mmmm 0111 1 calculation result * DIV0S Rm,Rn */ -INLINE void DIV0S(UINT32 m, UINT32 n) +INLINE void DIV0S(sh2_state *sh2, UINT32 m, UINT32 n) { if ((sh2->r[n] & 0x80000000) == 0) sh2->sr &= ~Q; @@ -606,7 +613,7 @@ INLINE void DIV0S(UINT32 m, UINT32 n) * 0000 0000 0001 1001 1 0 * DIV0U */ -INLINE void DIV0U(void) +INLINE void DIV0U(sh2_state *sh2) { sh2->sr &= ~(M | Q | T); } @@ -615,7 +622,7 @@ INLINE void DIV0U(void) * 0011 nnnn mmmm 0100 1 calculation result * DIV1 Rm,Rn */ -INLINE void DIV1(UINT32 m, UINT32 n) +INLINE void DIV1(sh2_state *sh2, UINT32 m, UINT32 n) { UINT32 tmp0; UINT32 old_q; @@ -707,7 +714,7 @@ INLINE void DIV1(UINT32 m, UINT32 n) } /* DMULS.L Rm,Rn */ -INLINE void DMULS(UINT32 m, UINT32 n) +INLINE void DMULS(sh2_state *sh2, UINT32 m, UINT32 n) { UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2; UINT32 temp0, temp1, temp2, temp3; @@ -752,11 +759,11 @@ INLINE void DMULS(UINT32 m, UINT32 n) } sh2->mach = Res2; sh2->macl = Res0; - sh2_icount--; + sh2->icount--; } /* DMULU.L Rm,Rn */ -INLINE void DMULU(UINT32 m, UINT32 n) +INLINE void DMULU(sh2_state *sh2, UINT32 m, UINT32 n) { UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2; UINT32 temp0, temp1, temp2, temp3; @@ -780,11 +787,11 @@ INLINE void DMULU(UINT32 m, UINT32 n) Res2 = Res2 + ((Res1 >> 16) & 0x0000ffff) + temp3; sh2->mach = Res2; sh2->macl = Res0; - sh2_icount--; + sh2->icount--; } /* DT Rn */ -INLINE void DT(UINT32 n) +INLINE void DT(sh2_state *sh2, UINT32 n) { sh2->r[n]--; if (sh2->r[n] == 0) @@ -793,16 +800,16 @@ INLINE void DT(UINT32 n) sh2->sr &= ~T; #if BUSY_LOOP_HACKS { - UINT32 next_opcode = RW(sh2->ppc & AM); + UINT32 next_opcode = RW( sh2, sh2->ppc & AM ); /* DT Rn * BF $-2 */ if (next_opcode == 0x8bfd) { - while (sh2->r[n] > 1 && sh2_icount > 4) + while (sh2->r[n] > 1 && sh2->icount > 4) { sh2->r[n]--; - sh2_icount -= 4; /* cycles for DT (1) and BF taken (3) */ + sh2->icount -= 4; /* cycles for DT (1) and BF taken (3) */ } } } @@ -810,145 +817,145 @@ INLINE void DT(UINT32 n) } /* EXTS.B Rm,Rn */ -INLINE void EXTSB(UINT32 m, UINT32 n) +INLINE void EXTSB(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->r[n] = ((INT32)sh2->r[m] << 24) >> 24; } /* EXTS.W Rm,Rn */ -INLINE void EXTSW(UINT32 m, UINT32 n) +INLINE void EXTSW(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->r[n] = ((INT32)sh2->r[m] << 16) >> 16; } /* EXTU.B Rm,Rn */ -INLINE void EXTUB(UINT32 m, UINT32 n) +INLINE void EXTUB(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->r[n] = sh2->r[m] & 0x000000ff; } /* EXTU.W Rm,Rn */ -INLINE void EXTUW(UINT32 m, UINT32 n) +INLINE void EXTUW(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->r[n] = sh2->r[m] & 0x0000ffff; } /* JMP @Rm */ -INLINE void JMP(UINT32 m) +INLINE void JMP(sh2_state *sh2, UINT32 m) { sh2->delay = sh2->pc; sh2->pc = sh2->ea = sh2->r[m]; } /* JSR @Rm */ -INLINE void JSR(UINT32 m) +INLINE void JSR(sh2_state *sh2, UINT32 m) { sh2->delay = sh2->pc; sh2->pr = sh2->pc + 2; sh2->pc = sh2->ea = sh2->r[m]; - sh2_icount--; + sh2->icount--; } /* LDC Rm,SR */ -INLINE void LDCSR(UINT32 m) +INLINE void LDCSR(sh2_state *sh2, UINT32 m) { sh2->sr = sh2->r[m] & FLAGS; sh2->test_irq = 1; } /* LDC Rm,GBR */ -INLINE void LDCGBR(UINT32 m) +INLINE void LDCGBR(sh2_state *sh2, UINT32 m) { sh2->gbr = sh2->r[m]; } /* LDC Rm,VBR */ -INLINE void LDCVBR(UINT32 m) +INLINE void LDCVBR(sh2_state *sh2, UINT32 m) { sh2->vbr = sh2->r[m]; } /* LDC.L @Rm+,SR */ -INLINE void LDCMSR(UINT32 m) +INLINE void LDCMSR(sh2_state *sh2, UINT32 m) { sh2->ea = sh2->r[m]; - sh2->sr = RL( sh2->ea ) & FLAGS; + sh2->sr = RL( sh2, sh2->ea ) & FLAGS; sh2->r[m] += 4; - sh2_icount -= 2; + sh2->icount -= 2; sh2->test_irq = 1; } /* LDC.L @Rm+,GBR */ -INLINE void LDCMGBR(UINT32 m) +INLINE void LDCMGBR(sh2_state *sh2, UINT32 m) { sh2->ea = sh2->r[m]; - sh2->gbr = RL( sh2->ea ); + sh2->gbr = RL( sh2, sh2->ea ); sh2->r[m] += 4; - sh2_icount -= 2; + sh2->icount -= 2; } /* LDC.L @Rm+,VBR */ -INLINE void LDCMVBR(UINT32 m) +INLINE void LDCMVBR(sh2_state *sh2, UINT32 m) { sh2->ea = sh2->r[m]; - sh2->vbr = RL( sh2->ea ); + sh2->vbr = RL( sh2, sh2->ea ); sh2->r[m] += 4; - sh2_icount -= 2; + sh2->icount -= 2; } /* LDS Rm,MACH */ -INLINE void LDSMACH(UINT32 m) +INLINE void LDSMACH(sh2_state *sh2, UINT32 m) { sh2->mach = sh2->r[m]; } /* LDS Rm,MACL */ -INLINE void LDSMACL(UINT32 m) +INLINE void LDSMACL(sh2_state *sh2, UINT32 m) { sh2->macl = sh2->r[m]; } /* LDS Rm,PR */ -INLINE void LDSPR(UINT32 m) +INLINE void LDSPR(sh2_state *sh2, UINT32 m) { sh2->pr = sh2->r[m]; } /* LDS.L @Rm+,MACH */ -INLINE void LDSMMACH(UINT32 m) +INLINE void LDSMMACH(sh2_state *sh2, UINT32 m) { sh2->ea = sh2->r[m]; - sh2->mach = RL( sh2->ea ); + sh2->mach = RL( sh2, sh2->ea ); sh2->r[m] += 4; } /* LDS.L @Rm+,MACL */ -INLINE void LDSMMACL(UINT32 m) +INLINE void LDSMMACL(sh2_state *sh2, UINT32 m) { sh2->ea = sh2->r[m]; - sh2->macl = RL( sh2->ea ); + sh2->macl = RL( sh2, sh2->ea ); sh2->r[m] += 4; } /* LDS.L @Rm+,PR */ -INLINE void LDSMPR(UINT32 m) +INLINE void LDSMPR(sh2_state *sh2, UINT32 m) { sh2->ea = sh2->r[m]; - sh2->pr = RL( sh2->ea ); + sh2->pr = RL( sh2, sh2->ea ); sh2->r[m] += 4; } /* MAC.L @Rm+,@Rn+ */ -INLINE void MAC_L(UINT32 m, UINT32 n) +INLINE void MAC_L(sh2_state *sh2, UINT32 m, UINT32 n) { UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2; UINT32 temp0, temp1, temp2, temp3; INT32 tempm, tempn, fnLmL; - tempn = (INT32) RL( sh2->r[n] ); + tempn = (INT32) RL( sh2, sh2->r[n] ); sh2->r[n] += 4; - tempm = (INT32) RL( sh2->r[m] ); + tempm = (INT32) RL( sh2, sh2->r[m] ); sh2->r[m] += 4; if ((INT32) (tempn ^ tempm) < 0) fnLmL = -1; @@ -1013,18 +1020,18 @@ INLINE void MAC_L(UINT32 m, UINT32 n) sh2->mach = Res2; sh2->macl = Res0; } - sh2_icount -= 2; + sh2->icount -= 2; } /* MAC.W @Rm+,@Rn+ */ -INLINE void MAC_W(UINT32 m, UINT32 n) +INLINE void MAC_W(sh2_state *sh2, UINT32 m, UINT32 n) { INT32 tempm, tempn, dest, src, ans; UINT32 templ; - tempn = (INT32) RW( sh2->r[n] ); + tempn = (INT32) RW( sh2, sh2->r[n] ); sh2->r[n] += 2; - tempm = (INT32) RW( sh2->r[m] ); + tempm = (INT32) RW( sh2, sh2->r[m] ); sh2->r[m] += 2; templ = sh2->macl; tempm = ((INT32) (short) tempn * (INT32) (short) tempm); @@ -1065,271 +1072,271 @@ INLINE void MAC_W(UINT32 m, UINT32 n) if (templ > sh2->macl) sh2->mach += 1; } - sh2_icount -= 2; + sh2->icount -= 2; } /* MOV Rm,Rn */ -INLINE void MOV(UINT32 m, UINT32 n) +INLINE void MOV(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->r[n] = sh2->r[m]; } /* MOV.B Rm,@Rn */ -INLINE void MOVBS(UINT32 m, UINT32 n) +INLINE void MOVBS(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->ea = sh2->r[n]; - WB( sh2->ea, sh2->r[m] & 0x000000ff); + WB( sh2, sh2->ea, sh2->r[m] & 0x000000ff); } /* MOV.W Rm,@Rn */ -INLINE void MOVWS(UINT32 m, UINT32 n) +INLINE void MOVWS(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->ea = sh2->r[n]; - WW( sh2->ea, sh2->r[m] & 0x0000ffff); + WW( sh2, sh2->ea, sh2->r[m] & 0x0000ffff); } /* MOV.L Rm,@Rn */ -INLINE void MOVLS(UINT32 m, UINT32 n) +INLINE void MOVLS(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->ea = sh2->r[n]; - WL( sh2->ea, sh2->r[m] ); + WL( sh2, sh2->ea, sh2->r[m] ); } /* MOV.B @Rm,Rn */ -INLINE void MOVBL(UINT32 m, UINT32 n) +INLINE void MOVBL(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->ea = sh2->r[m]; - sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->ea ); + sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2, sh2->ea ); } /* MOV.W @Rm,Rn */ -INLINE void MOVWL(UINT32 m, UINT32 n) +INLINE void MOVWL(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->ea = sh2->r[m]; - sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2->ea ); + sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2, sh2->ea ); } /* MOV.L @Rm,Rn */ -INLINE void MOVLL(UINT32 m, UINT32 n) +INLINE void MOVLL(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->ea = sh2->r[m]; - sh2->r[n] = RL( sh2->ea ); + sh2->r[n] = RL( sh2, sh2->ea ); } /* MOV.B Rm,@-Rn */ -INLINE void MOVBM(UINT32 m, UINT32 n) +INLINE void MOVBM(sh2_state *sh2, UINT32 m, UINT32 n) { /* SMG : bug fix, was reading sh2->r[n] */ UINT32 data = sh2->r[m] & 0x000000ff; sh2->r[n] -= 1; - WB( sh2->r[n], data ); + WB( sh2, sh2->r[n], data ); } /* MOV.W Rm,@-Rn */ -INLINE void MOVWM(UINT32 m, UINT32 n) +INLINE void MOVWM(sh2_state *sh2, UINT32 m, UINT32 n) { UINT32 data = sh2->r[m] & 0x0000ffff; sh2->r[n] -= 2; - WW( sh2->r[n], data ); + WW( sh2, sh2->r[n], data ); } /* MOV.L Rm,@-Rn */ -INLINE void MOVLM(UINT32 m, UINT32 n) +INLINE void MOVLM(sh2_state *sh2, UINT32 m, UINT32 n) { UINT32 data = sh2->r[m]; sh2->r[n] -= 4; - WL( sh2->r[n], data ); + WL( sh2, sh2->r[n], data ); } /* MOV.B @Rm+,Rn */ -INLINE void MOVBP(UINT32 m, UINT32 n) +INLINE void MOVBP(sh2_state *sh2, UINT32 m, UINT32 n) { - sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->r[m] ); + sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2, sh2->r[m] ); if (n != m) sh2->r[m] += 1; } /* MOV.W @Rm+,Rn */ -INLINE void MOVWP(UINT32 m, UINT32 n) +INLINE void MOVWP(sh2_state *sh2, UINT32 m, UINT32 n) { - sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2->r[m] ); + sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2, sh2->r[m] ); if (n != m) sh2->r[m] += 2; } /* MOV.L @Rm+,Rn */ -INLINE void MOVLP(UINT32 m, UINT32 n) +INLINE void MOVLP(sh2_state *sh2, UINT32 m, UINT32 n) { - sh2->r[n] = RL( sh2->r[m] ); + sh2->r[n] = RL( sh2, sh2->r[m] ); if (n != m) sh2->r[m] += 4; } /* MOV.B Rm,@(R0,Rn) */ -INLINE void MOVBS0(UINT32 m, UINT32 n) +INLINE void MOVBS0(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->ea = sh2->r[n] + sh2->r[0]; - WB( sh2->ea, sh2->r[m] & 0x000000ff ); + WB( sh2, sh2->ea, sh2->r[m] & 0x000000ff ); } /* MOV.W Rm,@(R0,Rn) */ -INLINE void MOVWS0(UINT32 m, UINT32 n) +INLINE void MOVWS0(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->ea = sh2->r[n] + sh2->r[0]; - WW( sh2->ea, sh2->r[m] & 0x0000ffff ); + WW( sh2, sh2->ea, sh2->r[m] & 0x0000ffff ); } /* MOV.L Rm,@(R0,Rn) */ -INLINE void MOVLS0(UINT32 m, UINT32 n) +INLINE void MOVLS0(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->ea = sh2->r[n] + sh2->r[0]; - WL( sh2->ea, sh2->r[m] ); + WL( sh2, sh2->ea, sh2->r[m] ); } /* MOV.B @(R0,Rm),Rn */ -INLINE void MOVBL0(UINT32 m, UINT32 n) +INLINE void MOVBL0(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->ea = sh2->r[m] + sh2->r[0]; - sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->ea ); + sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2, sh2->ea ); } /* MOV.W @(R0,Rm),Rn */ -INLINE void MOVWL0(UINT32 m, UINT32 n) +INLINE void MOVWL0(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->ea = sh2->r[m] + sh2->r[0]; - sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2->ea ); + sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2, sh2->ea ); } /* MOV.L @(R0,Rm),Rn */ -INLINE void MOVLL0(UINT32 m, UINT32 n) +INLINE void MOVLL0(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->ea = sh2->r[m] + sh2->r[0]; - sh2->r[n] = RL( sh2->ea ); + sh2->r[n] = RL( sh2, sh2->ea ); } /* MOV #imm,Rn */ -INLINE void MOVI(UINT32 i, UINT32 n) +INLINE void MOVI(sh2_state *sh2, UINT32 i, UINT32 n) { sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) i; } /* MOV.W @(disp8,PC),Rn */ -INLINE void MOVWI(UINT32 d, UINT32 n) +INLINE void MOVWI(sh2_state *sh2, UINT32 d, UINT32 n) { UINT32 disp = d & 0xff; sh2->ea = sh2->pc + disp * 2 + 2; - sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2->ea ); + sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2, sh2->ea ); } /* MOV.L @(disp8,PC),Rn */ -INLINE void MOVLI(UINT32 d, UINT32 n) +INLINE void MOVLI(sh2_state *sh2, UINT32 d, UINT32 n) { UINT32 disp = d & 0xff; sh2->ea = ((sh2->pc + 2) & ~3) + disp * 4; - sh2->r[n] = RL( sh2->ea ); + sh2->r[n] = RL( sh2, sh2->ea ); } /* MOV.B @(disp8,GBR),R0 */ -INLINE void MOVBLG(UINT32 d) +INLINE void MOVBLG(sh2_state *sh2, UINT32 d) { UINT32 disp = d & 0xff; sh2->ea = sh2->gbr + disp; - sh2->r[0] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->ea ); + sh2->r[0] = (UINT32)(INT32)(INT16)(INT8) RB( sh2, sh2->ea ); } /* MOV.W @(disp8,GBR),R0 */ -INLINE void MOVWLG(UINT32 d) +INLINE void MOVWLG(sh2_state *sh2, UINT32 d) { UINT32 disp = d & 0xff; sh2->ea = sh2->gbr + disp * 2; - sh2->r[0] = (INT32)(INT16) RW( sh2->ea ); + sh2->r[0] = (INT32)(INT16) RW( sh2, sh2->ea ); } /* MOV.L @(disp8,GBR),R0 */ -INLINE void MOVLLG(UINT32 d) +INLINE void MOVLLG(sh2_state *sh2, UINT32 d) { UINT32 disp = d & 0xff; sh2->ea = sh2->gbr + disp * 4; - sh2->r[0] = RL( sh2->ea ); + sh2->r[0] = RL( sh2, sh2->ea ); } /* MOV.B R0,@(disp8,GBR) */ -INLINE void MOVBSG(UINT32 d) +INLINE void MOVBSG(sh2_state *sh2, UINT32 d) { UINT32 disp = d & 0xff; sh2->ea = sh2->gbr + disp; - WB( sh2->ea, sh2->r[0] & 0x000000ff ); + WB( sh2, sh2->ea, sh2->r[0] & 0x000000ff ); } /* MOV.W R0,@(disp8,GBR) */ -INLINE void MOVWSG(UINT32 d) +INLINE void MOVWSG(sh2_state *sh2, UINT32 d) { UINT32 disp = d & 0xff; sh2->ea = sh2->gbr + disp * 2; - WW( sh2->ea, sh2->r[0] & 0x0000ffff ); + WW( sh2, sh2->ea, sh2->r[0] & 0x0000ffff ); } /* MOV.L R0,@(disp8,GBR) */ -INLINE void MOVLSG(UINT32 d) +INLINE void MOVLSG(sh2_state *sh2, UINT32 d) { UINT32 disp = d & 0xff; sh2->ea = sh2->gbr + disp * 4; - WL( sh2->ea, sh2->r[0] ); + WL( sh2, sh2->ea, sh2->r[0] ); } /* MOV.B R0,@(disp4,Rn) */ -INLINE void MOVBS4(UINT32 d, UINT32 n) +INLINE void MOVBS4(sh2_state *sh2, UINT32 d, UINT32 n) { UINT32 disp = d & 0x0f; sh2->ea = sh2->r[n] + disp; - WB( sh2->ea, sh2->r[0] & 0x000000ff ); + WB( sh2, sh2->ea, sh2->r[0] & 0x000000ff ); } /* MOV.W R0,@(disp4,Rn) */ -INLINE void MOVWS4(UINT32 d, UINT32 n) +INLINE void MOVWS4(sh2_state *sh2, UINT32 d, UINT32 n) { UINT32 disp = d & 0x0f; sh2->ea = sh2->r[n] + disp * 2; - WW( sh2->ea, sh2->r[0] & 0x0000ffff ); + WW( sh2, sh2->ea, sh2->r[0] & 0x0000ffff ); } /* MOV.L Rm,@(disp4,Rn) */ -INLINE void MOVLS4(UINT32 m, UINT32 d, UINT32 n) +INLINE void MOVLS4(sh2_state *sh2, UINT32 m, UINT32 d, UINT32 n) { UINT32 disp = d & 0x0f; sh2->ea = sh2->r[n] + disp * 4; - WL( sh2->ea, sh2->r[m] ); + WL( sh2, sh2->ea, sh2->r[m] ); } /* MOV.B @(disp4,Rm),R0 */ -INLINE void MOVBL4(UINT32 m, UINT32 d) +INLINE void MOVBL4(sh2_state *sh2, UINT32 m, UINT32 d) { UINT32 disp = d & 0x0f; sh2->ea = sh2->r[m] + disp; - sh2->r[0] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->ea ); + sh2->r[0] = (UINT32)(INT32)(INT16)(INT8) RB( sh2, sh2->ea ); } /* MOV.W @(disp4,Rm),R0 */ -INLINE void MOVWL4(UINT32 m, UINT32 d) +INLINE void MOVWL4(sh2_state *sh2, UINT32 m, UINT32 d) { UINT32 disp = d & 0x0f; sh2->ea = sh2->r[m] + disp * 2; - sh2->r[0] = (UINT32)(INT32)(INT16) RW( sh2->ea ); + sh2->r[0] = (UINT32)(INT32)(INT16) RW( sh2, sh2->ea ); } /* MOV.L @(disp4,Rm),Rn */ -INLINE void MOVLL4(UINT32 m, UINT32 d, UINT32 n) +INLINE void MOVLL4(sh2_state *sh2, UINT32 m, UINT32 d, UINT32 n) { UINT32 disp = d & 0x0f; sh2->ea = sh2->r[m] + disp * 4; - sh2->r[n] = RL( sh2->ea ); + sh2->r[n] = RL( sh2, sh2->ea ); } /* MOVA @(disp8,PC),R0 */ -INLINE void MOVA(UINT32 d) +INLINE void MOVA(sh2_state *sh2, UINT32 d) { UINT32 disp = d & 0xff; sh2->ea = ((sh2->pc + 2) & ~3) + disp * 4; @@ -1337,38 +1344,38 @@ INLINE void MOVA(UINT32 d) } /* MOVT Rn */ -INLINE void MOVT(UINT32 n) +INLINE void MOVT(sh2_state *sh2, UINT32 n) { sh2->r[n] = sh2->sr & T; } /* MUL.L Rm,Rn */ -INLINE void MULL(UINT32 m, UINT32 n) +INLINE void MULL(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->macl = sh2->r[n] * sh2->r[m]; - sh2_icount--; + sh2->icount--; } /* MULS Rm,Rn */ -INLINE void MULS(UINT32 m, UINT32 n) +INLINE void MULS(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->macl = (INT16) sh2->r[n] * (INT16) sh2->r[m]; } /* MULU Rm,Rn */ -INLINE void MULU(UINT32 m, UINT32 n) +INLINE void MULU(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->macl = (UINT16) sh2->r[n] * (UINT16) sh2->r[m]; } /* NEG Rm,Rn */ -INLINE void NEG(UINT32 m, UINT32 n) +INLINE void NEG(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->r[n] = 0 - sh2->r[m]; } /* NEGC Rm,Rn */ -INLINE void NEGC(UINT32 m, UINT32 n) +INLINE void NEGC(sh2_state *sh2, UINT32 m, UINT32 n) { UINT32 temp; @@ -1386,37 +1393,37 @@ INLINE void NOP(void) } /* NOT Rm,Rn */ -INLINE void NOT(UINT32 m, UINT32 n) +INLINE void NOT(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->r[n] = ~sh2->r[m]; } /* OR Rm,Rn */ -INLINE void OR(UINT32 m, UINT32 n) +INLINE void OR(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->r[n] |= sh2->r[m]; } /* OR #imm,R0 */ -INLINE void ORI(UINT32 i) +INLINE void ORI(sh2_state *sh2, UINT32 i) { sh2->r[0] |= i; - sh2_icount -= 2; + sh2->icount -= 2; } /* OR.B #imm,@(R0,GBR) */ -INLINE void ORM(UINT32 i) +INLINE void ORM(sh2_state *sh2, UINT32 i) { UINT32 temp; sh2->ea = sh2->gbr + sh2->r[0]; - temp = RB( sh2->ea ); + temp = RB( sh2, sh2->ea ); temp |= i; - WB( sh2->ea, temp ); + WB( sh2, sh2->ea, temp ); } /* ROTCL Rn */ -INLINE void ROTCL(UINT32 n) +INLINE void ROTCL(sh2_state *sh2, UINT32 n) { UINT32 temp; @@ -1426,7 +1433,7 @@ INLINE void ROTCL(UINT32 n) } /* ROTCR Rn */ -INLINE void ROTCR(UINT32 n) +INLINE void ROTCR(sh2_state *sh2, UINT32 n) { UINT32 temp; temp = (sh2->sr & T) << 31; @@ -1438,214 +1445,214 @@ INLINE void ROTCR(UINT32 n) } /* ROTL Rn */ -INLINE void ROTL(UINT32 n) +INLINE void ROTL(sh2_state *sh2, UINT32 n) { sh2->sr = (sh2->sr & ~T) | ((sh2->r[n] >> 31) & T); sh2->r[n] = (sh2->r[n] << 1) | (sh2->r[n] >> 31); } /* ROTR Rn */ -INLINE void ROTR(UINT32 n) +INLINE void ROTR(sh2_state *sh2, UINT32 n) { sh2->sr = (sh2->sr & ~T) | (sh2->r[n] & T); sh2->r[n] = (sh2->r[n] >> 1) | (sh2->r[n] << 31); } /* RTE */ -INLINE void RTE(void) +INLINE void RTE(sh2_state *sh2) { sh2->ea = sh2->r[15]; sh2->delay = sh2->pc; - sh2->pc = RL( sh2->ea ); + sh2->pc = RL( sh2, sh2->ea ); sh2->r[15] += 4; sh2->ea = sh2->r[15]; - sh2->sr = RL( sh2->ea ) & FLAGS; + sh2->sr = RL( sh2, sh2->ea ) & FLAGS; sh2->r[15] += 4; - sh2_icount -= 3; + sh2->icount -= 3; sh2->test_irq = 1; } /* RTS */ -INLINE void RTS(void) +INLINE void RTS(sh2_state *sh2) { sh2->delay = sh2->pc; sh2->pc = sh2->ea = sh2->pr; - sh2_icount--; + sh2->icount--; } /* SETT */ -INLINE void SETT(void) +INLINE void SETT(sh2_state *sh2) { sh2->sr |= T; } /* SHAL Rn (same as SHLL) */ -INLINE void SHAL(UINT32 n) +INLINE void SHAL(sh2_state *sh2, UINT32 n) { sh2->sr = (sh2->sr & ~T) | ((sh2->r[n] >> 31) & T); sh2->r[n] <<= 1; } /* SHAR Rn */ -INLINE void SHAR(UINT32 n) +INLINE void SHAR(sh2_state *sh2, UINT32 n) { sh2->sr = (sh2->sr & ~T) | (sh2->r[n] & T); sh2->r[n] = (UINT32)((INT32)sh2->r[n] >> 1); } /* SHLL Rn (same as SHAL) */ -INLINE void SHLL(UINT32 n) +INLINE void SHLL(sh2_state *sh2, UINT32 n) { sh2->sr = (sh2->sr & ~T) | ((sh2->r[n] >> 31) & T); sh2->r[n] <<= 1; } /* SHLL2 Rn */ -INLINE void SHLL2(UINT32 n) +INLINE void SHLL2(sh2_state *sh2, UINT32 n) { sh2->r[n] <<= 2; } /* SHLL8 Rn */ -INLINE void SHLL8(UINT32 n) +INLINE void SHLL8(sh2_state *sh2, UINT32 n) { sh2->r[n] <<= 8; } /* SHLL16 Rn */ -INLINE void SHLL16(UINT32 n) +INLINE void SHLL16(sh2_state *sh2, UINT32 n) { sh2->r[n] <<= 16; } /* SHLR Rn */ -INLINE void SHLR(UINT32 n) +INLINE void SHLR(sh2_state *sh2, UINT32 n) { sh2->sr = (sh2->sr & ~T) | (sh2->r[n] & T); sh2->r[n] >>= 1; } /* SHLR2 Rn */ -INLINE void SHLR2(UINT32 n) +INLINE void SHLR2(sh2_state *sh2, UINT32 n) { sh2->r[n] >>= 2; } /* SHLR8 Rn */ -INLINE void SHLR8(UINT32 n) +INLINE void SHLR8(sh2_state *sh2, UINT32 n) { sh2->r[n] >>= 8; } /* SHLR16 Rn */ -INLINE void SHLR16(UINT32 n) +INLINE void SHLR16(sh2_state *sh2, UINT32 n) { sh2->r[n] >>= 16; } /* SLEEP */ -INLINE void SLEEP(void) +INLINE void SLEEP(sh2_state *sh2) { sh2->pc -= 2; - sh2_icount -= 2; + sh2->icount -= 2; /* Wait_for_exception; */ } /* STC SR,Rn */ -INLINE void STCSR(UINT32 n) +INLINE void STCSR(sh2_state *sh2, UINT32 n) { sh2->r[n] = sh2->sr; } /* STC GBR,Rn */ -INLINE void STCGBR(UINT32 n) +INLINE void STCGBR(sh2_state *sh2, UINT32 n) { sh2->r[n] = sh2->gbr; } /* STC VBR,Rn */ -INLINE void STCVBR(UINT32 n) +INLINE void STCVBR(sh2_state *sh2, UINT32 n) { sh2->r[n] = sh2->vbr; } /* STC.L SR,@-Rn */ -INLINE void STCMSR(UINT32 n) +INLINE void STCMSR(sh2_state *sh2, UINT32 n) { sh2->r[n] -= 4; sh2->ea = sh2->r[n]; - WL( sh2->ea, sh2->sr ); - sh2_icount--; + WL( sh2, sh2->ea, sh2->sr ); + sh2->icount--; } /* STC.L GBR,@-Rn */ -INLINE void STCMGBR(UINT32 n) +INLINE void STCMGBR(sh2_state *sh2, UINT32 n) { sh2->r[n] -= 4; sh2->ea = sh2->r[n]; - WL( sh2->ea, sh2->gbr ); - sh2_icount--; + WL( sh2, sh2->ea, sh2->gbr ); + sh2->icount--; } /* STC.L VBR,@-Rn */ -INLINE void STCMVBR(UINT32 n) +INLINE void STCMVBR(sh2_state *sh2, UINT32 n) { sh2->r[n] -= 4; sh2->ea = sh2->r[n]; - WL( sh2->ea, sh2->vbr ); - sh2_icount--; + WL( sh2, sh2->ea, sh2->vbr ); + sh2->icount--; } /* STS MACH,Rn */ -INLINE void STSMACH(UINT32 n) +INLINE void STSMACH(sh2_state *sh2, UINT32 n) { sh2->r[n] = sh2->mach; } /* STS MACL,Rn */ -INLINE void STSMACL(UINT32 n) +INLINE void STSMACL(sh2_state *sh2, UINT32 n) { sh2->r[n] = sh2->macl; } /* STS PR,Rn */ -INLINE void STSPR(UINT32 n) +INLINE void STSPR(sh2_state *sh2, UINT32 n) { sh2->r[n] = sh2->pr; } /* STS.L MACH,@-Rn */ -INLINE void STSMMACH(UINT32 n) +INLINE void STSMMACH(sh2_state *sh2, UINT32 n) { sh2->r[n] -= 4; sh2->ea = sh2->r[n]; - WL( sh2->ea, sh2->mach ); + WL( sh2, sh2->ea, sh2->mach ); } /* STS.L MACL,@-Rn */ -INLINE void STSMMACL(UINT32 n) +INLINE void STSMMACL(sh2_state *sh2, UINT32 n) { sh2->r[n] -= 4; sh2->ea = sh2->r[n]; - WL( sh2->ea, sh2->macl ); + WL( sh2, sh2->ea, sh2->macl ); } /* STS.L PR,@-Rn */ -INLINE void STSMPR(UINT32 n) +INLINE void STSMPR(sh2_state *sh2, UINT32 n) { sh2->r[n] -= 4; sh2->ea = sh2->r[n]; - WL( sh2->ea, sh2->pr ); + WL( sh2, sh2->ea, sh2->pr ); } /* SUB Rm,Rn */ -INLINE void SUB(UINT32 m, UINT32 n) +INLINE void SUB(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->r[n] -= sh2->r[m]; } /* SUBC Rm,Rn */ -INLINE void SUBC(UINT32 m, UINT32 n) +INLINE void SUBC(sh2_state *sh2, UINT32 m, UINT32 n) { UINT32 tmp0, tmp1; @@ -1661,7 +1668,7 @@ INLINE void SUBC(UINT32 m, UINT32 n) } /* SUBV Rm,Rn */ -INLINE void SUBV(UINT32 m, UINT32 n) +INLINE void SUBV(sh2_state *sh2, UINT32 m, UINT32 n) { INT32 dest, src, ans; @@ -1692,7 +1699,7 @@ INLINE void SUBV(UINT32 m, UINT32 n) } /* SWAP.B Rm,Rn */ -INLINE void SWAPB(UINT32 m, UINT32 n) +INLINE void SWAPB(sh2_state *sh2, UINT32 m, UINT32 n) { UINT32 temp0, temp1; @@ -1703,7 +1710,7 @@ INLINE void SWAPB(UINT32 m, UINT32 n) } /* SWAP.W Rm,Rn */ -INLINE void SWAPW(UINT32 m, UINT32 n) +INLINE void SWAPW(sh2_state *sh2, UINT32 m, UINT32 n) { UINT32 temp; @@ -1712,41 +1719,41 @@ INLINE void SWAPW(UINT32 m, UINT32 n) } /* TAS.B @Rn */ -INLINE void TAS(UINT32 n) +INLINE void TAS(sh2_state *sh2, UINT32 n) { UINT32 temp; sh2->ea = sh2->r[n]; /* Bus Lock enable */ - temp = RB( sh2->ea ); + temp = RB( sh2, sh2->ea ); if (temp == 0) sh2->sr |= T; else sh2->sr &= ~T; temp |= 0x80; /* Bus Lock disable */ - WB( sh2->ea, temp ); - sh2_icount -= 3; + WB( sh2, sh2->ea, temp ); + sh2->icount -= 3; } /* TRAPA #imm */ -INLINE void TRAPA(UINT32 i) +INLINE void TRAPA(sh2_state *sh2, UINT32 i) { UINT32 imm = i & 0xff; sh2->ea = sh2->vbr + imm * 4; sh2->r[15] -= 4; - WL( sh2->r[15], sh2->sr ); + WL( sh2, sh2->r[15], sh2->sr ); sh2->r[15] -= 4; - WL( sh2->r[15], sh2->pc ); + WL( sh2, sh2->r[15], sh2->pc ); - sh2->pc = RL( sh2->ea ); + sh2->pc = RL( sh2, sh2->ea ); - sh2_icount -= 7; + sh2->icount -= 7; } /* TST Rm,Rn */ -INLINE void TST(UINT32 m, UINT32 n) +INLINE void TST(sh2_state *sh2, UINT32 m, UINT32 n) { if ((sh2->r[n] & sh2->r[m]) == 0) sh2->sr |= T; @@ -1755,7 +1762,7 @@ INLINE void TST(UINT32 m, UINT32 n) } /* TST #imm,R0 */ -INLINE void TSTI(UINT32 i) +INLINE void TSTI(sh2_state *sh2, UINT32 i) { UINT32 imm = i & 0xff; @@ -1766,46 +1773,46 @@ INLINE void TSTI(UINT32 i) } /* TST.B #imm,@(R0,GBR) */ -INLINE void TSTM(UINT32 i) +INLINE void TSTM(sh2_state *sh2, UINT32 i) { UINT32 imm = i & 0xff; sh2->ea = sh2->gbr + sh2->r[0]; - if ((imm & RB( sh2->ea )) == 0) + if ((imm & RB( sh2, sh2->ea )) == 0) sh2->sr |= T; else sh2->sr &= ~T; - sh2_icount -= 2; + sh2->icount -= 2; } /* XOR Rm,Rn */ -INLINE void XOR(UINT32 m, UINT32 n) +INLINE void XOR(sh2_state *sh2, UINT32 m, UINT32 n) { sh2->r[n] ^= sh2->r[m]; } /* XOR #imm,R0 */ -INLINE void XORI(UINT32 i) +INLINE void XORI(sh2_state *sh2, UINT32 i) { UINT32 imm = i & 0xff; sh2->r[0] ^= imm; } /* XOR.B #imm,@(R0,GBR) */ -INLINE void XORM(UINT32 i) +INLINE void XORM(sh2_state *sh2, UINT32 i) { UINT32 imm = i & 0xff; UINT32 temp; sh2->ea = sh2->gbr + sh2->r[0]; - temp = RB( sh2->ea ); + temp = RB( sh2, sh2->ea ); temp ^= imm; - WB( sh2->ea, temp ); - sh2_icount -= 2; + WB( sh2, sh2->ea, temp ); + sh2->icount -= 2; } /* XTRCT Rm,Rn */ -INLINE void XTRCT(UINT32 m, UINT32 n) +INLINE void XTRCT(sh2_state *sh2, UINT32 m, UINT32 n) { UINT32 temp; @@ -1818,75 +1825,75 @@ INLINE void XTRCT(UINT32 m, UINT32 n) * OPCODE DISPATCHERS *****************************************************************************/ -INLINE void op0000(UINT16 opcode) +INLINE void op0000(sh2_state *sh2, UINT16 opcode) { switch (opcode & 0x3F) { case 0x00: NOP(); break; case 0x01: NOP(); break; - case 0x02: STCSR(Rn); break; - case 0x03: BSRF(Rn); break; - case 0x04: MOVBS0(Rm, Rn); break; - case 0x05: MOVWS0(Rm, Rn); break; - case 0x06: MOVLS0(Rm, Rn); break; - case 0x07: MULL(Rm, Rn); break; - case 0x08: CLRT(); break; + case 0x02: STCSR(sh2, Rn); break; + case 0x03: BSRF(sh2, Rn); break; + case 0x04: MOVBS0(sh2, Rm, Rn); break; + case 0x05: MOVWS0(sh2, Rm, Rn); break; + case 0x06: MOVLS0(sh2, Rm, Rn); break; + case 0x07: MULL(sh2, Rm, Rn); break; + case 0x08: CLRT(sh2); break; case 0x09: NOP(); break; - case 0x0a: STSMACH(Rn); break; - case 0x0b: RTS(); break; - case 0x0c: MOVBL0(Rm, Rn); break; - case 0x0d: MOVWL0(Rm, Rn); break; - case 0x0e: MOVLL0(Rm, Rn); break; - case 0x0f: MAC_L(Rm, Rn); break; + case 0x0a: STSMACH(sh2, Rn); break; + case 0x0b: RTS(sh2); break; + case 0x0c: MOVBL0(sh2, Rm, Rn); break; + case 0x0d: MOVWL0(sh2, Rm, Rn); break; + case 0x0e: MOVLL0(sh2, Rm, Rn); break; + case 0x0f: MAC_L(sh2, Rm, Rn); break; case 0x10: NOP(); break; case 0x11: NOP(); break; - case 0x12: STCGBR(Rn); break; + case 0x12: STCGBR(sh2, Rn); break; case 0x13: NOP(); break; - case 0x14: MOVBS0(Rm, Rn); break; - case 0x15: MOVWS0(Rm, Rn); break; - case 0x16: MOVLS0(Rm, Rn); break; - case 0x17: MULL(Rm, Rn); break; - case 0x18: SETT(); break; - case 0x19: DIV0U(); break; - case 0x1a: STSMACL(Rn); break; - case 0x1b: SLEEP(); break; - case 0x1c: MOVBL0(Rm, Rn); break; - case 0x1d: MOVWL0(Rm, Rn); break; - case 0x1e: MOVLL0(Rm, Rn); break; - case 0x1f: MAC_L(Rm, Rn); break; + case 0x14: MOVBS0(sh2, Rm, Rn); break; + case 0x15: MOVWS0(sh2, Rm, Rn); break; + case 0x16: MOVLS0(sh2, Rm, Rn); break; + case 0x17: MULL(sh2, Rm, Rn); break; + case 0x18: SETT(sh2); break; + case 0x19: DIV0U(sh2); break; + case 0x1a: STSMACL(sh2, Rn); break; + case 0x1b: SLEEP(sh2); break; + case 0x1c: MOVBL0(sh2, Rm, Rn); break; + case 0x1d: MOVWL0(sh2, Rm, Rn); break; + case 0x1e: MOVLL0(sh2, Rm, Rn); break; + case 0x1f: MAC_L(sh2, Rm, Rn); break; case 0x20: NOP(); break; case 0x21: NOP(); break; - case 0x22: STCVBR(Rn); break; - case 0x23: BRAF(Rn); break; - case 0x24: MOVBS0(Rm, Rn); break; - case 0x25: MOVWS0(Rm, Rn); break; - case 0x26: MOVLS0(Rm, Rn); break; - case 0x27: MULL(Rm, Rn); break; - case 0x28: CLRMAC(); break; - case 0x29: MOVT(Rn); break; - case 0x2a: STSPR(Rn); break; - case 0x2b: RTE(); break; - case 0x2c: MOVBL0(Rm, Rn); break; - case 0x2d: MOVWL0(Rm, Rn); break; - case 0x2e: MOVLL0(Rm, Rn); break; - case 0x2f: MAC_L(Rm, Rn); break; + case 0x22: STCVBR(sh2, Rn); break; + case 0x23: BRAF(sh2, Rn); break; + case 0x24: MOVBS0(sh2, Rm, Rn); break; + case 0x25: MOVWS0(sh2, Rm, Rn); break; + case 0x26: MOVLS0(sh2, Rm, Rn); break; + case 0x27: MULL(sh2, Rm, Rn); break; + case 0x28: CLRMAC(sh2); break; + case 0x29: MOVT(sh2, Rn); break; + case 0x2a: STSPR(sh2, Rn); break; + case 0x2b: RTE(sh2); break; + case 0x2c: MOVBL0(sh2, Rm, Rn); break; + case 0x2d: MOVWL0(sh2, Rm, Rn); break; + case 0x2e: MOVLL0(sh2, Rm, Rn); break; + case 0x2f: MAC_L(sh2, Rm, Rn); break; case 0x30: NOP(); break; case 0x31: NOP(); break; case 0x32: NOP(); break; case 0x33: NOP(); break; - case 0x34: MOVBS0(Rm, Rn); break; - case 0x35: MOVWS0(Rm, Rn); break; - case 0x36: MOVLS0(Rm, Rn); break; - case 0x37: MULL(Rm, Rn); break; + case 0x34: MOVBS0(sh2, Rm, Rn); break; + case 0x35: MOVWS0(sh2, Rm, Rn); break; + case 0x36: MOVLS0(sh2, Rm, Rn); break; + case 0x37: MULL(sh2, Rm, Rn); break; case 0x38: NOP(); break; case 0x39: NOP(); break; - case 0x3c: MOVBL0(Rm, Rn); break; - case 0x3d: MOVWL0(Rm, Rn); break; - case 0x3e: MOVLL0(Rm, Rn); break; - case 0x3f: MAC_L(Rm, Rn); break; + case 0x3c: MOVBL0(sh2, Rm, Rn); break; + case 0x3d: MOVWL0(sh2, Rm, Rn); break; + case 0x3e: MOVLL0(sh2, Rm, Rn); break; + case 0x3f: MAC_L(sh2, Rm, Rn); break; case 0x3a: NOP(); break; case 0x3b: NOP(); break; @@ -1895,111 +1902,111 @@ INLINE void op0000(UINT16 opcode) } } -INLINE void op0001(UINT16 opcode) +INLINE void op0001(sh2_state *sh2, UINT16 opcode) { - MOVLS4(Rm, opcode & 0x0f, Rn); + MOVLS4(sh2, Rm, opcode & 0x0f, Rn); } -INLINE void op0010(UINT16 opcode) +INLINE void op0010(sh2_state *sh2, UINT16 opcode) { switch (opcode & 15) { - case 0: MOVBS(Rm, Rn); break; - case 1: MOVWS(Rm, Rn); break; - case 2: MOVLS(Rm, Rn); break; + case 0: MOVBS(sh2, Rm, Rn); break; + case 1: MOVWS(sh2, Rm, Rn); break; + case 2: MOVLS(sh2, Rm, Rn); break; case 3: NOP(); break; - case 4: MOVBM(Rm, Rn); break; - case 5: MOVWM(Rm, Rn); break; - case 6: MOVLM(Rm, Rn); break; - case 7: DIV0S(Rm, Rn); break; - case 8: TST(Rm, Rn); break; - case 9: AND(Rm, Rn); break; - case 10: XOR(Rm, Rn); break; - case 11: OR(Rm, Rn); break; - case 12: CMPSTR(Rm, Rn); break; - case 13: XTRCT(Rm, Rn); break; - case 14: MULU(Rm, Rn); break; - case 15: MULS(Rm, Rn); break; + case 4: MOVBM(sh2, Rm, Rn); break; + case 5: MOVWM(sh2, Rm, Rn); break; + case 6: MOVLM(sh2, Rm, Rn); break; + case 7: DIV0S(sh2, Rm, Rn); break; + case 8: TST(sh2, Rm, Rn); break; + case 9: AND(sh2, Rm, Rn); break; + case 10: XOR(sh2, Rm, Rn); break; + case 11: OR(sh2, Rm, Rn); break; + case 12: CMPSTR(sh2, Rm, Rn); break; + case 13: XTRCT(sh2, Rm, Rn); break; + case 14: MULU(sh2, Rm, Rn); break; + case 15: MULS(sh2, Rm, Rn); break; } } -INLINE void op0011(UINT16 opcode) +INLINE void op0011(sh2_state *sh2, UINT16 opcode) { switch (opcode & 15) { - case 0: CMPEQ(Rm, Rn); break; + case 0: CMPEQ(sh2, Rm, Rn); break; case 1: NOP(); break; - case 2: CMPHS(Rm, Rn); break; - case 3: CMPGE(Rm, Rn); break; - case 4: DIV1(Rm, Rn); break; - case 5: DMULU(Rm, Rn); break; - case 6: CMPHI(Rm, Rn); break; - case 7: CMPGT(Rm, Rn); break; - case 8: SUB(Rm, Rn); break; + case 2: CMPHS(sh2, Rm, Rn); break; + case 3: CMPGE(sh2, Rm, Rn); break; + case 4: DIV1(sh2, Rm, Rn); break; + case 5: DMULU(sh2, Rm, Rn); break; + case 6: CMPHI(sh2, Rm, Rn); break; + case 7: CMPGT(sh2, Rm, Rn); break; + case 8: SUB(sh2, Rm, Rn); break; case 9: NOP(); break; - case 10: SUBC(Rm, Rn); break; - case 11: SUBV(Rm, Rn); break; - case 12: ADD(Rm, Rn); break; - case 13: DMULS(Rm, Rn); break; - case 14: ADDC(Rm, Rn); break; - case 15: ADDV(Rm, Rn); break; + case 10: SUBC(sh2, Rm, Rn); break; + case 11: SUBV(sh2, Rm, Rn); break; + case 12: ADD(sh2, Rm, Rn); break; + case 13: DMULS(sh2, Rm, Rn); break; + case 14: ADDC(sh2, Rm, Rn); break; + case 15: ADDV(sh2, Rm, Rn); break; } } -INLINE void op0100(UINT16 opcode) +INLINE void op0100(sh2_state *sh2, UINT16 opcode) { switch (opcode & 0x3F) { - case 0x00: SHLL(Rn); break; - case 0x01: SHLR(Rn); break; - case 0x02: STSMMACH(Rn); break; - case 0x03: STCMSR(Rn); break; - case 0x04: ROTL(Rn); break; - case 0x05: ROTR(Rn); break; - case 0x06: LDSMMACH(Rn); break; - case 0x07: LDCMSR(Rn); break; - case 0x08: SHLL2(Rn); break; - case 0x09: SHLR2(Rn); break; - case 0x0a: LDSMACH(Rn); break; - case 0x0b: JSR(Rn); break; + case 0x00: SHLL(sh2, Rn); break; + case 0x01: SHLR(sh2, Rn); break; + case 0x02: STSMMACH(sh2, Rn); break; + case 0x03: STCMSR(sh2, Rn); break; + case 0x04: ROTL(sh2, Rn); break; + case 0x05: ROTR(sh2, Rn); break; + case 0x06: LDSMMACH(sh2, Rn); break; + case 0x07: LDCMSR(sh2, Rn); break; + case 0x08: SHLL2(sh2, Rn); break; + case 0x09: SHLR2(sh2, Rn); break; + case 0x0a: LDSMACH(sh2, Rn); break; + case 0x0b: JSR(sh2, Rn); break; case 0x0c: NOP(); break; case 0x0d: NOP(); break; - case 0x0e: LDCSR(Rn); break; - case 0x0f: MAC_W(Rm, Rn); break; + case 0x0e: LDCSR(sh2, Rn); break; + case 0x0f: MAC_W(sh2, Rm, Rn); break; - case 0x10: DT(Rn); break; - case 0x11: CMPPZ(Rn); break; - case 0x12: STSMMACL(Rn); break; - case 0x13: STCMGBR(Rn); break; + case 0x10: DT(sh2, Rn); break; + case 0x11: CMPPZ(sh2, Rn); break; + case 0x12: STSMMACL(sh2, Rn); break; + case 0x13: STCMGBR(sh2, Rn); break; case 0x14: NOP(); break; - case 0x15: CMPPL(Rn); break; - case 0x16: LDSMMACL(Rn); break; - case 0x17: LDCMGBR(Rn); break; - case 0x18: SHLL8(Rn); break; - case 0x19: SHLR8(Rn); break; - case 0x1a: LDSMACL(Rn); break; - case 0x1b: TAS(Rn); break; + case 0x15: CMPPL(sh2, Rn); break; + case 0x16: LDSMMACL(sh2, Rn); break; + case 0x17: LDCMGBR(sh2, Rn); break; + case 0x18: SHLL8(sh2, Rn); break; + case 0x19: SHLR8(sh2, Rn); break; + case 0x1a: LDSMACL(sh2, Rn); break; + case 0x1b: TAS(sh2, Rn); break; case 0x1c: NOP(); break; case 0x1d: NOP(); break; - case 0x1e: LDCGBR(Rn); break; - case 0x1f: MAC_W(Rm, Rn); break; + case 0x1e: LDCGBR(sh2, Rn); break; + case 0x1f: MAC_W(sh2, Rm, Rn); break; - case 0x20: SHAL(Rn); break; - case 0x21: SHAR(Rn); break; - case 0x22: STSMPR(Rn); break; - case 0x23: STCMVBR(Rn); break; - case 0x24: ROTCL(Rn); break; - case 0x25: ROTCR(Rn); break; - case 0x26: LDSMPR(Rn); break; - case 0x27: LDCMVBR(Rn); break; - case 0x28: SHLL16(Rn); break; - case 0x29: SHLR16(Rn); break; - case 0x2a: LDSPR(Rn); break; - case 0x2b: JMP(Rn); break; + case 0x20: SHAL(sh2, Rn); break; + case 0x21: SHAR(sh2, Rn); break; + case 0x22: STSMPR(sh2, Rn); break; + case 0x23: STCMVBR(sh2, Rn); break; + case 0x24: ROTCL(sh2, Rn); break; + case 0x25: ROTCR(sh2, Rn); break; + case 0x26: LDSMPR(sh2, Rn); break; + case 0x27: LDCMVBR(sh2, Rn); break; + case 0x28: SHLL16(sh2, Rn); break; + case 0x29: SHLR16(sh2, Rn); break; + case 0x2a: LDSPR(sh2, Rn); break; + case 0x2b: JMP(sh2, Rn); break; case 0x2c: NOP(); break; case 0x2d: NOP(); break; - case 0x2e: LDCVBR(Rn); break; - case 0x2f: MAC_W(Rm, Rn); break; + case 0x2e: LDCVBR(sh2, Rn); break; + case 0x2f: MAC_W(sh2, Rm, Rn); break; case 0x30: NOP(); break; case 0x31: NOP(); break; @@ -2016,117 +2023,117 @@ INLINE void op0100(UINT16 opcode) case 0x3c: NOP(); break; case 0x3d: NOP(); break; case 0x3e: NOP(); break; - case 0x3f: MAC_W(Rm, Rn); break; + case 0x3f: MAC_W(sh2, Rm, Rn); break; } } -INLINE void op0101(UINT16 opcode) +INLINE void op0101(sh2_state *sh2, UINT16 opcode) { - MOVLL4(Rm, opcode & 0x0f, Rn); + MOVLL4(sh2, Rm, opcode & 0x0f, Rn); } -INLINE void op0110(UINT16 opcode) +INLINE void op0110(sh2_state *sh2, UINT16 opcode) { switch (opcode & 15) { - case 0: MOVBL(Rm, Rn); break; - case 1: MOVWL(Rm, Rn); break; - case 2: MOVLL(Rm, Rn); break; - case 3: MOV(Rm, Rn); break; - case 4: MOVBP(Rm, Rn); break; - case 5: MOVWP(Rm, Rn); break; - case 6: MOVLP(Rm, Rn); break; - case 7: NOT(Rm, Rn); break; - case 8: SWAPB(Rm, Rn); break; - case 9: SWAPW(Rm, Rn); break; - case 10: NEGC(Rm, Rn); break; - case 11: NEG(Rm, Rn); break; - case 12: EXTUB(Rm, Rn); break; - case 13: EXTUW(Rm, Rn); break; - case 14: EXTSB(Rm, Rn); break; - case 15: EXTSW(Rm, Rn); break; + case 0: MOVBL(sh2, Rm, Rn); break; + case 1: MOVWL(sh2, Rm, Rn); break; + case 2: MOVLL(sh2, Rm, Rn); break; + case 3: MOV(sh2, Rm, Rn); break; + case 4: MOVBP(sh2, Rm, Rn); break; + case 5: MOVWP(sh2, Rm, Rn); break; + case 6: MOVLP(sh2, Rm, Rn); break; + case 7: NOT(sh2, Rm, Rn); break; + case 8: SWAPB(sh2, Rm, Rn); break; + case 9: SWAPW(sh2, Rm, Rn); break; + case 10: NEGC(sh2, Rm, Rn); break; + case 11: NEG(sh2, Rm, Rn); break; + case 12: EXTUB(sh2, Rm, Rn); break; + case 13: EXTUW(sh2, Rm, Rn); break; + case 14: EXTSB(sh2, Rm, Rn); break; + case 15: EXTSW(sh2, Rm, Rn); break; } } -INLINE void op0111(UINT16 opcode) +INLINE void op0111(sh2_state *sh2, UINT16 opcode) { - ADDI(opcode & 0xff, Rn); + ADDI(sh2, opcode & 0xff, Rn); } -INLINE void op1000(UINT16 opcode) +INLINE void op1000(sh2_state *sh2, UINT16 opcode) { switch ( opcode & (15<<8) ) { - case 0 << 8: MOVBS4(opcode & 0x0f, Rm); break; - case 1 << 8: MOVWS4(opcode & 0x0f, Rm); break; + case 0 << 8: MOVBS4(sh2, opcode & 0x0f, Rm); break; + case 1 << 8: MOVWS4(sh2, opcode & 0x0f, Rm); break; case 2<< 8: NOP(); break; case 3<< 8: NOP(); break; - case 4<< 8: MOVBL4(Rm, opcode & 0x0f); break; - case 5<< 8: MOVWL4(Rm, opcode & 0x0f); break; + case 4<< 8: MOVBL4(sh2, Rm, opcode & 0x0f); break; + case 5<< 8: MOVWL4(sh2, Rm, opcode & 0x0f); break; case 6<< 8: NOP(); break; case 7<< 8: NOP(); break; - case 8<< 8: CMPIM(opcode & 0xff); break; - case 9<< 8: BT(opcode & 0xff); break; + case 8<< 8: CMPIM(sh2, opcode & 0xff); break; + case 9<< 8: BT(sh2, opcode & 0xff); break; case 10<< 8: NOP(); break; - case 11<< 8: BF(opcode & 0xff); break; + case 11<< 8: BF(sh2, opcode & 0xff); break; case 12<< 8: NOP(); break; - case 13<< 8: BTS(opcode & 0xff); break; + case 13<< 8: BTS(sh2, opcode & 0xff); break; case 14<< 8: NOP(); break; - case 15<< 8: BFS(opcode & 0xff); break; + case 15<< 8: BFS(sh2, opcode & 0xff); break; } } -INLINE void op1001(UINT16 opcode) +INLINE void op1001(sh2_state *sh2, UINT16 opcode) { - MOVWI(opcode & 0xff, Rn); + MOVWI(sh2, opcode & 0xff, Rn); } -INLINE void op1010(UINT16 opcode) +INLINE void op1010(sh2_state *sh2, UINT16 opcode) { - BRA(opcode & 0xfff); + BRA(sh2, opcode & 0xfff); } -INLINE void op1011(UINT16 opcode) +INLINE void op1011(sh2_state *sh2, UINT16 opcode) { - BSR(opcode & 0xfff); + BSR(sh2, opcode & 0xfff); } -INLINE void op1100(UINT16 opcode) +INLINE void op1100(sh2_state *sh2, UINT16 opcode) { switch (opcode & (15<<8)) { - case 0<<8: MOVBSG(opcode & 0xff); break; - case 1<<8: MOVWSG(opcode & 0xff); break; - case 2<<8: MOVLSG(opcode & 0xff); break; - case 3<<8: TRAPA(opcode & 0xff); break; - case 4<<8: MOVBLG(opcode & 0xff); break; - case 5<<8: MOVWLG(opcode & 0xff); break; - case 6<<8: MOVLLG(opcode & 0xff); break; - case 7<<8: MOVA(opcode & 0xff); break; - case 8<<8: TSTI(opcode & 0xff); break; - case 9<<8: ANDI(opcode & 0xff); break; - case 10<<8: XORI(opcode & 0xff); break; - case 11<<8: ORI(opcode & 0xff); break; - case 12<<8: TSTM(opcode & 0xff); break; - case 13<<8: ANDM(opcode & 0xff); break; - case 14<<8: XORM(opcode & 0xff); break; - case 15<<8: ORM(opcode & 0xff); break; + case 0<<8: MOVBSG(sh2, opcode & 0xff); break; + case 1<<8: MOVWSG(sh2, opcode & 0xff); break; + case 2<<8: MOVLSG(sh2, opcode & 0xff); break; + case 3<<8: TRAPA(sh2, opcode & 0xff); break; + case 4<<8: MOVBLG(sh2, opcode & 0xff); break; + case 5<<8: MOVWLG(sh2, opcode & 0xff); break; + case 6<<8: MOVLLG(sh2, opcode & 0xff); break; + case 7<<8: MOVA(sh2, opcode & 0xff); break; + case 8<<8: TSTI(sh2, opcode & 0xff); break; + case 9<<8: ANDI(sh2, opcode & 0xff); break; + case 10<<8: XORI(sh2, opcode & 0xff); break; + case 11<<8: ORI(sh2, opcode & 0xff); break; + case 12<<8: TSTM(sh2, opcode & 0xff); break; + case 13<<8: ANDM(sh2, opcode & 0xff); break; + case 14<<8: XORM(sh2, opcode & 0xff); break; + case 15<<8: ORM(sh2, opcode & 0xff); break; } } -INLINE void op1101(UINT16 opcode) +INLINE void op1101(sh2_state *sh2, UINT16 opcode) { - MOVLI(opcode & 0xff, Rn); + MOVLI(sh2, opcode & 0xff, Rn); } -INLINE void op1110(UINT16 opcode) +INLINE void op1110(sh2_state *sh2, UINT16 opcode) { - MOVI(opcode & 0xff, Rn); + MOVI(sh2, opcode & 0xff, Rn); } -INLINE void op1111(UINT16 opcode) +INLINE void op1111(sh2_state *sh2, UINT16 opcode) { NOP(); } @@ -2137,8 +2144,10 @@ INLINE void op1111(UINT16 opcode) static CPU_RESET( sh2 ) { - void *tsave, *tsaved0, *tsaved1; + sh2_state *sh2 = get_safe_token(device); + emu_timer *tsave, *tsaved0, *tsaved1; UINT32 *m; + int (*dma_callback_kludge)(UINT32 src, UINT32 dst, UINT32 data, int size); int save_is_slave; void (*f)(UINT32 data); @@ -2154,7 +2163,17 @@ static CPU_RESET( sh2 ) save_is_slave = sh2->is_slave; dma_callback_kludge = sh2->dma_callback_kludge; - memset(sh2, 0, sizeof(sh2_state)); + sh2->ppc = sh2->pc = sh2->pr = sh2->sr = sh2->gbr = sh2->vbr = sh2->mach = sh2->macl = 0; + sh2->evec = sh2->irqsr = 0; + memset(&sh2->r[0], 0, sizeof(sh2->r[0])*16); + sh2->ea = sh2->delay = sh2->cpu_off = sh2->dvsr = sh2->dvdnth = sh2->dvdntl = sh2->dvcr = 0; + sh2->pending_irq = sh2->test_irq = 0; + memset(&sh2->irq_queue[0], 0, sizeof(sh2->irq_queue[0])*16); + memset(&sh2->irq_line_state[0], 0, sizeof(sh2->irq_line_state[0])*17); + sh2->frc = sh2->ocra = sh2->ocrb = sh2->icr = 0; + sh2->frc_base = 0; + sh2->frt_input = sh2->internal_irq_level = sh2->internal_irq_vector = 0; + sh2->dma_timer_active[0] = sh2->dma_timer_active[1] = 0; sh2->dma_callback_kludge = dma_callback_kludge; sh2->is_slave = save_is_slave; @@ -2168,8 +2187,8 @@ static CPU_RESET( sh2 ) sh2->m = m; memset(sh2->m, 0, 0x200); - sh2->pc = RL(0); - sh2->r[15] = RL(4); + sh2->pc = RL(sh2, 0); + sh2->r[15] = RL(sh2, 4); sh2->sr = I; sh2->internal_irq_level = -1; @@ -2181,13 +2200,16 @@ static CPU_RESET( sh2 ) static CPU_RESET( sh1 ) { - sh2_reset(); + sh2_state *sh2 = get_safe_token(device); + CPU_RESET_CALL( sh2 ); sh2->cpu_type = CPU_TYPE_SH1; } /* Execute cycles - returns number of cycles actually run */ static CPU_EXECUTE( sh2 ) { + sh2_state *sh2 = get_safe_token(device); + if (sh2->cpu_off) { sh2->icount = 0; @@ -2214,22 +2236,22 @@ static CPU_EXECUTE( sh2 ) switch (opcode & ( 15 << 12)) { - case 0<<12: op0000(opcode); break; - case 1<<12: op0001(opcode); break; - case 2<<12: op0010(opcode); break; - case 3<<12: op0011(opcode); break; - case 4<<12: op0100(opcode); break; - case 5<<12: op0101(opcode); break; - case 6<<12: op0110(opcode); break; - case 7<<12: op0111(opcode); break; - case 8<<12: op1000(opcode); break; - case 9<<12: op1001(opcode); break; - case 10<<12: op1010(opcode); break; - case 11<<12: op1011(opcode); break; - case 12<<12: op1100(opcode); break; - case 13<<12: op1101(opcode); break; - case 14<<12: op1110(opcode); break; - default: op1111(opcode); break; + case 0<<12: op0000(sh2, opcode); break; + case 1<<12: op0001(sh2, opcode); break; + case 2<<12: op0010(sh2, opcode); break; + case 3<<12: op0011(sh2, opcode); break; + case 4<<12: op0100(sh2, opcode); break; + case 5<<12: op0101(sh2, opcode); break; + case 6<<12: op0110(sh2, opcode); break; + case 7<<12: op0111(sh2, opcode); break; + case 8<<12: op1000(sh2, opcode); break; + case 9<<12: op1001(sh2, opcode); break; + case 10<<12: op1010(sh2, opcode); break; + case 11<<12: op1011(sh2, opcode); break; + case 12<<12: op1100(sh2, opcode); break; + case 13<<12: op1101(sh2, opcode); break; + case 14<<12: op1110(sh2, opcode); break; + default: op1111(sh2, opcode); break; } if(sh2->test_irq && !sh2->delay) @@ -2237,14 +2259,13 @@ static CPU_EXECUTE( sh2 ) CHECK_PENDING_IRQ("mame_sh2_execute"); sh2->test_irq = 0; } - sh2_icount--; - } while( sh2_icount > 0 ); + sh2->icount--; + } while( sh2->icount > 0 ); } static CPU_INIT( sh2 ) { - /* allocate the core memory */ - sh2 = auto_alloc_clear(device->machine, SH2); + sh2_state *sh2 = get_safe_token(device); /* initialize the common core parts */ sh2_common_init(sh2, device, irqcallback); @@ -2256,6 +2277,7 @@ static CPU_INIT( sh2 ) static CPU_SET_INFO( sh2 ) { + sh2_state *sh2 = get_safe_token(device); switch (state) { /* --- the following bits of info are set as 64-bit signed integers --- */ @@ -2315,6 +2337,7 @@ static CPU_SET_INFO( sh2 ) CPU_GET_INFO( sh2 ) { + sh2_state *sh2 = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL; switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ @@ -2394,7 +2417,7 @@ CPU_GET_INFO( sh2 ) case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh2); break; case CPUINFO_FCT_BURN: info->burn = NULL; break; case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sh2); break; - case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sh2_icount; break; + case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sh2->icount; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case DEVINFO_STR_NAME: strcpy(info->s, "SH-2"); break; diff --git a/src/emu/cpu/sh2/sh2comn.h b/src/emu/cpu/sh2/sh2comn.h index 73558cb96de..b716f67c185 100644 --- a/src/emu/cpu/sh2/sh2comn.h +++ b/src/emu/cpu/sh2/sh2comn.h @@ -128,6 +128,7 @@ typedef struct int frt_input; int internal_irq_level; int internal_irq_vector; + int icount; emu_timer *timer; emu_timer *dma_timer[2]; @@ -144,8 +145,6 @@ typedef struct drcfe_state * drcfe; /* pointer to the DRC front-end state */ UINT32 drcoptions; /* configurable DRC options */ - int icount; - /* internal stuff */ UINT8 cache_dirty; /* true if we need to flush the cache */