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https://github.com/holub/mame
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sun3.cpp: Add preliminary (very incomplete) Am9516 UDC configuration
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@ -181,6 +181,7 @@ fefc34a - start of mem_size, which queries ECC registers for each memory board
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#include "emu.h"
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#include "cpu/m68000/m68020.h"
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#include "machine/am9516.h"
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#include "machine/bankdev.h"
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#include "machine/nvram.h"
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#include "machine/ram.h"
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@ -233,8 +234,8 @@ public:
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m_maincpu(*this, "maincpu"),
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m_scc1(*this, SCC1_TAG),
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m_scc2(*this, SCC2_TAG),
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m_scsibus(*this, "scsibus"),
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m_scsi(*this, "scsibus:7:ncr5380"),
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m_sbc(*this, "scsibus:7:sbc"),
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m_udc(*this, "udc"),
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m_p_ram(*this, "p_ram"),
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m_bw2_vram(*this, "bw2_vram"),
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m_type0space(*this, "type0"),
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@ -263,8 +264,8 @@ private:
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required_device<m68020_device> m_maincpu;
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required_device<z80scc_device> m_scc1;
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required_device<z80scc_device> m_scc2;
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required_device<nscsi_bus_device> m_scsibus;
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required_device<ncr5380_device> m_scsi;
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required_device<ncr5380_device> m_sbc;
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required_device<am9516_device> m_udc;
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optional_shared_ptr<uint32_t> m_p_ram;
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optional_shared_ptr<uint32_t> m_bw2_vram;
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@ -285,6 +286,8 @@ private:
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void irqctrl_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
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uint8_t rtc7170_r(offs_t offset);
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void rtc7170_w(offs_t offset, uint8_t data);
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uint16_t scsictrl_r();
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void scsictrl_w(uint16_t data);
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template <unsigned W, unsigned H>
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uint32_t bw2_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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@ -302,6 +305,7 @@ private:
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uint32_t *m_rom_ptr, *m_ram_ptr;
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uint8_t *m_idprom_ptr;
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uint32_t m_enable, m_diag, m_dvma_enable, m_parregs[8], m_irqctrl, m_ecc[4];
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uint16_t m_scsictrl;
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uint8_t m_buserr;
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uint32_t m_context;
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@ -329,7 +333,6 @@ static void scsi_devices(device_slot_interface &device)
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{
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device.option_add("cdrom", NSCSI_CDROM);
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device.option_add("harddisk", NSCSI_HARDDISK);
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device.option_add_internal("ncr5380", NCR5380);
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device.set_option_machine_config("cdrom", sun_cdrom);
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}
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@ -789,7 +792,10 @@ void sun3_state::vmetype1space_map(address_map &map)
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map(0x000a0000, 0x000a0003).rw(FUNC(sun3_state::irqctrl_r), FUNC(sun3_state::irqctrl_w));
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map(0x00100000, 0x0010ffff).rom().region("user1", 0);
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map(0x00120000, 0x00120003).rw(m_lance, FUNC(am79c90_device::regs_r), FUNC(am79c90_device::regs_w));
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map(0x00140000, 0x00140007).rw(m_scsi, FUNC(ncr5380_device::read), FUNC(ncr5380_device::write)).umask32(0xffffffff);
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map(0x00140000, 0x00140007).rw(m_sbc, FUNC(ncr5380_device::read), FUNC(ncr5380_device::write)).umask32(0xffffffff);
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map(0x00140010, 0x00140011).rw(m_udc, FUNC(am9516_device::data_r), FUNC(am9516_device::data_w));
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map(0x00140012, 0x00140013).rw(m_udc, FUNC(am9516_device::addr_r), FUNC(am9516_device::addr_w));
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map(0x00140018, 0x00140019).rw(FUNC(sun3_state::scsictrl_r), FUNC(sun3_state::scsictrl_w));
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map(0x001e0000, 0x001e00ff).rw(FUNC(sun3_state::ecc_r), FUNC(sun3_state::ecc_w));
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}
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@ -860,6 +866,22 @@ void sun3_state::rtc7170_w(offs_t offset, uint8_t data)
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}
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}
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uint16_t sun3_state::scsictrl_r()
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{
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return m_scsictrl;
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}
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void sun3_state::scsictrl_w(uint16_t data)
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{
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if (BIT(data ^ m_scsictrl, 0))
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{
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m_sbc->reset();
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m_udc->reset();
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}
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m_scsictrl = (m_scsictrl & 0xff00) | (data & 0x000f);
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}
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uint32_t sun3_state::ecc_r(offs_t offset)
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{
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//printf("read ECC @ %x, PC=%x\n", offset, m_maincpu->pc());
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@ -964,6 +986,7 @@ void sun3_state::machine_start()
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m_ram_size = m_ram->size();
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m_ram_size_words = m_ram_size >> 2;
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std::fill(std::begin(m_parregs), std::end(m_parregs), 0);
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m_scsictrl = 0;
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}
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void sun3_state::machine_reset()
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@ -974,6 +997,8 @@ void sun3_state::machine_reset()
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m_dvma_enable = 0;
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m_irqctrl = 0;
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m_bInBusErr = false;
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scsictrl_w(0);
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}
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// The base Sun 3004 CPU board
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@ -1039,7 +1064,9 @@ void sun3_state::sun3(machine_config &config)
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NSCSI_CONNECTOR(config, "scsibus:4", scsi_devices, nullptr);
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NSCSI_CONNECTOR(config, "scsibus:5", scsi_devices, nullptr);
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NSCSI_CONNECTOR(config, "scsibus:6", scsi_devices, "cdrom");
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NSCSI_CONNECTOR(config, "scsibus:7", scsi_devices, "ncr5380", true).set_option_machine_config("ncr5380", [this] (device_t *device) { ncr5380(device); });
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NSCSI_CONNECTOR(config, "scsibus:7").option_set("sbc", NCR5380).machine_config([this] (device_t *device) { ncr5380(device); });
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AM9516(config, m_udc, 16_MHz_XTAL / 2);
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}
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// Sun 3/60
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@ -1143,7 +1170,9 @@ void sun3_state::sun3_50(machine_config &config)
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NSCSI_CONNECTOR(config, "scsibus:4", scsi_devices, nullptr);
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NSCSI_CONNECTOR(config, "scsibus:5", scsi_devices, nullptr);
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NSCSI_CONNECTOR(config, "scsibus:6", scsi_devices, "cdrom");
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NSCSI_CONNECTOR(config, "scsibus:7", scsi_devices, "ncr5380", true).set_option_machine_config("ncr5380", [this] (device_t *device) { ncr5380(device); });
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NSCSI_CONNECTOR(config, "scsibus:7").option_set("sbc", NCR5380).machine_config([this] (device_t *device) { ncr5380(device); });
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AM9516(config, m_udc, 16_MHz_XTAL / 2);
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}
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/* ROM definition */
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