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https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
-cpu/score: Added bittgl! opcode.
-debuggdbstub.cpp: add score7 registers map.
This commit is contained in:
Sandro Ronco
parent
e7d317c44a
commit
96247d322c
@ -112,7 +112,6 @@ void score7_cpu_device::device_start()
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save_item(NAME(m_sr));
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save_item(NAME(m_ce));
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save_item(NAME(m_pending_interrupt));
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save_item(NAME(m_has_pending_interrupt));
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}
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@ -127,8 +126,7 @@ void score7_cpu_device::device_reset()
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memset(m_cr, 0, sizeof(m_cr));
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memset(m_sr, 0, sizeof(m_sr));
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memset(m_ce, 0, sizeof(m_ce));
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memset(m_pending_interrupt, 0, sizeof(m_pending_interrupt));
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m_has_pending_interrupt = false;
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m_pending_interrupt = 0;
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REG_EXCPVEC = m_pc = 0x9f000000;
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}
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@ -182,7 +180,7 @@ void score7_cpu_device::execute_run()
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m_ppc = m_pc;
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debugger_instruction_hook(m_pc);
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if (m_has_pending_interrupt)
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if (m_pending_interrupt)
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check_irq();
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uint32_t op = fetch();
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@ -226,10 +224,7 @@ void score7_cpu_device::execute_set_input(int inputnum, int state)
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{
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standard_irq_callback(inputnum);
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if (inputnum > 0 && inputnum < 64)
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{
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m_pending_interrupt[inputnum] = true;
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m_has_pending_interrupt = true;
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}
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m_pending_interrupt |= 1ULL << inputnum;
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}
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}
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@ -326,16 +321,14 @@ void score7_cpu_device::check_irq()
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{
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for (int i=63; i>0; i--)
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{
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if (m_pending_interrupt[i])
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if (m_pending_interrupt & (1ULL << i))
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{
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m_pending_interrupt[i] = false;
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m_pending_interrupt &= ~(1ULL << i);
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standard_irq_callback(i);
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gen_exception(EXCEPTION_INTERRUPT, i);
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return;
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}
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}
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m_has_pending_interrupt = false;
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}
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}
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@ -1327,6 +1320,11 @@ void score7_cpu_device::op_iform1a()
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CHECK_N(m_gpr[rd]);
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CHECK_Z(m_gpr[rd] & (1 << imm5));
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break;
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case 0x07: // bittgl!
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m_gpr[rd] ^= (1 << imm5);
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CHECK_Z(m_gpr[rd]);
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CHECK_N(m_gpr[rd]);
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break;
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default:
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op_undef();
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}
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@ -119,8 +119,7 @@ private:
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uint32_t m_cr[0x20];
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uint32_t m_sr[3];
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uint32_t m_ce[2];
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bool m_has_pending_interrupt;
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bool m_pending_interrupt[64];
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uint64_t m_pending_interrupt;
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// opcodes tables
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typedef void (score7_cpu_device::*op_handler)();
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@ -18,7 +18,7 @@ const char *const score7_disassembler::m_r2_op[16] = { "add", "sub", "neg", "cm
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const char *const score7_disassembler::m_i1_op[8] = { "addi", "", "cmpi", "", "andi", "ori", "ldi", "" };
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const char *const score7_disassembler::m_i2_op[8] = { "addis", "", "cmpis", "", "andis", "oris", "ldis", "" };
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const char *const score7_disassembler::m_ls_op[8] = { "lw", "lh", "lhu", "lb", "sw", "sh", "lbu", "sb" };
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const char *const score7_disassembler::m_i1a_op[8] = { "addei", "slli", "sdbbp", "srli", "bitclr", "bitset", "bittst", "" };
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const char *const score7_disassembler::m_i1a_op[8] = { "addei", "slli", "sdbbp", "srli", "bitclr", "bitset", "bittst", "bittgl" };
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const char *const score7_disassembler::m_i1b_op[8] = { "lwp", "lhp", "", "lbup", "swp", "shp", "", "sbp" };
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const char *const score7_disassembler::m_cr_op[2] = { "mtcr", "mfcr" };
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@ -234,10 +234,7 @@ void score7_disassembler::disasm16(std::ostream &stream, offs_t pc, uint16_t opc
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util::stream_format(stream, "ldiu! r%d, 0x%02x", GET_I2_RD(opcode), GET_I2_IMM8(opcode));
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break;
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case 0x06: // I-form-1a
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if (GET_I16_FUNC3(opcode) != 7)
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util::stream_format(stream, "%s! r%d, %d", m_i1a_op[GET_I16_FUNC3(opcode)], GET_I16_RD(opcode), GET_I16_IMM5(opcode));
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else
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util::stream_format(stream, "<undefined i-form-1a 0x%02x>", GET_I16_FUNC3(opcode));
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util::stream_format(stream, "%s! r%d, %d", m_i1a_op[GET_I16_FUNC3(opcode)], GET_I16_RD(opcode), GET_I16_IMM5(opcode));
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break;
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case 0x07: // I-form-1b
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switch(GET_I16_FUNC3(opcode))
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@ -334,6 +334,72 @@ static const gdb_register_map gdb_register_map_m6809 =
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}
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};
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//-------------------------------------------------------------------------
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static const gdb_register_map gdb_register_map_score7 =
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{
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"score7",
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"mame.score7",
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{
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{ "r0", "r0", true, TYPE_DATA_POINTER },
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{ "r1", "r1", false, TYPE_INT },
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{ "r2", "r2", false, TYPE_INT },
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{ "r3", "r3", false, TYPE_INT },
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{ "r4", "r4", false, TYPE_INT },
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{ "r5", "r5", false, TYPE_INT },
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{ "r6", "r6", false, TYPE_INT },
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{ "r7", "r7", false, TYPE_INT },
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{ "r8", "r8", false, TYPE_INT },
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{ "r9", "r9", false, TYPE_INT },
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{ "r10", "r10", false, TYPE_INT },
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{ "r11", "r11", false, TYPE_INT },
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{ "r12", "r12", false, TYPE_INT },
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{ "r13", "r13", false, TYPE_INT },
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{ "r14", "r14", false, TYPE_INT },
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{ "r15", "r15", false, TYPE_INT },
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{ "r16", "r16", false, TYPE_INT },
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{ "r17", "r17", false, TYPE_INT },
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{ "r18", "r18", false, TYPE_INT },
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{ "r19", "r19", false, TYPE_INT },
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{ "r20", "r20", false, TYPE_INT },
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{ "r21", "r21", false, TYPE_INT },
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{ "r22", "r22", false, TYPE_INT },
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{ "r23", "r23", false, TYPE_INT },
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{ "r24", "r24", false, TYPE_INT },
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{ "r25", "r25", false, TYPE_INT },
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{ "r26", "r26", false, TYPE_INT },
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{ "r27", "r27", false, TYPE_INT },
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{ "r28", "r28", false, TYPE_INT },
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{ "r29", "r29", false, TYPE_INT },
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{ "r30", "r30", false, TYPE_INT },
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{ "r31", "r31", false, TYPE_INT },
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{ "cr0", "PSR", false, TYPE_INT },
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{ "cr1", "COND", false, TYPE_INT },
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{ "cr2", "ECR", false, TYPE_INT },
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{ "cr3", "EXCPVEC", false, TYPE_INT },
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{ "cr4", "CCR", false, TYPE_INT },
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{ "cr5", "EPC", false, TYPE_INT },
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{ "cr6", "EMA", false, TYPE_INT },
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{ "cr7", "TLBLOCK", false, TYPE_INT },
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{ "cr8", "TLBPT", false, TYPE_INT },
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{ "cr9", "PEADDR", false, TYPE_INT },
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{ "cr10", "TLBRPT", false, TYPE_INT },
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{ "cr11", "PEVN", false, TYPE_INT },
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{ "cr12", "PECTX", false, TYPE_INT },
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{ "cr15", "LIMPFN", false, TYPE_INT },
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{ "cr16", "LDMPFN", false, TYPE_INT },
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{ "cr18", "PREV", false, TYPE_INT },
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{ "cr29", "DREG", false, TYPE_INT },
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{ "PC", "PC", true, TYPE_CODE_POINTER }, // actually Debug exception program counter (DEPC)
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{ "cr31", "DSAVE", false, TYPE_INT },
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{ "sr0", "COUNTER", false, TYPE_INT },
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{ "sr1", "LDCR", false, TYPE_INT },
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{ "sr2", "STCR", false, TYPE_INT },
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{ "ceh", "CEH", false, TYPE_INT },
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{ "cel", "CEL", false, TYPE_INT },
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}
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};
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//-------------------------------------------------------------------------
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static const std::map<std::string, const gdb_register_map &> gdb_register_maps = {
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{ "i486", gdb_register_map_i486 },
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@ -346,6 +412,7 @@ static const std::map<std::string, const gdb_register_map &> gdb_register_maps =
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{ "m6502", gdb_register_map_m6502 },
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{ "n2a03", gdb_register_map_m6502 },
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{ "m6809", gdb_register_map_m6809 },
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{ "score7", gdb_register_map_score7 },
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};
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//-------------------------------------------------------------------------
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