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sams64 doesn't like that we fire an irq even if bit 0 is 0. Fix it.

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This commit is contained in:
Angelo Salese 2015-04-01 20:05:30 +02:00
parent 719ba014dd
commit 965148935b
3 changed files with 18 additions and 3 deletions
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1
src/mame/audio/hng64.c
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@ -194,7 +194,6 @@ WRITE16_MEMBER(hng64_state::hng64_sound_port_0008_w)
// logerror("hng64_sound_port_0008_w %04x %04x\n", data, mem_mask);
// seems to one or more of the DMARQ on the V53, writes here when it expects DMA channel 3 to transfer ~0x20 bytes just after startup
printf("transfer\n");
m_audiocpu->dreq3_w(data&1);
// m_audiocpu->hack_w(1);

4
src/mame/drivers/hng64.c
View File

@ -948,8 +948,8 @@ WRITE16_MEMBER(hng64_state::main_sound_comms_w)
COMBINE_DATA(&main_latch[1]);
break;
case 0x08:
m_audiocpu->set_input_line(5, ASSERT_LINE);
if(data != 1)
m_audiocpu->set_input_line(5, (data & 1) ? ASSERT_LINE : CLEAR_LINE);
if(data & 0xfe)
printf("IRQ send %02x?\n",data);
break;
default:

16
src/mess/drivers/pc88va.c
View File

@ -162,6 +162,8 @@ public:
DECLARE_WRITE_LINE_MEMBER(pc88va_tc_w);
DECLARE_READ8_MEMBER(fdc_dma_r);
DECLARE_WRITE8_MEMBER(fdc_dma_w);
DECLARE_READ8_MEMBER(dma_memr_cb);
DECLARE_WRITE8_MEMBER(dma_memw_cb);
DECLARE_WRITE_LINE_MEMBER(fdc_irq);
DECLARE_WRITE_LINE_MEMBER(fdc_drq);
@ -1761,6 +1763,18 @@ static SLOT_INTERFACE_START( pc88va_floppies )
SLOT_INTERFACE( "525hd", FLOPPY_525_HD )
SLOT_INTERFACE_END
READ8_MEMBER(pc88va_state::dma_memr_cb)
{
printf("%08x\n",offset);
return 0;
}
WRITE8_MEMBER(pc88va_state::dma_memw_cb)
{
printf("%08x %02x\n",offset,data);
}
static MACHINE_CONFIG_START( pc88va, pc88va_state )
MCFG_CPU_ADD("maincpu", V30, 8000000) /* 8 MHz */
@ -1816,6 +1830,8 @@ static MACHINE_CONFIG_START( pc88va, pc88va_state )
MCFG_AM9517A_OUT_EOP_CB(WRITELINE(pc88va_state, pc88va_tc_w))
MCFG_AM9517A_IN_IOR_2_CB(READ8(pc88va_state, fdc_dma_r))
MCFG_AM9517A_OUT_IOW_2_CB(WRITE8(pc88va_state, fdc_dma_w))
MCFG_AM9517A_IN_MEMR_CB(READ8(pc88va_state, dma_memr_cb))
MCFG_AM9517A_OUT_MEMW_CB(WRITE8(pc88va_state, dma_memw_cb))
MCFG_UPD765A_ADD("upd765", false, true)