mirror of
https://github.com/holub/mame
synced 2025-07-01 16:19:38 +03:00
Typo fix: controler → controller
This commit is contained in:
parent
02db474ea5
commit
96c3921e81
@ -45,12 +45,12 @@
|
||||
|
||||
2007-02-22, P.Harvey-Smith
|
||||
|
||||
Began implementing the Dragon Delta Dos controler, this was actually the first
|
||||
Dragon disk controler to market, beating Dragon Data's by a couple of months,
|
||||
Began implementing the Dragon Delta Dos controller, this was actually the first
|
||||
Dragon disk controller to market, beating Dragon Data's by a couple of months,
|
||||
it is based around the WD2791 FDC, which is compatible with the WD1793/WD2797 used
|
||||
by the standard CoCo and Dragon disk controlers except that it used an inverted
|
||||
by the standard CoCo and Dragon disk controllers except that it used an inverted
|
||||
data bus, which is the reason the read/write handlers invert the data. This
|
||||
controler like, the DragonDos WD2797 is mapped at $FF40-$FF43, in the normal
|
||||
controller like, the DragonDos WD2797 is mapped at $FF40-$FF43, in the normal
|
||||
register order.
|
||||
|
||||
The Delta cart also has a register (74LS174 hex flipflop) at $FF44 encoded as
|
||||
|
@ -205,7 +205,7 @@ s1410_device::s1410_device(const machine_config &mconfig, const char *tag, devic
|
||||
#define S1410_CMD_READ_SEC_BUFFER ( 0x10 )
|
||||
#define S1410_CMD_RAM_DIAGS ( 0xe0 )
|
||||
#define S1410_CMD_DRIVE_DIAGS ( 0xe3 )
|
||||
#define S1410_CMD_CONTROLER_DIAGS ( 0xe4 )
|
||||
#define S1410_CMD_CONTROLLER_DIAGS ( 0xe4 )
|
||||
|
||||
#define S1410_STATUS_NOT_READY ( 0x04 )
|
||||
|
||||
@ -302,7 +302,7 @@ void s1410_device::ExecCommand()
|
||||
case S1410_CMD_CHECK_TRACK_FORMAT:
|
||||
case S1410_CMD_RAM_DIAGS:
|
||||
case S1410_CMD_DRIVE_DIAGS:
|
||||
case S1410_CMD_CONTROLER_DIAGS:
|
||||
case S1410_CMD_CONTROLLER_DIAGS:
|
||||
m_phase = SCSI_PHASE_STATUS;
|
||||
m_status_code = SCSI_STATUS_CODE_GOOD;
|
||||
m_transfer_length = 0;
|
||||
|
@ -190,7 +190,7 @@ public:
|
||||
UINT8 reg400;
|
||||
} m_nimbus_drives;
|
||||
|
||||
/* 8031 Peripheral controler */
|
||||
/* 8031 Peripheral controller */
|
||||
struct
|
||||
{
|
||||
UINT8 ipc_in;
|
||||
|
@ -211,7 +211,7 @@ WRITE8_MEMBER( dragon_alpha_state::ff20_write )
|
||||
PIA2 PA2 Rom switch, 0=basic rom, 1=boot rom.
|
||||
PIA2 PA3-PA7 Unknown/unused ?
|
||||
PIA2 PB0-PB7 connected to D0..7 of the AY8912.
|
||||
CB1 DRQ from WD2797 disk controler.
|
||||
CB1 DRQ from WD2797 disk controller.
|
||||
***************************************************************************/
|
||||
|
||||
//-------------------------------------------------
|
||||
|
@ -1247,11 +1247,11 @@ WRITE_LINE_MEMBER( rmnimbus_state::write_scsi_req )
|
||||
check_scsi_irq();
|
||||
}
|
||||
|
||||
/* 8031/8051 Peripheral controler 80186 side */
|
||||
/* 8031/8051 Peripheral controller 80186 side */
|
||||
|
||||
void rmnimbus_state::pc8031_reset()
|
||||
{
|
||||
logerror("peripheral controler reset\n");
|
||||
logerror("peripheral controller reset\n");
|
||||
|
||||
memset(&m_ipc_interface,0,sizeof(m_ipc_interface));
|
||||
}
|
||||
@ -1315,7 +1315,7 @@ WRITE8_MEMBER(rmnimbus_state::nimbus_pc8031_w)
|
||||
|
||||
}
|
||||
|
||||
/* 8031/8051 Peripheral controler 8031/8051 side */
|
||||
/* 8031/8051 Peripheral controller 8031/8051 side */
|
||||
|
||||
READ8_MEMBER(rmnimbus_state::nimbus_pc8031_iou_r)
|
||||
{
|
||||
|
Loading…
Reference in New Issue
Block a user