mirror of
https://github.com/holub/mame
synced 2025-04-22 08:22:15 +03:00
Add tentative VT61/VT62 disassembler and skeleton CPU device
This commit is contained in:
AJR
parent
1329d54013
commit
96ec01a614
@ -3015,6 +3015,23 @@ if (CPUS["VT50"]~=null or _OPTIONS["with-tools"]) then
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table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/vt50/vt50dasm.h")
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end
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--------------------------------------------------
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-- DEC VT61
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--@src/devices/cpu/vt61/vt61.h,CPUS["VT61"] = true
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--------------------------------------------------
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if (CPUS["VT61"]~=null) then
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files {
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MAME_DIR .. "src/devices/cpu/vt61/vt61.cpp",
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MAME_DIR .. "src/devices/cpu/vt61/vt61.h",
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}
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end
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if (CPUS["VT61"]~=null or _OPTIONS["with-tools"]) then
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table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/vt61/vt61dasm.cpp")
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table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/vt61/vt61dasm.h")
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end
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--------------------------------------------------
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-- National Semiconductor PACE/INS8900
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--@src/devices/cpu/pace/pace.h,CPUS["PACE"] = true
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@ -149,6 +149,7 @@ CPUS["CR16B"] = true
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CPUS["FR"] = true
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CPUS["DSP56000"] = true
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CPUS["VT50"] = true
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CPUS["VT61"] = true
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CPUS["PACE"] = true
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CPUS["WE32000"] = true
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CPUS["RX01"] = true
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107
src/devices/cpu/vt61/vt61.cpp
Normal file
107
src/devices/cpu/vt61/vt61.cpp
Normal file
@ -0,0 +1,107 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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/***************************************************************************
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DEC VT61 CPU
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Currently this device is just a stub with no actual execution core.
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***************************************************************************/
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#include "emu.h"
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#include "vt61.h"
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#include "vt61dasm.h"
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// device type definition
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DEFINE_DEVICE_TYPE(VT61_CPU, vt61_cpu_device, "vt61_cpu", "DEC VT61 CPU")
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vt61_cpu_device::vt61_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: cpu_device(mconfig, VT61_CPU, tag, owner, clock)
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, m_program_config("microprogram", ENDIANNESS_LITTLE, 16, 10, -1)
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, m_memory_config("memory", ENDIANNESS_LITTLE, 8, 16, 0)
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, m_idr_config("IDR", ENDIANNESS_LITTLE, 8, 6, 0)
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, m_program_cache(nullptr)
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, m_memory_cache(nullptr)
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, m_idr_cache(nullptr)
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, m_pc(0)
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, m_ac(0)
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, m_mar(0)
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, m_mdr(0)
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, m_ir(0)
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, m_sp{0}
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, m_icount(0)
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{
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m_program_config.m_is_octal = true;
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m_memory_config.m_is_octal = true;
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m_idr_config.m_is_octal = true;
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}
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std::unique_ptr<util::disasm_interface> vt61_cpu_device::create_disassembler()
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{
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return std::make_unique<vt61_disassembler>();
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}
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device_memory_interface::space_config_vector vt61_cpu_device::memory_space_config() const
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{
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return space_config_vector {
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std::make_pair(AS_PROGRAM, &m_program_config),
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std::make_pair(AS_DATA, &m_memory_config),
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std::make_pair(AS_IDR, &m_idr_config)
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};
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}
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void vt61_cpu_device::device_start()
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{
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m_program_cache = space(AS_PROGRAM).cache<1, -1, ENDIANNESS_LITTLE>();
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m_memory_cache = space(AS_DATA).cache<0, 0, ENDIANNESS_LITTLE>();
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m_idr_cache = space(AS_IDR).cache<0, 0, ENDIANNESS_LITTLE>();
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set_icountptr(m_icount);
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state_add(VT61_PC, "PC", m_pc).mask(01777).formatstr("%5s");
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state_add(STATE_GENPC, "GENPC", m_pc).mask(01777).noshow();
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state_add(STATE_GENPCBASE, "CURPC", m_pc).mask(01777).noshow();
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state_add(VT61_AC, "AC", m_ac).formatstr("%03O");
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state_add(VT61_MAR, "MAR", m_mar).formatstr("%06O");
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state_add<u8>(VT61_MALO, "MALO",
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[this]() { return m_mar & 000377; },
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[this](u8 data) { m_mar = (m_mar & 0177400) | data; }
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).noshow();
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state_add<u8>(VT61_MAHI, "MAHI",
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[this]() { return (m_mar & 0177400) >> 8; },
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[this](u8 data) { m_mar = (m_mar & 000377) | (data << 8); }
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).noshow();
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state_add(VT61_MDR, "MDR", m_mdr).formatstr("%03O");
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state_add(VT61_IR, "IR", m_ir).mask(6);
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for (int i = 0; i < 16; i++)
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state_add(VT61_R0 + i, string_format("R%d", i).c_str(), m_sp[i]).formatstr("%03O");
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save_item(NAME(m_pc));
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save_item(NAME(m_ac));
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save_item(NAME(m_mar));
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save_item(NAME(m_mdr));
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save_item(NAME(m_ir));
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save_item(NAME(m_sp));
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}
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void vt61_cpu_device::device_reset()
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{
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m_pc = 0;
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}
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void vt61_cpu_device::execute_run()
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{
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debugger_instruction_hook(m_pc);
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m_icount = 0;
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}
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void vt61_cpu_device::state_string_export(const device_state_entry &entry, std::string &str) const
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{
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switch (entry.index())
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{
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case VT61_PC:
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str = string_format("%o:%03o", m_pc >> 8, m_pc & 0377);
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break;
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}
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}
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69
src/devices/cpu/vt61/vt61.h
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69
src/devices/cpu/vt61/vt61.h
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@ -0,0 +1,69 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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#ifndef MAME_CPU_VT61_VT61_H
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#define MAME_CPU_VT61_VT61_H
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#pragma once
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class vt61_cpu_device : public cpu_device
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{
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public:
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enum {
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VT61_PC,
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VT61_AC,
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VT61_MAR, VT61_MALO, VT61_MAHI,
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VT61_MDR,
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VT61_IR,
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VT61_R0, VT61_R1, VT61_R2, VT61_R3,
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VT61_R4, VT61_R5, VT61_R6, VT61_R7,
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VT61_R8, VT61_R9, VT61_R10, VT61_R11,
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VT61_R12, VT61_R13, VT61_R14, VT61_R15
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};
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enum {
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AS_IDR = 2
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};
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// construction/destruction
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vt61_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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protected:
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// device-level overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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// device_execute_interface overrides
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virtual void execute_run() override;
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// device_disasm_interface overrides
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virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
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// device_memory_interface overrides
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virtual space_config_vector memory_space_config() const override;
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// device_state_interface overrides
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void state_string_export(const device_state_entry &entry, std::string &str) const override;
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private:
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// address spaces
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address_space_config m_program_config;
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address_space_config m_memory_config;
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address_space_config m_idr_config;
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memory_access_cache<1, -1, ENDIANNESS_LITTLE> *m_program_cache;
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memory_access_cache<0, 0, ENDIANNESS_LITTLE> *m_memory_cache;
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memory_access_cache<0, 0, ENDIANNESS_LITTLE> *m_idr_cache;
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// internal state
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u16 m_pc;
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u8 m_ac;
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u16 m_mar;
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u8 m_mdr;
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u8 m_ir;
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u8 m_sp[16]; // scratchpad memory
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s32 m_icount;
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};
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DECLARE_DEVICE_TYPE(VT61_CPU, vt61_cpu_device)
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#endif // MAME_CPU_VT61_VT61_H
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275
src/devices/cpu/vt61/vt61dasm.cpp
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275
src/devices/cpu/vt61/vt61dasm.cpp
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@ -0,0 +1,275 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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/***************************************************************************
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DEC VT61 microcode disassembler
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No microprogram source listing appears to have been published by DEC,
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nor any instruction reference other than the decode signal references
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in the schematics. The instruction format should not be regarded as
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official, though it draws on some of DEC's PDP assembly languages.
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***************************************************************************/
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#include "emu.h"
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#include "vt61dasm.h"
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vt61_disassembler::vt61_disassembler()
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: util::disasm_interface()
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{
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}
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const char *const vt61_disassembler::s_opr_a[8] = {
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"NOP", // NO OP A
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"IAC", // INC AC
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"LIR", // LD IR
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"IMA", // INC MA
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"SMD", // SHIFT MDR
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"JMP0", // CLR PC
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"CMPC8", // COMP PC 8
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"LDR" // LD RAM
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};
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const char *const vt61_disassembler::s_opr_b[16] = {
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"OPR", // NO OP B
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"SPARE",
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"RC", // RESET C FLAG
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"SPARE",
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"SPARE",
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"LMISC", // LD MISC FLAG
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"LLED", // LD LED FLAG
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"LMOD", // LD MODEM FLAG
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"SKCLK", // SET KEYCLICK
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"LINTRC", // LD INTRPT CONTROL
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"SPARE",
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"CNBR", // CLR NBR
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"LSYNC", // LD SYNC + CLR NBX
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"PLD", // PLD
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"CVSR", // CLR VID SERV REQ
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"ENVID" // ENABLE VID LOAD
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};
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const char *const vt61_disassembler::s_sources[12] = {
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"AC", // SEL AC
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"STAT1", // SEL STATUS 1
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"SW", // SEL SWITCHES
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"CAS1", // SEL CAS 1
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"CAS2", // SEL CAS 2
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"RAM", // SEL RAM
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"IDR", // SEL IDR
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"UART", // SEL UART
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"SPARE",
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"TBSW", // TEST BOX SWITCH
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"invalid", // SEL SPM LO
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"invalid" // SEL SPM HI
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};
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const char *const vt61_disassembler::s_conditions[32][2] = {
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{ "NINTR1", "INTR1" }, // INTR 1 L
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{ "NBXF", "NBXT" }, // NBX L
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{ "NBRF", "NBRT" }, // NBR L
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{ "NF1", "F1" }, // F1 L
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{ "NF2", "F2" }, // F2 L
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{ "NCF", "CF" }, // C L
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{ "NURF", "URF" }, // UART R FLAG L
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{ "NUTB", "UTB" }, // UART T BUFF L
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{ "NXOFF", "XOFF" }, // DO X OFF L
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{ "NGOSR", "GOSR" }, // GOUT SER RQ L
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{ "NF3", "F3" }, // F3 L
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{ "NINTR2", "INTR2" }, // INTR 2 L
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{ "KEYUP", "KEYDN" }, // KEY DOWN L
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{ "NPWRUP", "PWRUP" }, // PWR UP L
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{ "NSYNC", "SYNC" }, // SYNC ENA L
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{ "PE", "NPE" }, // PARITY ERROR H
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{ "BZY", "NBZY" }, // MEM BZY H
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{ "EQ", "NE" }, // EQUAL H
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{ "CC", "CS" }, // CARRY OUT L
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{ "MDOFO", "MDOFZ" }, // MDR O.F. OUT H
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{ "NCSR", "CSR" }, // COPIER SER REQ L
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{ "NCPCF", "CPCF" }, // C-PCF L
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{ "T", "F" }, // TRUE H
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{ "NVSR", "VSR" }, // VID SERV REQ L
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{ "?H", "?L" },
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{ "?H", "?L" },
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{ "?H", "?L" },
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{ "?H", "?L" },
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{ "?H", "?L" },
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{ "?H", "?L" },
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{ "?H", "?L" },
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{ "?H", "?L" }
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};
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u32 vt61_disassembler::opcode_alignment() const
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{
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return 1;
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}
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u32 vt61_disassembler::interface_flags() const
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{
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return PAGED;
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}
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u32 vt61_disassembler::page_address_bits() const
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{
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return 8;
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}
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void vt61_disassembler::dasm_spr(std::ostream &stream, u8 r)
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{
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if (BIT(r, 4))
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util::stream_format(stream, "IR%d", r & 9);
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else
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util::stream_format(stream, "R%d", r);
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}
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void vt61_disassembler::dasm_source(std::ostream &stream, u16 inst)
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{
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if ((inst & 003000) == 003000)
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util::stream_format(stream, "#%03o", inst & 000377);
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else
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{
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if ((inst & 003400) == 002400 && (inst & 070000) != 070000)
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dasm_spr(stream, (inst & 000170) >> 2 | (inst & 000200) >> 7);
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else
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stream << s_sources[(inst & 003600) >> 7];
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if ((inst & 000007) != 0 && (inst & 0170000) != 0100000)
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stream << "," << s_opr_a[inst & 000007];
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}
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}
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offs_t vt61_disassembler::disassemble(std::ostream &stream, offs_t pc, const vt61_disassembler::data_buffer &opcodes, const vt61_disassembler::data_buffer ¶ms)
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{
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u16 inst = opcodes.r16(pc);
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offs_t flags = SUPPORTED;
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if (!BIT(inst, 15))
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{
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if ((inst & 074000) == 054000)
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{
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stream << "LDU";
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if ((inst & 000007) != 0 && (inst & 003000) != 003000)
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{
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stream << " " << s_opr_a[inst & 000007];
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if ((inst & 000007) == 5)
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flags |= STEP_OUT;
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}
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}
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else
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{
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switch (inst & 070000)
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{
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case 000000:
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stream << "LAC ";
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break;
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case 040000:
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stream << "LMA " << (BIT(inst, 11) ? "HI," : "LO,");
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break;
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case 050000:
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stream << "JMP ";
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break;
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case 060000:
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if (BIT(inst, 11))
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stream << "LMD ";
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else
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stream << "CAS3 ";
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break;
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case 070000:
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stream << "LSP ";
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dasm_spr(stream, (inst & 000170) >> 2 | (inst & 004000) >> 11);
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stream << ",";
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break;
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default:
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stream << "LD? ";
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break;
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}
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dasm_source(stream, inst);
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if ((inst & 000007) == 5 && (inst & 003000) != 003000)
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flags |= STEP_OUT;
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}
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}
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else if (BIT(inst, 14))
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{
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util::stream_format(stream, "BR %s,%03o", s_conditions[(inst & 017400) >> 8][BIT(inst, 13)], inst & 000377);
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}
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else if (BIT(inst, 13))
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{
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if ((inst & 007407) == 0)
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stream << "NOP";
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else
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{
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stream << s_opr_b[(inst & 007400) >> 8];
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if ((inst & 000007) != 0)
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{
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stream << " " << s_opr_a[inst & 000007];
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if ((inst & 000207) == 000204)
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stream << "A"; // ENABLE MDR A (CAS DATA)
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if ((inst & 000107) == 000104)
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stream << "B"; // ENABLE MDR B (SYNC DATA IN)
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if ((inst & 000007) == 5)
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flags |= STEP_OUT;
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}
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}
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}
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else if (BIT(inst, 12))
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{
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stream << "CMP ";
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dasm_source(stream, inst);
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if ((inst & 000007) == 5 && (inst & 003000) != 003000)
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flags |= STEP_OUT;
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}
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else switch (inst & 000007)
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{
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case 0:
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stream << "CMA";
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break;
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case 1:
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stream << "ORA ";
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dasm_source(stream, inst);
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break;
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case 2:
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stream << "XOR ";
|
||||
dasm_source(stream, inst);
|
||||
break;
|
||||
|
||||
case 3:
|
||||
stream << "AND ";
|
||||
dasm_source(stream, inst);
|
||||
break;
|
||||
|
||||
case 4:
|
||||
stream << "DCA";
|
||||
if (BIT(inst, 11))
|
||||
stream << " C";
|
||||
break;
|
||||
|
||||
case 5:
|
||||
stream << "ADD ";
|
||||
if (BIT(inst, 11))
|
||||
stream << "C,";
|
||||
dasm_source(stream, inst);
|
||||
break;
|
||||
|
||||
case 6:
|
||||
stream << "SUB ";
|
||||
if (BIT(inst, 11))
|
||||
stream << "C,";
|
||||
dasm_source(stream, inst);
|
||||
break;
|
||||
|
||||
case 7:
|
||||
stream << "SLA";
|
||||
if (BIT(inst, 11))
|
||||
stream << " C";
|
||||
break;
|
||||
}
|
||||
|
||||
return 1 | flags;
|
||||
}
|
||||
34
src/devices/cpu/vt61/vt61dasm.h
Normal file
34
src/devices/cpu/vt61/vt61dasm.h
Normal file
@ -0,0 +1,34 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:AJR
|
||||
|
||||
#ifndef MAME_CPU_VT61_VT61DASM_H
|
||||
#define MAME_CPU_VT61_VT61DASM_H
|
||||
|
||||
#pragma once
|
||||
|
||||
class vt61_disassembler : public util::disasm_interface
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
vt61_disassembler();
|
||||
|
||||
protected:
|
||||
// disassembler overrides
|
||||
virtual u32 opcode_alignment() const override;
|
||||
virtual u32 interface_flags() const override;
|
||||
virtual u32 page_address_bits() const override;
|
||||
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override;
|
||||
|
||||
private:
|
||||
// tables
|
||||
static const char *const s_opr_a[8];
|
||||
static const char *const s_opr_b[16];
|
||||
static const char *const s_sources[12];
|
||||
static const char *const s_conditions[32][2];
|
||||
|
||||
// disassembly helpers
|
||||
void dasm_spr(std::ostream &stream, u8 r);
|
||||
void dasm_source(std::ostream &stream, u16 inst);
|
||||
};
|
||||
|
||||
#endif // MAME_CPU_VT61_VT61DASM_H
|
||||
@ -8,7 +8,7 @@
|
||||
|
||||
#include "emu.h"
|
||||
//#include "bus/rs232/rs232.h"
|
||||
//#include "cpu/vt61/vt61.h"
|
||||
#include "cpu/vt61/vt61.h"
|
||||
#include "machine/ay31015.h"
|
||||
//#include "sound/spkrdev.h"
|
||||
#include "screen.h"
|
||||
@ -19,6 +19,7 @@ class vt62_state : public driver_device
|
||||
public:
|
||||
vt62_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag)
|
||||
, m_maincpu(*this, "maincpu")
|
||||
, m_uart(*this, "uart")
|
||||
{
|
||||
}
|
||||
@ -31,11 +32,11 @@ protected:
|
||||
private:
|
||||
u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
|
||||
//void micro_map(address_map &map);
|
||||
//void memory_map(address_map &map);
|
||||
//void decode_map(address_map &map);
|
||||
void micro_map(address_map &map);
|
||||
void memory_map(address_map &map);
|
||||
void decode_map(address_map &map);
|
||||
|
||||
//required_device<vt61_cpu_device> m_maincpu;
|
||||
required_device<vt61_cpu_device> m_maincpu;
|
||||
required_device<ay31015_device> m_uart;
|
||||
//required_ioport_array<8> m_keys;
|
||||
//required_ioport m_baud_sw;
|
||||
@ -50,35 +51,33 @@ u32 vt62_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef UNUSED_DEFINITION
|
||||
void vt62_state::micro_map(address_map &map)
|
||||
{
|
||||
map(0x000, 0x3ff).rom().region("crom", 0);
|
||||
map(00000, 01777).rom().region("crom", 0);
|
||||
}
|
||||
|
||||
void vt62_state::memory_map(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x00ff).mirror(0x4f00).ram(); // static RAM A
|
||||
map(0x1000, 0x1fff).mirror(0x4000).ram(); // dynamic RAM B
|
||||
map(0x2000, 0x2fff).mirror(0x4000).ram(); // dynamic RAM C
|
||||
map(0x8000, 0x9fff).mirror(0x6000).rom().region("mrom", 0);
|
||||
map(0000000, 0000377).mirror(0047400).ram(); // static RAM A
|
||||
map(0010000, 0013777).mirror(0040000).ram(); // dynamic RAM B
|
||||
map(0020000, 0023777).mirror(0040000).ram(); // dynamic RAM C
|
||||
map(0100000, 0117777).mirror(0060000).rom().region("mrom", 0);
|
||||
}
|
||||
|
||||
void vt62_state::decode_map(address_map &map)
|
||||
{
|
||||
map(0x00, 0x3f).rom().region("idr", 0);
|
||||
map(000, 077).rom().region("idr", 0);
|
||||
}
|
||||
#endif
|
||||
|
||||
static INPUT_PORTS_START(vt62)
|
||||
INPUT_PORTS_END
|
||||
|
||||
void vt62_state::vt62(machine_config &mconfig)
|
||||
{
|
||||
//VT61_CPU(mconfig, m_maincpu, 15.36_MHz_XTAL);
|
||||
//m_maincpu->set_addrmap(AS_PROGRAM, &vt62_state::micro_map);
|
||||
//m_maincpu->set_addrmap(AS_DATA, &vt62_state::memory_map);
|
||||
//m_maincpu->set_addrmap(vt61_cpu_device::AS_IDR, &vt62_state::decode_map);
|
||||
VT61_CPU(mconfig, m_maincpu, 15.36_MHz_XTAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &vt62_state::micro_map);
|
||||
m_maincpu->set_addrmap(AS_DATA, &vt62_state::memory_map);
|
||||
m_maincpu->set_addrmap(vt61_cpu_device::AS_IDR, &vt62_state::decode_map);
|
||||
|
||||
AY51013(mconfig, m_uart);
|
||||
|
||||
|
||||
@ -161,6 +161,7 @@ using util::BIT;
|
||||
#include "cpu/v60/v60d.h"
|
||||
#include "cpu/v810/v810dasm.h"
|
||||
#include "cpu/vt50/vt50dasm.h"
|
||||
#include "cpu/vt61/vt61dasm.h"
|
||||
#include "cpu/we32000/we32100d.h"
|
||||
#include "cpu/z180/z180dasm.h"
|
||||
#include "cpu/z8/z8dasm.h"
|
||||
@ -531,6 +532,7 @@ static const dasm_table_entry dasm_table[] =
|
||||
{ "v810", le, 0, []() -> util::disasm_interface * { return new v810_disassembler; } },
|
||||
{ "vt50", le, 0, []() -> util::disasm_interface * { return new vt50_disassembler; } },
|
||||
{ "vt52", le, 0, []() -> util::disasm_interface * { return new vt52_disassembler; } },
|
||||
{ "vt61", le, -1, []() -> util::disasm_interface * { return new vt61_disassembler; } },
|
||||
{ "we32100", be, 0, []() -> util::disasm_interface * { return new we32100_disassembler; } },
|
||||
{ "x86_16", le, 0, []() -> util::disasm_interface * { i386_unidasm.mode = 16; return new i386_disassembler(&i386_unidasm); } },
|
||||
{ "x86_32", le, 0, []() -> util::disasm_interface * { i386_unidasm.mode = 32; return new i386_disassembler(&i386_unidasm); } },
|
||||
|
||||
Loading…
Reference in New Issue
Block a user