ins8250: don't clear THRE on write to the line status register

This commit is contained in:
Dirk Best 2016-03-17 23:48:22 +01:00
parent 78ef0f0376
commit 9737f41ad0

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@ -316,7 +316,7 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w )
bits 5 - 0, you could cause an interrupt if the appropriate IER bit bits 5 - 0, you could cause an interrupt if the appropriate IER bit
is set. is set.
*/ */
m_regs.lsr = (m_regs.lsr & 0x40) | (data & ~0x40); m_regs.lsr = (m_regs.lsr & 0x60) | (data & ~0x60);
tmp = 0; tmp = 0;
tmp |= ( m_regs.lsr & 0x01 ) ? COM_INT_PENDING_RECEIVED_DATA_AVAILABLE : 0; tmp |= ( m_regs.lsr & 0x01 ) ? COM_INT_PENDING_RECEIVED_DATA_AVAILABLE : 0;