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https://github.com/holub/mame
synced 2025-06-06 12:53:46 +03:00
pc_vga: vsync interrupt support
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a672b823a8
commit
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@ -60,7 +60,7 @@
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#define LOG_DSW (1U << 3) // Input sense at $3c2
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#define LOG_CRTC (1U << 4) // CRTC setups with monitor geometry
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#define VERBOSE (LOG_GENERAL | LOG_WARN | LOG_DSW)
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#define VERBOSE (LOG_GENERAL | LOG_WARN)
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//#define LOG_OUTPUT_FUNC osd_printf_info
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#include "logmacro.h"
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@ -117,6 +117,7 @@ vga_device::vga_device(const machine_config &mconfig, device_type type, const ch
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, device_memory_interface(mconfig, *this)
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, vga(*this)
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, m_input_sense(*this, "VGA_SENSE")
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, m_vsync_cb(*this)
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{
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m_main_if_space_config = address_space_config("io_regs", ENDIANNESS_LITTLE, 8, 4, 0, address_map_constructor(FUNC(vga_device::io_3bx_3dx_map), this));
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m_crtc_space_config = address_space_config("crtc_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(vga_device::crtc_map), this));
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@ -223,6 +224,7 @@ void vga_device::device_start()
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save_item(NAME(vga.crtc.map13));
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save_item(NAME(vga.crtc.irq_clear));
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save_item(NAME(vga.crtc.irq_disable));
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save_item(NAME(vga.crtc.irq_latch));
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save_item(NAME(vga.crtc.no_wrap));
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save_item(NAME(vga.gc.index));
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@ -498,6 +500,7 @@ u8 vga_device::input_status_0_r(offs_t offset)
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LOGDSW("Reading sense bit %d\n", sense_bit);
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if(BIT(m_input_sense->read(), sense_bit))
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res |= 0x10;
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res |= vga.crtc.irq_latch << 7;
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return res;
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}
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@ -905,12 +908,20 @@ void vga_device::crtc_map(address_map &map)
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return res;
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}),
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NAME([this](offs_t offset, u8 data) {
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vga.crtc.protect_enable = (data & 0x80) >> 7;
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vga.crtc.bandwidth = (data & 0x40) >> 6;
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vga.crtc.protect_enable = BIT(data, 7);
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vga.crtc.bandwidth = BIT(data, 6);
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// IRQ: Original VGA only supports this for PS/2, but clone cards may supports this on ISA too
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// see https://scalibq.wordpress.com/2022/12/06/the-myth-of-the-vertical-retrace-interrupt/
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vga.crtc.irq_disable = BIT(data, 5);
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vga.crtc.irq_clear = BIT(data, 4);
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vga.crtc.vert_retrace_end = (vga.crtc.vert_retrace_end & ~0xf) | (data & 0x0f);
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// TODO: these two doesn't seem part of the spec
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vga.crtc.irq_clear = (data & 0x10) >> 4;
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vga.crtc.irq_disable = (data & 0x20) >> 5;
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if (vga.crtc.irq_clear == 0)
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{
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vga.crtc.irq_latch = 0;
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m_vsync_cb(0);
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}
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LOGCRTC("CR11 V retrace end %02x -> %02d protect enable %d bandwidth %d irq %02x\n"
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, data
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, vga.crtc.vert_retrace_end
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@ -1839,6 +1850,13 @@ TIMER_CALLBACK_MEMBER(vga_device::vblank_timer_cb)
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{
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vga.crtc.start_addr = latch_start_addr();
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vga.attribute.pel_shift = vga.attribute.pel_shift_latch;
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if (vga.crtc.irq_latch == 0 && vga.crtc.irq_disable == 0)
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{
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vga.crtc.irq_latch = 1;
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m_vsync_cb(1);
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}
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m_vblank_timer->adjust( screen().time_until_pos(vga.crtc.vert_blank_start + vga.crtc.vert_blank_end) );
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}
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@ -48,6 +48,7 @@ public:
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void set_offset(uint16_t val) { vga.crtc.offset = val; }
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void set_vram_size(size_t vram_size) { vga.svga_intf.vram_size = vram_size; }
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auto vsync_cb() { return m_vsync_cb.bind(); }
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// FIXME: should be protected, but virge_pci.cpp violates this
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inline uint16_t get_crtc_port() { return BIT(vga.miscellaneous_output, 0) ? 0x3d0 : 0x3b0; }
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@ -235,6 +236,7 @@ protected:
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/**/ uint8_t map13;
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/**/ uint8_t irq_clear;
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/**/ uint8_t irq_disable;
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uint8_t irq_latch;
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uint8_t no_wrap;
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} crtc;
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@ -305,6 +307,8 @@ protected:
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address_space_config m_atc_space_config;
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bool m_ioas = false;
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devcb_write_line m_vsync_cb;
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private:
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uint32_t start_addr();
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};
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