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https://github.com/holub/mame
synced 2025-04-21 16:01:56 +03:00
z8000: Clean up reset sequence (don't read program space at device_reset time) (nw)
polepos: Make ROM region tags explicit (nw)
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29faba1902
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9872097bbc
@ -41,7 +41,7 @@ z8002_device::z8002_device(const machine_config &mconfig, device_type type, cons
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, m_stack_config("stack", ENDIANNESS_BIG, 16, addrbits, 0)
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, m_sio_config("special I/O", ENDIANNESS_BIG, iobits, 16, 0)
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, m_mo_out(*this)
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, m_ppc(0), m_pc(0), m_psapseg(0), m_psapoff(0), m_fcw(0), m_refresh(0), m_nspseg(0), m_nspoff(0), m_irq_req(0), m_irq_vec(0), m_op_valid(0), m_nmi_state(0), m_mi(0), m_program(nullptr), m_data(nullptr), m_cache(nullptr), m_io(nullptr), m_icount(0)
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, m_ppc(0), m_pc(0), m_psapseg(0), m_psapoff(0), m_fcw(0), m_refresh(0), m_nspseg(0), m_nspoff(0), m_irq_req(0), m_irq_vec(0), m_op_valid(0), m_nmi_state(0), m_mi(0), m_halt(false), m_program(nullptr), m_data(nullptr), m_cache(nullptr), m_io(nullptr), m_icount(0)
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, m_vector_mult(vecmult)
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{
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}
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@ -364,7 +364,8 @@ void z8002_device::set_irq(int type)
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return;
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}
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/* set interrupt request flag, reset HALT flag */
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m_irq_req = type & ~Z8000_HALT;
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m_irq_req = type;
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m_halt = false;
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}
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void z8002_device::PUSH_PC()
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@ -388,6 +389,16 @@ uint32_t z8001_device::GET_PC(uint32_t VEC)
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return segmented_addr(RDMEM_L(*m_program, VEC + 4));
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}
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uint32_t z8002_device::get_reset_pc()
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{
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return RDMEM_W(*m_program, 4);
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}
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uint32_t z8001_device::get_reset_pc()
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{
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return segmented_addr(RDMEM_L(*m_program, 4));
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}
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uint16_t z8002_device::GET_FCW(uint32_t VEC)
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{
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return RDMEM_W(*m_program, VEC);
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@ -423,18 +434,13 @@ void z8002_device::Interrupt()
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{
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uint16_t fcw = m_fcw;
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if (m_irq_req & Z8000_NVI)
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if (m_irq_req & Z8000_RESET)
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{
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int type = standard_irq_callback(NVI_LINE);
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set_irq(type | Z8000_NVI);
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m_irq_req &= ~(Z8000_RESET | Z8000_NMI);
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CHANGE_FCW(RDMEM_W(*m_program, 2)); /* get reset m_fcw */
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m_pc = get_reset_pc(); /* get reset m_pc */
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}
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if (m_irq_req & Z8000_VI)
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{
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int type = standard_irq_callback(VI_LINE);
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set_irq(type | Z8000_VI);
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}
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else
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/* trap ? */
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if (m_irq_req & Z8000_EPU)
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{
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@ -499,6 +505,9 @@ void z8002_device::Interrupt()
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else
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if ((m_irq_req & Z8000_NVI) && (m_fcw & F_NVIE))
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{
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int type = standard_irq_callback(NVI_LINE);
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set_irq(type | Z8000_NVI);
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CHANGE_FCW(fcw | F_S_N | F_SEG_Z8001());/* switch to segmented (on Z8001) system mode */
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PUSH_PC();
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PUSHW(SP, fcw); /* save current m_fcw */
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@ -511,6 +520,9 @@ void z8002_device::Interrupt()
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else
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if ((m_irq_req & Z8000_VI) && (m_fcw & F_VIE))
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{
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int type = standard_irq_callback(VI_LINE);
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set_irq(type | Z8000_VI);
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CHANGE_FCW(fcw | F_S_N | F_SEG_Z8001());/* switch to segmented (on Z8001) system mode */
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PUSH_PC();
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PUSHW(SP, fcw); /* save current m_fcw */
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@ -631,8 +643,8 @@ void z8002_device::register_save_state()
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save_item(NAME(m_nmi_state));
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save_item(NAME(m_irq_state));
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save_item(NAME(m_mi));
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save_item(NAME(m_halt));
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save_item(NAME(m_icount));
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save_item(NAME(m_vector_mult));
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}
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void z8002_device::init_spaces()
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@ -693,25 +705,11 @@ void z8002_device::device_start()
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m_mi = CLEAR_LINE;
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}
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void z8001_device::device_reset()
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{
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m_fcw = RDMEM_W(*m_program, 2); /* get reset m_fcw */
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if(m_fcw & F_SEG)
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{
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m_pc = ((RDMEM_W(*m_program, 4) & 0x0700) << 8) | (RDMEM_W(*m_program, 6) & 0xffff); /* get reset m_pc */
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}
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else
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{
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m_pc = RDMEM_W(*m_program, 4); /* get reset m_pc */
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}
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m_ppc = m_pc;
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}
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void z8002_device::device_reset()
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{
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m_fcw = RDMEM_W(*m_program, 2); /* get reset m_fcw */
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m_pc = RDMEM_W(*m_program, 4); /* get reset m_pc */
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m_ppc = m_pc;
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m_irq_req |= Z8000_RESET;
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m_refresh &= 0x7fff;
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m_halt = false;
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}
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z8002_device::~z8002_device()
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@ -729,7 +727,7 @@ void z8002_device::execute_run()
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m_ppc = m_pc;
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debugger_instruction_hook(m_pc);
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if (m_irq_req & Z8000_HALT)
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if (m_halt)
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{
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m_icount = 0;
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}
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@ -30,7 +30,7 @@ protected:
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static constexpr uint16_t Z8000_NVI = 0x0800; /* non vectored interrupt */
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static constexpr uint16_t Z8000_VI = 0x0400; /* vectored interrupt (LSB is vector) */
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static constexpr uint16_t Z8000_SYSCALL = 0x0200; /* system call (lsb is vector) */
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static constexpr uint16_t Z8000_HALT = 0x0100; /* halted flag */
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static constexpr uint16_t Z8000_RESET = 0x0100; /* reset flag */
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public:
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enum
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@ -111,6 +111,7 @@ protected:
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int m_nmi_state; /* NMI line state */
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int m_irq_state[2]; /* IRQ line states (NVI, VI) */
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int m_mi;
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bool m_halt;
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address_space *m_program;
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address_space *m_data;
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address_space *m_stack;
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@ -119,7 +120,7 @@ protected:
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address_space *m_io;
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address_space *m_sio;
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int m_icount;
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int m_vector_mult;
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const int m_vector_mult;
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void clear_internal_state();
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void register_debug_state();
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@ -231,6 +232,7 @@ protected:
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inline uint32_t SRLL(uint32_t dest, uint8_t count);
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inline void Interrupt();
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virtual uint32_t GET_PC(uint32_t VEC);
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virtual uint32_t get_reset_pc();
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virtual uint16_t GET_FCW(uint32_t VEC);
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virtual uint32_t F_SEG_Z8001();
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virtual uint32_t PSA_ADDR();
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@ -674,9 +676,7 @@ public:
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z8001_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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protected:
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// device-level overrides
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virtual void device_reset() override;
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// z8002_device overrides
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virtual bool get_segmented_mode() const override;
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virtual uint32_t adjust_addr_for_nonseg_mode(uint32_t addr) override;
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virtual uint16_t RDPORT_W(int mode, uint16_t addr) override;
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@ -684,6 +684,7 @@ protected:
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virtual void PUSH_PC() override;
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virtual void CHANGE_FCW(uint16_t fcw) override;
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virtual uint32_t GET_PC(uint32_t VEC) override;
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virtual uint32_t get_reset_pc() override;
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virtual uint16_t GET_FCW(uint32_t VEC) override;
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virtual uint32_t F_SEG_Z8001() override;
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virtual uint32_t PSA_ADDR() override;
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@ -4674,7 +4674,7 @@ void z8002_device::Z79_ssN0_0000_addr()
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void z8002_device::Z7A_0000_0000()
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{
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CHECK_PRIVILEGED_INSTR();
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m_irq_req |= Z8000_HALT;
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m_halt = true;
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if (m_icount > 0) m_icount = 0;
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}
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@ -768,7 +768,6 @@ void m20_state::machine_reset()
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m_fd1797->reset();
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memcpy(RAM, ROM, 8); // we need only the reset vector
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m_maincpu->reset(); // FIXME: rewrite Z8000 core to not read the vector at this time
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m_kbdi8251->write_cts(0);
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if (m_apb)
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m_apb->halt();
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@ -419,7 +419,7 @@ void polepos_state::machine_reset()
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void polepos_state::z80_map(address_map &map)
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{
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map(0x0000, 0x2fff).rom();
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map(0x0000, 0x2fff).rom().region("maincpu", 0);
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map(0x3000, 0x37ff).mirror(0x0800).ram().share("nvram"); /* Battery Backup */
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map(0x4000, 0x47ff).rw(FUNC(polepos_state::sprite_r), FUNC(polepos_state::sprite_w)); /* Motion Object */
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map(0x4800, 0x4bff).rw(FUNC(polepos_state::road_r), FUNC(polepos_state::road_w)); /* Road Memory */
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@ -448,7 +448,6 @@ void polepos_state::z80_io(address_map &map)
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/* the same memory map is used by both Z8002 CPUs; all RAM areas are shared */
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void polepos_state::z8002_map(address_map &map)
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{
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map(0x0000, 0x7fff).rom();
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map(0x8000, 0x8fff).ram().share(m_sprite16_memory); /* Motion Object */
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map(0x9000, 0x97ff).ram().share(m_road16_memory); /* Road Memory */
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map(0x9800, 0x9fff).ram().w(FUNC(polepos_state::alpha16_w)).share(m_alpha16_memory); /* Alphanumeric (char ram) */
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@ -460,12 +459,14 @@ void polepos_state::z8002_map(address_map &map)
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void polepos_state::z8002_map_1(address_map &map)
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{
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z8002_map(map);
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map(0x0000, 0x7fff).rom().region("sub", 0);
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map(0x6000, 0x6001).mirror(0x0ffe).w(FUNC(polepos_state::z8002_nvi_enable_w<true>)); /* NVI enable - *NOT* shared by the two CPUs */
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}
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void polepos_state::z8002_map_2(address_map &map)
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{
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z8002_map(map);
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map(0x0000, 0x7fff).rom().region("sub2", 0);
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map(0x6000, 0x6001).mirror(0x0ffe).w(FUNC(polepos_state::z8002_nvi_enable_w<false>)); /* NVI enable - *NOT* shared by the two CPUs */
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}
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@ -969,7 +970,7 @@ void polepos_state::topracern_io(address_map &map)
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void polepos_state::sound_z80_bootleg_map(address_map &map)
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{
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map(0x0000, 0x1fff).rom();
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map(0x0000, 0x1fff).rom().region("soundz80bl", 0);
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map(0x2700, 0x27ff).ram();
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map(0x4000, 0x4000).r(m_soundlatch, FUNC(generic_latch_8_device::read));
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map(0x6000, 0x6000).r(m_soundlatch, FUNC(generic_latch_8_device::acknowledge_r));
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