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https://github.com/holub/mame
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ncd17c: dumped 6805 and hooked up comms with main CPU [R. Belmont, Al Kossow]
This commit is contained in:
arbee
parent
6fef9859c7
commit
98b1f5a852
@ -4,18 +4,42 @@
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drivers/ncd17c.cpp
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NCD 17" color X terminal
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NCD 19" monochrome X terminal
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Hardware:
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- MC68020 CPU, no FPU, no MMU
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- 2681 DUART (Logitech serial mouse)
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- Unknown AMD Ethernet chip (c) 1987. LANCE or derivative?
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- AMD LANCE Ethernet controller
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- Bt478 RAMDAC
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- MC6805 keyboard and NVRAM handler
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68020 IRQs: 2 = keyboard, 3 = LANCE, 4 = DUART, 5 = vblank
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6805 port assignments:
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A0 - I/O - PS/2 connector DATA
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A1
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A2 - not sure
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A3 - OUT - chip select on the 93C46 EEPROM
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A4 - OUT - when clear port B reads as the mailslot from the 68020
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A5 - IN - set if the 68020 has nothing new for us
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A6 - OUT - rising edge latches port B to the 68020 mailslot and raises the IRQ
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A7 - IN - set if the 68020 hasn't yet read our last transmission
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B0 - OUT - SK line on 93C46 EEPROM
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B1 - OUT - Data In line on 93C46 EEPROM
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B2 - IN - Data Out line on 93C46 EEPROM
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B3-B7 unused except '020 mailslot interface
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C0-C3 = speaker (4-bit DAC?) The 6805 timer is used to control this.
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IRQ in = PS/2 clock line
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****************************************************************************/
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#include "emu.h"
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#include "bus/rs232/rs232.h"
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#include "cpu/m68000/m68000.h"
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#include "cpu/m6805/m6805.h"
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#include "machine/mc68681.h"
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#include "machine/am79c90.h"
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#include "screen.h"
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@ -26,6 +50,7 @@ public:
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ncd_020_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_mcu(*this, "mcu"),
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m_screen(*this, "screen"),
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m_mainram(*this, "mainram"),
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m_duart(*this, "duart"),
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@ -37,20 +62,27 @@ public:
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void ncd_17c_map(address_map &map);
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void ncd_19(machine_config &config);
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void ncd_19_map(address_map &map);
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void ncd_mcu_map(address_map &map);
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uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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uint32_t screen_update_19(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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DECLARE_WRITE_LINE_MEMBER(duart_irq_handler);
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DECLARE_WRITE_LINE_MEMBER(lance_irq_w);
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DECLARE_WRITE32_MEMBER(bt478_palette_w);
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DECLARE_READ32_MEMBER(ramsize_r);
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DECLARE_WRITE32_MEMBER(ramsize_w);
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DECLARE_READ32_MEMBER(from_mcu_r);
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DECLARE_WRITE32_MEMBER(to_mcu_w);
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DECLARE_READ32_MEMBER(mcu_status_r);
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DECLARE_WRITE32_MEMBER(mcu_irq_w);
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INTERRUPT_GEN_MEMBER(vblank);
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DECLARE_READ8_MEMBER(mcu_ports_r);
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DECLARE_WRITE8_MEMBER(mcu_ports_w);
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private:
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virtual void machine_reset() override;
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required_device<cpu_device> m_maincpu;
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required_device<m68020_device> m_maincpu;
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required_device<m6805_device> m_mcu;
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required_device<screen_device> m_screen;
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required_shared_ptr<uint32_t> m_mainram;
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required_device<scn2681_device> m_duart;
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@ -60,10 +92,10 @@ private:
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u32 m_palette[256];
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u8 m_r, m_g, m_b, m_entry, m_stage;
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u8 m_ramsize_magic, m_ramsize_phase;
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u8 m_porta, m_portb, m_portc, m_to020, m_from020;
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bool m_unread_to020, m_unread_from020;
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};
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#define VERBOSE_LEVEL ( 0 )
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#define ENABLE_VERBOSE_LOG (0)
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@ -88,7 +120,9 @@ void ncd_020_state::machine_reset()
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m_entry = 0;
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m_stage = 0;
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m_r = m_g = m_b = 0;
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m_ramsize_phase = 0;
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m_porta = m_portb = m_portc = 0;
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m_to020 = m_from020 = 0;
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m_unread_to020 = m_unread_from020 = false;
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}
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INTERRUPT_GEN_MEMBER(ncd_020_state::vblank)
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@ -149,38 +183,140 @@ uint32_t ncd_020_state::screen_update_19(screen_device &screen, bitmap_rgb32 &bi
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void ncd_020_state::ncd_17c_map(address_map &map)
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{
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map(0x00000000, 0x000bffff).rom().region("maincpu", 0);
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map(0x001c0000, 0x001c0003).rw(FUNC(ncd_020_state::from_mcu_r), FUNC(ncd_020_state::to_mcu_w));
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map(0x001c8000, 0x001c803f).rw(m_duart, FUNC(scn2681_device::read), FUNC(scn2681_device::write)).umask32(0xff000000);
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map(0x001d0000, 0x001d0003).w(FUNC(ncd_020_state::bt478_palette_w));
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map(0x01000000, 0x02ffffff).ram(); //w(FUNC(ncd_020_state::ramsize_r), FUNC(ncd_020_state::ramsize_w));
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map(0x001d8000, 0x001d8003).rw(FUNC(ncd_020_state::mcu_status_r), FUNC(ncd_020_state::mcu_irq_w));
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map(0x01000000, 0x02ffffff).ram();
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map(0x03000000, 0x03ffffff).ram().share("mainram");
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}
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void ncd_020_state::ncd_19_map(address_map &map)
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{
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map(0x00000000, 0x0000ffff).rom().region("maincpu", 0);
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map(0x001c0000, 0x001c0003).rw(FUNC(ncd_020_state::from_mcu_r), FUNC(ncd_020_state::to_mcu_w));
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map(0x001d8000, 0x001d8003).rw(FUNC(ncd_020_state::mcu_status_r), FUNC(ncd_020_state::mcu_irq_w));
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map(0x001e0000, 0x001e003f).rw(m_duart, FUNC(scn2681_device::read), FUNC(scn2681_device::write)).umask32(0xff000000);
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map(0x00200000, 0x00200003).rw(m_lance, FUNC(am79c90_device::regs_r), FUNC(am79c90_device::regs_w)).umask32(0xffffffff);
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map(0x00400000, 0x0043ffff).ram().share("mainram");
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map(0x00800000, 0x00bfffff).ram();
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map(0x00800000, 0x00ffffff).ram();
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}
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READ32_MEMBER(ncd_020_state::ramsize_r)
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READ8_MEMBER(ncd_020_state::mcu_ports_r)
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{
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return m_ramsize_magic << 24;
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}
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u8 rv = 0;
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WRITE32_MEMBER(ncd_020_state::ramsize_w)
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{
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if (!m_ramsize_phase)
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switch (offset)
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{
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m_ramsize_magic = (data >> 24);
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case 0: // port A
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rv = m_porta & ~(0xa5);
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if (!m_unread_from020)
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{
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rv |= 0x20;
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}
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if (m_unread_to020)
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{
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rv |= 0x80;
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}
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break;
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case 1: // port B
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if (!(m_porta & 0x10))
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{
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rv = m_from020;
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}
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else
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{
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rv = m_portb;
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}
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break;
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case 2: // port C
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rv = m_portc & 0xf;
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rv |= 0xf0;
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break;
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}
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m_ramsize_phase ^= 1;
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return rv;
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}
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WRITE8_MEMBER(ncd_020_state::mcu_ports_w)
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{
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switch (offset)
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{
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case 0: // port A
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//if (data != m_porta) printf("%02x to port A\n", data);
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if ((data & 0x40) && !(m_porta & 0x40))
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{
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//printf("Promoting portB %02x to 020\n", m_portb);
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m_to020 = m_portb;
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m_unread_to020 = true;
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m_maincpu->set_input_line(M68K_IRQ_2, ASSERT_LINE);
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}
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m_porta = data;
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break;
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case 1: // port B
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//printf("%02x to port B\n", data);
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m_portb = data;
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break;
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case 2: // port C
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m_portc = data;
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break;
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}
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}
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READ32_MEMBER(ncd_020_state::from_mcu_r)
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{
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m_unread_to020 = false;
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m_maincpu->set_input_line(M68K_IRQ_2, CLEAR_LINE);
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return m_to020<<24;
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}
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WRITE32_MEMBER(ncd_020_state::to_mcu_w)
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{
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//printf("Sending %02x to MCU\n", data);
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m_from020 = data>>24;
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m_unread_from020 = true;
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}
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READ32_MEMBER(ncd_020_state::mcu_status_r)
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{
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u32 rv = 0;
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if (!m_unread_from020)
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{
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rv |= 0x01000000;
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}
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if (m_unread_to020)
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{
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rv |= 0x02000000;
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}
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return rv;
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}
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WRITE32_MEMBER(ncd_020_state::mcu_irq_w)
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{
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}
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void ncd_020_state::ncd_mcu_map(address_map &map)
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{
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map.global_mask(0x7ff);
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map(0x0000, 0x0002).rw(FUNC(ncd_020_state::mcu_ports_r), FUNC(ncd_020_state::mcu_ports_w));
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map(0x0040, 0x007f).ram();
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map(0x0080, 0x00ff).rom().region("mcu", 0x80);
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map(0x03c0, 0x07ff).rom().region("mcu", 0x3c0);
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}
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WRITE_LINE_MEMBER(ncd_020_state::duart_irq_handler)
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{
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//m_maincpu->set_input_line_and_vector(M68K_IRQ_6, state, M68K_INT_ACK_AUTOVECTOR);
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m_maincpu->set_input_line(M68K_IRQ_4, state);
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}
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WRITE_LINE_MEMBER(ncd_020_state::lance_irq_w)
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{
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m_maincpu->set_input_line(M68K_IRQ_3, state);
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}
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WRITE32_MEMBER(ncd_020_state::bt478_palette_w)
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@ -229,10 +365,14 @@ void ncd_020_state::ncd_17c(machine_config &config)
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m_maincpu->set_addrmap(AS_PROGRAM, &ncd_020_state::ncd_17c_map);
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m_maincpu->set_periodic_int(FUNC(ncd_020_state::vblank), attotime::from_hz(70.06));
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M6805(config, m_mcu, 3.6864_MHz_XTAL); // MC6805P2
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m_mcu->set_addrmap(AS_PROGRAM, &ncd_020_state::ncd_mcu_map);
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SCN2681(config, m_duart, 3.6864_MHz_XTAL);
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m_duart->irq_cb().set(FUNC(ncd_020_state::duart_irq_handler));
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AM79C90(config, m_lance, XTAL(12'500'000));
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m_lance->intr_out().set(FUNC(ncd_020_state::lance_irq_w));
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SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
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m_screen->set_raw(77.4144_MHz_XTAL, 1376, 0, 1024, 803, 0, 768); // 56.260 kHz horizontal, 70.06 Hz vertical
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@ -246,14 +386,18 @@ void ncd_020_state::ncd_19(machine_config &config)
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m_maincpu->set_addrmap(AS_PROGRAM, &ncd_020_state::ncd_19_map);
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m_maincpu->set_periodic_int(FUNC(ncd_020_state::vblank), attotime::from_hz(72));
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M6805(config, m_mcu, 3.6864_MHz_XTAL); // MC6805P2
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m_mcu->set_addrmap(AS_PROGRAM, &ncd_020_state::ncd_mcu_map);
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SCN2681(config, m_duart, 3.6864_MHz_XTAL);
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m_duart->irq_cb().set(FUNC(ncd_020_state::duart_irq_handler));
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AM79C90(config, m_lance, XTAL(12'500'000));
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m_lance->intr_out().set(FUNC(ncd_020_state::lance_irq_w));
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SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
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m_screen->set_refresh_hz(72);
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m_screen->set_visarea(0, 1280-1, 0, 1024-1); // Bitsavers claims this is 1280x1024
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m_screen->set_visarea(0, 1280-1, 0, 1024-1);
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m_screen->set_size(1400, 1152);
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m_screen->set_screen_update(FUNC(ncd_020_state::screen_update_19));
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}
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@ -275,12 +419,18 @@ ROM_START( ncd17c )
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ROM_LOAD16_BYTE( "ncd17c_v2.2.1_b1o.bin", 0x040001, 0x020000, CRC(a5d5ab8a) SHA1(51ddb7020abd5f83224bff48eab254375e9d27f9) )
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ROM_LOAD16_BYTE( "ncd17c_v2.2.1_b2e.bin", 0x080000, 0x020000, CRC(390dac65) SHA1(3f9c886433dff87847135b8f3d8e8ead75d3abf3) )
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ROM_LOAD16_BYTE( "ncd17c_v2.2.1_b2o.bin", 0x080001, 0x020000, CRC(2e5ebfaa) SHA1(d222c6cc743046a1c1dec1829c24fa918a54849d) )
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ROM_REGION(0x800, "mcu", 0)
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ROM_LOAD( "ncd4200005.bin", 0x000000, 0x000800, CRC(075c3746) SHA1(6954cfab5141138df975f1b15d2c8e08d4d203c1) )
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ROM_END
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ROM_START( ncd19 )
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ROM_REGION32_BE(0x10000, "maincpu", 0)
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ROM_LOAD16_BYTE( "ncd19_v2.1.1_e.bin", 0x000000, 0x008000, CRC(28786528) SHA1(8f4ad6a593c55cce0477169132ecf38577086f4e) )
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ROM_LOAD16_BYTE( "ncd19_v2.1.1_o.bin", 0x000001, 0x008000, CRC(aeefbcf1) SHA1(0c28426d0ae7c18de02daee7d340c17dc461e7f4) )
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ROM_REGION(0x800, "mcu", 0)
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ROM_LOAD( "ncd4200005.bin", 0x000000, 0x000800, CRC(075c3746) SHA1(6954cfab5141138df975f1b15d2c8e08d4d203c1) )
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ROM_END
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// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
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