From 98b88c617b16dbd2049388ca212c8d03304c66ee Mon Sep 17 00:00:00 2001 From: Aaron Giles Date: Wed, 26 Nov 2008 19:35:58 +0000 Subject: [PATCH] Removed cpunum_get_active() calls from a number of CPU cores. Normalized 6502 state variable to the generic 'cpustate' which makes the macros work more cleanly. --- src/emu/cpu/hd6309/hd6309.c | 4 +- src/emu/cpu/i8x41/i8x41.c | 4 +- src/emu/cpu/i8x41/i8x41ops.c | 2 +- src/emu/cpu/konami/konami.c | 4 +- src/emu/cpu/m37710/m37710.c | 32 +-- src/emu/cpu/m6502/ill02.h | 4 +- src/emu/cpu/m6502/m4510.c | 300 ++++++++++++------------ src/emu/cpu/m6502/m6502.c | 429 +++++++++++++++++------------------ src/emu/cpu/m6502/m6509.c | 228 +++++++++---------- src/emu/cpu/m6502/m65ce02.c | 190 ++++++++-------- src/emu/cpu/m6502/minc4510.h | 64 +++--- src/emu/cpu/m6502/mincce02.h | 66 +++--- src/emu/cpu/m6502/ops02.h | 84 +++---- src/emu/cpu/m6502/ops09.h | 30 +-- src/emu/cpu/m6502/ops4510.h | 30 +-- src/emu/cpu/m6502/opsc02.h | 4 +- src/emu/cpu/m6502/opsce02.h | 10 +- src/emu/cpu/m6502/t6502.c | 4 +- src/emu/cpu/m6502/t6509.c | 2 +- src/emu/cpu/m6502/t65c02.c | 6 +- src/emu/cpu/m6502/t65ce02.c | 4 +- src/emu/cpu/m6502/t65sc02.c | 4 +- src/emu/cpu/m6502/tdeco16.c | 30 +-- src/emu/cpu/m6502/tn2a03.c | 4 +- src/emu/cpu/m6800/m6800.c | 36 +-- src/emu/cpu/m6809/m6809.c | 4 +- src/emu/cpu/mcs51/mcs51.c | 10 +- src/emu/cpu/mcs51/mcs51ops.c | 2 +- 28 files changed, 786 insertions(+), 805 deletions(-) diff --git a/src/emu/cpu/hd6309/hd6309.c b/src/emu/cpu/hd6309/hd6309.c index 42d3213bbc5..133b2750757 100644 --- a/src/emu/cpu/hd6309/hd6309.c +++ b/src/emu/cpu/hd6309/hd6309.c @@ -588,7 +588,7 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state) { if (m68_state->nmi_state == state) return; m68_state->nmi_state = state; - LOG(("HD6309#%d set_irq_line (NMI) %d (PC=%4.4X)\n", cpunum_get_active(), state, pPC.d)); + LOG(("HD6309 '%s' set_irq_line (NMI) %d (PC=%4.4X)\n", m68_state->device->tag, state, pPC.d)); if( state == CLEAR_LINE ) return; /* if the stack was not yet initialized */ @@ -626,7 +626,7 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state) } else if (irqline < 2) { - LOG(("HD6309#%d set_irq_line %d, %d (PC=%4.4X)\n", cpunum_get_active(), irqline, state, pPC.d)); + LOG(("HD6309 '%s' set_irq_line %d, %d (PC=%4.4X)\n", m68_state->device->tag, irqline, state, pPC.d)); m68_state->irq_state[irqline] = state; if (state == CLEAR_LINE) return; check_irq_lines(m68_state); diff --git a/src/emu/cpu/i8x41/i8x41.c b/src/emu/cpu/i8x41/i8x41.c index 1ad3b1aa211..79fabec9a31 100644 --- a/src/emu/cpu/i8x41/i8x41.c +++ b/src/emu/cpu/i8x41/i8x41.c @@ -1179,7 +1179,7 @@ static CPU_SET_INFO( i8x41 ) break; case CPUINFO_INT_REGISTER + I8X41_STAT: - logerror("i8x41 #%d:%03x Setting STAT DBBI to %02x\n", cpunum_get_active(), PC, (UINT8)info->i); + logerror("i8x41 '%s':%03x Setting STAT DBBI to %02x\n", upi41_state->device->tag, PC, (UINT8)info->i); /* writing status.. hmm, should we issue interrupts here too? */ STATE = info->i; break; @@ -1265,7 +1265,7 @@ CPU_GET_INFO( i8041 ) break; case CPUINFO_INT_REGISTER + I8X41_STAT: - logerror("i8x41 #%d:%03x Reading STAT %02x\n", cpunum_get_active(), PC, STATE); + logerror("i8x41 '%s':%03x Reading STAT %02x\n", upi41_state->device->tag, PC, STATE); info->i = STATE; break; diff --git a/src/emu/cpu/i8x41/i8x41ops.c b/src/emu/cpu/i8x41/i8x41ops.c index 78d02c5ed1d..1115037342a 100644 --- a/src/emu/cpu/i8x41/i8x41ops.c +++ b/src/emu/cpu/i8x41/i8x41ops.c @@ -10,7 +10,7 @@ ***********************************/ OP_HANDLER( illegal ) { - logerror("i8x41 #%d: illegal opcode at 0x%03x: %02x\n", cpunum_get_active(), PC, ROP(upi41_state, PC)); + logerror("i8x41 '%s': illegal opcode at 0x%03x: %02x\n", upi41_state->device->tag, PC, ROP(upi41_state, PC)); } /*********************************** diff --git a/src/emu/cpu/konami/konami.c b/src/emu/cpu/konami/konami.c index 2fffb9fb06b..0aa56f5085c 100644 --- a/src/emu/cpu/konami/konami.c +++ b/src/emu/cpu/konami/konami.c @@ -433,7 +433,7 @@ static void set_irq_line(int irqline, int state) { if (konami.nmi_state == state) return; konami.nmi_state = state; - LOG(("KONAMI#%d set_nmi_line %d\n", cpunum_get_active(), state)); + LOG(("KONAMI '%s' set_nmi_line %d\n", konami.device->tag, state)); if( state == CLEAR_LINE ) return; /* if the stack was not yet initialized */ @@ -464,7 +464,7 @@ static void set_irq_line(int irqline, int state) } else if (irqline < 2) { - LOG(("KONAMI#%d set_irq_line %d, %d\n", cpunum_get_active(), irqline, state)); + LOG(("KONAMI '%s' set_irq_line %d, %d\n", konami.device->tag, irqline, state)); konami.irq_state[irqline] = state; if (state == CLEAR_LINE) return; CHECK_IRQ_LINES; diff --git a/src/emu/cpu/m37710/m37710.c b/src/emu/cpu/m37710/m37710.c index c8a8158394e..19e4a116493 100644 --- a/src/emu/cpu/m37710/m37710.c +++ b/src/emu/cpu/m37710/m37710.c @@ -258,28 +258,21 @@ static const char *const m37710_tnames[8] = }; #endif -static void m37710_timer_cb_common(m37710i_cpu_struct *m37710i_cpu, int which, int cpunum) +static TIMER_CALLBACK( m37710_timer_cb ) { + m37710i_cpu_struct *m37710i_cpu = ptr; + int which = param; int curirq = M37710_LINE_TIMERA0 - which; - cpu_push_context(m37710i_cpu->device->machine->cpu[cpunum]); - timer_adjust_oneshot(m37710i_cpu->timers[which], m37710i_cpu->reload[which], cpunum); + cpu_push_context(m37710i_cpu->device); + timer_adjust_oneshot(m37710i_cpu->timers[which], m37710i_cpu->reload[which], param); m37710i_cpu->m37710_regs[m37710_irq_levels[curirq]] |= 0x04; m37710_set_irq_line(m37710i_cpu, curirq, PULSE_LINE); - cpu_triggerint(m37710i_cpu->device->machine->cpu[cpunum]); + cpu_triggerint(m37710i_cpu->device); cpu_pop_context(); } -static TIMER_CALLBACK( m37710_timer_0_cb ) { int cpunum = param; m37710_timer_cb_common((m37710i_cpu_struct *)ptr, 0, cpunum); } -static TIMER_CALLBACK( m37710_timer_1_cb ) { int cpunum = param; m37710_timer_cb_common((m37710i_cpu_struct *)ptr, 1, cpunum); } -static TIMER_CALLBACK( m37710_timer_2_cb ) { int cpunum = param; m37710_timer_cb_common((m37710i_cpu_struct *)ptr, 2, cpunum); } -static TIMER_CALLBACK( m37710_timer_3_cb ) { int cpunum = param; m37710_timer_cb_common((m37710i_cpu_struct *)ptr, 3, cpunum); } -static TIMER_CALLBACK( m37710_timer_4_cb ) { int cpunum = param; m37710_timer_cb_common((m37710i_cpu_struct *)ptr, 4, cpunum); } -static TIMER_CALLBACK( m37710_timer_5_cb ) { int cpunum = param; m37710_timer_cb_common((m37710i_cpu_struct *)ptr, 5, cpunum); } -static TIMER_CALLBACK( m37710_timer_6_cb ) { int cpunum = param; m37710_timer_cb_common((m37710i_cpu_struct *)ptr, 6, cpunum); } -static TIMER_CALLBACK( m37710_timer_7_cb ) { int cpunum = param; m37710_timer_cb_common((m37710i_cpu_struct *)ptr, 7, cpunum); } - static void m37710_external_tick(m37710i_cpu_struct *m37710i_cpu, int timer, int state) { // we only care if the state is "on" @@ -956,6 +949,7 @@ static STATE_POSTLOAD( m37710_restore_state ) static CPU_INIT( m37710 ) { m37710i_cpu_struct *m37710i_cpu = device->token; + int i; memset(m37710i_cpu, 0, sizeof(m37710i_cpu)); @@ -968,15 +962,9 @@ static CPU_INIT( m37710 ) m37710i_cpu->source = 0; m37710i_cpu->destination = 0; - - m37710i_cpu->timers[0] = timer_alloc(device->machine, m37710_timer_0_cb, m37710i_cpu); - m37710i_cpu->timers[1] = timer_alloc(device->machine, m37710_timer_1_cb, m37710i_cpu); - m37710i_cpu->timers[2] = timer_alloc(device->machine, m37710_timer_2_cb, m37710i_cpu); - m37710i_cpu->timers[3] = timer_alloc(device->machine, m37710_timer_3_cb, m37710i_cpu); - m37710i_cpu->timers[4] = timer_alloc(device->machine, m37710_timer_4_cb, m37710i_cpu); - m37710i_cpu->timers[5] = timer_alloc(device->machine, m37710_timer_5_cb, m37710i_cpu); - m37710i_cpu->timers[6] = timer_alloc(device->machine, m37710_timer_6_cb, m37710i_cpu); - m37710i_cpu->timers[7] = timer_alloc(device->machine, m37710_timer_7_cb, m37710i_cpu); + + for (i = 0; i < 8; i++) + m37710i_cpu->timers[0] = timer_alloc(device->machine, m37710_timer_cb, m37710i_cpu); state_save_register_item("M377xx", device->tag, 0, m37710i_cpu->a); state_save_register_item("M377xx", device->tag, 0, m37710i_cpu->b); diff --git a/src/emu/cpu/m6502/ill02.h b/src/emu/cpu/m6502/ill02.h index 2ba934ab54c..a68780bcc62 100644 --- a/src/emu/cpu/m6502/ill02.h +++ b/src/emu/cpu/m6502/ill02.h @@ -235,7 +235,7 @@ #if 0 #define SSH \ tmp = S = A & X; \ - tmp &= (UINT8)(memory_raw_read_byte(m6502->space, (PCW + 1) & 0xffff) + 1) + tmp &= (UINT8)(memory_raw_read_byte(cpustate->space, (PCW + 1) & 0xffff) + 1) #endif /* 6510 ******************************************************** @@ -264,7 +264,7 @@ #define KIL \ PCW--; \ logerror("M6510 KILL opcode %04x: %02x\n", \ - PCW, memory_decrypted_read_byte(m6502->space, PCW)) + PCW, memory_decrypted_read_byte(cpustate->space, PCW)) /* N2A03 ******************************************************* * ARR logical and, rotate right - no decimal mode diff --git a/src/emu/cpu/m6502/m4510.c b/src/emu/cpu/m6502/m4510.c index 039ad5668ea..6c172c93c27 100644 --- a/src/emu/cpu/m6502/m4510.c +++ b/src/emu/cpu/m6502/m4510.c @@ -162,16 +162,16 @@ static void *token; * include the opcode macros, functions and tables ***************************************************************/ -INLINE int m4510_cpu_readop(m4510_Regs *m4510) +INLINE int m4510_cpu_readop(m4510_Regs *cpustate) { - register UINT16 t=m4510->pc.w.l++; - return memory_decrypted_read_byte(m4510->space, M4510_MEM(t)); + register UINT16 t=cpustate->pc.w.l++; + return memory_decrypted_read_byte(cpustate->space, M4510_MEM(t)); } -INLINE int m4510_cpu_readop_arg(m4510_Regs *m4510) +INLINE int m4510_cpu_readop_arg(m4510_Regs *cpustate) { - register UINT16 t=m4510->pc.w.l++; - return memory_raw_read_byte(m4510->space, M4510_MEM(t)); + register UINT16 t=cpustate->pc.w.l++; + return memory_raw_read_byte(cpustate->space, M4510_MEM(t)); } #define M4510 @@ -179,34 +179,34 @@ INLINE int m4510_cpu_readop_arg(m4510_Regs *m4510) static UINT8 default_rdmem_id(const address_space *space, offs_t address) { - m4510_Regs *m4510 = space->cpu->token; + m4510_Regs *cpustate = space->cpu->token; return memory_read_byte_8le(space, M4510_MEM(address)); } static void default_wrmem_id(const address_space *space, offs_t address, UINT8 data) { - m4510_Regs *m4510 = space->cpu->token; + m4510_Regs *cpustate = space->cpu->token; memory_write_byte_8le(space, M4510_MEM(address), data); } static CPU_INIT( m4510 ) { - m4510_Regs *m4510 = device->token; + m4510_Regs *cpustate = device->token; token = device->token; - m4510->interrupt_inhibit = 0; - m4510->rdmem_id = default_rdmem_id; - m4510->wrmem_id = default_wrmem_id; - m4510->irq_callback = irqcallback; - m4510->device = device; - m4510->space = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM); + cpustate->interrupt_inhibit = 0; + cpustate->rdmem_id = default_rdmem_id; + cpustate->wrmem_id = default_wrmem_id; + cpustate->irq_callback = irqcallback; + cpustate->device = device; + cpustate->space = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM); } static CPU_RESET( m4510 ) { - m4510_Regs *m4510 = device->token; + m4510_Regs *cpustate = device->token; - m4510->insn = insn4510; + cpustate->insn = insn4510; /* wipe out the rest of the m65ce02 structure */ /* read the reset vector into PC */ @@ -215,21 +215,21 @@ static CPU_RESET( m4510 ) PCH = RDMEM(M4510_RST_VEC+1); /* after reset in 6502 compatibility mode */ - m4510->sp.d = 0x01ff; /* high byte descriped in databook */ - m4510->z = 0; + cpustate->sp.d = 0x01ff; /* high byte descriped in databook */ + cpustate->z = 0; B = 0; - m4510->p = F_E|F_B|F_I|F_Z; /* set E, I and Z flags */ - m4510->interrupt_inhibit = 0; - m4510->pending_irq = 0; /* nonzero if an IRQ is pending */ - m4510->after_cli = 0; /* pending IRQ and last insn cleared I */ - m4510->irq_callback = NULL; + cpustate->p = F_E|F_B|F_I|F_Z; /* set E, I and Z flags */ + cpustate->interrupt_inhibit = 0; + cpustate->pending_irq = 0; /* nonzero if an IRQ is pending */ + cpustate->after_cli = 0; /* pending IRQ and last insn cleared I */ + cpustate->irq_callback = NULL; /* don't know */ - m4510->high=0x8200; - m4510->mem[7]=0x20000; + cpustate->high=0x8200; + cpustate->mem[7]=0x20000; - m4510->port = 0xff; - m4510->ddr = 0x00; + cpustate->port = 0xff; + cpustate->ddr = 0x00; } static CPU_EXIT( m4510 ) @@ -243,39 +243,39 @@ static CPU_GET_CONTEXT( m4510 ) static CPU_SET_CONTEXT( m4510 ) { - m4510_Regs *m4510; + m4510_Regs *cpustate; if( src ) { token = src; - m4510 = token; + cpustate = token; } } -INLINE void m4510_take_irq(m4510_Regs *m4510) +INLINE void m4510_take_irq(m4510_Regs *cpustate) { - if(( !(P & F_I) ) && (m4510->interrupt_inhibit == 0)) + if(( !(P & F_I) ) && (cpustate->interrupt_inhibit == 0)) { EAD = M4510_IRQ_VEC; - m4510->icount -= 7; + cpustate->icount -= 7; PUSH(PCH); PUSH(PCL); PUSH(P & ~F_B); P = (P & ~F_D) | F_I; /* knock out D and set I flag */ PCL = RDMEM(EAD); PCH = RDMEM(EAD+1); - LOG(("M4510#%d takes IRQ ($%04x)\n", cpunum_get_active(), PCD)); + LOG(("M4510 '%s' takes IRQ ($%04x)\n", cpustate->device->tag, PCD)); /* call back the cpuintrf to let it clear the line */ - if (m4510->irq_callback) (*m4510->irq_callback)(m4510->device, 0); + if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0); } - m4510->pending_irq = 0; + cpustate->pending_irq = 0; } static CPU_EXECUTE( m4510 ) { - m4510_Regs *m4510 = device->token; + m4510_Regs *cpustate = device->token; - m4510->icount = cycles; + cpustate->icount = cycles; do { @@ -285,21 +285,21 @@ static CPU_EXECUTE( m4510 ) debugger_instruction_hook(device, PCD); /* if an irq is pending, take it now */ - if( m4510->pending_irq ) - m4510_take_irq(m4510); + if( cpustate->pending_irq ) + m4510_take_irq(cpustate); op = RDOP(); - (*insn4510[op])(m4510); + (*insn4510[op])(cpustate); /* check if the I flag was just reset (interrupts enabled) */ - if( m4510->after_cli ) + if( cpustate->after_cli ) { - LOG(("M4510#%d after_cli was >0", cpunum_get_active())); - m4510->after_cli = 0; - if (m4510->irq_state != CLEAR_LINE) + LOG(("M4510 '%s' after_cli was >0", cpustate->device->tag)); + cpustate->after_cli = 0; + if (cpustate->irq_state != CLEAR_LINE) { LOG((": irq line is asserted: set pending IRQ\n")); - m4510->pending_irq = 1; + cpustate->pending_irq = 1; } else { @@ -307,64 +307,64 @@ static CPU_EXECUTE( m4510 ) } } else - if( m4510->pending_irq ) - m4510_take_irq(m4510); + if( cpustate->pending_irq ) + m4510_take_irq(cpustate); - } while (m4510->icount > 0); + } while (cpustate->icount > 0); - return cycles - m4510->icount; + return cycles - cpustate->icount; } -static void m4510_set_irq_line(m4510_Regs *m4510, int irqline, int state) +static void m4510_set_irq_line(m4510_Regs *cpustate, int irqline, int state) { if (irqline == INPUT_LINE_NMI) { - if (m4510->nmi_state == state) return; - m4510->nmi_state = state; + if (cpustate->nmi_state == state) return; + cpustate->nmi_state = state; if( state != CLEAR_LINE ) { - LOG(("M4510#%d set_nmi_line(ASSERT)\n", cpunum_get_active())); + LOG(("M4510 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag)); EAD = M4510_NMI_VEC; - m4510->icount -= 7; + cpustate->icount -= 7; PUSH(PCH); PUSH(PCL); PUSH(P & ~F_B); P = (P & ~F_D) | F_I; /* knock out D and set I flag */ PCL = RDMEM(EAD); PCH = RDMEM(EAD+1); - LOG(("M4510#%d takes NMI ($%04x)\n", cpunum_get_active(), PCD)); + LOG(("M4510 '%s' takes NMI ($%04x)\n", cpustate->device->tag, PCD)); } } else { - m4510->irq_state = state; + cpustate->irq_state = state; if( state != CLEAR_LINE ) { - LOG(("M4510#%d set_irq_line(ASSERT)\n", cpunum_get_active())); - m4510->pending_irq = 1; + LOG(("M4510 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag)); + cpustate->pending_irq = 1; } } } -static UINT8 m4510_get_port(m4510_Regs *m4510) +static UINT8 m4510_get_port(m4510_Regs *cpustate) { - return (m4510->port & m4510->ddr) | (m4510->ddr ^ 0xff); + return (cpustate->port & cpustate->ddr) | (cpustate->ddr ^ 0xff); } static READ8_HANDLER( m4510_read_0000 ) { UINT8 result = 0x00; - m4510_Regs *m4510 = token; + m4510_Regs *cpustate = token; switch(offset) { case 0x0000: /* DDR */ - result = m4510->ddr; + result = cpustate->ddr; break; case 0x0001: /* Data Port */ - if (m4510->port_read) - result = m4510->port_read(m4510->device, 0); - result = (m4510->ddr & m4510->port) | (~m4510->ddr & result); + if (cpustate->port_read) + result = cpustate->port_read(cpustate->device, 0); + result = (cpustate->ddr & cpustate->port) | (~cpustate->ddr & result); break; } return result; @@ -372,20 +372,20 @@ static READ8_HANDLER( m4510_read_0000 ) static WRITE8_HANDLER( m4510_write_0000 ) { - m4510_Regs *m4510 = token; + m4510_Regs *cpustate = token; switch(offset) { case 0x0000: /* DDR */ - m4510->ddr = data; + cpustate->ddr = data; break; case 0x0001: /* Data Port */ - m4510->port = data; + cpustate->port = data; break; } - if (m4510->port_write) - m4510->port_write(m4510->device, 0, m4510_get_port(m4510)); + if (cpustate->port_write) + cpustate->port_write(cpustate->device, 0, m4510_get_port(cpustate)); } static ADDRESS_MAP_START(m4510_mem, ADDRESS_SPACE_PROGRAM, 8) @@ -394,7 +394,7 @@ ADDRESS_MAP_END static CPU_TRANSLATE( m4510 ) { - m4510_Regs *m4510 = device->token; + m4510_Regs *cpustate = device->token; if (space == ADDRESS_SPACE_PROGRAM) *address = M4510_MEM(*address); @@ -407,42 +407,42 @@ static CPU_TRANSLATE( m4510 ) static CPU_SET_INFO( m4510 ) { - m4510_Regs *m4510 = device->token; + m4510_Regs *cpustate = device->token; switch (state) { /* --- the following bits of info are set as 64-bit signed integers --- */ - case CPUINFO_INT_INPUT_STATE + M4510_IRQ_LINE: m4510_set_irq_line(m4510, M4510_IRQ_LINE, info->i); break; - case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: m4510_set_irq_line(m4510, INPUT_LINE_NMI, info->i); break; + case CPUINFO_INT_INPUT_STATE + M4510_IRQ_LINE: m4510_set_irq_line(cpustate, M4510_IRQ_LINE, info->i); break; + case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: m4510_set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break; case CPUINFO_INT_PC: PCW = info->i; break; - case CPUINFO_INT_REGISTER + M4510_PC: m4510->pc.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M4510_PC: cpustate->pc.w.l = info->i; break; case CPUINFO_INT_SP: SPL = info->i; break; - case CPUINFO_INT_REGISTER + M4510_S: m4510->sp.b.l = info->i; break; - case CPUINFO_INT_REGISTER + M4510_P: m4510->p = info->i; break; - case CPUINFO_INT_REGISTER + M4510_A: m4510->a = info->i; break; - case CPUINFO_INT_REGISTER + M4510_X: m4510->x = info->i; break; - case CPUINFO_INT_REGISTER + M4510_Y: m4510->y = info->i; break; - case CPUINFO_INT_REGISTER + M4510_Z: m4510->z = info->i; break; - case CPUINFO_INT_REGISTER + M4510_B: m4510->zp.b.h = info->i; break; - case CPUINFO_INT_REGISTER + M4510_MEM_LOW: m4510->low = info->i; break; - case CPUINFO_INT_REGISTER + M4510_MEM_HIGH: m4510->high = info->i; break; - case CPUINFO_INT_REGISTER + M4510_EA: m4510->ea.w.l = info->i; break; - case CPUINFO_INT_REGISTER + M4510_ZP: m4510->zp.w.l = info->i; break; - case CPUINFO_INT_REGISTER + M4510_MEM0: m4510->mem[0] = info->i; break; - case CPUINFO_INT_REGISTER + M4510_MEM1: m4510->mem[1] = info->i; break; - case CPUINFO_INT_REGISTER + M4510_MEM2: m4510->mem[2] = info->i; break; - case CPUINFO_INT_REGISTER + M4510_MEM3: m4510->mem[3] = info->i; break; - case CPUINFO_INT_REGISTER + M4510_MEM4: m4510->mem[4] = info->i; break; - case CPUINFO_INT_REGISTER + M4510_MEM5: m4510->mem[5] = info->i; break; - case CPUINFO_INT_REGISTER + M4510_MEM6: m4510->mem[6] = info->i; break; - case CPUINFO_INT_REGISTER + M4510_MEM7: m4510->mem[7] = info->i; break; + case CPUINFO_INT_REGISTER + M4510_S: cpustate->sp.b.l = info->i; break; + case CPUINFO_INT_REGISTER + M4510_P: cpustate->p = info->i; break; + case CPUINFO_INT_REGISTER + M4510_A: cpustate->a = info->i; break; + case CPUINFO_INT_REGISTER + M4510_X: cpustate->x = info->i; break; + case CPUINFO_INT_REGISTER + M4510_Y: cpustate->y = info->i; break; + case CPUINFO_INT_REGISTER + M4510_Z: cpustate->z = info->i; break; + case CPUINFO_INT_REGISTER + M4510_B: cpustate->zp.b.h = info->i; break; + case CPUINFO_INT_REGISTER + M4510_MEM_LOW: cpustate->low = info->i; break; + case CPUINFO_INT_REGISTER + M4510_MEM_HIGH: cpustate->high = info->i; break; + case CPUINFO_INT_REGISTER + M4510_EA: cpustate->ea.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M4510_ZP: cpustate->zp.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M4510_MEM0: cpustate->mem[0] = info->i; break; + case CPUINFO_INT_REGISTER + M4510_MEM1: cpustate->mem[1] = info->i; break; + case CPUINFO_INT_REGISTER + M4510_MEM2: cpustate->mem[2] = info->i; break; + case CPUINFO_INT_REGISTER + M4510_MEM3: cpustate->mem[3] = info->i; break; + case CPUINFO_INT_REGISTER + M4510_MEM4: cpustate->mem[4] = info->i; break; + case CPUINFO_INT_REGISTER + M4510_MEM5: cpustate->mem[5] = info->i; break; + case CPUINFO_INT_REGISTER + M4510_MEM6: cpustate->mem[6] = info->i; break; + case CPUINFO_INT_REGISTER + M4510_MEM7: cpustate->mem[7] = info->i; break; /* --- the following bits of info are set as pointers to data or functions --- */ - case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: m4510->rdmem_id = (m6502_read_indexed_func) info->f; break; - case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: m4510->wrmem_id = (m6502_write_indexed_func) info->f; break; - case CPUINFO_PTR_M6510_PORTREAD: m4510->port_read = (m6510_port_read_func) info->f; break; - case CPUINFO_PTR_M6510_PORTWRITE: m4510->port_write = (m6510_port_write_func) info->f; break; + case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: cpustate->rdmem_id = (m6502_read_indexed_func) info->f; break; + case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: cpustate->wrmem_id = (m6502_write_indexed_func) info->f; break; + case CPUINFO_PTR_M6510_PORTREAD: cpustate->port_read = (m6510_port_read_func) info->f; break; + case CPUINFO_PTR_M6510_PORTWRITE: cpustate->port_write = (m6510_port_write_func) info->f; break; } } @@ -454,12 +454,12 @@ static CPU_SET_INFO( m4510 ) CPU_GET_INFO( m4510 ) { - m4510_Regs *m4510 = (device != NULL) ? device->token : NULL; + m4510_Regs *cpustate = (device != NULL) ? device->token : NULL; switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m4510); break; + case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m4510_Regs); break; case CPUINFO_INT_INPUT_LINES: info->i = 2; break; case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break; case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; @@ -482,34 +482,34 @@ CPU_GET_INFO( m4510 ) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break; case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break; - case CPUINFO_INT_INPUT_STATE + M4510_IRQ_LINE: info->i = m4510->irq_state; break; - case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = m4510->nmi_state; break; + case CPUINFO_INT_INPUT_STATE + M4510_IRQ_LINE: info->i = cpustate->irq_state; break; + case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break; - case CPUINFO_INT_PREVIOUSPC: info->i = m4510->ppc.w.l; break; + case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc.w.l; break; case CPUINFO_INT_PC: info->i = PCD; break; - case CPUINFO_INT_REGISTER + M4510_PC: info->i = m4510->pc.w.l; break; + case CPUINFO_INT_REGISTER + M4510_PC: info->i = cpustate->pc.w.l; break; case CPUINFO_INT_SP: info->i = SPL; break; - case CPUINFO_INT_REGISTER + M4510_S: info->i = m4510->sp.b.l; break; - case CPUINFO_INT_REGISTER + M4510_P: info->i = m4510->p; break; - case CPUINFO_INT_REGISTER + M4510_A: info->i = m4510->a; break; - case CPUINFO_INT_REGISTER + M4510_X: info->i = m4510->x; break; - case CPUINFO_INT_REGISTER + M4510_Y: info->i = m4510->y; break; - case CPUINFO_INT_REGISTER + M4510_Z: info->i = m4510->z; break; - case CPUINFO_INT_REGISTER + M4510_B: info->i = m4510->zp.b.h; break; - case CPUINFO_INT_REGISTER + M4510_MEM_LOW: info->i = m4510->low; break; - case CPUINFO_INT_REGISTER + M4510_MEM_HIGH: info->i = m4510->high; break; - case CPUINFO_INT_REGISTER + M4510_EA: info->i = m4510->ea.w.l; break; - case CPUINFO_INT_REGISTER + M4510_ZP: info->i = m4510->zp.w.l; break; - case CPUINFO_INT_REGISTER + M4510_MEM0: info->i = m4510->mem[0]; break; - case CPUINFO_INT_REGISTER + M4510_MEM1: info->i = m4510->mem[1]; break; - case CPUINFO_INT_REGISTER + M4510_MEM2: info->i = m4510->mem[2]; break; - case CPUINFO_INT_REGISTER + M4510_MEM3: info->i = m4510->mem[3]; break; - case CPUINFO_INT_REGISTER + M4510_MEM4: info->i = m4510->mem[4]; break; - case CPUINFO_INT_REGISTER + M4510_MEM5: info->i = m4510->mem[5]; break; - case CPUINFO_INT_REGISTER + M4510_MEM6: info->i = m4510->mem[6]; break; - case CPUINFO_INT_REGISTER + M4510_MEM7: info->i = m4510->mem[7]; break; - case CPUINFO_INT_M6510_PORT: info->i = m4510_get_port(m4510); break; + case CPUINFO_INT_REGISTER + M4510_S: info->i = cpustate->sp.b.l; break; + case CPUINFO_INT_REGISTER + M4510_P: info->i = cpustate->p; break; + case CPUINFO_INT_REGISTER + M4510_A: info->i = cpustate->a; break; + case CPUINFO_INT_REGISTER + M4510_X: info->i = cpustate->x; break; + case CPUINFO_INT_REGISTER + M4510_Y: info->i = cpustate->y; break; + case CPUINFO_INT_REGISTER + M4510_Z: info->i = cpustate->z; break; + case CPUINFO_INT_REGISTER + M4510_B: info->i = cpustate->zp.b.h; break; + case CPUINFO_INT_REGISTER + M4510_MEM_LOW: info->i = cpustate->low; break; + case CPUINFO_INT_REGISTER + M4510_MEM_HIGH: info->i = cpustate->high; break; + case CPUINFO_INT_REGISTER + M4510_EA: info->i = cpustate->ea.w.l; break; + case CPUINFO_INT_REGISTER + M4510_ZP: info->i = cpustate->zp.w.l; break; + case CPUINFO_INT_REGISTER + M4510_MEM0: info->i = cpustate->mem[0]; break; + case CPUINFO_INT_REGISTER + M4510_MEM1: info->i = cpustate->mem[1]; break; + case CPUINFO_INT_REGISTER + M4510_MEM2: info->i = cpustate->mem[2]; break; + case CPUINFO_INT_REGISTER + M4510_MEM3: info->i = cpustate->mem[3]; break; + case CPUINFO_INT_REGISTER + M4510_MEM4: info->i = cpustate->mem[4]; break; + case CPUINFO_INT_REGISTER + M4510_MEM5: info->i = cpustate->mem[5]; break; + case CPUINFO_INT_REGISTER + M4510_MEM6: info->i = cpustate->mem[6]; break; + case CPUINFO_INT_REGISTER + M4510_MEM7: info->i = cpustate->mem[7]; break; + case CPUINFO_INT_M6510_PORT: info->i = m4510_get_port(cpustate); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m4510); break; @@ -521,13 +521,13 @@ CPU_GET_INFO( m4510 ) case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m4510); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m4510); break; - case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m4510->icount; break; + case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP: info->internal_map8 = ADDRESS_MAP_NAME(m4510_mem); break; case CPUINFO_PTR_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(m4510); break; - case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: info->f = (genf *) m4510->rdmem_id; break; - case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: info->f = (genf *) m4510->wrmem_id; break; - case CPUINFO_PTR_M6510_PORTREAD: info->f = (genf *) m4510->port_read; break; - case CPUINFO_PTR_M6510_PORTWRITE: info->f = (genf *) m4510->port_write; break; + case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: info->f = (genf *) cpustate->rdmem_id; break; + case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: info->f = (genf *) cpustate->wrmem_id; break; + case CPUINFO_PTR_M6510_PORTREAD: info->f = (genf *) cpustate->port_read; break; + case CPUINFO_PTR_M6510_PORTWRITE: info->f = (genf *) cpustate->port_write; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "M4510"); break; @@ -538,28 +538,28 @@ CPU_GET_INFO( m4510 ) case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c", - m4510->p & 0x80 ? 'N':'.', - m4510->p & 0x40 ? 'V':'.', - m4510->p & 0x20 ? 'R':'.', - m4510->p & 0x10 ? 'B':'.', - m4510->p & 0x08 ? 'D':'.', - m4510->p & 0x04 ? 'I':'.', - m4510->p & 0x02 ? 'Z':'.', - m4510->p & 0x01 ? 'C':'.'); + cpustate->p & 0x80 ? 'N':'.', + cpustate->p & 0x40 ? 'V':'.', + cpustate->p & 0x20 ? 'R':'.', + cpustate->p & 0x10 ? 'B':'.', + cpustate->p & 0x08 ? 'D':'.', + cpustate->p & 0x04 ? 'I':'.', + cpustate->p & 0x02 ? 'Z':'.', + cpustate->p & 0x01 ? 'C':'.'); break; - case CPUINFO_STR_REGISTER + M4510_PC: sprintf(info->s, "PC:%04X", m4510->pc.w.l); break; - case CPUINFO_STR_REGISTER + M4510_S: sprintf(info->s, "S:%02X", m4510->sp.b.l); break; - case CPUINFO_STR_REGISTER + M4510_P: sprintf(info->s, "P:%02X", m4510->p); break; - case CPUINFO_STR_REGISTER + M4510_A: sprintf(info->s, "A:%02X", m4510->a); break; - case CPUINFO_STR_REGISTER + M4510_X: sprintf(info->s, "X:%02X", m4510->x); break; - case CPUINFO_STR_REGISTER + M4510_Y: sprintf(info->s, "Y:%02X", m4510->y); break; - case CPUINFO_STR_REGISTER + M4510_Z: sprintf(info->s, "Z:%02X", m4510->z); break; - case CPUINFO_STR_REGISTER + M4510_B: sprintf(info->s, "B:%02X", m4510->zp.b.h); break; - case CPUINFO_STR_REGISTER + M4510_MEM_LOW: sprintf(info->s, "M0:%01X", m4510->low); break; - case CPUINFO_STR_REGISTER + M4510_MEM_HIGH: sprintf(info->s, "M1:%01X", m4510->high); break; - case CPUINFO_STR_REGISTER + M4510_EA: sprintf(info->s, "EA:%04X", m4510->ea.w.l); break; - case CPUINFO_STR_REGISTER + M4510_ZP: sprintf(info->s, "ZP:%03X", m4510->zp.w.l); break; + case CPUINFO_STR_REGISTER + M4510_PC: sprintf(info->s, "PC:%04X", cpustate->pc.w.l); break; + case CPUINFO_STR_REGISTER + M4510_S: sprintf(info->s, "S:%02X", cpustate->sp.b.l); break; + case CPUINFO_STR_REGISTER + M4510_P: sprintf(info->s, "P:%02X", cpustate->p); break; + case CPUINFO_STR_REGISTER + M4510_A: sprintf(info->s, "A:%02X", cpustate->a); break; + case CPUINFO_STR_REGISTER + M4510_X: sprintf(info->s, "X:%02X", cpustate->x); break; + case CPUINFO_STR_REGISTER + M4510_Y: sprintf(info->s, "Y:%02X", cpustate->y); break; + case CPUINFO_STR_REGISTER + M4510_Z: sprintf(info->s, "Z:%02X", cpustate->z); break; + case CPUINFO_STR_REGISTER + M4510_B: sprintf(info->s, "B:%02X", cpustate->zp.b.h); break; + case CPUINFO_STR_REGISTER + M4510_MEM_LOW: sprintf(info->s, "M0:%01X", cpustate->low); break; + case CPUINFO_STR_REGISTER + M4510_MEM_HIGH: sprintf(info->s, "M1:%01X", cpustate->high); break; + case CPUINFO_STR_REGISTER + M4510_EA: sprintf(info->s, "EA:%04X", cpustate->ea.w.l); break; + case CPUINFO_STR_REGISTER + M4510_ZP: sprintf(info->s, "ZP:%03X", cpustate->zp.w.l); break; } } diff --git a/src/emu/cpu/m6502/m6502.c b/src/emu/cpu/m6502/m6502.c index 93a48dffadf..be5f981a1b0 100644 --- a/src/emu/cpu/m6502/m6502.c +++ b/src/emu/cpu/m6502/m6502.c @@ -94,7 +94,6 @@ struct _m6502_Regs static void *token; -//static m6502_Regs *m6502; static UINT8 default_rdmem_id(const address_space *space, offs_t offset) { return memory_read_byte_8le(space, offset); } static void default_wdmem_id(const address_space *space, offs_t offset, UINT8 data) { memory_write_byte_8le(space, offset, data); } @@ -134,37 +133,37 @@ static void default_wdmem_id(const address_space *space, offs_t offset, UINT8 da * *****************************************************************************/ -static void m6502_common_init(const device_config *device, int index, int clock, cpu_irq_callback irqcallback, UINT8 subtype, void (*const *insn)(m6502_Regs *m6502), const char *type) +static void m6502_common_init(const device_config *device, int index, int clock, cpu_irq_callback irqcallback, UINT8 subtype, void (*const *insn)(m6502_Regs *cpustate), const char *type) { - m6502_Regs *m6502 = device->token; + m6502_Regs *cpustate = device->token; token = device->token; // temporary - m6502->irq_callback = irqcallback; - m6502->device = device; - m6502->space = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM); - m6502->subtype = subtype; - m6502->insn = insn; - m6502->rdmem_id = default_rdmem_id; - m6502->wrmem_id = default_wdmem_id; + cpustate->irq_callback = irqcallback; + cpustate->device = device; + cpustate->space = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM); + cpustate->subtype = subtype; + cpustate->insn = insn; + cpustate->rdmem_id = default_rdmem_id; + cpustate->wrmem_id = default_wdmem_id; - state_save_register_item(type, device->tag, 0, m6502->pc.w.l); - state_save_register_item(type, device->tag, 0, m6502->sp.w.l); - state_save_register_item(type, device->tag, 0, m6502->p); - state_save_register_item(type, device->tag, 0, m6502->a); - state_save_register_item(type, device->tag, 0, m6502->x); - state_save_register_item(type, device->tag, 0, m6502->y); - state_save_register_item(type, device->tag, 0, m6502->pending_irq); - state_save_register_item(type, device->tag, 0, m6502->after_cli); - state_save_register_item(type, device->tag, 0, m6502->nmi_state); - state_save_register_item(type, device->tag, 0, m6502->irq_state); - state_save_register_item(type, device->tag, 0, m6502->so_state); + state_save_register_item(type, device->tag, 0, cpustate->pc.w.l); + state_save_register_item(type, device->tag, 0, cpustate->sp.w.l); + state_save_register_item(type, device->tag, 0, cpustate->p); + state_save_register_item(type, device->tag, 0, cpustate->a); + state_save_register_item(type, device->tag, 0, cpustate->x); + state_save_register_item(type, device->tag, 0, cpustate->y); + state_save_register_item(type, device->tag, 0, cpustate->pending_irq); + state_save_register_item(type, device->tag, 0, cpustate->after_cli); + state_save_register_item(type, device->tag, 0, cpustate->nmi_state); + state_save_register_item(type, device->tag, 0, cpustate->irq_state); + state_save_register_item(type, device->tag, 0, cpustate->so_state); #if (HAS_M6510) || (HAS_M6510T) || (HAS_M8502) || (HAS_M7501) if (subtype == SUBTYPE_6510) { - state_save_register_item(type, device->tag, 0, m6502->port); - state_save_register_item(type, device->tag, 0, m6502->ddr); + state_save_register_item(type, device->tag, 0, cpustate->port); + state_save_register_item(type, device->tag, 0, cpustate->ddr); } #endif } @@ -176,18 +175,18 @@ static CPU_INIT( m6502 ) static CPU_RESET( m6502 ) { - m6502_Regs *m6502 = device->token; + m6502_Regs *cpustate = device->token; /* wipe out the rest of the m6502 structure */ /* read the reset vector into PC */ PCL = RDMEM(M6502_RST_VEC); PCH = RDMEM(M6502_RST_VEC+1); - m6502->sp.d = 0x01ff; /* stack pointer starts at page 1 offset FF */ - m6502->p = F_T|F_I|F_Z|F_B|(P&F_D); /* set T, I and Z flags */ - m6502->pending_irq = 0; /* nonzero if an IRQ is pending */ - m6502->after_cli = 0; /* pending IRQ and last insn cleared I */ - m6502->irq_state = 0; - m6502->nmi_state = 0; + cpustate->sp.d = 0x01ff; /* stack pointer starts at page 1 offset FF */ + cpustate->p = F_T|F_I|F_Z|F_B|(P&F_D); /* set T, I and Z flags */ + cpustate->pending_irq = 0; /* nonzero if an IRQ is pending */ + cpustate->after_cli = 0; /* pending IRQ and last insn cleared I */ + cpustate->irq_state = 0; + cpustate->nmi_state = 0; } static CPU_EXIT( m6502 ) @@ -201,39 +200,39 @@ static CPU_GET_CONTEXT( m6502 ) static CPU_SET_CONTEXT( m6502 ) { - m6502_Regs *m6502; + m6502_Regs *cpustate; if( src ) { token = src; - m6502 = token; + cpustate = token; } } -INLINE void m6502_take_irq(m6502_Regs *m6502) +INLINE void m6502_take_irq(m6502_Regs *cpustate) { if( !(P & F_I) ) { EAD = M6502_IRQ_VEC; - m6502->icount -= 2; + cpustate->icount -= 2; PUSH(PCH); PUSH(PCL); PUSH(P & ~F_B); P |= F_I; /* set I flag */ PCL = RDMEM(EAD); PCH = RDMEM(EAD+1); - LOG(("M6502#%d takes IRQ ($%04x)\n", cpunum_get_active(), PCD)); + LOG(("M6502 '%s' takes IRQ ($%04x)\n", cpustate->device->tag, PCD)); /* call back the cpuintrf to let it clear the line */ - if (m6502->irq_callback) (*m6502->irq_callback)(m6502->device, 0); + if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0); } - m6502->pending_irq = 0; + cpustate->pending_irq = 0; } static CPU_EXECUTE( m6502 ) { - m6502_Regs *m6502 = device->token; + m6502_Regs *cpustate = device->token; - m6502->icount = cycles; + cpustate->icount = cycles; do { @@ -243,21 +242,21 @@ static CPU_EXECUTE( m6502 ) debugger_instruction_hook(device, PCD); /* if an irq is pending, take it now */ - if( m6502->pending_irq ) - m6502_take_irq(m6502); + if( cpustate->pending_irq ) + m6502_take_irq(cpustate); op = RDOP(); - (*m6502->insn[op])(m6502); + (*cpustate->insn[op])(cpustate); /* check if the I flag was just reset (interrupts enabled) */ - if( m6502->after_cli ) + if( cpustate->after_cli ) { - LOG(("M6502#%d after_cli was >0", cpunum_get_active())); - m6502->after_cli = 0; - if (m6502->irq_state != CLEAR_LINE) + LOG(("M6502 '%s' after_cli was >0", cpustate->device->tag)); + cpustate->after_cli = 0; + if (cpustate->irq_state != CLEAR_LINE) { LOG((": irq line is asserted: set pending IRQ\n")); - m6502->pending_irq = 1; + cpustate->pending_irq = 1; } else { @@ -265,62 +264,62 @@ static CPU_EXECUTE( m6502 ) } } else { - if ( m6502->pending_irq == 2 ) { - if ( m6502->int_occured - m6502->icount > 1 ) { - m6502->pending_irq = 1; + if ( cpustate->pending_irq == 2 ) { + if ( cpustate->int_occured - cpustate->icount > 1 ) { + cpustate->pending_irq = 1; } } - if( m6502->pending_irq == 1 ) - m6502_take_irq(m6502); - if ( m6502->pending_irq == 2 ) { - m6502->pending_irq = 1; + if( cpustate->pending_irq == 1 ) + m6502_take_irq(cpustate); + if ( cpustate->pending_irq == 2 ) { + cpustate->pending_irq = 1; } } - } while (m6502->icount > 0); + } while (cpustate->icount > 0); - return cycles - m6502->icount; + return cycles - cpustate->icount; } -static void m6502_set_irq_line(m6502_Regs *m6502, int irqline, int state) +static void m6502_set_irq_line(m6502_Regs *cpustate, int irqline, int state) { if (irqline == INPUT_LINE_NMI) { - if (m6502->nmi_state == state) return; - m6502->nmi_state = state; + if (cpustate->nmi_state == state) return; + cpustate->nmi_state = state; if( state != CLEAR_LINE ) { - LOG(( "M6502#%d set_nmi_line(ASSERT)\n", cpunum_get_active())); + LOG(( "M6502 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag)); EAD = M6502_NMI_VEC; - m6502->icount -= 2; + cpustate->icount -= 2; PUSH(PCH); PUSH(PCL); PUSH(P & ~F_B); P |= F_I; /* set I flag */ PCL = RDMEM(EAD); PCH = RDMEM(EAD+1); - LOG(("M6502#%d takes NMI ($%04x)\n", cpunum_get_active(), PCD)); + LOG(("M6502 '%s' takes NMI ($%04x)\n", cpustate->device->tag, PCD)); } } else { if( irqline == M6502_SET_OVERFLOW ) { - if( m6502->so_state && !state ) + if( cpustate->so_state && !state ) { - LOG(( "M6502#%d set overflow\n", cpunum_get_active())); + LOG(( "M6502 '%s' set overflow\n", cpustate->device->tag)); P|=F_V; } - m6502->so_state=state; + cpustate->so_state=state; return; } - m6502->irq_state = state; + cpustate->irq_state = state; if( state != CLEAR_LINE ) { - LOG(( "M6502#%d set_irq_line(ASSERT)\n", cpunum_get_active())); - m6502->pending_irq = 1; -// m6502->pending_irq = 2; - m6502->int_occured = m6502->icount; + LOG(( "M6502 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag)); + cpustate->pending_irq = 1; +// cpustate->pending_irq = 2; + cpustate->int_occured = cpustate->icount; } } } @@ -343,9 +342,9 @@ static CPU_INIT( n2a03 ) from the PSG core when such an occasion arises. */ void n2a03_irq(const device_config *device) { - m6502_Regs *m6502 = device->token; + m6502_Regs *cpustate = device->token; - m6502_take_irq(m6502); + m6502_take_irq(cpustate); } #endif @@ -362,32 +361,32 @@ static CPU_INIT( m6510 ) static CPU_RESET( m6510 ) { - m6502_Regs *m6502 = device->token; + m6502_Regs *cpustate = device->token; CPU_RESET_CALL(m6502); - m6502->port = 0xff; - m6502->ddr = 0x00; + cpustate->port = 0xff; + cpustate->ddr = 0x00; } -static UINT8 m6510_get_port(m6502_Regs *m6502) +static UINT8 m6510_get_port(m6502_Regs *cpustate) { - return (m6502->port & m6502->ddr) | (m6502->ddr ^ 0xff); + return (cpustate->port & cpustate->ddr) | (cpustate->ddr ^ 0xff); } static READ8_HANDLER( m6510_read_0000 ) { - m6502_Regs *m6502 = token; + m6502_Regs *cpustate = token; UINT8 result = 0x00; switch(offset) { case 0x0000: /* DDR */ - result = m6502->ddr; + result = cpustate->ddr; break; case 0x0001: /* Data Port */ - if (m6502->port_read) - result = m6502->port_read( m6502->device, m6502->ddr ); - result = (m6502->ddr & m6502->port) | (~m6502->ddr & result); + if (cpustate->port_read) + result = cpustate->port_read( cpustate->device, cpustate->ddr ); + result = (cpustate->ddr & cpustate->port) | (~cpustate->ddr & result); break; } return result; @@ -395,20 +394,20 @@ static READ8_HANDLER( m6510_read_0000 ) static WRITE8_HANDLER( m6510_write_0000 ) { - m6502_Regs *m6502 = token; + m6502_Regs *cpustate = token; switch(offset) { case 0x0000: /* DDR */ - m6502->ddr = data; + cpustate->ddr = data; break; case 0x0001: /* Data Port */ - m6502->port = data; + cpustate->port = data; break; } - if (m6502->port_write) - m6502->port_write( m6502->device, m6502->ddr, m6502->port & m6502->ddr ); + if (cpustate->port_write) + cpustate->port_write( cpustate->device, cpustate->ddr, cpustate->port & cpustate->ddr ); } static ADDRESS_MAP_START(m6510_mem, ADDRESS_SPACE_PROGRAM, 8) @@ -430,36 +429,36 @@ static CPU_INIT( m65c02 ) static CPU_RESET( m65c02 ) { - m6502_Regs *m6502 = device->token; + m6502_Regs *cpustate = device->token; CPU_RESET_CALL(m6502); P &=~F_D; } -INLINE void m65c02_take_irq(m6502_Regs *m6502) +INLINE void m65c02_take_irq(m6502_Regs *cpustate) { if( !(P & F_I) ) { EAD = M6502_IRQ_VEC; - m6502->icount -= 2; + cpustate->icount -= 2; PUSH(PCH); PUSH(PCL); PUSH(P & ~F_B); P = (P & ~F_D) | F_I; /* knock out D and set I flag */ PCL = RDMEM(EAD); PCH = RDMEM(EAD+1); - LOG(("M65c02#%d takes IRQ ($%04x)\n", cpunum_get_active(), PCD)); + LOG(("M65c02 '%s' takes IRQ ($%04x)\n", cpustate->device->tag, PCD)); /* call back the cpuintrf to let it clear the line */ - if (m6502->irq_callback) (*m6502->irq_callback)(m6502->device, 0); + if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0); } - m6502->pending_irq = 0; + cpustate->pending_irq = 0; } static CPU_EXECUTE( m65c02 ) { - m6502_Regs *m6502 = device->token; + m6502_Regs *cpustate = device->token; - m6502->icount = cycles; + cpustate->icount = cycles; do { @@ -469,22 +468,22 @@ static CPU_EXECUTE( m65c02 ) debugger_instruction_hook(device, PCD); op = RDOP(); - (*m6502->insn[op])(m6502); + (*cpustate->insn[op])(cpustate); /* if an irq is pending, take it now */ - if( m6502->pending_irq ) - m65c02_take_irq(m6502); + if( cpustate->pending_irq ) + m65c02_take_irq(cpustate); /* check if the I flag was just reset (interrupts enabled) */ - if( m6502->after_cli ) + if( cpustate->after_cli ) { - LOG(("M6502#%d after_cli was >0", cpunum_get_active())); - m6502->after_cli = 0; - if (m6502->irq_state != CLEAR_LINE) + LOG(("M6502 '%s' after_cli was >0", cpustate->device->tag)); + cpustate->after_cli = 0; + if (cpustate->irq_state != CLEAR_LINE) { LOG((": irq line is asserted: set pending IRQ\n")); - m6502->pending_irq = 1; + cpustate->pending_irq = 1; } else { @@ -492,36 +491,36 @@ static CPU_EXECUTE( m65c02 ) } } else - if( m6502->pending_irq ) - m65c02_take_irq(m6502); + if( cpustate->pending_irq ) + m65c02_take_irq(cpustate); - } while (m6502->icount > 0); + } while (cpustate->icount > 0); - return cycles - m6502->icount; + return cycles - cpustate->icount; } -static void m65c02_set_irq_line(m6502_Regs *m6502, int irqline, int state) +static void m65c02_set_irq_line(m6502_Regs *cpustate, int irqline, int state) { if (irqline == INPUT_LINE_NMI) { - if (m6502->nmi_state == state) return; - m6502->nmi_state = state; + if (cpustate->nmi_state == state) return; + cpustate->nmi_state = state; if( state != CLEAR_LINE ) { - LOG(( "M6502#%d set_nmi_line(ASSERT)\n", cpunum_get_active())); + LOG(( "M6502 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag)); EAD = M6502_NMI_VEC; - m6502->icount -= 2; + cpustate->icount -= 2; PUSH(PCH); PUSH(PCL); PUSH(P & ~F_B); P = (P & ~F_D) | F_I; /* knock out D and set I flag */ PCL = RDMEM(EAD); PCH = RDMEM(EAD+1); - LOG(("M6502#%d takes NMI ($%04x)\n", cpunum_get_active(), PCD)); + LOG(("M6502 '%s' takes NMI ($%04x)\n", cpustate->device->tag, PCD)); } } else - m6502_set_irq_line(m6502, irqline,state); + m6502_set_irq_line(cpustate, irqline,state); } #endif @@ -542,94 +541,94 @@ static CPU_INIT( m65sc02 ) static CPU_INIT( deco16 ) { - m6502_Regs *m6502 = device->token; + m6502_Regs *cpustate = device->token; m6502_common_init(device, index, clock, irqcallback, SUBTYPE_DECO16, insndeco16, "deco16"); - m6502->io = memory_find_address_space(device, ADDRESS_SPACE_IO); + cpustate->io = memory_find_address_space(device, ADDRESS_SPACE_IO); } static CPU_RESET( deco16 ) { - m6502_Regs *m6502 = device->token; + m6502_Regs *cpustate = device->token; CPU_RESET_CALL(m6502); - m6502->subtype = SUBTYPE_DECO16; - m6502->insn = insndeco16; + cpustate->subtype = SUBTYPE_DECO16; + cpustate->insn = insndeco16; PCL = RDMEM(DECO16_RST_VEC+1); PCH = RDMEM(DECO16_RST_VEC); - m6502->sp.d = 0x01ff; /* stack pointer starts at page 1 offset FF */ - m6502->p = F_T|F_I|F_Z|F_B|(P&F_D); /* set T, I and Z flags */ - m6502->pending_irq = 0; /* nonzero if an IRQ is pending */ - m6502->after_cli = 0; /* pending IRQ and last insn cleared I */ + cpustate->sp.d = 0x01ff; /* stack pointer starts at page 1 offset FF */ + cpustate->p = F_T|F_I|F_Z|F_B|(P&F_D); /* set T, I and Z flags */ + cpustate->pending_irq = 0; /* nonzero if an IRQ is pending */ + cpustate->after_cli = 0; /* pending IRQ and last insn cleared I */ } -INLINE void deco16_take_irq(m6502_Regs *m6502) +INLINE void deco16_take_irq(m6502_Regs *cpustate) { if( !(P & F_I) ) { EAD = DECO16_IRQ_VEC; - m6502->icount -= 2; + cpustate->icount -= 2; PUSH(PCH); PUSH(PCL); PUSH(P & ~F_B); P |= F_I; /* set I flag */ PCL = RDMEM(EAD+1); PCH = RDMEM(EAD); - LOG(("M6502#%d takes IRQ ($%04x)\n", cpunum_get_active(), PCD)); + LOG(("M6502 '%s' takes IRQ ($%04x)\n", cpustate->device->tag, PCD)); /* call back the cpuintrf to let it clear the line */ - if (m6502->irq_callback) (*m6502->irq_callback)(m6502->device, 0); + if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0); } - m6502->pending_irq = 0; + cpustate->pending_irq = 0; } -static void deco16_set_irq_line(m6502_Regs *m6502, int irqline, int state) +static void deco16_set_irq_line(m6502_Regs *cpustate, int irqline, int state) { if (irqline == INPUT_LINE_NMI) { - if (m6502->nmi_state == state) return; - m6502->nmi_state = state; + if (cpustate->nmi_state == state) return; + cpustate->nmi_state = state; if( state != CLEAR_LINE ) { - LOG(( "M6502#%d set_nmi_line(ASSERT)\n", cpunum_get_active())); + LOG(( "M6502 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag)); EAD = DECO16_NMI_VEC; - m6502->icount -= 7; + cpustate->icount -= 7; PUSH(PCH); PUSH(PCL); PUSH(P & ~F_B); P |= F_I; /* set I flag */ PCL = RDMEM(EAD+1); PCH = RDMEM(EAD); - LOG(("M6502#%d takes NMI ($%04x)\n", cpunum_get_active(), PCD)); + LOG(("M6502 '%s' takes NMI ($%04x)\n", cpustate->device->tag, PCD)); } } else { if( irqline == M6502_SET_OVERFLOW ) { - if( m6502->so_state && !state ) + if( cpustate->so_state && !state ) { - LOG(( "M6502#%d set overflow\n", cpunum_get_active())); + LOG(( "M6502 '%s' set overflow\n", cpustate->device->tag)); P|=F_V; } - m6502->so_state=state; + cpustate->so_state=state; return; } - m6502->irq_state = state; + cpustate->irq_state = state; if( state != CLEAR_LINE ) { - LOG(( "M6502#%d set_irq_line(ASSERT)\n", cpunum_get_active())); - m6502->pending_irq = 1; + LOG(( "M6502 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag)); + cpustate->pending_irq = 1; } } } static CPU_EXECUTE( deco16 ) { - m6502_Regs *m6502 = device->token; + m6502_Regs *cpustate = device->token; - m6502->icount = cycles; + cpustate->icount = cycles; do { @@ -639,22 +638,22 @@ static CPU_EXECUTE( deco16 ) debugger_instruction_hook(device, PCD); op = RDOP(); - (*m6502->insn[op])(m6502); + (*cpustate->insn[op])(cpustate); /* if an irq is pending, take it now */ - if( m6502->pending_irq ) - deco16_take_irq(m6502); + if( cpustate->pending_irq ) + deco16_take_irq(cpustate); /* check if the I flag was just reset (interrupts enabled) */ - if( m6502->after_cli ) + if( cpustate->after_cli ) { - LOG(("M6502#%d after_cli was >0", cpunum_get_active())); - m6502->after_cli = 0; - if (m6502->irq_state != CLEAR_LINE) + LOG(("M6502 %s after_cli was >0", cpustate->device->tag)); + cpustate->after_cli = 0; + if (cpustate->irq_state != CLEAR_LINE) { LOG((": irq line is asserted: set pending IRQ\n")); - m6502->pending_irq = 1; + cpustate->pending_irq = 1; } else { @@ -662,12 +661,12 @@ static CPU_EXECUTE( deco16 ) } } else - if( m6502->pending_irq ) - deco16_take_irq(m6502); + if( cpustate->pending_irq ) + deco16_take_irq(cpustate); - } while (m6502->icount > 0); + } while (cpustate->icount > 0); - return cycles - m6502->icount; + return cycles - cpustate->icount; } #endif @@ -680,29 +679,29 @@ static CPU_EXECUTE( deco16 ) static CPU_SET_INFO( m6502 ) { - m6502_Regs *m6502 = device->token; + m6502_Regs *cpustate = device->token; switch (state) { /* --- the following bits of info are set as 64-bit signed integers --- */ - case CPUINFO_INT_INPUT_STATE + M6502_IRQ_LINE: m6502_set_irq_line(m6502, M6502_IRQ_LINE, info->i); break; - case CPUINFO_INT_INPUT_STATE + M6502_SET_OVERFLOW: m6502_set_irq_line(m6502, M6502_SET_OVERFLOW, info->i); break; - case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: m6502_set_irq_line(m6502, INPUT_LINE_NMI, info->i); break; + case CPUINFO_INT_INPUT_STATE + M6502_IRQ_LINE: m6502_set_irq_line(cpustate, M6502_IRQ_LINE, info->i); break; + case CPUINFO_INT_INPUT_STATE + M6502_SET_OVERFLOW: m6502_set_irq_line(cpustate, M6502_SET_OVERFLOW, info->i); break; + case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: m6502_set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break; case CPUINFO_INT_PC: PCW = info->i; break; - case CPUINFO_INT_REGISTER + M6502_PC: m6502->pc.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M6502_PC: cpustate->pc.w.l = info->i; break; case CPUINFO_INT_SP: S = info->i; break; - case CPUINFO_INT_REGISTER + M6502_S: m6502->sp.b.l = info->i; break; - case CPUINFO_INT_REGISTER + M6502_P: m6502->p = info->i; break; - case CPUINFO_INT_REGISTER + M6502_A: m6502->a = info->i; break; - case CPUINFO_INT_REGISTER + M6502_X: m6502->x = info->i; break; - case CPUINFO_INT_REGISTER + M6502_Y: m6502->y = info->i; break; - case CPUINFO_INT_REGISTER + M6502_EA: m6502->ea.w.l = info->i; break; - case CPUINFO_INT_REGISTER + M6502_ZP: m6502->zp.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M6502_S: cpustate->sp.b.l = info->i; break; + case CPUINFO_INT_REGISTER + M6502_P: cpustate->p = info->i; break; + case CPUINFO_INT_REGISTER + M6502_A: cpustate->a = info->i; break; + case CPUINFO_INT_REGISTER + M6502_X: cpustate->x = info->i; break; + case CPUINFO_INT_REGISTER + M6502_Y: cpustate->y = info->i; break; + case CPUINFO_INT_REGISTER + M6502_EA: cpustate->ea.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M6502_ZP: cpustate->zp.w.l = info->i; break; /* --- the following bits of info are set as pointers to data or functions --- */ - case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: m6502->rdmem_id = (m6502_read_indexed_func) info->f; break; - case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: m6502->wrmem_id = (m6502_write_indexed_func) info->f; break; + case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: cpustate->rdmem_id = (m6502_read_indexed_func) info->f; break; + case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: cpustate->wrmem_id = (m6502_write_indexed_func) info->f; break; } } @@ -714,12 +713,12 @@ static CPU_SET_INFO( m6502 ) CPU_GET_INFO( m6502 ) { - m6502_Regs *m6502 = (device != NULL) ? device->token : NULL; + m6502_Regs *cpustate = (device != NULL) ? device->token : NULL; switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m6502_Regs); break; + case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m6502_Regs); break; case CPUINFO_INT_INPUT_LINES: info->i = 2; break; case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break; case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; @@ -740,23 +739,23 @@ CPU_GET_INFO( m6502 ) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break; case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break; - case CPUINFO_INT_INPUT_STATE + M6502_IRQ_LINE: info->i = m6502->irq_state; break; - case CPUINFO_INT_INPUT_STATE + M6502_SET_OVERFLOW: info->i = m6502->so_state; break; - case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = m6502->nmi_state; break; + case CPUINFO_INT_INPUT_STATE + M6502_IRQ_LINE: info->i = cpustate->irq_state; break; + case CPUINFO_INT_INPUT_STATE + M6502_SET_OVERFLOW: info->i = cpustate->so_state; break; + case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break; - case CPUINFO_INT_PREVIOUSPC: info->i = m6502->ppc.w.l; break; + case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc.w.l; break; case CPUINFO_INT_PC: info->i = PCD; break; - case CPUINFO_INT_REGISTER + M6502_PC: info->i = m6502->pc.w.l; break; + case CPUINFO_INT_REGISTER + M6502_PC: info->i = cpustate->pc.w.l; break; case CPUINFO_INT_SP: info->i = S; break; - case CPUINFO_INT_REGISTER + M6502_S: info->i = m6502->sp.b.l; break; - case CPUINFO_INT_REGISTER + M6502_P: info->i = m6502->p; break; - case CPUINFO_INT_REGISTER + M6502_A: info->i = m6502->a; break; - case CPUINFO_INT_REGISTER + M6502_X: info->i = m6502->x; break; - case CPUINFO_INT_REGISTER + M6502_Y: info->i = m6502->y; break; - case CPUINFO_INT_REGISTER + M6502_EA: info->i = m6502->ea.w.l; break; - case CPUINFO_INT_REGISTER + M6502_ZP: info->i = m6502->zp.w.l; break; - case CPUINFO_INT_REGISTER + M6502_SUBTYPE: info->i = m6502->subtype; break; + case CPUINFO_INT_REGISTER + M6502_S: info->i = cpustate->sp.b.l; break; + case CPUINFO_INT_REGISTER + M6502_P: info->i = cpustate->p; break; + case CPUINFO_INT_REGISTER + M6502_A: info->i = cpustate->a; break; + case CPUINFO_INT_REGISTER + M6502_X: info->i = cpustate->x; break; + case CPUINFO_INT_REGISTER + M6502_Y: info->i = cpustate->y; break; + case CPUINFO_INT_REGISTER + M6502_EA: info->i = cpustate->ea.w.l; break; + case CPUINFO_INT_REGISTER + M6502_ZP: info->i = cpustate->zp.w.l; break; + case CPUINFO_INT_REGISTER + M6502_SUBTYPE: info->i = cpustate->subtype; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m6502); break; @@ -768,9 +767,9 @@ CPU_GET_INFO( m6502 ) case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6502); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6502); break; - case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m6502->icount; break; - case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: info->f = (genf *) m6502->rdmem_id; break; - case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: info->f = (genf *) m6502->wrmem_id; break; + case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; + case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: info->f = (genf *) cpustate->rdmem_id; break; + case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: info->f = (genf *) cpustate->wrmem_id; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "M6502"); break; @@ -781,24 +780,24 @@ CPU_GET_INFO( m6502 ) case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c", - m6502->p & 0x80 ? 'N':'.', - m6502->p & 0x40 ? 'V':'.', - m6502->p & 0x20 ? 'R':'.', - m6502->p & 0x10 ? 'B':'.', - m6502->p & 0x08 ? 'D':'.', - m6502->p & 0x04 ? 'I':'.', - m6502->p & 0x02 ? 'Z':'.', - m6502->p & 0x01 ? 'C':'.'); + cpustate->p & 0x80 ? 'N':'.', + cpustate->p & 0x40 ? 'V':'.', + cpustate->p & 0x20 ? 'R':'.', + cpustate->p & 0x10 ? 'B':'.', + cpustate->p & 0x08 ? 'D':'.', + cpustate->p & 0x04 ? 'I':'.', + cpustate->p & 0x02 ? 'Z':'.', + cpustate->p & 0x01 ? 'C':'.'); break; - case CPUINFO_STR_REGISTER + M6502_PC: sprintf(info->s, "PC:%04X", m6502->pc.w.l); break; - case CPUINFO_STR_REGISTER + M6502_S: sprintf(info->s, "S:%02X", m6502->sp.b.l); break; - case CPUINFO_STR_REGISTER + M6502_P: sprintf(info->s, "P:%02X", m6502->p); break; - case CPUINFO_STR_REGISTER + M6502_A: sprintf(info->s, "A:%02X", m6502->a); break; - case CPUINFO_STR_REGISTER + M6502_X: sprintf(info->s, "X:%02X", m6502->x); break; - case CPUINFO_STR_REGISTER + M6502_Y: sprintf(info->s, "Y:%02X", m6502->y); break; - case CPUINFO_STR_REGISTER + M6502_EA: sprintf(info->s, "EA:%04X", m6502->ea.w.l); break; - case CPUINFO_STR_REGISTER + M6502_ZP: sprintf(info->s, "ZP:%03X", m6502->zp.w.l); break; + case CPUINFO_STR_REGISTER + M6502_PC: sprintf(info->s, "PC:%04X", cpustate->pc.w.l); break; + case CPUINFO_STR_REGISTER + M6502_S: sprintf(info->s, "S:%02X", cpustate->sp.b.l); break; + case CPUINFO_STR_REGISTER + M6502_P: sprintf(info->s, "P:%02X", cpustate->p); break; + case CPUINFO_STR_REGISTER + M6502_A: sprintf(info->s, "A:%02X", cpustate->a); break; + case CPUINFO_STR_REGISTER + M6502_X: sprintf(info->s, "X:%02X", cpustate->x); break; + case CPUINFO_STR_REGISTER + M6502_Y: sprintf(info->s, "Y:%02X", cpustate->y); break; + case CPUINFO_STR_REGISTER + M6502_EA: sprintf(info->s, "EA:%04X", cpustate->ea.w.l); break; + case CPUINFO_STR_REGISTER + M6502_ZP: sprintf(info->s, "ZP:%03X", cpustate->zp.w.l); break; } } @@ -831,13 +830,13 @@ CPU_GET_INFO( n2a03 ) static CPU_SET_INFO( m6510 ) { - m6502_Regs *m6502 = device->token; + m6502_Regs *cpustate = device->token; switch (state) { /* --- the following bits of info are set as pointers to data or functions --- */ - case CPUINFO_PTR_M6510_PORTREAD: m6502->port_read = (m6510_port_read_func) info->f; break; - case CPUINFO_PTR_M6510_PORTWRITE: m6502->port_write = (m6510_port_write_func) info->f; break; + case CPUINFO_PTR_M6510_PORTREAD: cpustate->port_read = (m6510_port_read_func) info->f; break; + case CPUINFO_PTR_M6510_PORTWRITE: cpustate->port_write = (m6510_port_write_func) info->f; break; default: CPU_SET_INFO_CALL(m6502); break; } @@ -845,7 +844,7 @@ static CPU_SET_INFO( m6510 ) CPU_GET_INFO( m6510 ) { - m6502_Regs *m6502 = (device != NULL) ? device->token : NULL; + m6502_Regs *cpustate = (device != NULL) ? device->token : NULL; switch (state) { @@ -855,14 +854,14 @@ CPU_GET_INFO( m6510 ) case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(m6510); break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6510); break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP: info->internal_map8 = ADDRESS_MAP_NAME(m6510_mem); break; - case CPUINFO_PTR_M6510_PORTREAD: info->f = (genf *) m6502->port_read; break; - case CPUINFO_PTR_M6510_PORTWRITE: info->f = (genf *) m6502->port_write; break; + case CPUINFO_PTR_M6510_PORTREAD: info->f = (genf *) cpustate->port_read; break; + case CPUINFO_PTR_M6510_PORTWRITE: info->f = (genf *) cpustate->port_write; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "M6510"); break; /* --- the following bits of info are set as 64-bit signed integers --- */ - case CPUINFO_INT_M6510_PORT: info->i = m6510_get_port(m6502); break; + case CPUINFO_INT_M6510_PORT: info->i = m6510_get_port(cpustate); break; default: CPU_GET_INFO_CALL(m6502); break; } @@ -931,12 +930,12 @@ CPU_GET_INFO( m8502 ) static CPU_SET_INFO( m65c02 ) { - m6502_Regs *m6502 = device->token; + m6502_Regs *cpustate = device->token; switch (state) { /* --- the following bits of info are set as 64-bit signed integers --- */ - case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: m65c02_set_irq_line(m6502, INPUT_LINE_NMI, info->i); break; + case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: m65c02_set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break; default: CPU_SET_INFO_CALL(m6502); break; } @@ -995,14 +994,14 @@ CPU_GET_INFO( m65sc02 ) static CPU_SET_INFO( deco16 ) { - m6502_Regs *m6502 = device->token; + m6502_Regs *cpustate = device->token; switch (state) { /* --- the following bits of info are set as 64-bit signed integers --- */ - case CPUINFO_INT_INPUT_STATE + M6502_IRQ_LINE: deco16_set_irq_line(m6502, M6502_IRQ_LINE, info->i); break; - case CPUINFO_INT_INPUT_STATE + M6502_SET_OVERFLOW: deco16_set_irq_line(m6502, M6502_SET_OVERFLOW, info->i); break; - case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: deco16_set_irq_line(m6502, INPUT_LINE_NMI, info->i); break; + case CPUINFO_INT_INPUT_STATE + M6502_IRQ_LINE: deco16_set_irq_line(cpustate, M6502_IRQ_LINE, info->i); break; + case CPUINFO_INT_INPUT_STATE + M6502_SET_OVERFLOW: deco16_set_irq_line(cpustate, M6502_SET_OVERFLOW, info->i); break; + case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: deco16_set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break; default: CPU_SET_INFO_CALL(m6502); break; } diff --git a/src/emu/cpu/m6502/m6509.c b/src/emu/cpu/m6502/m6509.c index a0cf72fe9b7..24d4a07dbce 100644 --- a/src/emu/cpu/m6502/m6509.c +++ b/src/emu/cpu/m6502/m6509.c @@ -97,31 +97,31 @@ static void *token; static READ8_HANDLER( m6509_read_00000 ) { - m6509_Regs *m6509 = (m6509_Regs *)space->cpu->token; + m6509_Regs *cpustate = (m6509_Regs *)space->cpu->token; - return m6509->pc_bank.b.h2; + return cpustate->pc_bank.b.h2; } static READ8_HANDLER( m6509_read_00001 ) { - m6509_Regs *m6509 = (m6509_Regs *)space->cpu->token; + m6509_Regs *cpustate = (m6509_Regs *)space->cpu->token; - return m6509->ind_bank.b.h2; + return cpustate->ind_bank.b.h2; } static WRITE8_HANDLER( m6509_write_00000 ) { - m6509_Regs *m6509 = (m6509_Regs *)space->cpu->token; + m6509_Regs *cpustate = (m6509_Regs *)space->cpu->token; - m6509->pc_bank.b.h2=data&0xf; - m6509->pc.w.h=m6509->pc_bank.w.h; + cpustate->pc_bank.b.h2=data&0xf; + cpustate->pc.w.h=cpustate->pc_bank.w.h; } static WRITE8_HANDLER( m6509_write_00001 ) { - m6509_Regs *m6509 = (m6509_Regs *)space->cpu->token; + m6509_Regs *cpustate = (m6509_Regs *)space->cpu->token; - m6509->ind_bank.b.h2=data&0xf; + cpustate->ind_bank.b.h2=data&0xf; } static ADDRESS_MAP_START(m6509_mem, ADDRESS_SPACE_PROGRAM, 8) @@ -134,37 +134,36 @@ static void default_wdmem_id(const address_space *space, offs_t address, UINT8 d static CPU_INIT( m6509 ) { - m6509_Regs *m6509 = device->token; + m6509_Regs *cpustate = device->token; token = device->token; // temporary - m6509->rdmem_id = default_rdmem_id; - m6509->wrmem_id = default_wdmem_id; - m6509->irq_callback = irqcallback; - m6509->device = device; - m6509->space = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM); + cpustate->rdmem_id = default_rdmem_id; + cpustate->wrmem_id = default_wdmem_id; + cpustate->irq_callback = irqcallback; + cpustate->device = device; + cpustate->space = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM); } static CPU_RESET( m6509 ) { - m6509_Regs *m6509 = device->token; - m6509_Regs *m6502 = m6509; + m6509_Regs *cpustate = device->token; - m6509->insn = insn6509; + cpustate->insn = insn6509; - m6509->pc_bank.d=m6509->ind_bank.d=0; - m6509->pc_bank.b.h2=m6509->ind_bank.b.h2=0xf; /* cbm500 needs this */ - m6509->pc.w.h=m6509->pc_bank.w.h; + cpustate->pc_bank.d=cpustate->ind_bank.d=0; + cpustate->pc_bank.b.h2=cpustate->ind_bank.b.h2=0xf; /* cbm500 needs this */ + cpustate->pc.w.h=cpustate->pc_bank.w.h; /* wipe out the rest of the m6509 structure */ /* read the reset vector into PC */ PCL = RDMEM(M6509_RST_VEC|PB); PCH = RDMEM((M6509_RST_VEC+1)|PB); - m6509->sp.d = 0x01ff; - m6509->p = F_T|F_B|F_I|F_Z|(P&F_D); /* set T, I and Z flags */ - m6509->pending_irq = 0; /* nonzero if an IRQ is pending */ - m6509->after_cli = 0; /* pending IRQ and last insn cleared I */ - m6509->irq_callback = NULL; + cpustate->sp.d = 0x01ff; + cpustate->p = F_T|F_B|F_I|F_Z|(P&F_D); /* set T, I and Z flags */ + cpustate->pending_irq = 0; /* nonzero if an IRQ is pending */ + cpustate->after_cli = 0; /* pending IRQ and last insn cleared I */ + cpustate->irq_callback = NULL; } static CPU_EXIT( m6509 ) @@ -178,44 +177,43 @@ static CPU_GET_CONTEXT( m6509 ) static CPU_SET_CONTEXT( m6509 ) { - m6509_Regs *m6502; + m6509_Regs *cpustate; if( src ) { token = src; - m6502 = token; + cpustate = token; } } -INLINE void m6509_take_irq( m6509_Regs *m6502) +INLINE void m6509_take_irq( m6509_Regs *cpustate) { if( !(P & F_I) ) { EAD = M6509_IRQ_VEC; EAWH = PBWH; - m6502->icount -= 2; + cpustate->icount -= 2; PUSH(PCH); PUSH(PCL); PUSH(P & ~F_B); P |= F_I; /* knock out D and set I flag */ PCL = RDMEM(EAD); PCH = RDMEM(EAD+1); - LOG(("M6509#%d takes IRQ ($%04x)\n", cpunum_get_active(), PCD)); + LOG(("M6509 '%s' takes IRQ ($%04x)\n", cpustate->device->tag, PCD)); /* call back the cpuintrf to let it clear the line */ - if (m6502->irq_callback) (*m6502->irq_callback)(m6502->device, 0); + if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0); } - m6502->pending_irq = 0; + cpustate->pending_irq = 0; } static CPU_EXECUTE( m6509 ) { - m6509_Regs *m6502 = device->token; - m6509_Regs *m6509 = m6502; + m6509_Regs *cpustate = device->token; - m6502->icount = cycles; + cpustate->icount = cycles; do { @@ -225,21 +223,21 @@ static CPU_EXECUTE( m6509 ) debugger_instruction_hook(device, PCD); /* if an irq is pending, take it now */ - if( m6509->pending_irq ) - m6509_take_irq(m6509); + if( cpustate->pending_irq ) + m6509_take_irq(cpustate); op = RDOP(); - (*m6509->insn[op])(m6509); + (*cpustate->insn[op])(cpustate); /* check if the I flag was just reset (interrupts enabled) */ - if( m6509->after_cli ) + if( cpustate->after_cli ) { - LOG(("M6509#%d after_cli was >0", cpunum_get_active())); - m6509->after_cli = 0; - if (m6509->irq_state != CLEAR_LINE) + LOG(("M6509 '%s' after_cli was >0", cpustate->device->tag)); + cpustate->after_cli = 0; + if (cpustate->irq_state != CLEAR_LINE) { LOG((": irq line is asserted: set pending IRQ\n")); - m6509->pending_irq = 1; + cpustate->pending_irq = 1; } else { @@ -247,54 +245,52 @@ static CPU_EXECUTE( m6509 ) } } else - if( m6509->pending_irq ) - m6509_take_irq(m6502); + if( cpustate->pending_irq ) + m6509_take_irq(cpustate); - } while (m6502->icount > 0); + } while (cpustate->icount > 0); - return cycles - m6502->icount; + return cycles - cpustate->icount; } -static void m6509_set_irq_line(m6509_Regs *m6509, int irqline, int state) +static void m6509_set_irq_line(m6509_Regs *cpustate, int irqline, int state) { - m6509_Regs *m6502 = m6509; - if (irqline == INPUT_LINE_NMI) { - if (m6509->nmi_state == state) return; - m6509->nmi_state = state; + if (cpustate->nmi_state == state) return; + cpustate->nmi_state = state; if( state != CLEAR_LINE ) { - LOG(( "M6509#%d set_nmi_line(ASSERT)\n", cpunum_get_active())); + LOG(( "M6509 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag)); EAD = M6509_NMI_VEC; EAWH = PBWH; - m6502->icount -= 2; + cpustate->icount -= 2; PUSH(PCH); PUSH(PCL); PUSH(P & ~F_B); P |= F_I; /* knock out D and set I flag */ PCL = RDMEM(EAD); PCH = RDMEM(EAD+1); - LOG(("M6509#%d takes NMI ($%04x)\n", cpunum_get_active(), PCD)); + LOG(("M6509 '%s' takes NMI ($%04x)\n", cpustate->device->tag, PCD)); } } else { if( irqline == M6509_SET_OVERFLOW ) { - if( m6509->so_state && !state ) + if( cpustate->so_state && !state ) { - LOG(( "M6509#%d set overflow\n", cpunum_get_active())); + LOG(( "M6509 '%s' set overflow\n", cpustate->device->tag)); P|=F_V; } - m6509->so_state=state; + cpustate->so_state=state; return; } - m6509->irq_state = state; + cpustate->irq_state = state; if( state != CLEAR_LINE ) { - LOG(( "M6509#%d set_irq_line(ASSERT)\n", cpunum_get_active())); - m6509->pending_irq = 1; + LOG(( "M6509 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag)); + cpustate->pending_irq = 1; } } } @@ -305,32 +301,31 @@ static void m6509_set_irq_line(m6509_Regs *m6509, int irqline, int state) static CPU_SET_INFO( m6509 ) { - m6509_Regs *m6509 = device->token; - m6509_Regs *m6502 = m6509; + m6509_Regs *cpustate = device->token; switch (state) { /* --- the following bits of info are set as 64-bit signed integers --- */ - case CPUINFO_INT_INPUT_STATE + M6509_IRQ_LINE: m6509_set_irq_line(m6509, M6509_IRQ_LINE, info->i); break; - case CPUINFO_INT_INPUT_STATE + M6509_SET_OVERFLOW:m6509_set_irq_line(m6509, M6509_SET_OVERFLOW, info->i); break; - case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: m6509_set_irq_line(m6509, INPUT_LINE_NMI, info->i); break; + case CPUINFO_INT_INPUT_STATE + M6509_IRQ_LINE: m6509_set_irq_line(cpustate, M6509_IRQ_LINE, info->i); break; + case CPUINFO_INT_INPUT_STATE + M6509_SET_OVERFLOW:m6509_set_irq_line(cpustate, M6509_SET_OVERFLOW, info->i); break; + case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: m6509_set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break; case CPUINFO_INT_PC: PCW = info->i; break; - case CPUINFO_INT_REGISTER + M6509_PC: m6509->pc.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M6509_PC: cpustate->pc.w.l = info->i; break; case CPUINFO_INT_SP: S = info->i; break; - case CPUINFO_INT_REGISTER + M6509_S: m6509->sp.b.l = info->i; break; - case CPUINFO_INT_REGISTER + M6509_P: m6509->p = info->i; break; - case CPUINFO_INT_REGISTER + M6509_A: m6509->a = info->i; break; - case CPUINFO_INT_REGISTER + M6509_X: m6509->x = info->i; break; - case CPUINFO_INT_REGISTER + M6509_Y: m6509->y = info->i; break; - case CPUINFO_INT_REGISTER + M6509_PC_BANK: m6509->pc_bank.b.h2 = info->i; break; - case CPUINFO_INT_REGISTER + M6509_IND_BANK: m6509->ind_bank.b.h2 = info->i; break; - case CPUINFO_INT_REGISTER + M6509_EA: m6509->ea.w.l = info->i; break; - case CPUINFO_INT_REGISTER + M6509_ZP: m6509->zp.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M6509_S: cpustate->sp.b.l = info->i; break; + case CPUINFO_INT_REGISTER + M6509_P: cpustate->p = info->i; break; + case CPUINFO_INT_REGISTER + M6509_A: cpustate->a = info->i; break; + case CPUINFO_INT_REGISTER + M6509_X: cpustate->x = info->i; break; + case CPUINFO_INT_REGISTER + M6509_Y: cpustate->y = info->i; break; + case CPUINFO_INT_REGISTER + M6509_PC_BANK: cpustate->pc_bank.b.h2 = info->i; break; + case CPUINFO_INT_REGISTER + M6509_IND_BANK: cpustate->ind_bank.b.h2 = info->i; break; + case CPUINFO_INT_REGISTER + M6509_EA: cpustate->ea.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M6509_ZP: cpustate->zp.w.l = info->i; break; /* --- the following bits of info are set as pointers to data or functions --- */ - case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: m6509->rdmem_id = (m6502_read_indexed_func) info->f; break; - case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: m6509->wrmem_id = (m6502_write_indexed_func) info->f; break; + case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: cpustate->rdmem_id = (m6502_read_indexed_func) info->f; break; + case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: cpustate->wrmem_id = (m6502_write_indexed_func) info->f; break; } } @@ -342,13 +337,12 @@ static CPU_SET_INFO( m6509 ) CPU_GET_INFO( m6509 ) { - m6509_Regs *m6502 = (device != NULL) ? device->token : NULL; - m6509_Regs *m6509 = m6502; + m6509_Regs *cpustate = (device != NULL) ? device->token : NULL; switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m6502); break; + case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m6509_Regs); break; case CPUINFO_INT_INPUT_LINES: info->i = 2; break; case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break; case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; @@ -369,24 +363,24 @@ CPU_GET_INFO( m6509 ) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break; case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break; - case CPUINFO_INT_INPUT_STATE + M6509_IRQ_LINE: info->i = m6509->irq_state; break; - case CPUINFO_INT_INPUT_STATE + M6509_SET_OVERFLOW:info->i = m6509->so_state; break; - case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = m6509->nmi_state; break; + case CPUINFO_INT_INPUT_STATE + M6509_IRQ_LINE: info->i = cpustate->irq_state; break; + case CPUINFO_INT_INPUT_STATE + M6509_SET_OVERFLOW:info->i = cpustate->so_state; break; + case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break; - case CPUINFO_INT_PREVIOUSPC: info->i = m6509->ppc.w.l; break; + case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc.w.l; break; case CPUINFO_INT_PC: info->i = PCD; break; - case CPUINFO_INT_REGISTER + M6509_PC: info->i = m6509->pc.w.l; break; + case CPUINFO_INT_REGISTER + M6509_PC: info->i = cpustate->pc.w.l; break; case CPUINFO_INT_SP: info->i = S; break; - case CPUINFO_INT_REGISTER + M6509_S: info->i = m6509->sp.b.l; break; - case CPUINFO_INT_REGISTER + M6509_P: info->i = m6509->p; break; - case CPUINFO_INT_REGISTER + M6509_A: info->i = m6509->a; break; - case CPUINFO_INT_REGISTER + M6509_X: info->i = m6509->x; break; - case CPUINFO_INT_REGISTER + M6509_Y: info->i = m6509->y; break; - case CPUINFO_INT_REGISTER + M6509_PC_BANK: info->i = m6509->pc_bank.b.h2; break; - case CPUINFO_INT_REGISTER + M6509_IND_BANK: info->i = m6509->ind_bank.b.h2; break; - case CPUINFO_INT_REGISTER + M6509_EA: info->i = m6509->ea.w.l; break; - case CPUINFO_INT_REGISTER + M6509_ZP: info->i = m6509->zp.w.l; break; + case CPUINFO_INT_REGISTER + M6509_S: info->i = cpustate->sp.b.l; break; + case CPUINFO_INT_REGISTER + M6509_P: info->i = cpustate->p; break; + case CPUINFO_INT_REGISTER + M6509_A: info->i = cpustate->a; break; + case CPUINFO_INT_REGISTER + M6509_X: info->i = cpustate->x; break; + case CPUINFO_INT_REGISTER + M6509_Y: info->i = cpustate->y; break; + case CPUINFO_INT_REGISTER + M6509_PC_BANK: info->i = cpustate->pc_bank.b.h2; break; + case CPUINFO_INT_REGISTER + M6509_IND_BANK: info->i = cpustate->ind_bank.b.h2; break; + case CPUINFO_INT_REGISTER + M6509_EA: info->i = cpustate->ea.w.l; break; + case CPUINFO_INT_REGISTER + M6509_ZP: info->i = cpustate->zp.w.l; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m6509); break; @@ -398,10 +392,10 @@ CPU_GET_INFO( m6509 ) case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6509); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6502); break; - case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m6502->icount; break; + case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP: info->internal_map8 = ADDRESS_MAP_NAME(m6509_mem); break; - case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: info->f = (genf *) m6509->rdmem_id; break; - case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: info->f = (genf *) m6509->wrmem_id; break; + case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: info->f = (genf *) cpustate->rdmem_id; break; + case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: info->f = (genf *) cpustate->wrmem_id; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "M6509"); break; @@ -412,26 +406,26 @@ CPU_GET_INFO( m6509 ) case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c", - m6509->p & 0x80 ? 'N':'.', - m6509->p & 0x40 ? 'V':'.', - m6509->p & 0x20 ? 'R':'.', - m6509->p & 0x10 ? 'B':'.', - m6509->p & 0x08 ? 'D':'.', - m6509->p & 0x04 ? 'I':'.', - m6509->p & 0x02 ? 'Z':'.', - m6509->p & 0x01 ? 'C':'.'); + cpustate->p & 0x80 ? 'N':'.', + cpustate->p & 0x40 ? 'V':'.', + cpustate->p & 0x20 ? 'R':'.', + cpustate->p & 0x10 ? 'B':'.', + cpustate->p & 0x08 ? 'D':'.', + cpustate->p & 0x04 ? 'I':'.', + cpustate->p & 0x02 ? 'Z':'.', + cpustate->p & 0x01 ? 'C':'.'); break; - case CPUINFO_STR_REGISTER + M6509_PC: sprintf(info->s, "PC:%04X", m6509->pc.w.l); break; - case CPUINFO_STR_REGISTER + M6509_S: sprintf(info->s, "S:%02X", m6509->sp.b.l); break; - case CPUINFO_STR_REGISTER + M6509_P: sprintf(info->s, "P:%02X", m6509->p); break; - case CPUINFO_STR_REGISTER + M6509_A: sprintf(info->s, "A:%02X", m6509->a); break; - case CPUINFO_STR_REGISTER + M6509_X: sprintf(info->s, "X:%02X", m6509->x); break; - case CPUINFO_STR_REGISTER + M6509_Y: sprintf(info->s, "Y:%02X", m6509->y); break; - case CPUINFO_STR_REGISTER + M6509_PC_BANK: sprintf(info->s, "M0:%01X", m6509->pc_bank.b.h2); break; - case CPUINFO_STR_REGISTER + M6509_IND_BANK: sprintf(info->s, "M1:%01X", m6509->ind_bank.b.h2); break; - case CPUINFO_STR_REGISTER + M6509_EA: sprintf(info->s, "EA:%04X", m6509->ea.w.l); break; - case CPUINFO_STR_REGISTER + M6509_ZP: sprintf(info->s, "ZP:%03X", m6509->zp.w.l); break; + case CPUINFO_STR_REGISTER + M6509_PC: sprintf(info->s, "PC:%04X", cpustate->pc.w.l); break; + case CPUINFO_STR_REGISTER + M6509_S: sprintf(info->s, "S:%02X", cpustate->sp.b.l); break; + case CPUINFO_STR_REGISTER + M6509_P: sprintf(info->s, "P:%02X", cpustate->p); break; + case CPUINFO_STR_REGISTER + M6509_A: sprintf(info->s, "A:%02X", cpustate->a); break; + case CPUINFO_STR_REGISTER + M6509_X: sprintf(info->s, "X:%02X", cpustate->x); break; + case CPUINFO_STR_REGISTER + M6509_Y: sprintf(info->s, "Y:%02X", cpustate->y); break; + case CPUINFO_STR_REGISTER + M6509_PC_BANK: sprintf(info->s, "M0:%01X", cpustate->pc_bank.b.h2); break; + case CPUINFO_STR_REGISTER + M6509_IND_BANK: sprintf(info->s, "M1:%01X", cpustate->ind_bank.b.h2); break; + case CPUINFO_STR_REGISTER + M6509_EA: sprintf(info->s, "EA:%04X", cpustate->ea.w.l); break; + case CPUINFO_STR_REGISTER + M6509_ZP: sprintf(info->s, "ZP:%03X", cpustate->zp.w.l); break; } } diff --git a/src/emu/cpu/m6502/m65ce02.c b/src/emu/cpu/m6502/m65ce02.c index 17e2edea7cc..efc13276905 100644 --- a/src/emu/cpu/m6502/m65ce02.c +++ b/src/emu/cpu/m6502/m65ce02.c @@ -93,20 +93,20 @@ static void default_wdmem_id(const address_space *space, offs_t address, UINT8 d static CPU_INIT( m65ce02 ) { - m65ce02_Regs *m65ce02 = device->token; + m65ce02_Regs *cpustate = device->token; - m65ce02->rdmem_id = default_rdmem_id; - m65ce02->wrmem_id = default_wdmem_id; - m65ce02->irq_callback = irqcallback; - m65ce02->device = device; - m65ce02->space = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM); + cpustate->rdmem_id = default_rdmem_id; + cpustate->wrmem_id = default_wdmem_id; + cpustate->irq_callback = irqcallback; + cpustate->device = device; + cpustate->space = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM); } static CPU_RESET( m65ce02 ) { - m65ce02_Regs *m65ce02 = device->token; + m65ce02_Regs *cpustate = device->token; - m65ce02->insn = insn65ce02; + cpustate->insn = insn65ce02; /* wipe out the rest of the m65ce02 structure */ /* read the reset vector into PC */ @@ -115,13 +115,13 @@ static CPU_RESET( m65ce02 ) PCH = RDMEM(M65CE02_RST_VEC+1); /* after reset in 6502 compatibility mode */ - m65ce02->sp.d = 0x01ff; /* high byte descriped in databook */ - m65ce02->z = 0; + cpustate->sp.d = 0x01ff; /* high byte descriped in databook */ + cpustate->z = 0; B = 0; - m65ce02->p = F_E|F_B|F_I|F_Z; /* set E, I and Z flags */ - m65ce02->pending_irq = 0; /* nonzero if an IRQ is pending */ - m65ce02->after_cli = 0; /* pending IRQ and last insn cleared I */ - m65ce02->irq_callback = NULL; + cpustate->p = F_E|F_B|F_I|F_Z; /* set E, I and Z flags */ + cpustate->pending_irq = 0; /* nonzero if an IRQ is pending */ + cpustate->after_cli = 0; /* pending IRQ and last insn cleared I */ + cpustate->irq_callback = NULL; } static CPU_EXIT( m65ce02 ) @@ -137,30 +137,30 @@ static CPU_SET_CONTEXT( m65ce02 ) { } -INLINE void m65ce02_take_irq(m65ce02_Regs *m65ce02) +INLINE void m65ce02_take_irq(m65ce02_Regs *cpustate) { if( !(P & F_I) ) { EAD = M65CE02_IRQ_VEC; - m65ce02->icount -= 7; + cpustate->icount -= 7; PUSH(PCH); PUSH(PCL); PUSH(P & ~F_B); P = (P & ~F_D) | F_I; /* knock out D and set I flag */ PCL = RDMEM(EAD); PCH = RDMEM(EAD+1); - LOG(("M65ce02#%d takes IRQ ($%04x)\n", cpunum_get_active(), PCD)); + LOG(("M65ce02 '%s' takes IRQ ($%04x)\n", cpustate->device->tag, PCD)); /* call back the cpuintrf to let it clear the line */ - if (m65ce02->irq_callback) (*m65ce02->irq_callback)(m65ce02->device, 0); + if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0); } - m65ce02->pending_irq = 0; + cpustate->pending_irq = 0; } static CPU_EXECUTE( m65ce02 ) { - m65ce02_Regs *m65ce02 = device->token; + m65ce02_Regs *cpustate = device->token; - m65ce02->icount = cycles; + cpustate->icount = cycles; do { @@ -170,21 +170,21 @@ static CPU_EXECUTE( m65ce02 ) debugger_instruction_hook(device, PCD); /* if an irq is pending, take it now */ - if( m65ce02->pending_irq ) - m65ce02_take_irq(m65ce02); + if( cpustate->pending_irq ) + m65ce02_take_irq(cpustate); op = RDOP(); - (*insn65ce02[op])(m65ce02); + (*insn65ce02[op])(cpustate); /* check if the I flag was just reset (interrupts enabled) */ - if( m65ce02->after_cli ) + if( cpustate->after_cli ) { - LOG(("M65ce02#%d after_cli was >0", cpunum_get_active())); - m65ce02->after_cli = 0; - if (m65ce02->irq_state != CLEAR_LINE) + LOG(("M65ce02 '%s' after_cli was >0", cpustate->device->tag)); + cpustate->after_cli = 0; + if (cpustate->irq_state != CLEAR_LINE) { LOG((": irq line is asserted: set pending IRQ\n")); - m65ce02->pending_irq = 1; + cpustate->pending_irq = 1; } else { @@ -192,41 +192,41 @@ static CPU_EXECUTE( m65ce02 ) } } else - if( m65ce02->pending_irq ) - m65ce02_take_irq(m65ce02); + if( cpustate->pending_irq ) + m65ce02_take_irq(cpustate); - } while (m65ce02->icount > 0); + } while (cpustate->icount > 0); - return cycles - m65ce02->icount; + return cycles - cpustate->icount; } -static void m65ce02_set_irq_line(m65ce02_Regs *m65ce02, int irqline, int state) +static void m65ce02_set_irq_line(m65ce02_Regs *cpustate, int irqline, int state) { if (irqline == INPUT_LINE_NMI) { - if (m65ce02->nmi_state == state) return; - m65ce02->nmi_state = state; + if (cpustate->nmi_state == state) return; + cpustate->nmi_state = state; if( state != CLEAR_LINE ) { - LOG(("M65ce02#%d set_nmi_line(ASSERT)\n", cpunum_get_active())); + LOG(("M65ce02 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag)); EAD = M65CE02_NMI_VEC; - m65ce02->icount -= 7; + cpustate->icount -= 7; PUSH(PCH); PUSH(PCL); PUSH(P & ~F_B); P = (P & ~F_D) | F_I; /* knock out D and set I flag */ PCL = RDMEM(EAD); PCH = RDMEM(EAD+1); - LOG(("M65ce02#%d takes NMI ($%04x)\n", cpunum_get_active(), PCD)); + LOG(("M65ce02 '%s' takes NMI ($%04x)\n", cpustate->device->tag, PCD)); } } else { - m65ce02->irq_state = state; + cpustate->irq_state = state; if( state != CLEAR_LINE ) { - LOG(("M65ce02#%d set_irq_line(ASSERT)\n", cpunum_get_active())); - m65ce02->pending_irq = 1; + LOG(("M65ce02 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag)); + cpustate->pending_irq = 1; } } } @@ -237,30 +237,30 @@ static void m65ce02_set_irq_line(m65ce02_Regs *m65ce02, int irqline, int state) static CPU_SET_INFO( m65ce02 ) { - m65ce02_Regs *m65ce02 = device->token; + m65ce02_Regs *cpustate = device->token; switch( state ) { /* --- the following bits of info are set as 64-bit signed integers --- */ - case CPUINFO_INT_INPUT_STATE + M65CE02_IRQ_STATE: m65ce02_set_irq_line( m65ce02, M65CE02_IRQ_LINE, info->i ); break; - case CPUINFO_INT_INPUT_STATE + M65CE02_NMI_STATE: m65ce02_set_irq_line( m65ce02, INPUT_LINE_NMI, info->i ); break; + case CPUINFO_INT_INPUT_STATE + M65CE02_IRQ_STATE: m65ce02_set_irq_line( cpustate, M65CE02_IRQ_LINE, info->i ); break; + case CPUINFO_INT_INPUT_STATE + M65CE02_NMI_STATE: m65ce02_set_irq_line( cpustate, INPUT_LINE_NMI, info->i ); break; case CPUINFO_INT_PC: PCW = info->i; break; - case CPUINFO_INT_REGISTER + M65CE02_PC: m65ce02->pc.w.l = info->i; break; - case CPUINFO_INT_SP: m65ce02->sp.b.l = info->i; break; - case CPUINFO_INT_REGISTER + M65CE02_S: m65ce02->sp.w.l = info->i; break; - case CPUINFO_INT_REGISTER + M65CE02_P: m65ce02->p = info->i; break; - case CPUINFO_INT_REGISTER + M65CE02_A: m65ce02->a = info->i; break; - case CPUINFO_INT_REGISTER + M65CE02_X: m65ce02->x = info->i; break; - case CPUINFO_INT_REGISTER + M65CE02_Y: m65ce02->y = info->i; break; - case CPUINFO_INT_REGISTER + M65CE02_Z: m65ce02->z = info->i; break; - case CPUINFO_INT_REGISTER + M65CE02_B: m65ce02->zp.b.h = info->i; break; - case CPUINFO_INT_REGISTER + M65CE02_EA: m65ce02->ea.w.l = info->i; break; - case CPUINFO_INT_REGISTER + M65CE02_ZP: m65ce02->zp.b.l = info->i; break; + case CPUINFO_INT_REGISTER + M65CE02_PC: cpustate->pc.w.l = info->i; break; + case CPUINFO_INT_SP: cpustate->sp.b.l = info->i; break; + case CPUINFO_INT_REGISTER + M65CE02_S: cpustate->sp.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M65CE02_P: cpustate->p = info->i; break; + case CPUINFO_INT_REGISTER + M65CE02_A: cpustate->a = info->i; break; + case CPUINFO_INT_REGISTER + M65CE02_X: cpustate->x = info->i; break; + case CPUINFO_INT_REGISTER + M65CE02_Y: cpustate->y = info->i; break; + case CPUINFO_INT_REGISTER + M65CE02_Z: cpustate->z = info->i; break; + case CPUINFO_INT_REGISTER + M65CE02_B: cpustate->zp.b.h = info->i; break; + case CPUINFO_INT_REGISTER + M65CE02_EA: cpustate->ea.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M65CE02_ZP: cpustate->zp.b.l = info->i; break; /* --- the following bits of info are set as pointers to data or functions --- */ - case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: m65ce02->rdmem_id = (m6502_read_indexed_func) info->f; break; - case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: m65ce02->wrmem_id = (m6502_write_indexed_func) info->f; break; + case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: cpustate->rdmem_id = (m6502_read_indexed_func) info->f; break; + case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: cpustate->wrmem_id = (m6502_write_indexed_func) info->f; break; } } @@ -270,12 +270,12 @@ static CPU_SET_INFO( m65ce02 ) CPU_GET_INFO( m65ce02 ) { - m65ce02_Regs *m65ce02 = (device != NULL) ? device->token : NULL; + m65ce02_Regs *cpustate = (device != NULL) ? device->token : NULL; switch( state ) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m65ce02); break; + case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m65ce02_Regs); break; case CPUINFO_INT_INPUT_LINES: info->i = 2; break; case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break; case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break; @@ -298,23 +298,23 @@ CPU_GET_INFO( m65ce02 ) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break; case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break; - case CPUINFO_INT_INPUT_STATE+M65CE02_NMI_STATE: info->i = m65ce02->nmi_state; break; - case CPUINFO_INT_INPUT_STATE+M65CE02_IRQ_STATE: info->i = m65ce02->irq_state; break; + case CPUINFO_INT_INPUT_STATE+M65CE02_NMI_STATE: info->i = cpustate->nmi_state; break; + case CPUINFO_INT_INPUT_STATE+M65CE02_IRQ_STATE: info->i = cpustate->irq_state; break; - case CPUINFO_INT_PREVIOUSPC: info->i = m65ce02->ppc.w.l; break; + case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc.w.l; break; case CPUINFO_INT_PC: info->i = PCD; break; - case CPUINFO_INT_REGISTER+M65CE02_PC: info->i = m65ce02->pc.w.l; break; - case CPUINFO_INT_SP: info->i = m65ce02->sp.b.l; break; - case CPUINFO_INT_REGISTER+M65CE02_S: info->i = m65ce02->sp.w.l; break; - case CPUINFO_INT_REGISTER+M65CE02_P: info->i = m65ce02->p; break; - case CPUINFO_INT_REGISTER+M65CE02_A: info->i = m65ce02->a; break; - case CPUINFO_INT_REGISTER+M65CE02_X: info->i = m65ce02->x; break; - case CPUINFO_INT_REGISTER+M65CE02_Y: info->i = m65ce02->y; break; - case CPUINFO_INT_REGISTER+M65CE02_Z: info->i = m65ce02->z; break; - case CPUINFO_INT_REGISTER+M65CE02_B: info->i = m65ce02->zp.b.h; break; - case CPUINFO_INT_REGISTER+M65CE02_EA: info->i = m65ce02->ea.w.l; break; - case CPUINFO_INT_REGISTER+M65CE02_ZP: info->i = m65ce02->zp.w.l; break; + case CPUINFO_INT_REGISTER+M65CE02_PC: info->i = cpustate->pc.w.l; break; + case CPUINFO_INT_SP: info->i = cpustate->sp.b.l; break; + case CPUINFO_INT_REGISTER+M65CE02_S: info->i = cpustate->sp.w.l; break; + case CPUINFO_INT_REGISTER+M65CE02_P: info->i = cpustate->p; break; + case CPUINFO_INT_REGISTER+M65CE02_A: info->i = cpustate->a; break; + case CPUINFO_INT_REGISTER+M65CE02_X: info->i = cpustate->x; break; + case CPUINFO_INT_REGISTER+M65CE02_Y: info->i = cpustate->y; break; + case CPUINFO_INT_REGISTER+M65CE02_Z: info->i = cpustate->z; break; + case CPUINFO_INT_REGISTER+M65CE02_B: info->i = cpustate->zp.b.h; break; + case CPUINFO_INT_REGISTER+M65CE02_EA: info->i = cpustate->ea.w.l; break; + case CPUINFO_INT_REGISTER+M65CE02_ZP: info->i = cpustate->zp.w.l; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m65ce02); break; @@ -326,9 +326,9 @@ CPU_GET_INFO( m65ce02 ) case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m65ce02); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m65ce02); break; - case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m65ce02->icount; break; - case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: info->f = (genf *) m65ce02->rdmem_id; break; - case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: info->f = (genf *) m65ce02->wrmem_id; break; + case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; + case CPUINFO_PTR_M6502_READINDEXED_CALLBACK: info->f = (genf *) cpustate->rdmem_id; break; + case CPUINFO_PTR_M6502_WRITEINDEXED_CALLBACK: info->f = (genf *) cpustate->wrmem_id; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "M65CE02"); break; @@ -341,25 +341,25 @@ CPU_GET_INFO( m65ce02 ) "all rights reserved."); break; case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c", - m65ce02->p & 0x80 ? 'N':'.', - m65ce02->p & 0x40 ? 'V':'.', - m65ce02->p & 0x20 ? 'E':'.', - m65ce02->p & 0x10 ? 'B':'.', - m65ce02->p & 0x08 ? 'D':'.', - m65ce02->p & 0x04 ? 'I':'.', - m65ce02->p & 0x02 ? 'Z':'.', - m65ce02->p & 0x01 ? 'C':'.'); + cpustate->p & 0x80 ? 'N':'.', + cpustate->p & 0x40 ? 'V':'.', + cpustate->p & 0x20 ? 'E':'.', + cpustate->p & 0x10 ? 'B':'.', + cpustate->p & 0x08 ? 'D':'.', + cpustate->p & 0x04 ? 'I':'.', + cpustate->p & 0x02 ? 'Z':'.', + cpustate->p & 0x01 ? 'C':'.'); break; - case CPUINFO_STR_REGISTER + M65CE02_PC: sprintf(info->s, "PC:%04X", m65ce02->pc.w.l); break; - case CPUINFO_STR_REGISTER + M65CE02_S: sprintf(info->s, "S:%02X", m65ce02->sp.b.l); break; - case CPUINFO_STR_REGISTER + M65CE02_P: sprintf(info->s, "P:%02X", m65ce02->p); break; - case CPUINFO_STR_REGISTER + M65CE02_A: sprintf(info->s, "A:%02X", m65ce02->a); break; - case CPUINFO_STR_REGISTER + M65CE02_X: sprintf(info->s, "X:%02X", m65ce02->x); break; - case CPUINFO_STR_REGISTER + M65CE02_Y: sprintf(info->s, "Y:%02X", m65ce02->y); break; - case CPUINFO_STR_REGISTER + M65CE02_Z: sprintf(info->s, "Z:%02X", m65ce02->z); break; - case CPUINFO_STR_REGISTER + M65CE02_B: sprintf(info->s, "B:%02X", m65ce02->zp.b.h); break; - case CPUINFO_STR_REGISTER + M65CE02_EA: sprintf(info->s, "EA:%04X", m65ce02->ea.w.l); break; - case CPUINFO_STR_REGISTER + M65CE02_ZP: sprintf(info->s, "ZP:%03X", m65ce02->zp.w.l); break; + case CPUINFO_STR_REGISTER + M65CE02_PC: sprintf(info->s, "PC:%04X", cpustate->pc.w.l); break; + case CPUINFO_STR_REGISTER + M65CE02_S: sprintf(info->s, "S:%02X", cpustate->sp.b.l); break; + case CPUINFO_STR_REGISTER + M65CE02_P: sprintf(info->s, "P:%02X", cpustate->p); break; + case CPUINFO_STR_REGISTER + M65CE02_A: sprintf(info->s, "A:%02X", cpustate->a); break; + case CPUINFO_STR_REGISTER + M65CE02_X: sprintf(info->s, "X:%02X", cpustate->x); break; + case CPUINFO_STR_REGISTER + M65CE02_Y: sprintf(info->s, "Y:%02X", cpustate->y); break; + case CPUINFO_STR_REGISTER + M65CE02_Z: sprintf(info->s, "Z:%02X", cpustate->z); break; + case CPUINFO_STR_REGISTER + M65CE02_B: sprintf(info->s, "B:%02X", cpustate->zp.b.h); break; + case CPUINFO_STR_REGISTER + M65CE02_EA: sprintf(info->s, "EA:%04X", cpustate->ea.w.l); break; + case CPUINFO_STR_REGISTER + M65CE02_ZP: sprintf(info->s, "ZP:%03X", cpustate->zp.w.l); break; } } diff --git a/src/emu/cpu/m6502/minc4510.h b/src/emu/cpu/m6502/minc4510.h index e850b8ca4c6..88018f8ef62 100644 --- a/src/emu/cpu/m6502/minc4510.h +++ b/src/emu/cpu/m6502/minc4510.h @@ -17,54 +17,54 @@ #define F_N 0x80 /* some shortcuts for improved readability */ -#define A m4510->a -#define X m4510->x -#define Y m4510->y -#define P m4510->p -#define Z m4510->z -#define B m4510->zp.b.h -#define SW m4510->sp.w.l -#define SPL m4510->sp.b.l -#define SPH m4510->sp.b.h -#define SPD m4510->sp.d +#define A cpustate->a +#define X cpustate->x +#define Y cpustate->y +#define P cpustate->p +#define Z cpustate->z +#define B cpustate->zp.b.h +#define SW cpustate->sp.w.l +#define SPL cpustate->sp.b.l +#define SPH cpustate->sp.b.h +#define SPD cpustate->sp.d -#define NZ m4510->nz +#define NZ cpustate->nz -#define EAL m4510->ea.b.l -#define EAH m4510->ea.b.h -#define EAW m4510->ea.w.l -#define EAD m4510->ea.d +#define EAL cpustate->ea.b.l +#define EAH cpustate->ea.b.h +#define EAW cpustate->ea.w.l +#define EAD cpustate->ea.d -#define ZPL m4510->zp.b.l -#define ZPH m4510->zp.b.h -#define ZPW m4510->zp.w.l -#define ZPD m4510->zp.d +#define ZPL cpustate->zp.b.l +#define ZPH cpustate->zp.b.h +#define ZPW cpustate->zp.w.l +#define ZPD cpustate->zp.d -#define PCL m4510->pc.b.l -#define PCH m4510->pc.b.h -#define PCW m4510->pc.w.l -#define PCD m4510->pc.d +#define PCL cpustate->pc.b.l +#define PCH cpustate->pc.b.h +#define PCW cpustate->pc.w.l +#define PCD cpustate->pc.d -#define PPC m4510->ppc.d +#define PPC cpustate->ppc.d -#define IRQ_STATE m4510->irq_state -#define AFTER_CLI m4510->after_cli +#define IRQ_STATE cpustate->irq_state +#define AFTER_CLI cpustate->after_cli -#define M4510_MEM(addr) (m4510->mem[(addr)>>13]+(addr)) +#define M4510_MEM(addr) (cpustate->mem[(addr)>>13]+(addr)) -#define PEEK_OP() memory_decrypted_read_byte(m4510->space, M4510_MEM(PCW)) +#define PEEK_OP() memory_decrypted_read_byte(cpustate->space, M4510_MEM(PCW)) -#define RDMEM(addr) memory_read_byte_8le(m4510->space, M4510_MEM(addr)); m4510->icount -= 1 -#define WRMEM(addr,data) memory_write_byte_8le(m4510->space, M4510_MEM(addr),data); m4510->icount -= 1 +#define RDMEM(addr) memory_read_byte_8le(cpustate->space, M4510_MEM(addr)); cpustate->icount -= 1 +#define WRMEM(addr,data) memory_write_byte_8le(cpustate->space, M4510_MEM(addr),data); cpustate->icount -= 1 /*************************************************************** * RDOP read an opcode ***************************************************************/ #undef RDOP -#define RDOP() m4510_cpu_readop(m4510); m4510->icount -= 1 +#define RDOP() m4510_cpu_readop(cpustate); cpustate->icount -= 1 /*************************************************************** * RDOPARG read an opcode argument ***************************************************************/ #undef RDOPARG -#define RDOPARG() m4510_cpu_readop_arg(m4510); m4510->icount -= 1 +#define RDOPARG() m4510_cpu_readop_arg(cpustate); cpustate->icount -= 1 diff --git a/src/emu/cpu/m6502/mincce02.h b/src/emu/cpu/m6502/mincce02.h index c26106168f0..3888f9af412 100644 --- a/src/emu/cpu/m6502/mincce02.h +++ b/src/emu/cpu/m6502/mincce02.h @@ -17,53 +17,53 @@ #define F_N 0x80 /* some shortcuts for improved readability */ -#define A m65ce02->a -#define X m65ce02->x -#define Y m65ce02->y -#define P m65ce02->p -#define Z m65ce02->z -#define B m65ce02->zp.b.h -#define SW m65ce02->sp.w.l -#define SPL m65ce02->sp.b.l -#define SPH m65ce02->sp.b.h -#define SPD m65ce02->sp.d +#define A cpustate->a +#define X cpustate->x +#define Y cpustate->y +#define P cpustate->p +#define Z cpustate->z +#define B cpustate->zp.b.h +#define SW cpustate->sp.w.l +#define SPL cpustate->sp.b.l +#define SPH cpustate->sp.b.h +#define SPD cpustate->sp.d -#define NZ m65ce02->nz +#define NZ cpustate->nz -#define EAL m65ce02->ea.b.l -#define EAH m65ce02->ea.b.h -#define EAW m65ce02->ea.w.l -#define EAD m65ce02->ea.d +#define EAL cpustate->ea.b.l +#define EAH cpustate->ea.b.h +#define EAW cpustate->ea.w.l +#define EAD cpustate->ea.d -#define ZPL m65ce02->zp.b.l -#define ZPH m65ce02->zp.b.h -#define ZPW m65ce02->zp.w.l -#define ZPD m65ce02->zp.d +#define ZPL cpustate->zp.b.l +#define ZPH cpustate->zp.b.h +#define ZPW cpustate->zp.w.l +#define ZPD cpustate->zp.d -#define PCL m65ce02->pc.b.l -#define PCH m65ce02->pc.b.h -#define PCW m65ce02->pc.w.l -#define PCD m65ce02->pc.d +#define PCL cpustate->pc.b.l +#define PCH cpustate->pc.b.h +#define PCW cpustate->pc.w.l +#define PCD cpustate->pc.d -#define PPC m65ce02->ppc.d +#define PPC cpustate->ppc.d -#define RDMEM_ID(a) m65ce02->rdmem_id(m65ce02->space, a) -#define WRMEM_ID(a,d) m65ce02->wrmem_id(m65ce02->space, a, d) +#define RDMEM_ID(a) cpustate->rdmem_id(cpustate->space, a) +#define WRMEM_ID(a,d) cpustate->wrmem_id(cpustate->space, a, d) -#define IRQ_STATE m65ce02->irq_state -#define AFTER_CLI m65ce02->after_cli +#define IRQ_STATE cpustate->irq_state +#define AFTER_CLI cpustate->after_cli /*************************************************************** * RDOP read an opcode ***************************************************************/ -#define RDOP() memory_decrypted_read_byte(m65ce02->space, PCW++); m65ce02->icount -= 1 +#define RDOP() memory_decrypted_read_byte(cpustate->space, PCW++); cpustate->icount -= 1 /*************************************************************** * RDOPARG read an opcode argument ***************************************************************/ -#define RDOPARG() memory_raw_read_byte(m65ce02->space, PCW++); m65ce02->icount -= 1 +#define RDOPARG() memory_raw_read_byte(cpustate->space, PCW++); cpustate->icount -= 1 -#define PEEK_OP() memory_decrypted_read_byte(m65ce02->space, PCW) +#define PEEK_OP() memory_decrypted_read_byte(cpustate->space, PCW) -#define RDMEM(addr) memory_read_byte_8le(m65ce02->space, addr); m65ce02->icount -= 1 -#define WRMEM(addr,data) memory_write_byte_8le(m65ce02->space, addr,data); m65ce02->icount -= 1 +#define RDMEM(addr) memory_read_byte_8le(cpustate->space, addr); cpustate->icount -= 1 +#define WRMEM(addr,data) memory_write_byte_8le(cpustate->space, addr,data); cpustate->icount -= 1 diff --git a/src/emu/cpu/m6502/ops02.h b/src/emu/cpu/m6502/ops02.h index fc53d69e75d..22d17388c2e 100644 --- a/src/emu/cpu/m6502/ops02.h +++ b/src/emu/cpu/m6502/ops02.h @@ -32,14 +32,14 @@ #define F_N 0x80 /* some shortcuts for improved readability */ -#define A m6502->a -#define X m6502->x -#define Y m6502->y -#define P m6502->p -#define S m6502->sp.b.l -#define SPD m6502->sp.d +#define A cpustate->a +#define X cpustate->x +#define Y cpustate->y +#define P cpustate->p +#define S cpustate->sp.b.l +#define SPD cpustate->sp.d -#define NZ m6502->nz +#define NZ cpustate->nz #define SET_NZ(n) \ if ((n) == 0) P = (P & ~F_N) | F_Z; else P = (P & ~(F_N | F_Z)) | ((n) & F_N) @@ -47,45 +47,45 @@ #define SET_Z(n) \ if ((n) == 0) P |= F_Z; else P &= ~F_Z -#define EAL m6502->ea.b.l -#define EAH m6502->ea.b.h -#define EAW m6502->ea.w.l -#define EAD m6502->ea.d +#define EAL cpustate->ea.b.l +#define EAH cpustate->ea.b.h +#define EAW cpustate->ea.w.l +#define EAD cpustate->ea.d -#define ZPL m6502->zp.b.l -#define ZPH m6502->zp.b.h -#define ZPW m6502->zp.w.l -#define ZPD m6502->zp.d +#define ZPL cpustate->zp.b.l +#define ZPH cpustate->zp.b.h +#define ZPW cpustate->zp.w.l +#define ZPD cpustate->zp.d -#define PCL m6502->pc.b.l -#define PCH m6502->pc.b.h -#define PCW m6502->pc.w.l -#define PCD m6502->pc.d +#define PCL cpustate->pc.b.l +#define PCH cpustate->pc.b.h +#define PCW cpustate->pc.w.l +#define PCD cpustate->pc.d -#define PPC m6502->ppc.d +#define PPC cpustate->ppc.d -#define RDMEM_ID(a) m6502->rdmem_id(m6502->space,a) -#define WRMEM_ID(a,d) m6502->wrmem_id(m6502->space,a,d) +#define RDMEM_ID(a) cpustate->rdmem_id(cpustate->space,a) +#define WRMEM_ID(a,d) cpustate->wrmem_id(cpustate->space,a,d) /*************************************************************** * RDOP read an opcode ***************************************************************/ -#define RDOP() memory_decrypted_read_byte(m6502->space, PCW++); m6502->icount -= 1 +#define RDOP() memory_decrypted_read_byte(cpustate->space, PCW++); cpustate->icount -= 1 /*************************************************************** * RDOPARG read an opcode argument ***************************************************************/ -#define RDOPARG() memory_raw_read_byte(m6502->space, PCW++); m6502->icount -= 1 +#define RDOPARG() memory_raw_read_byte(cpustate->space, PCW++); cpustate->icount -= 1 /*************************************************************** * RDMEM read memory ***************************************************************/ -#define RDMEM(addr) memory_read_byte_8le(m6502->space, addr); m6502->icount -= 1 +#define RDMEM(addr) memory_read_byte_8le(cpustate->space, addr); cpustate->icount -= 1 /*************************************************************** * WRMEM write memory ***************************************************************/ -#define WRMEM(addr,data) memory_write_byte_8le(m6502->space, addr,data); m6502->icount -= 1 +#define WRMEM(addr,data) memory_write_byte_8le(cpustate->space, addr,data); cpustate->icount -= 1 /*************************************************************** * BRA branch relative @@ -266,9 +266,9 @@ #define RD_ABX_NP EA_ABX_NP; tmp = RDMEM(EAD) #define RD_ABY_P EA_ABY_P; tmp = RDMEM(EAD) #define RD_ABY_NP EA_ABY_NP; tmp = RDMEM(EAD) -#define RD_IDX EA_IDX; tmp = RDMEM_ID(EAD); m6502->icount -= 1 -#define RD_IDY_P EA_IDY_P; tmp = RDMEM_ID(EAD); m6502->icount -= 1 -#define RD_IDY_NP EA_IDY_NP; tmp = RDMEM_ID(EAD); m6502->icount -= 1 +#define RD_IDX EA_IDX; tmp = RDMEM_ID(EAD); cpustate->icount -= 1 +#define RD_IDY_P EA_IDY_P; tmp = RDMEM_ID(EAD); cpustate->icount -= 1 +#define RD_IDY_NP EA_IDY_NP; tmp = RDMEM_ID(EAD); cpustate->icount -= 1 #define RD_ZPI EA_ZPI; tmp = RDMEM(EAD) /* write a value from tmp */ @@ -278,8 +278,8 @@ #define WR_ABS EA_ABS; WRMEM(EAD, tmp) #define WR_ABX_NP EA_ABX_NP; WRMEM(EAD, tmp) #define WR_ABY_NP EA_ABY_NP; WRMEM(EAD, tmp) -#define WR_IDX EA_IDX; WRMEM_ID(EAD, tmp); m6502->icount -= 1 -#define WR_IDY_NP EA_IDY_NP; WRMEM_ID(EAD, tmp); m6502->icount -= 1 +#define WR_IDX EA_IDX; WRMEM_ID(EAD, tmp); cpustate->icount -= 1 +#define WR_IDY_NP EA_IDY_NP; WRMEM_ID(EAD, tmp); cpustate->icount -= 1 #define WR_ZPI EA_ZPI; WRMEM(EAD, tmp) /* dummy read from the last EA */ @@ -434,8 +434,8 @@ * CLI Clear interrupt flag ***************************************************************/ #define CLI \ - if ((m6502->irq_state != CLEAR_LINE) && (P & F_I)) { \ - m6502->after_cli = 1; \ + if ((cpustate->irq_state != CLEAR_LINE) && (P & F_I)) { \ + cpustate->after_cli = 1; \ } \ P &= ~F_I @@ -504,7 +504,7 @@ * ILL Illegal opcode ***************************************************************/ #define ILL \ - logerror("M6502 illegal opcode %04x: %02x\n",(PCW-1)&0xffff, memory_decrypted_read_byte(m6502->space, (PCW-1)&0xffff)) + logerror("M6502 illegal opcode %04x: %02x\n",(PCW-1)&0xffff, memory_decrypted_read_byte(cpustate->space, (PCW-1)&0xffff)) /* 6502 ******************************************************** * INC Increment memory @@ -532,8 +532,8 @@ * set PC to the effective address ***************************************************************/ #define JMP \ - if( EAD == PPC && !m6502->pending_irq && !m6502->after_cli ) \ - if( m6502->icount > 0 ) m6502->icount = 0; \ + if( EAD == PPC && !cpustate->pending_irq && !cpustate->after_cli ) \ + if( cpustate->icount > 0 ) cpustate->icount = 0; \ PCD = EAD /* 6502 ******************************************************** @@ -619,9 +619,9 @@ RDMEM(SPD); \ if ( P & F_I ) { \ PULL(P); \ - if ((m6502->irq_state != CLEAR_LINE) && !(P & F_I)) { \ - LOG(("M6502#%d PLP sets after_cli\n",cpunum_get_active())); \ - m6502->after_cli = 1; \ + if ((cpustate->irq_state != CLEAR_LINE) && !(P & F_I)) { \ + LOG(("M6502 '%s' PLP sets after_cli\n",cpustate->device->tag)); \ + cpustate->after_cli = 1; \ } \ } else { \ PULL(P); \ @@ -660,10 +660,10 @@ PULL(PCL); \ PULL(PCH); \ P |= F_T | F_B; \ - if( (m6502->irq_state != CLEAR_LINE) && !(P & F_I) ) \ + if( (cpustate->irq_state != CLEAR_LINE) && !(P & F_I) ) \ { \ - LOG(("M6502#%d RTI sets after_cli\n",cpunum_get_active())); \ - m6502->after_cli = 1; \ + LOG(("M6502 '%s' RTI sets after_cli\n",cpustate->device->tag)); \ + cpustate->after_cli = 1; \ } /* 6502 ******************************************************** diff --git a/src/emu/cpu/m6502/ops09.h b/src/emu/cpu/m6502/ops09.h index d800f0686ed..29f9c3bda3a 100644 --- a/src/emu/cpu/m6502/ops09.h +++ b/src/emu/cpu/m6502/ops09.h @@ -20,39 +20,39 @@ * *****************************************************************************/ -#define ZPWH m6502->zp.w.h +#define ZPWH cpustate->zp.w.h -#define EAWH m6502->ea.w.h +#define EAWH cpustate->ea.w.h -#define PBWH m6502->pc_bank.w.h -#define PB m6502->pc_bank.d +#define PBWH cpustate->pc_bank.w.h +#define PB cpustate->pc_bank.d -#define IBWH m6502->ind_bank.w.h -#define IB m6502->ind_bank.d +#define IBWH cpustate->ind_bank.w.h +#define IB cpustate->ind_bank.d /*************************************************************** * RDOP read an opcode ***************************************************************/ #undef RDOP -#define RDOP() memory_decrypted_read_byte(m6502->space, (PCW++)|PB); m6502->icount -= 1 +#define RDOP() memory_decrypted_read_byte(cpustate->space, (PCW++)|PB); cpustate->icount -= 1 /*************************************************************** * RDOPARG read an opcode argument ***************************************************************/ #undef RDOPARG -#define RDOPARG() memory_raw_read_byte(m6502->space, (PCW++)|PB); m6502->icount -= 1 +#define RDOPARG() memory_raw_read_byte(cpustate->space, (PCW++)|PB); cpustate->icount -= 1 /*************************************************************** * RDMEM read memory ***************************************************************/ #undef RDMEM -#define RDMEM(addr) memory_read_byte_8le(m6502->space, addr); m6502->icount -= 1 +#define RDMEM(addr) memory_read_byte_8le(cpustate->space, addr); cpustate->icount -= 1 /*************************************************************** * WRMEM write memory ***************************************************************/ #undef WRMEM -#define WRMEM(addr,data) memory_write_byte_8le(m6502->space, addr,data); m6502->icount -= 1 +#define WRMEM(addr,data) memory_write_byte_8le(cpustate->space, addr,data); cpustate->icount -= 1 /*************************************************************** * push a register onto the stack @@ -128,7 +128,7 @@ EAH = RDMEM(ZPD); \ EAWH = PBWH; \ if (EAL + Y > 0xff) \ - m6502->icount--; \ + cpustate->icount--; \ EAW += Y @@ -144,7 +144,7 @@ EAH = RDMEM(ZPD); \ EAWH = IBWH; \ if (EAL + Y > 0xff) \ - m6502->icount--; \ + cpustate->icount--; \ EAW += Y /*************************************************************** @@ -172,13 +172,13 @@ { \ tmp = RDOPARG(); \ EAW = PCW + (signed char)tmp; \ - m6502->icount -= (PCH == EAH) ? 1 : 2; \ + cpustate->icount -= (PCH == EAH) ? 1 : 2; \ PCD = EAD|PB; \ } \ else \ { \ PCW++; \ - m6502->icount -= 1; \ + cpustate->icount -= 1; \ } /* 6502 ******************************************************** @@ -203,4 +203,4 @@ #undef KIL #define KIL \ PCW--; \ - logerror("M6509 KILL opcode %05x: %02x\n", PCD, memory_decrypted_read_byte(m6502->space, PCD)) + logerror("M6509 KILL opcode %05x: %02x\n", PCD, memory_decrypted_read_byte(cpustate->space, PCD)) diff --git a/src/emu/cpu/m6502/ops4510.h b/src/emu/cpu/m6502/ops4510.h index 43e9e5dee55..a8ebd215a7c 100644 --- a/src/emu/cpu/m6502/ops4510.h +++ b/src/emu/cpu/m6502/ops4510.h @@ -33,29 +33,29 @@ SPL = X; \ if (PEEK_OP() == 0x2b /*TYS*/ ) { \ UINT8 op = RDOP(); \ - (*m4510->insn[op])(m4510); \ + (*cpustate->insn[op])(cpustate); \ } #undef NOP #define NOP \ - m4510->interrupt_inhibit = 0; + cpustate->interrupt_inhibit = 0; /* c65 docu says transfer of axyz to the mapper register so no readback!? */ #define MAP \ - m4510->interrupt_inhibit = 1; \ - m4510->low=m4510->a|(m4510->x<<8); \ - m4510->high=m4510->y|(m4510->z<<8); \ - m4510->mem[0]=(m4510->low&0x1000) ? (m4510->low&0xfff)<<8:0; \ - m4510->mem[1]=(m4510->low&0x2000) ? (m4510->low&0xfff)<<8:0; \ - m4510->mem[2]=(m4510->low&0x4000) ? (m4510->low&0xfff)<<8:0; \ - m4510->mem[3]=(m4510->low&0x8000) ? (m4510->low&0xfff)<<8:0; \ - m4510->mem[4]=(m4510->high&0x1000) ? (m4510->high&0xfff)<<8:0; \ - m4510->mem[5]=(m4510->high&0x2000) ? (m4510->high&0xfff)<<8:0; \ - m4510->mem[6]=(m4510->high&0x4000) ? (m4510->high&0xfff)<<8:0; \ - m4510->mem[7]=(m4510->high&0x8000) ? (m4510->high&0xfff)<<8:0; \ - m4510->icount -= 3; \ + cpustate->interrupt_inhibit = 1; \ + cpustate->low=cpustate->a|(cpustate->x<<8); \ + cpustate->high=cpustate->y|(cpustate->z<<8); \ + cpustate->mem[0]=(cpustate->low&0x1000) ? (cpustate->low&0xfff)<<8:0; \ + cpustate->mem[1]=(cpustate->low&0x2000) ? (cpustate->low&0xfff)<<8:0; \ + cpustate->mem[2]=(cpustate->low&0x4000) ? (cpustate->low&0xfff)<<8:0; \ + cpustate->mem[3]=(cpustate->low&0x8000) ? (cpustate->low&0xfff)<<8:0; \ + cpustate->mem[4]=(cpustate->high&0x1000) ? (cpustate->high&0xfff)<<8:0; \ + cpustate->mem[5]=(cpustate->high&0x2000) ? (cpustate->high&0xfff)<<8:0; \ + cpustate->mem[6]=(cpustate->high&0x4000) ? (cpustate->high&0xfff)<<8:0; \ + cpustate->mem[7]=(cpustate->high&0x8000) ? (cpustate->high&0xfff)<<8:0; \ + cpustate->icount -= 3; \ { \ UINT8 op = RDOP(); \ - (*m4510->insn[op])(m4510); \ + (*cpustate->insn[op])(cpustate); \ } diff --git a/src/emu/cpu/m6502/opsc02.h b/src/emu/cpu/m6502/opsc02.h index 6d0c11df161..873caca416d 100644 --- a/src/emu/cpu/m6502/opsc02.h +++ b/src/emu/cpu/m6502/opsc02.h @@ -128,11 +128,11 @@ #define RD_ABX_C02_P EA_ABX_C02_P; tmp = RDMEM(EAD) #define RD_ABX_C02_NP EA_ABX_C02_NP; tmp = RDMEM(EAD) #define RD_ABY_C02_P EA_ABY_C02_P; tmp = RDMEM(EAD) -#define RD_IDY_C02_P EA_IDY_C02_P; tmp = RDMEM_ID(EAD); m6502->icount -= 1 +#define RD_IDY_C02_P EA_IDY_C02_P; tmp = RDMEM_ID(EAD); cpustate->icount -= 1 #define WR_ABX_C02_NP EA_ABX_C02_NP; WRMEM(EAD, tmp) #define WR_ABY_C02_NP EA_ABY_C02_NP; WRMEM(EAD, tmp) -#define WR_IDY_C02_NP EA_IDY_C02_NP; WRMEM_ID(EAD, tmp); m6502->icount -= 1 +#define WR_IDY_C02_NP EA_IDY_C02_NP; WRMEM_ID(EAD, tmp); cpustate->icount -= 1 /* 65C02******************************************************** diff --git a/src/emu/cpu/m6502/opsce02.h b/src/emu/cpu/m6502/opsce02.h index 96e756caac8..111b04e4283 100644 --- a/src/emu/cpu/m6502/opsce02.h +++ b/src/emu/cpu/m6502/opsce02.h @@ -289,7 +289,7 @@ t1=RDOPARG(); \ t2=RDOPARG(); \ t3=RDOPARG(); \ - logerror("m65ce02 at pc:%.4x reserved op aug %.2x %.2x %.2x\n", cpu_get_pc(m65ce02->device),t1,t2,t3); + logerror("m65ce02 at pc:%.4x reserved op aug %.2x %.2x %.2x\n", cpu_get_pc(cpustate->device),t1,t2,t3); /* 65ce02 ****************************************************** * BBR Branch if bit is reset @@ -676,7 +676,7 @@ PULL(temp); \ P=(P&F_E)|F_B|(temp&~F_E); \ if( IRQ_STATE != CLEAR_LINE && !(P & F_I) ) { \ - LOG(("M65ce02#%d PLP sets after_cli\n", cpunum_get_active())); \ + LOG(("M65ce02 '%s' PLP sets after_cli\n", cpustate->device->tag)); \ AFTER_CLI = 1; \ } \ } else { \ @@ -756,7 +756,7 @@ PULL(PCH); \ if( IRQ_STATE != CLEAR_LINE && !(P & F_I) ) \ { \ - LOG(("M65ce02#%d RTI sets after_cli\n", cpunum_get_active())); \ + LOG(("M65ce02 '%s' RTI sets after_cli\n", cpustate->device->tag)); \ AFTER_CLI = 1; \ } @@ -787,7 +787,7 @@ PULL(PCL); \ PULL(PCH); \ if( IRQ_STATE != CLEAR_LINE && !(P & F_I) ) { \ - LOG(("M65ce02#%d RTI sets after_cli\n", cpunum_get_active())); \ + LOG(("M65ce02 '%s' RTI sets after_cli\n", cpustate->device->tag)); \ AFTER_CLI = 1; \ } @@ -962,7 +962,7 @@ SPL = X; \ if (PEEK_OP() == 0x2b /*TYS*/ ) { \ UINT8 op = RDOP(); \ - (*m65ce02->insn[op])(m65ce02); \ + (*cpustate->insn[op])(m65ce02); \ } diff --git a/src/emu/cpu/m6502/t6502.c b/src/emu/cpu/m6502/t6502.c index 8e3e504cb5d..71dda3ede2b 100644 --- a/src/emu/cpu/m6502/t6502.c +++ b/src/emu/cpu/m6502/t6502.c @@ -23,7 +23,7 @@ *****************************************************************************/ #undef OP -#define OP(nn) INLINE void m6502_##nn(m6502_Regs *m6502) +#define OP(nn) INLINE void m6502_##nn(m6502_Regs *cpustate) /***************************************************************************** ***************************************************************************** @@ -323,7 +323,7 @@ OP(ff) { int tmp; RD_ABX_NP; WB_EA; ISB; WB_EA; } /* 7 ISB ABX */ /* and here's the array of function pointers */ -static void (*const insn6502[0x100])(m6502_Regs *m6502) = { +static void (*const insn6502[0x100])(m6502_Regs *cpustate) = { m6502_00,m6502_01,m6502_02,m6502_03,m6502_04,m6502_05,m6502_06,m6502_07, m6502_08,m6502_09,m6502_0a,m6502_0b,m6502_0c,m6502_0d,m6502_0e,m6502_0f, m6502_10,m6502_11,m6502_12,m6502_13,m6502_14,m6502_15,m6502_16,m6502_17, diff --git a/src/emu/cpu/m6502/t6509.c b/src/emu/cpu/m6502/t6509.c index a239cf6ac43..001e80522e8 100644 --- a/src/emu/cpu/m6502/t6509.c +++ b/src/emu/cpu/m6502/t6509.c @@ -24,7 +24,7 @@ *****************************************************************************/ #undef OP -#define OP(nn) INLINE void m6509_##nn(m6509_Regs *m6502) +#define OP(nn) INLINE void m6509_##nn(m6509_Regs *cpustate) OP(00) { BRK; } /* 7 BRK */ OP(20) { JSR; } /* 6 JSR */ diff --git a/src/emu/cpu/m6502/t65c02.c b/src/emu/cpu/m6502/t65c02.c index 0cda6fb4a53..f9d271e6f6b 100644 --- a/src/emu/cpu/m6502/t65c02.c +++ b/src/emu/cpu/m6502/t65c02.c @@ -24,7 +24,7 @@ *****************************************************************************/ #undef OP -#define OP(nn) INLINE void m65c02_##nn(m6502_Regs *m6502) +#define OP(nn) INLINE void m65c02_##nn(m6502_Regs *cpustate) /***************************************************************************** ***************************************************************************** @@ -326,7 +326,7 @@ OP(bf) { int tmp; RD_ZPG; BBS(3); } /* 5-7 BBS3 ZPG */ OP(df) { int tmp; RD_ZPG; BBS(5); } /* 5-7 BBS5 ZPG */ OP(ff) { int tmp; RD_ZPG; BBS(7); } /* 5-7 BBS7 ZPG */ -static void (*const insn65c02[0x100])(m6502_Regs *m6502) = { +static void (*const insn65c02[0x100])(m6502_Regs *cpustate) = { m65c02_00,m65c02_01,m65c02_02,m65c02_03,m65c02_04,m65c02_05,m65c02_06,m65c02_07, m65c02_08,m65c02_09,m65c02_0a,m65c02_0b,m65c02_0c,m65c02_0d,m65c02_0e,m65c02_0f, m65c02_10,m65c02_11,m65c02_12,m65c02_13,m65c02_14,m65c02_15,m65c02_16,m65c02_17, @@ -371,7 +371,7 @@ OP(7e_wdc) { int tmp; RD_ABX_P; RD_EA; ROR; WB_EA; } /* 6 ROR ABX page pena OP(de_wdc) { int tmp; RD_ABX_P; RD_EA; DEC; WB_EA; } /* 6 DEC ABX page penalty */ OP(fe_wdc) { int tmp; RD_ABX_P; RD_EA; INC; WB_EA; } /* 6 INC ABX page penalty */ -static void (*const insnwdc65c02[0x100])(m6502_Regs *m6502) = { +static void (*const insnwdc65c02[0x100])(m6502_Regs *cpustate) = { m65c02_00,m65c02_01,m65c02_02,m65c02_03,m65c02_04,m65c02_05,m65c02_06,m65c02_07, m65c02_08,m65c02_09,m65c02_0a,m65c02_0b,m65c02_0c,m65c02_0d,m65c02_0e,m65c02_0f, m65c02_10,m65c02_11,m65c02_12,m65c02_13,m65c02_14,m65c02_15,m65c02_16,m65c02_17, diff --git a/src/emu/cpu/m6502/t65ce02.c b/src/emu/cpu/m6502/t65ce02.c index a86c0c01f8c..8f11e90e228 100644 --- a/src/emu/cpu/m6502/t65ce02.c +++ b/src/emu/cpu/m6502/t65ce02.c @@ -21,9 +21,9 @@ #undef OP #ifdef M4510 -#define OP(nn) INLINE void m4510_##nn(m4510_Regs *m4510) +#define OP(nn) INLINE void m4510_##nn(m4510_Regs *cpustate) #else -#define OP(nn) INLINE void m65ce02_##nn(m65ce02_Regs *m65ce02) +#define OP(nn) INLINE void m65ce02_##nn(m65ce02_Regs *cpustate) #endif /***************************************************************************** diff --git a/src/emu/cpu/m6502/t65sc02.c b/src/emu/cpu/m6502/t65sc02.c index 4f487c85ff7..5796cd38514 100644 --- a/src/emu/cpu/m6502/t65sc02.c +++ b/src/emu/cpu/m6502/t65sc02.c @@ -32,7 +32,7 @@ */ #undef OP -#define OP(nn) INLINE void m65sc02_##nn(m6502_Regs *m6502) +#define OP(nn) INLINE void m65sc02_##nn(m6502_Regs *cpustate) /***************************************************************************** ***************************************************************************** @@ -43,7 +43,7 @@ * op temp cycles rdmem opc wrmem ********************/ OP(63) { BSR; } /* 5? BSR */ -static void (*const insn65sc02[0x100])(m6502_Regs *m6502) = { +static void (*const insn65sc02[0x100])(m6502_Regs *cpustate) = { m65c02_00,m65c02_01,m65c02_02,m65c02_03,m65c02_04,m65c02_05,m65c02_06,m65c02_07, m65c02_08,m65c02_09,m65c02_0a,m65c02_0b,m65c02_0c,m65c02_0d,m65c02_0e,m65c02_0f, m65c02_10,m65c02_11,m65c02_12,m65c02_13,m65c02_14,m65c02_15,m65c02_16,m65c02_17, diff --git a/src/emu/cpu/m6502/tdeco16.c b/src/emu/cpu/m6502/tdeco16.c index 08ef15297d2..865102439c9 100644 --- a/src/emu/cpu/m6502/tdeco16.c +++ b/src/emu/cpu/m6502/tdeco16.c @@ -6,7 +6,7 @@ #define DECO16_VERBOSE 0 #undef OP -#define OP(nn) INLINE void deco16_##nn(m6502_Regs *m6502) +#define OP(nn) INLINE void deco16_##nn(m6502_Regs *cpustate) #define DECO16_BRK \ logerror("%04x: BRK\n",cpu_get_pc(Machine->activecpu)); \ @@ -84,7 +84,7 @@ OP(03) { RD_DUM; ILL; } /* 2 ILL */ OP(23) { int tmp; - m6502->icount -= 1; + cpustate->icount -= 1; RD_IMM; if (DECO16_VERBOSE) @@ -94,7 +94,7 @@ OP(43) { RD_DUM; ILL; } /* 2 ILL */ OP(63) { int tmp; - m6502->icount -= 1; + cpustate->icount -= 1; RD_IMM; if (DECO16_VERBOSE) @@ -104,7 +104,7 @@ OP(83) { RD_DUM; ILL; } /* 2 ILL */ OP(a3) { int tmp; - m6502->icount -= 1; + cpustate->icount -= 1; RD_IMM; if (DECO16_VERBOSE) @@ -113,7 +113,7 @@ OP(a3) { OP(c3) { RD_DUM; ILL; } /* 2 ILL */ OP(e3) { RD_DUM; ILL; } /* 2 ILL */ -OP(13) { int tmp; m6502->icount -= 1; RD_IMM; +OP(13) { int tmp; cpustate->icount -= 1; RD_IMM; if (DECO16_VERBOSE) logerror("%04x: OP13 %02x\n",cpu_get_pc(Machine->activecpu),tmp); @@ -188,14 +188,14 @@ OP(27) { RD_DUM; ILL; } /* 2 ILL / 5 RMB2 ZPG ?? */ OP(47) { RD_DUM; ILL; } /* 2 ILL / 5 RMB4 ZPG ?? */ OP(67) { int tmp; RD_IMM; - m6502->a=memory_read_byte_8le(m6502->io,0); + cpustate->a=memory_read_byte_8le(cpustate->io,0); // logerror("%04x: VBL (0x67)\n",cpu_get_pc(Machine->activecpu)); // really - wait for status? } /* */ -OP(87) { int tmp; m6502->icount -= 1; RD_IMM; +OP(87) { int tmp; cpustate->icount -= 1; RD_IMM; logerror("%04x: OP87 %02x\n",cpu_get_pc(Machine->activecpu),tmp); } /* */ @@ -266,15 +266,15 @@ OP(f7) { RD_DUM; ILL; } /* 2 ILL / 5 SMB7 ZPG ?? */ #define deco16_da m65c02_da /* 3 PHX */ #define deco16_fa m65c02_fa /* 4 PLX */ -OP(0b) { int tmp; m6502->icount -= 1; RD_IMM; +OP(0b) { int tmp; cpustate->icount -= 1; RD_IMM; logerror("%04x: OP0B %02x\n",cpu_get_pc(Machine->activecpu),tmp); } OP(2b) { RD_DUM; ILL; } /* 2 ILL */ -OP(4b) { int tmp; m6502->icount -= 1; RD_IMM; +OP(4b) { int tmp; cpustate->icount -= 1; RD_IMM; logerror("%04x: OP4B %02x\n",cpu_get_pc(Machine->activecpu),tmp); -// m6502->a=memory_read_byte_8le(m6502->io,0); +// cpustate->a=memory_read_byte_8le(cpustate->io,0); //tilt?? @@ -296,7 +296,7 @@ OP(9b) { RD_DUM; ILL; } /* 2 ILL */ OP(bb) { int tmp; - m6502->icount -= 1; + cpustate->icount -= 1; RD_IMM; if (DECO16_VERBOSE) @@ -363,10 +363,10 @@ OP(0f) { RD_DUM; ILL; } /* 2 ILL / 5 BBR0 ZPG ?? */ OP(2f) { RD_DUM; ILL; } /* 2 ILL / 5 BBR2 ZPG ?? */ OP(4f) { RD_DUM; ILL; } /* 2 ILL / 5 BBR4 ZPG ?? */ OP(6f) { RD_DUM; ILL; } /* 2 ILL / 5 BBR6 ZPG ?? */ -OP(8f) { int tmp; m6502->icount -= 1; RD_IMM; +OP(8f) { int tmp; cpustate->icount -= 1; RD_IMM; logerror("%04x: BANK (8F) %02x\n",cpu_get_pc(Machine->activecpu),tmp); - memory_write_byte_8le(m6502->io,0,tmp); + memory_write_byte_8le(cpustate->io,0,tmp); //swap bank in/out @@ -379,7 +379,7 @@ OP(1f) { RD_DUM; ILL; } /* 2 ILL / 5 BBR1 ZPG ?? */ OP(3f) { int tmp; - m6502->icount -= 1; + cpustate->icount -= 1; RD_IMM; if (DECO16_VERBOSE) @@ -392,7 +392,7 @@ OP(bf) { RD_DUM; ILL; } /* 2 ILL / 5 BBS3 ZPG ?? */ OP(df) { RD_DUM; ILL; } /* 2 ILL / 5 BBS5 ZPG ?? */ OP(ff) { RD_DUM; ILL; } /* 2 ILL / 5 BBS7 ZPG ?? */ -static void (*const insndeco16[0x100])(m6502_Regs *m6502) = { +static void (*const insndeco16[0x100])(m6502_Regs *cpustate) = { deco16_00,deco16_01,deco16_02,deco16_03,deco16_04,deco16_05,deco16_06,deco16_07, deco16_08,deco16_09,deco16_0a,deco16_0b,deco16_0c,deco16_0d,deco16_0e,deco16_0f, deco16_10,deco16_11,deco16_12,deco16_13,deco16_14,deco16_15,deco16_16,deco16_17, diff --git a/src/emu/cpu/m6502/tn2a03.c b/src/emu/cpu/m6502/tn2a03.c index 07278c02f8d..2b9e3221b26 100644 --- a/src/emu/cpu/m6502/tn2a03.c +++ b/src/emu/cpu/m6502/tn2a03.c @@ -32,7 +32,7 @@ #undef OP -#define OP(nn) INLINE void n2a03_##nn(m6502_Regs *m6502) +#define OP(nn) INLINE void n2a03_##nn(m6502_Regs *cpustate) /***************************************************************************** ***************************************************************************** @@ -60,7 +60,7 @@ OP(ed) { int tmp; RD_ABS; SBC_NES; } /* 4 SBC ABS */ OP(7d) { int tmp; RD_ABX_P; ADC_NES; } /* 4 ADC ABX page penalty */ OP(fd) { int tmp; RD_ABX_P; SBC_NES; } /* 4 SBC ABX page penalty */ -static void (*const insn2a03[0x100])(m6502_Regs *m6502) = { +static void (*const insn2a03[0x100])(m6502_Regs *cpustate) = { m6502_00,m6502_01,m6502_02,m6502_03,m6502_04,m6502_05,m6502_06,m6502_07, m6502_08,m6502_09,m6502_0a,m6502_0b,m6502_0c,m6502_0d,m6502_0e,m6502_0f, m6502_10,m6502_11,m6502_12,m6502_13,m6502_14,m6502_15,m6502_16,m6502_17, diff --git a/src/emu/cpu/m6800/m6800.c b/src/emu/cpu/m6800/m6800.c index 2ae9a9648fa..25f5a61d3b2 100644 --- a/src/emu/cpu/m6800/m6800.c +++ b/src/emu/cpu/m6800/m6800.c @@ -280,11 +280,11 @@ enum }; /* take interrupt */ -#define TAKE_ICI enter_interrupt(m68_state, "M6800#%d take ICI\n",0xfff6) -#define TAKE_OCI enter_interrupt(m68_state, "M6800#%d take OCI\n",0xfff4) -#define TAKE_TOI enter_interrupt(m68_state, "M6800#%d take TOI\n",0xfff2) -#define TAKE_SCI enter_interrupt(m68_state, "M6800#%d take SCI\n",0xfff0) -#define TAKE_TRAP enter_interrupt(m68_state, "M6800#%d take TRAP\n",0xffee) +#define TAKE_ICI enter_interrupt(m68_state, "M6800 '%s' take ICI\n",0xfff6) +#define TAKE_OCI enter_interrupt(m68_state, "M6800 '%s' take OCI\n",0xfff4) +#define TAKE_TOI enter_interrupt(m68_state, "M6800 '%s' take TOI\n",0xfff2) +#define TAKE_SCI enter_interrupt(m68_state, "M6800 '%s' take SCI\n",0xfff0) +#define TAKE_TRAP enter_interrupt(m68_state, "M6800 '%s' take TRAP\n",0xffee) /* operate one instruction for */ #define ONE_MORE_INSN() { \ @@ -533,7 +533,7 @@ INLINE void WM16(m68_state_t *m68_state, UINT32 Addr, PAIR *p ) /* IRQ enter */ static void enter_interrupt(m68_state_t *m68_state, const char *message,UINT16 irq_vector) { - LOG((message, cpunum_get_active())); + LOG((message, m68_state->device->tag)); if( m68_state->wai_state & (M6800_WAI|M6800_SLP) ) { if( m68_state->wai_state & M6800_WAI ) @@ -587,7 +587,7 @@ INLINE void CHECK_IRQ_LINES(m68_state_t *m68_state) { if( m68_state->irq_state[M6800_IRQ_LINE] != CLEAR_LINE ) { /* standard IRQ */ - enter_interrupt(m68_state, "M6800#%d take IRQ1n",0xfff8); + enter_interrupt(m68_state, "M6800 '%s' take IRQ1n",0xfff8); if( m68_state->irq_callback ) (void)(*m68_state->irq_callback)(m68_state->device, M6800_IRQ_LINE); } @@ -963,19 +963,19 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state) if (irqline == INPUT_LINE_NMI) { if (m68_state->nmi_state == state) return; - LOG(("M6800#%d set_nmi_line %d \n", cpunum_get_active(), state)); + LOG(("M6800 '%s' set_nmi_line %d \n", m68_state->device->tag, state)); m68_state->nmi_state = state; if (state == CLEAR_LINE) return; /* NMI */ - enter_interrupt(m68_state, "M6800#%d take NMI\n",0xfffc); + enter_interrupt(m68_state, "M6800 '%s' take NMI\n",0xfffc); } else { int eddge; if (m68_state->irq_state[irqline] == state) return; - LOG(("M6800#%d set_irq_line %d,%d\n", cpunum_get_active(), irqline, state)); + LOG(("M6800 '%s' set_irq_line %d,%d\n", m68_state->device->tag, irqline, state)); m68_state->irq_state[irqline] = state; switch(irqline) @@ -2460,7 +2460,7 @@ static READ8_HANDLER( m6803_internal_registers_r ) case 0x0e: return (m68_state->input_capture >> 8) & 0xff; case 0x0f: - logerror("CPU #%d PC %04x: warning - read from unsupported register %02x\n",cpunum_get_active(),cpu_get_pc(space->cpu),offset); + logerror("CPU '%s' PC %04x: warning - read from unsupported register %02x\n",space->cpu->tag,cpu_get_pc(space->cpu),offset); return 0; case 0x10: return m68_state->rmcr; @@ -2477,7 +2477,7 @@ static READ8_HANDLER( m6803_internal_registers_r ) case 0x13: return m68_state->tdr; case 0x14: - logerror("CPU #%d PC %04x: read RAM control register\n",cpunum_get_active(),cpu_get_pc(space->cpu)); + logerror("CPU '%s' PC %04x: read RAM control register\n",space->cpu->tag,cpu_get_pc(space->cpu)); return m68_state->ram_ctrl; case 0x15: case 0x16: @@ -2491,7 +2491,7 @@ static READ8_HANDLER( m6803_internal_registers_r ) case 0x1e: case 0x1f: default: - logerror("CPU #%d PC %04x: warning - read from reserved internal register %02x\n",cpunum_get_active(),cpu_get_pc(space->cpu),offset); + logerror("CPU '%s' PC %04x: warning - read from reserved internal register %02x\n",space->cpu->tag,cpu_get_pc(space->cpu),offset); return 0; } } @@ -2524,7 +2524,7 @@ static WRITE8_HANDLER( m6803_internal_registers_w ) | (memory_read_byte_8be(m68_state->io, M6803_PORT2) & (m68_state->port2_ddr ^ 0xff))); if (m68_state->port2_ddr & 2) - logerror("CPU #%d PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",cpunum_get_active(),cpu_get_pc(space->cpu)); + logerror("CPU '%s' PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",space->cpu->tag,cpu_get_pc(space->cpu)); } break; case 0x02: @@ -2623,10 +2623,10 @@ static WRITE8_HANDLER( m6803_internal_registers_w ) case 0x0d: case 0x0e: case 0x12: - logerror("CPU #%d PC %04x: warning - write %02x to read only internal register %02x\n",cpunum_get_active(),cpu_get_pc(space->cpu),data,offset); + logerror("CPU '%s' PC %04x: warning - write %02x to read only internal register %02x\n",space->cpu->tag,cpu_get_pc(space->cpu),data,offset); break; case 0x0f: - logerror("CPU #%d PC %04x: warning - write %02x to unsupported internal register %02x\n",cpunum_get_active(),cpu_get_pc(space->cpu),data,offset); + logerror("CPU '%s' PC %04x: warning - write %02x to unsupported internal register %02x\n",space->cpu->tag,cpu_get_pc(space->cpu),data,offset); break; case 0x10: m68_state->rmcr = data & 0x0f; @@ -2666,7 +2666,7 @@ static WRITE8_HANDLER( m6803_internal_registers_w ) m68_state->tdr = data; break; case 0x14: - logerror("CPU #%d PC %04x: write %02x to RAM control register\n",cpunum_get_active(),cpu_get_pc(space->cpu),data); + logerror("CPU '%s' PC %04x: write %02x to RAM control register\n",space->cpu->tag,cpu_get_pc(space->cpu),data); m68_state->ram_ctrl = data; break; case 0x15: @@ -2681,7 +2681,7 @@ static WRITE8_HANDLER( m6803_internal_registers_w ) case 0x1e: case 0x1f: default: - logerror("CPU #%d PC %04x: warning - write %02x to reserved internal register %02x\n",cpunum_get_active(),cpu_get_pc(space->cpu),data,offset); + logerror("CPU '%s' PC %04x: warning - write %02x to reserved internal register %02x\n",space->cpu->tag,cpu_get_pc(space->cpu),data,offset); break; } } diff --git a/src/emu/cpu/m6809/m6809.c b/src/emu/cpu/m6809/m6809.c index b3b488a199e..13f2752a13d 100644 --- a/src/emu/cpu/m6809/m6809.c +++ b/src/emu/cpu/m6809/m6809.c @@ -442,7 +442,7 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state) { if (m68_state->nmi_state == state) return; m68_state->nmi_state = state; - LOG(("M6809#%d set_irq_line (NMI) %d\n", cpunum_get_active(), state)); + LOG(("M6809 '%s' set_irq_line (NMI) %d\n", m68_state->device->tag, state)); if( state == CLEAR_LINE ) return; /* if the stack was not yet initialized */ @@ -473,7 +473,7 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state) } else if (irqline < 2) { - LOG(("M6809#%d set_irq_line %d, %d\n", cpunum_get_active(), irqline, state)); + LOG(("M6809 '%s' set_irq_line %d, %d\n", m68_state->device->tag, irqline, state)); m68_state->irq_state[irqline] = state; if (state == CLEAR_LINE) return; check_irq_lines(m68_state); diff --git a/src/emu/cpu/mcs51/mcs51.c b/src/emu/cpu/mcs51/mcs51.c index e6ebfac167d..69075d91f20 100644 --- a/src/emu/cpu/mcs51/mcs51.c +++ b/src/emu/cpu/mcs51/mcs51.c @@ -2003,7 +2003,7 @@ static void mcs51_sfr_write(mcs51_state_t *mcs51_state, size_t offset, UINT8 dat case ADDR_SCON: break; default: - LOG(("mcs51 #%d: attemping to write to an invalid/non-implemented SFR address: %zx at 0x%04x, data=%x\n", cpunum_get_active(), offset,PC,data)); + LOG(("mcs51 '%s': attemping to write to an invalid/non-implemented SFR address: %zx at 0x%04x, data=%x\n", mcs51_state->device->tag, offset,PC,data)); /* no write in this case according to manual */ return; } @@ -2043,7 +2043,7 @@ static UINT8 mcs51_sfr_read(mcs51_state_t *mcs51_state, size_t offset) return memory_read_byte_8le(mcs51_state->data, (size_t) offset | 0x100); /* Illegal or non-implemented sfr */ default: - LOG(("mcs51 #%d: attemping to read an invalid/non-implemented SFR address: %zx at 0x%04x\n", cpunum_get_active(), offset,PC)); + LOG(("mcs51 '%s': attemping to read an invalid/non-implemented SFR address: %zx at 0x%04x\n", mcs51_state->device->tag, offset,PC)); /* according to the manual, the read may return random bits */ return 0xff; } @@ -2300,8 +2300,8 @@ static CPU_INIT( i80c31 ) ****************************************************************************/ -#define DS5_LOGW(a, d) LOG(("ds5002fp #%d: write to " # a " register at 0x%04x, data=%x\n", cpunum_get_active(), PC, d)) -#define DS5_LOGR(a, d) LOG(("ds5002fp #%d: read from " # a " register at 0x%04x\n", cpunum_get_active(), PC)) +#define DS5_LOGW(a, d) LOG(("ds5002fp '%s': write to " # a " register at 0x%04x, data=%x\n", mcs51_state->device->tag, PC, d)) +#define DS5_LOGR(a, d) LOG(("ds5002fp '%s': read from " # a " register at 0x%04x\n", mcs51_state->device->tag, PC)) INLINE UINT8 ds5002fp_protected(mcs51_state_t *mcs51_state, size_t offset, UINT8 data, UINT8 ta_mask, UINT8 mask) { @@ -2327,7 +2327,7 @@ static void ds5002fp_sfr_write(mcs51_state_t *mcs51_state, size_t offset, UINT8 if ((data == 0xaa) && (mcs51_state->ds5002fp.ta_window == 0)) { mcs51_state->ds5002fp.ta_window = 6; /* 4*12 + 2*12 */ - LOG(("ds5002fp #%d: TA window initiated at 0x%04x\n", cpunum_get_active(), PC)); + LOG(("ds5002fp '%s': TA window initiated at 0x%04x\n", mcs51_state->device->tag, PC)); } break; case ADDR_MCON: data = ds5002fp_protected(mcs51_state, ADDR_MCON, data, 0x0f, 0xf7); DS5_LOGW(MCON, data); break; diff --git a/src/emu/cpu/mcs51/mcs51ops.c b/src/emu/cpu/mcs51/mcs51ops.c index a9ccf4330b1..31c6c87101c 100644 --- a/src/emu/cpu/mcs51/mcs51ops.c +++ b/src/emu/cpu/mcs51/mcs51ops.c @@ -976,5 +976,5 @@ OPHANDLER( xrl_a_r ) //illegal opcodes OPHANDLER( illegal ) { - LOG(("i8051 #%d: illegal opcode at 0x%03x: %02x\n", cpunum_get_active(), PC-1, r)); + LOG(("i8051 '%s': illegal opcode at 0x%03x: %02x\n", mcs51_state->device->tag, PC-1, r)); }