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PSX CPU creates a ram device, this has exposed a problem with not removing the child devices from the hash map when removing replacing devices. At the moment I have changed device.c so that when any device is removed the hash maps are reset. [smf]

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This commit is contained in:
smf- 2013-04-26 16:51:38 +00:00
parent 2cea1c8b72
commit 98dba96079
13 changed files with 116 additions and 150 deletions
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76
src/emu/cpu/psx/psx.c
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@ -1294,17 +1294,19 @@ void psxcpu_device::update_ram_config()
break;
}
assert( m_ram_size != 0 );
UINT32 ram_size = m_ram->size();
UINT8 *pointer = m_ram->pointer();
assert( window_size != 0 );
int start = 0;
while( start < window_size )
{
m_program->install_ram( start + 0x00000000, start + 0x00000000 + m_ram_size - 1, m_ram );
m_program->install_ram( start + 0x80000000, start + 0x80000000 + m_ram_size - 1, m_ram );
m_program->install_ram( start + 0xa0000000, start + 0xa0000000 + m_ram_size - 1, m_ram );
m_program->install_ram( start + 0x00000000, start + 0x00000000 + ram_size - 1, pointer );
m_program->install_ram( start + 0x80000000, start + 0x80000000 + ram_size - 1, pointer );
m_program->install_ram( start + 0xa0000000, start + 0xa0000000 + ram_size - 1, pointer );
start += m_ram_size;
start += ram_size;
}
m_program->install_readwrite_handler( 0x00000000 + window_size, 0x1effffff, read32_delegate( FUNC(psxcpu_device::berr_r), this ), write32_delegate( FUNC(psxcpu_device::berr_w), this ) );
@ -1625,7 +1627,7 @@ psxcpu_device::psxcpu_device(const machine_config &mconfig, device_type type, co
m_spu_write_handler(*this),
m_cd_read_handler(*this),
m_cd_write_handler(*this),
m_ram_size(0)
m_ram(*this, "ram")
{
}
@ -1659,37 +1661,6 @@ cxd8606cq_device::cxd8606cq_device(const machine_config &mconfig, const char *ta
{
}
//-------------------------------------------------
// set_ram_size - configuration helper
// to set the ram size
//-------------------------------------------------
void psxcpu_device::set_ram_size(device_t &device, UINT32 ram_size)
{
downcast<psxcpu_device &>(device).m_ram_size = ram_size;
}
//-------------------------------------------------
// ram_size - temporary kludge to allow
// access to the current ram size
//-------------------------------------------------
UINT32 psxcpu_device::ram_size()
{
return m_ram_size;
}
//-------------------------------------------------
// ram - temporary kludge to allow
// access to the current ram
//-------------------------------------------------
UINT32 *psxcpu_device::ram()
{
return m_ram;
}
//-------------------------------------------------
// device_start - start up the device
//-------------------------------------------------
@ -1847,27 +1818,6 @@ void psxcpu_device::device_start()
m_spu_write_handler.resolve_safe();
m_cd_read_handler.resolve_safe(0);
m_cd_write_handler.resolve_safe();
m_ram = global_alloc_array( UINT32, m_ram_size / 4 );
save_pointer( NAME(m_ram), m_ram_size / 4 );
m_ram_config = 0x800;
update_ram_config();
/// TODO: get dma to acess ram through the memory map?
psxdma_device *psxdma = subdevice<psxdma_device>( "dma" );
psxdma->m_ram = m_ram;
psxdma->m_ramsize = m_ram_size;
}
//-------------------------------------------------
// device_stop - stop the device
//-------------------------------------------------
void psxcpu_device::device_stop()
{
global_free( m_ram );
}
@ -1877,6 +1827,14 @@ void psxcpu_device::device_stop()
void psxcpu_device::device_reset()
{
m_ram_config = 0x800;
update_ram_config();
/// TODO: get dma to access ram through the memory map?
psxdma_device *psxdma = subdevice<psxdma_device>( "dma" );
psxdma->m_ram = (UINT32 *) m_ram->pointer();
psxdma->m_ramsize = m_ram->size();
m_delayr = 0;
m_delayv = 0;
m_berr = 0;
@ -3320,6 +3278,8 @@ static MACHINE_CONFIG_FRAGMENT( psx )
MCFG_DEVICE_ADD("sio1", PSX_SIO1, 0)
MCFG_PSX_SIO_IRQ_HANDLER(DEVWRITELINE("irq", psxirq_device, intin8))
MCFG_RAM_ADD("ram")
MACHINE_CONFIG_END
//-------------------------------------------------

13
src/emu/cpu/psx/psx.h
View File

@ -10,6 +10,8 @@
#ifndef __PSXCPU_H__
#define __PSXCPU_H__
#include "emu.h"
#include "machine/ram.h"
#include "dma.h"
#include "gte.h"
#include "irq.h"
@ -125,9 +127,6 @@ enum
#define MCFG_PSX_CD_WRITE_HANDLER(_devcb) \
devcb = &psxcpu_device::set_cd_write_handler(*device, DEVCB2_##_devcb);
#define MCFG_PSX_RAM_SIZE( size ) \
psxcpu_device::set_ram_size( *device, size );
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -147,7 +146,6 @@ public:
template<class _Object> static devcb2_base &set_spu_write_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_spu_write_handler.set_callback(object); }
template<class _Object> static devcb2_base &set_cd_read_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_cd_read_handler.set_callback(object); }
template<class _Object> static devcb2_base &set_cd_write_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_cd_write_handler.set_callback(object); }
static void set_ram_size(device_t &device, UINT32 size);
// public interfaces
DECLARE_WRITE32_MEMBER( berr_w );
@ -173,15 +171,11 @@ public:
static psxcpu_device *getcpu( device_t &device, const char *cputag );
UINT32 ram_size();
UINT32 *ram();
protected:
psxcpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
// device-level overrides
virtual void device_start();
virtual void device_stop();
virtual void device_reset();
virtual void device_post_load();
virtual machine_config_constructor device_mconfig_additions() const;
@ -319,8 +313,7 @@ protected:
devcb2_write16 m_spu_write_handler;
devcb2_read8 m_cd_read_handler;
devcb2_write8 m_cd_write_handler;
UINT32 *m_ram;
UINT32 m_ram_size;
required_device<ram_device> m_ram;
};
class cxd8530aq_device : public psxcpu_device

4
src/emu/device.c
View File

@ -817,7 +817,7 @@ device_t *device_t::replace_subdevice(device_t &old, device_type type, const cha
// iterate over all devices and remove any references to the old device
device_iterator iter(mconfig().root_device());
for (device_t *scan = iter.first(); scan != NULL; scan = iter.next())
scan->m_device_map.remove(&old);
scan->m_device_map.reset(); //remove(&old);
// create a new device, and substitute it for the old one
device_t *device = (*type)(mconfig(), tag, this, clock);
@ -840,7 +840,7 @@ void device_t::remove_subdevice(device_t &device)
// iterate over all devices and remove any references
device_iterator iter(mconfig().root_device());
for (device_t *scan = iter.first(); scan != NULL; scan = iter.next())
scan->m_device_map.remove(&device);
scan->m_device_map.reset(); //remove(&device);
// remove from our list
m_subdevice_list.remove(device);

4
src/mame/drivers/konamigq.c
View File

@ -311,9 +311,11 @@ MACHINE_RESET_MEMBER(konamigq_state,konamigq)
static MACHINE_CONFIG_START( konamigq, konamigq_state )
/* basic machine hardware */
MCFG_CPU_ADD( "maincpu", CXD8530BQ, XTAL_67_7376MHz )
MCFG_PSX_RAM_SIZE( 0x400000 )
MCFG_CPU_PROGRAM_MAP( konamigq_map )
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("4M")
MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( konamigq_state::scsi_dma_read ), (konamigq_state *) owner ) )
MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psx_dma_write_delegate( FUNC( konamigq_state::scsi_dma_write ), (konamigq_state *) owner ) )

4
src/mame/drivers/konamigv.c
View File

@ -306,9 +306,11 @@ MACHINE_START_MEMBER(konamigv_state,konamigv)
static MACHINE_CONFIG_START( konamigv, konamigv_state )
/* basic machine hardware */
MCFG_CPU_ADD( "maincpu", CXD8530BQ, XTAL_67_7376MHz )
MCFG_PSX_RAM_SIZE( 0x200000 )
MCFG_CPU_PROGRAM_MAP( konamigv_map )
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("2M")
MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( konamigv_state::scsi_dma_read ), (konamigv_state *) owner ) )
MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psx_dma_write_delegate( FUNC( konamigv_state::scsi_dma_write ), (konamigv_state *) owner ) )

14
src/mame/drivers/ksys573.c
View File

@ -535,7 +535,10 @@ public:
driver_device(mconfig, type, tag),
m_psxirq(*this, ":maincpu:irq"),
m_cr589(*this, ":cdrom"),
m_maincpu(*this, "maincpu") { }
m_maincpu(*this, "maincpu"),
m_ram(*this, "maincpu:ram")
{
}
required_device<psxirq_device> m_psxirq;
@ -667,6 +670,7 @@ public:
void mamboagg_output_callback( int offset, int data );
void punchmania_output_callback( int offset, int data );
required_device<psxcpu_device> m_maincpu;
required_device<ram_device> m_ram;
};
void ATTR_PRINTF(3,4) ksys573_state::verboselog( int n_level, const char *s_fmt, ... )
@ -1462,7 +1466,7 @@ void ksys573_state::sys573_vblank(screen_device &screen, bool vblank_state)
{
/* patch out security-plate error */
UINT32 *p_n_psxram = m_maincpu->ram();
UINT32 *p_n_psxram = (UINT32 *) m_ram->pointer();
/* install cd */
@ -1486,7 +1490,7 @@ void ksys573_state::sys573_vblank(screen_device &screen, bool vblank_state)
{
/* patch out security-plate error */
UINT32 *p_n_psxram = m_maincpu->ram();
UINT32 *p_n_psxram = (UINT32 *) m_ram->pointer();
/* 8001f850: jal $8003221c */
if( p_n_psxram[ 0x1f850 / 4 ] == 0x0c00c887 )
@ -3056,9 +3060,11 @@ static const adc083x_interface konami573_adc_interface = {
static MACHINE_CONFIG_START( konami573, ksys573_state )
/* basic machine hardware */
MCFG_CPU_ADD( "maincpu", CXD8530CQ, XTAL_67_7376MHz )
MCFG_PSX_RAM_SIZE( 0x400000 )
MCFG_CPU_PROGRAM_MAP( konami573_map )
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("4M")
MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( ksys573_state::cdrom_dma_read ), (ksys573_state *) owner ) )
MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psx_dma_write_delegate( FUNC( ksys573_state::cdrom_dma_write ), (ksys573_state *) owner ) )

8
src/mame/drivers/namcos10.c
View File

@ -595,9 +595,11 @@ MACHINE_RESET_MEMBER(namcos10_state,namcos10)
static MACHINE_CONFIG_START( namcos10_memm, namcos10_state )
/* basic machine hardware */
MCFG_CPU_ADD( "maincpu", CXD8606BQ, XTAL_101_4912MHz )
MCFG_PSX_RAM_SIZE( 0x1000000 )
MCFG_CPU_PROGRAM_MAP( namcos10_memm_map )
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("16M")
MCFG_MACHINE_RESET_OVERRIDE(namcos10_state, namcos10 )
/* video hardware */
@ -610,9 +612,11 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( namcos10_memn, namcos10_state )
/* basic machine hardware */
MCFG_CPU_ADD( "maincpu", CXD8606BQ, XTAL_101_4912MHz )
MCFG_PSX_RAM_SIZE( 0x1000000 )
MCFG_CPU_PROGRAM_MAP( namcos10_memn_map )
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("16M")
MCFG_MACHINE_RESET_OVERRIDE(namcos10_state, namcos10 )
/* video hardware */

8
src/mame/drivers/namcos11.c
View File

@ -1010,9 +1010,11 @@ TIMER_DEVICE_CALLBACK_MEMBER(namcos11_state::mcu_adc_cb)
static MACHINE_CONFIG_START( coh100, namcos11_state )
/* basic machine hardware */
MCFG_CPU_ADD( "maincpu", CXD8530AQ, XTAL_67_7376MHz )
MCFG_PSX_RAM_SIZE( 0x400000 )
MCFG_CPU_PROGRAM_MAP( namcos11_map )
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("4M")
MCFG_CPU_ADD("c76", M37702, 16934400)
MCFG_CPU_PROGRAM_MAP(c76_map)
MCFG_CPU_IO_MAP(c76_io_map)
@ -1038,9 +1040,11 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( coh110, coh100 )
MCFG_CPU_REPLACE( "maincpu", CXD8530CQ, XTAL_67_7376MHz )
MCFG_PSX_RAM_SIZE( 0x400000 )
MCFG_CPU_PROGRAM_MAP( namcos11_map )
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("4M")
MCFG_PSXGPU_REPLACE( "maincpu", "gpu", CXD8561Q, 0x200000, XTAL_53_693175MHz )
MACHINE_CONFIG_END

16
src/mame/drivers/namcos12.c
View File

@ -1044,9 +1044,12 @@ class namcos12_state : public driver_device
public:
namcos12_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_rtc(*this, "rtc"),
m_sharedram(*this, "sharedram") ,
m_maincpu(*this, "maincpu") { }
m_rtc(*this, "rtc"),
m_sharedram(*this, "sharedram") ,
m_maincpu(*this, "maincpu"),
m_ram(*this, "maincpu:ram")
{
}
required_device<rtc4543_device> m_rtc;
required_shared_ptr<UINT32> m_sharedram;
@ -1102,6 +1105,7 @@ public:
void namcos12_sub_irq( screen_device &screen, bool vblank_state );
void system11gun_install( );
required_device<psxcpu_device> m_maincpu;
required_device<ram_device> m_ram;
};
inline void ATTR_PRINTF(3,4) namcos12_state::verboselog( int n_level, const char *s_fmt, ... )
@ -1193,7 +1197,7 @@ void namcos12_state::namcos12_rom_read( UINT32 *p_n_psxram, UINT32 n_address, IN
INT32 n_ramleft;
// TODO: the check for going past the end of ram should be in dma.c
UINT32 m_n_psxramsize = m_maincpu->ram_size();
UINT32 m_n_psxramsize = m_ram->size();
if(m_has_tektagt_dma && !m_n_dmaoffset)
{
@ -1621,9 +1625,11 @@ DRIVER_INIT_MEMBER(namcos12_state,ghlpanic)
static MACHINE_CONFIG_START( coh700, namcos12_state )
/* basic machine hardware */
MCFG_CPU_ADD( "maincpu", CXD8661R, XTAL_100MHz )
MCFG_PSX_RAM_SIZE( 0x400000 )
MCFG_CPU_PROGRAM_MAP( namcos12_map)
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("4M")
MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( namcos12_state::namcos12_rom_read ), (namcos12_state *) owner ) )
MCFG_CPU_ADD("sub", H83002, 16737350 )

4
src/mame/drivers/taitogn.c
View File

@ -833,9 +833,11 @@ ADDRESS_MAP_END
static MACHINE_CONFIG_START( coh3002t, taitogn_state )
/* basic machine hardware */
MCFG_CPU_ADD( "maincpu", CXD8661R, XTAL_100MHz )
MCFG_PSX_RAM_SIZE( 0x400000 )
MCFG_CPU_PROGRAM_MAP(taitogn_map)
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("4M")
MCFG_DEVICE_ADD("maincpu:sio0:znsec0", ZNSEC, 0)
MCFG_DEVICE_ADD("maincpu:sio0:znsec1", ZNSEC, 0)
MCFG_DEVICE_ADD("maincpu:sio0:zndip", ZNDIP, 0)

4
src/mame/drivers/twinkle.c
View File

@ -853,9 +853,11 @@ static const rtc65271_interface twinkle_rtc =
static MACHINE_CONFIG_START( twinkle, twinkle_state )
/* basic machine hardware */
MCFG_CPU_ADD( "maincpu", CXD8530CQ, XTAL_67_7376MHz )
MCFG_PSX_RAM_SIZE( 0x400000 )
MCFG_CPU_PROGRAM_MAP( main_map )
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("4M")
MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( scsi_dma_read ), (twinkle_state *) owner ) )
MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psx_dma_write_delegate( FUNC( scsi_dma_write ), (twinkle_state *) owner ) )

74
src/mame/drivers/zn.c
View File

@ -39,7 +39,9 @@ public:
m_znsec1(*this,"maincpu:sio0:znsec1"),
m_zndip(*this,"maincpu:sio0:zndip"),
m_maincpu(*this, "maincpu"),
m_audiocpu(*this, "audiocpu") {
m_audiocpu(*this, "audiocpu"),
m_ram(*this, "maincpu:ram")
{
}
required_device<psxgpu_device> m_gpu;
@ -66,7 +68,6 @@ public:
DECLARE_READ32_MEMBER(znsecsel_r);
DECLARE_WRITE32_MEMBER(znsecsel_w);
DECLARE_READ32_MEMBER(boardconfig_r);
DECLARE_READ32_MEMBER(boardconfig_8M_r);
DECLARE_READ32_MEMBER(unknown_r);
DECLARE_WRITE32_MEMBER(coin_w);
DECLARE_READ32_MEMBER(capcom_kickharness_r);
@ -136,6 +137,7 @@ public:
DECLARE_WRITE_LINE_MEMBER(irqhandler);
required_device<cpu_device> m_maincpu;
optional_device<cpu_device> m_audiocpu;
required_device<ram_device> m_ram;
};
inline void ATTR_PRINTF(3,4) zn_state::verboselog( int n_level, const char *s_fmt, ... )
@ -360,45 +362,29 @@ READ32_MEMBER(zn_state::boardconfig_r)
111----- rev=5
*/
if( machine().primary_screen->height() == 1024 )
{
return 64|32|8;
}
else
{
return 64|32;
}
}
READ32_MEMBER(zn_state::boardconfig_8M_r)
{
/*
------00 mem=4M
------01 mem=4M
------10 mem=8M
------11 mem=16M
-----0-- smem=hM
-----1-- smem=2M
----0--- vmem=1M
----1--- vmem=2M
000----- rev=-2
001----- rev=-1
010----- rev=0
011----- rev=1
100----- rev=2
101----- rev=3
110----- rev=4
111----- rev=5
*/
int boardconfig = 64 | 32;
if( machine().primary_screen->height() == 1024 )
{
return 64|32|8|2;
boardconfig |= 8;
}
else
switch( m_ram->size() )
{
return 64|32|2;
case 0x400000:
boardconfig |= 1;
break;
case 0x800000:
boardconfig |= 2;
break;
case 0x1000000:
boardconfig |= 3;
break;
}
return boardconfig;
}
READ32_MEMBER(zn_state::unknown_r)
@ -441,11 +427,6 @@ static ADDRESS_MAP_START( zn_map, AS_PROGRAM, 32, zn_state )
AM_RANGE(0xbfc00000, 0xbfc7ffff) AM_WRITENOP AM_ROM AM_SHARE("share2") /* bios mirror */
ADDRESS_MAP_END
static ADDRESS_MAP_START( zn_8M_map, AS_PROGRAM, 32, zn_state )
AM_RANGE(0x1fa10200, 0x1fa10203) AM_READ(boardconfig_8M_r)
AM_IMPORT_FROM(zn_map)
ADDRESS_MAP_END
static ADDRESS_MAP_START( link_map, AS_PROGRAM, 8, zn_state )
ADDRESS_MAP_END
@ -470,9 +451,11 @@ void zn_state::zn_driver_init( )
static MACHINE_CONFIG_START( zn1_1mb_vram, zn_state )
/* basic machine hardware */
MCFG_CPU_ADD( "maincpu", CXD8530CQ, XTAL_67_7376MHz )
MCFG_PSX_RAM_SIZE( 0x400000 )
MCFG_CPU_PROGRAM_MAP( zn_map)
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("4M")
MCFG_DEVICE_ADD("maincpu:sio0:znsec0", ZNSEC, 0)
MCFG_DEVICE_ADD("maincpu:sio0:znsec1", ZNSEC, 0)
MCFG_DEVICE_ADD("maincpu:sio0:zndip", ZNDIP, 0)
@ -498,9 +481,11 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( zn2, zn_state )
/* basic machine hardware */
MCFG_CPU_ADD( "maincpu", CXD8661R, XTAL_100MHz )
MCFG_PSX_RAM_SIZE( 0x400000 )
MCFG_CPU_PROGRAM_MAP( zn_map)
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("4M")
MCFG_DEVICE_ADD("maincpu:sio0:znsec0", ZNSEC, 0)
MCFG_DEVICE_ADD("maincpu:sio0:znsec1", ZNSEC, 0)
MCFG_DEVICE_ADD("maincpu:sio0:zndip", ZNDIP, 0)
@ -1447,9 +1432,8 @@ MACHINE_RESET_MEMBER(zn_state,coh1000w)
}
static MACHINE_CONFIG_DERIVED( coh1000w, zn1_2mb_vram )
MCFG_CPU_MODIFY("maincpu")
MCFG_PSX_RAM_SIZE( 0x800000 )
MCFG_CPU_PROGRAM_MAP(zn_8M_map)
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("8M")
MCFG_MACHINE_RESET_OVERRIDE(zn_state, coh1000w )

37
src/mess/drivers/psx.c
View File

@ -25,7 +25,10 @@ class psx1_state : public driver_device
public:
psx1_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag) ,
m_maincpu(*this, "maincpu") { }
m_maincpu(*this, "maincpu"),
m_ram(*this, "maincpu:ram")
{
}
UINT8 *m_exe_buffer;
int m_exe_size;
@ -52,6 +55,7 @@ public:
void cd_dma_write( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size );
DECLARE_QUICKLOAD_LOAD_MEMBER( psx_exe_load );
required_device<psxcpu_device> m_maincpu;
required_device<ram_device> m_ram;
};
@ -113,13 +117,6 @@ int psx1_state::load_psxexe( cpu_device *cpu, unsigned char *p_n_file, int n_len
if( n_len >= sizeof( struct PSXEXE_HEADER ) &&
memcmp( psxexe_header->id, "PS-X EXE", 8 ) == 0 )
{
UINT8 *p_ram;
UINT8 *p_psxexe;
UINT32 n_stack;
UINT32 n_ram;
UINT32 n_address;
UINT32 n_size;
psxexe_conv32( &psxexe_header->text );
psxexe_conv32( &psxexe_header->data );
psxexe_conv32( &psxexe_header->pc0 );
@ -146,13 +143,13 @@ int psx1_state::load_psxexe( cpu_device *cpu, unsigned char *p_n_file, int n_len
logerror( "psx_exe_load: sp %08x\n", psxexe_header->s_addr );
logerror( "psx_exe_load: len %08x\n", psxexe_header->s_size );
p_ram = (UINT8 *)m_maincpu->ram();
n_ram = m_maincpu->ram_size();
UINT8 *p_ram = m_ram->pointer();
UINT32 n_ram = m_ram->size();
p_psxexe = p_n_file + sizeof( struct PSXEXE_HEADER );
UINT8 *p_psxexe = p_n_file + sizeof( struct PSXEXE_HEADER );
n_address = psxexe_header->t_addr;
n_size = psxexe_header->t_size;
UINT32 n_address = psxexe_header->t_addr;
UINT32 n_size = psxexe_header->t_size;
while( n_size != 0 )
{
p_ram[ BYTE4_XOR_LE( n_address ) % n_ram ] = *( p_psxexe );
@ -163,7 +160,7 @@ int psx1_state::load_psxexe( cpu_device *cpu, unsigned char *p_n_file, int n_len
cpu->set_state_int( PSXCPU_PC, psxexe_header->pc0 );
cpu->set_state_int( PSXCPU_R28, psxexe_header->gp0 );
n_stack = psxexe_header->s_addr + psxexe_header->s_size;
UINT32 n_stack = psxexe_header->s_addr + psxexe_header->s_size;
if( n_stack != 0 )
{
cpu->set_state_int( PSXCPU_R29, n_stack );
@ -249,8 +246,8 @@ int psx1_state::load_cpe( cpu_device *cpu, unsigned char *p_n_file, int n_len )
( (int)p_n_file[ n_offset + 6 ] << 16 ) |
( (int)p_n_file[ n_offset + 7 ] << 24 );
UINT8 *p_ram = (UINT8 *)m_maincpu->ram();
UINT32 n_ram = m_maincpu->ram_size();
UINT8 *p_ram = m_ram->pointer();
UINT32 n_ram = m_ram->size();
n_offset += 8;
@ -496,9 +493,11 @@ DRIVER_INIT_MEMBER(psx1_state,psx)
static MACHINE_CONFIG_START( psxntsc, psx1_state )
/* basic machine hardware */
MCFG_CPU_ADD( "maincpu", CXD8530CQ, XTAL_67_7376MHz )
MCFG_PSX_RAM_SIZE( 0x200000 )
MCFG_CPU_PROGRAM_MAP( psx_map )
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("2M")
MCFG_DEVICE_ADD("maincpu:sio0:controllers", PSXCONTROLLERPORTS, 0)
MCFG_PSX_CTRL_PORT_ADD("port1", psx_controllers, "digital_pad", NULL)
MCFG_PSX_CTRL_PORT_ADD("port2", psx_controllers, "digital_pad", NULL)
@ -530,9 +529,11 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( psxpal, psx1_state )
/* basic machine hardware */
MCFG_CPU_ADD( "maincpu", CXD8530AQ, XTAL_67_7376MHz )
MCFG_PSX_RAM_SIZE( 0x200000 )
MCFG_CPU_PROGRAM_MAP( psx_map)
MCFG_RAM_MODIFY("maincpu:ram")
MCFG_RAM_DEFAULT_SIZE("2M")
MCFG_DEVICE_ADD("maincpu:sio0:controllers", PSXCONTROLLERPORTS, 0)
MCFG_PSX_CTRL_PORT_ADD("port1", psx_controllers, "digital_pad", NULL)
MCFG_PSX_CTRL_PORT_ADD("port2", psx_controllers, "digital_pad", NULL)