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b5000: add disassembler

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This commit is contained in:
hap 2022-03-17 23:03:57 +01:00
parent cf6d818f67
commit 9908e3c2f0
14 changed files with 176 additions and 42 deletions
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2
src/devices/cpu/amis2000/amis2000d.cpp
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@ -88,7 +88,7 @@ offs_t amis2000_disassembler::disassemble(std::ostream &stream, offs_t pc, const
u8 op = opcodes.r8(pc);
u8 instr = s2000_mnemonic[op];
util::stream_format(stream, "%-5s ", s_mnemonics[instr]);
util::stream_format(stream, "%-6s", s_mnemonics[instr]);
// opcode parameter
int mask = s_bits[instr];

17
src/devices/cpu/b5000/b5000base.cpp
View File

@ -4,6 +4,16 @@
Rockwell B5000 family MCU cores
This MCU series sits between A4000 and the more publicly available PPS4/1.
Known part numbers: A/B5000, A/B5300, A/B5500, A/B5900, B6000, B6100.
The latter two were manufactured for Mattel, with small modifications
useful for making handheld games.
The main difference between Axxxx and Bxxxx is that B runs on low power,
there's also a small change with the way they output LEDs.
A4000 is similar, but too many differences to emulate in this device.
*/
#include "emu.h"
@ -85,6 +95,11 @@ void b5000_base_device::device_reset()
// execute
//-------------------------------------------------
void b5000_base_device::cycle()
{
m_icount--;
}
void b5000_base_device::increment_pc()
{
// low part is LFSR
@ -99,7 +114,7 @@ void b5000_base_device::execute_run()
{
debugger_instruction_hook(m_pc);
increment_pc();
m_icount--;
cycle();
execute_one();
}

4
src/devices/cpu/b5000/b5000base.h
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@ -32,7 +32,6 @@ protected:
virtual u32 execute_max_cycles() const noexcept override { return 2; }
virtual void execute_run() override;
virtual void execute_one() = 0;
void increment_pc();
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
@ -49,6 +48,9 @@ protected:
u16 m_prgmask; // "
u16 m_datamask; // "
void cycle();
void increment_pc();
u16 m_pc;
u16 m_prev_pc;
u8 m_op;

145
src/devices/cpu/b5000/b5000d.cpp
View File

@ -34,18 +34,40 @@ offs_t b5000_common_disassembler::increment_pc(offs_t pc)
const char *const b5000_common_disassembler::s_name[] =
{
"?", "NOP"
"?",
"NOP", "RSC", "SC", "TC", "TAM",
"LAX", "ADX", "COMP", "ATB", "ATBZ",
"LDA", "EXC", "EXC", "EXC", "ADD",
"LB", "LB", "LB", "LB", "LB", "LB",
"RSM", "SM", "TM",
"TL", "TRA", "TRA", "RET",
"TKB", "TKBS", "TDIN", "READ", "KSEG", "MTD"
};
// bitmask for opcode parameter
// number of bits per opcode parameter
// note: d4 means bitmask param, d5 means inverted
const u8 b5000_common_disassembler::s_bits[] =
{
0, 0
0,
0, 0, 0, 0, 0,
0x24, 0x24, 0, 0, 0,
2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2,
0x12, 0x12, 0x12,
4, 7, 7, 0,
0, 0, 2, 0, 0, 0
};
const u32 b5000_common_disassembler::s_flags[] =
{
0, 0
0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0,
0, 0, 0,
0, STEP_OVER, 0, STEP_OUT,
0, 0, 0, 0, 0, 0
};
@ -58,47 +80,120 @@ offs_t b5000_common_disassembler::common_disasm(const u8 *lut_opmap, std::ostrea
u8 instr = lut_opmap[op];
// get parameter
u8 mask = s_bits[instr];
u8 bits = s_bits[instr];
u8 mask = (1 << (bits & 0xf)) - 1;
u8 param = (bits & 0x20) ? (~op & mask) : (op & mask);
if (bits & 0x10)
param = 1 << param;
// TDIN 0 is 4
if (instr == em_TDIN && param == 0)
param = 4;
// disassemble it
util::stream_format(stream, "%-8s ", s_name[instr]);
util::stream_format(stream, "%-6s", s_name[instr]);
if (mask > 0)
if (bits > 0)
{
;
// exceptions for opcodes with 2 params
if (instr >= em_EXC0 && instr <= em_EXCM)
{
switch (instr)
{
case em_EXC0: util::stream_format(stream, "%d,0", param); break;
case em_EXCP: util::stream_format(stream, "%d,+1", param); break;
case em_EXCM: util::stream_format(stream, "%d,-1", param); break;
default: break;
}
}
else if (instr == em_ADD)
{
switch (param ^ 2)
{
case 1: stream << "S"; break; // 0,1
case 2: stream << "C"; break; // 1,0
case 3: stream << "C,S"; break; // 1,1
default: break;
}
}
else if (instr >= em_LB0 && instr <= em_LB11)
{
int param2 = (instr == em_LB0) ? 0 : (6 + instr - em_LB0);
util::stream_format(stream, "%d,%d", param, param2);
}
else if (instr == em_TRA0 || instr == em_TRA1)
{
int param2 = (instr == em_TRA1) ? 1 : 0;
util::stream_format(stream, "%d,$%02X", param2, param);
}
else
util::stream_format(stream, "%d", param);
}
return 1 | s_flags[instr] | SUPPORTED;
}
// B5000 disasm
// B5000/B6000 disasm (for A5xxx, the only difference is ATBZ = MTD)
const u8 b5000_disassembler::b5000_opmap[0x100] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
em_NOP, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 1
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 2
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 3
em_NOP, em_TC, em_TKB, em_TKBS, em_TDIN, em_TDIN, em_TDIN, em_TDIN, em_TM, em_TM, em_TM, em_TM, 0, 0, 0, 0, // 0
em_SM, em_SM, em_SM, em_SM, em_RSM, em_RSM, em_RSM, em_RSM, em_RET, em_RET, em_RET, em_RET, 0, 0, 0, 0, // 1
em_LB7, em_LB7, em_LB7, em_LB7, em_LB10, em_LB10, em_LB10, em_LB10, em_LB9, em_LB9, em_LB9, em_LB9, em_LB8, em_LB8, em_LB8, em_LB8, // 2
em_TL, em_TL, em_TL, em_TL, em_TL, em_TL, em_TL, em_TL, 0, em_RSC, 0, em_SC, em_LB0, em_LB0, em_LB0, em_LB0, // 3
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 4
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 5
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 6
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 7
em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, // 4
em_LDA, em_LDA, em_LDA, em_LDA, em_EXCP, em_EXCP, em_EXCP, em_EXCP, em_EXC0, em_EXC0, em_EXC0, em_EXC0, em_EXCM, em_EXCM, em_EXCM, em_EXCM, // 5
em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_READ, // 6
em_ADD, em_ADD, em_ADD, em_ADD, em_KSEG, 0, em_ATBZ, em_ATB, em_COMP, em_COMP, em_COMP, em_COMP, em_TAM, em_TAM, em_TAM, em_TAM, // 7
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 8
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 9
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // A
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // B
em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, // 8
em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, // 9
em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, // A
em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, // B
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // C
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // D
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // E
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // F
em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, // C
em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, // D
em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, // E
em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, // F
};
offs_t b5000_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
return common_disasm(b5000_opmap, stream, pc, opcodes, params);
}
// B5900/B6100 disasm (for A5xxx, the only difference is ATBZ = MTD)
const u8 b5900_disassembler::b5900_opmap[0x100] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
em_NOP, em_TC, em_TKB, em_TKBS, em_TDIN, em_TDIN, em_TDIN, em_TDIN, em_TM, em_TM, em_TM, em_TM, em_SC, em_RSC, 0, 0, // 0
em_SM, em_SM, em_SM, em_SM, em_RSM, em_RSM, em_RSM, em_RSM, em_RET, em_RET, em_RET, em_RET, em_LB11, em_LB11, em_LB11, em_LB11, // 1
em_LB7, em_LB7, em_LB7, em_LB7, em_LB10, em_LB10, em_LB10, em_LB10, em_LB9, em_LB9, em_LB9, em_LB9, em_LB8, em_LB8, em_LB8, em_LB8, // 2
em_TL, em_TL, em_TL, em_TL, em_TL, em_TL, em_TL, em_TL, em_TL, em_TL, em_TL, em_TL, em_LB0, em_LB0, em_LB0, em_LB0, // 3
em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, em_LAX, // 4
em_LDA, em_LDA, em_LDA, em_LDA, em_EXCP, em_EXCP, em_EXCP, em_EXCP, em_EXC0, em_EXC0, em_EXC0, em_EXC0, em_EXCM, em_EXCM, em_EXCM, em_EXCM, // 5
em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_ADX, em_READ, // 6
em_ADD, em_ADD, em_ADD, em_ADD, em_KSEG, 0, em_ATBZ, em_ATB, em_COMP, em_COMP, em_COMP, em_COMP, em_TAM, em_TAM, em_TAM, em_TAM, // 7
em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, // 8
em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, // 9
em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, // A
em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, em_TRA0, // B
em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, // C
em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, // D
em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, // E
em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, em_TRA1, // F
};
offs_t b5900_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
return common_disasm(b5900_opmap, stream, pc, opcodes, params);
}

22
src/devices/cpu/b5000/b5000d.h
View File

@ -28,7 +28,14 @@ protected:
// opcode mnemonics
enum e_mnemonics
{
em_ILL, em_NOP
em_ILL,
em_NOP, em_RSC, em_SC, em_TC, em_TAM,
em_LAX, em_ADX, em_COMP, em_ATB, em_ATBZ,
em_LDA, em_EXC0, em_EXCP, em_EXCM, em_ADD,
em_LB0, em_LB7, em_LB8, em_LB9, em_LB10, em_LB11,
em_RSM, em_SM, em_TM,
em_TL, em_TRA0, em_TRA1, em_RET,
em_TKB, em_TKBS, em_TDIN, em_READ, em_KSEG, em_MTD
};
static const char *const s_name[];
@ -55,4 +62,17 @@ private:
};
class b5900_disassembler : public b5000_common_disassembler
{
public:
b5900_disassembler() = default;
virtual ~b5900_disassembler() = default;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
static const u8 b5900_opmap[0x100];
};
#endif // MAME_CPU_B5000_B5000D_H

2
src/devices/cpu/cops1/cops1d.cpp
View File

@ -109,7 +109,7 @@ offs_t cops1_common_disassembler::common_disasm(const u8 *lut_opmap, std::ostrea
}
// disassemble it
util::stream_format(stream, "%-8s ", s_name[instr]);
util::stream_format(stream, "%-8s", s_name[instr]);
if (mask > 0)
{
if (mask < 16)

2
src/devices/cpu/hmcs40/hmcs40d.cpp
View File

@ -199,7 +199,7 @@ offs_t hmcs40_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
}
else
{
util::stream_format(stream, "%-6s ", s_mnemonics[instr]);
util::stream_format(stream, "%-8s", s_mnemonics[instr]);
// opcode parameter
if (bits != 0)

3
src/devices/cpu/pps41/pps41base.cpp
View File

@ -47,7 +47,8 @@ TODO:
- add MCU mask options, there's one for inverting interrupts
- does MM78LA support interrupts? the sparse documentation available says it does
- MM78LA mnemonics for changed opcodes is unknown
- no known documentation exists for MM77LA, mcu name is guessed
- no known documentation exists for MM77LA, mcu name is guessed (maybe it was
designed in collaboration with Mattel, and later evolved into MM78LA)
*/

2
src/devices/cpu/pps41/pps41d.cpp
View File

@ -114,7 +114,7 @@ offs_t pps41_common_disassembler::common_disasm(const u8 *lut_opmap, std::ostrea
param++;
// disassemble it
util::stream_format(stream, "%-6s ", s_name[instr]);
util::stream_format(stream, "%-8s", s_name[instr]);
if (mask > 0)
{
if (bits & 0x10)

2
src/devices/cpu/sm510/sm510d.cpp
View File

@ -169,7 +169,7 @@ offs_t sm510_common_disassembler::common_disasm(const u8 *lut_mnemonic, const u8
instr = lut_extended[param];
// disassemble it
util::stream_format(stream, "%-6s ", s_mnemonics[instr]);
util::stream_format(stream, "%-8s", s_mnemonics[instr]);
if (bits > 0)
{
if (bits <= 4)

2
src/devices/cpu/tms1000/tms1k_dasm.cpp
View File

@ -259,7 +259,7 @@ offs_t tms1000_base_disassembler::disassemble(std::ostream &stream, offs_t pc, c
// convert to mnemonic/param
u16 instr = m_lut_mnemonic[op];
util::stream_format(stream, "%-8s ", s_mnemonic[instr]);
util::stream_format(stream, "%-8s", s_mnemonic[instr]);
switch( s_addressing[instr] )
{

12
src/devices/cpu/ucom4/ucom4d.cpp
View File

@ -11,13 +11,13 @@
const char *const ucom4_disassembler::s_mnemonics[] =
{
"?",
"LI", "L", "LM", "LDI", "LDZ", "S", "TAL", "TLA",
"X", "XI", "XD", "XM", "XMI", "XMD", "AD", "ADC", "ADS", "DAA", "DAS",
"EXL", "CLA", "CMA", "CIA", "CLC", "STC", "TC", "INC", "DEC", "IND", "DED",
"RMB", "SMB", "REB", "SEB", "RPB", "SPB", "JMP", "JCP", "JPA", "CAL", "CZP", "RT", "RTS",
"CI", "CM", "CMB", "TAB", "CLI", "TMB", "TPA", "TPB",
"TIT", "IA", "IP", "OE", "OP", "OCD", "NOP",
"?",
"TAW", "TAZ", "THX", "TLY", "XAW", "XAZ", "XHR", "XHX", "XLS", "XLY", "XC",
"SFB", "RFB", "FBT", "FBF", "RAR", "INM", "DEM", "STM", "TTM", "EI", "DI"
};
@ -25,26 +25,26 @@ const char *const ucom4_disassembler::s_mnemonics[] =
// number of bits per opcode parameter, 2 digits means opcode is 2 bytes
const u8 ucom4_disassembler::s_bits[] =
{
0,
4, 0, 2, 80, 4, 0, 0, 0,
0, 0, 0, 2, 2, 2, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2, 2, 2, 2, 2, 2, 83, 6, 0, 83, 4, 0, 0,
40, 0, 2, 2, 40, 2, 2, 2,
0, 0, 0, 0, 0, 80, 0,
0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2, 2, 2, 2, 0, 0, 0, 80, 0, 0, 0
};
const u32 ucom4_disassembler::s_flags[] =
{
0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, STEP_OVER, STEP_OVER, STEP_OUT, STEP_OUT,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0,
0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
@ -56,14 +56,14 @@ const u8 ucom4_disassembler::ucom4_mnemonic[0x100] =
mNOP, mDI, mS, mTIT, mTC, mTTM, mDAA, mTAL,
mAD, mADS, mDAS, mCLC, mCM, mINC, mOP, mDEC,
mCMA, mCIA, mTLA, mDED, mSTM, mLDI, mCLI, mCI,
mEXL, mADC, mXC, mSTC, mILL, mINM, mOCD, mDEM,
mEXL, mADC, mXC, mSTC, 0, mINM, mOCD, mDEM,
/* 0x20 */
mFBF, mFBF, mFBF, mFBF, mTAB, mTAB, mTAB, mTAB,
mX, mXM, mXM, mXM, mXD, mXMD, mXMD, mXMD,
mRAR, mEI, mIP, mIND, mCMB, mCMB, mCMB, mCMB,
mL, mLM, mLM, mLM, mXI, mXMI, mXMI, mXMI,
/* 0x40 */
mIA, mJPA, mTAZ, mTAW, mOE, mILL, mTLY, mTHX,
mIA, mJPA, mTAZ, mTAW, mOE, 0, mTLY, mTHX,
mRT, mRTS, mXAZ, mXAW, mXLS, mXHR, mXLY, mXHX,
mTPB, mTPB, mTPB, mTPB, mTPA, mTPA, mTPA, mTPA,
mTMB, mTMB, mTMB, mTMB, mFBT, mFBT, mFBT, mFBT,
@ -100,7 +100,7 @@ offs_t ucom4_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
u8 op = opcodes.r8(pos++);
u8 instr = ucom4_mnemonic[op];
util::stream_format(stream,"%-4s ", s_mnemonics[instr]);
util::stream_format(stream,"%-6s", s_mnemonics[instr]);
// opcode parameter
int bits = s_bits[instr];

2
src/devices/cpu/ucom4/ucom4d.h
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@ -27,13 +27,13 @@ public:
private:
enum e_mnemonics
{
mILL,
mLI, mL, mLM, mLDI, mLDZ, mS, mTAL, mTLA,
mX, mXI, mXD, mXM, mXMI, mXMD, mAD, mADC, mADS, mDAA, mDAS,
mEXL, mCLA, mCMA, mCIA, mCLC, mSTC, mTC, mINC, mDEC, mIND, mDED,
mRMB, mSMB, mREB, mSEB, mRPB, mSPB, mJMP, mJCP, mJPA, mCAL, mCZP, mRT, mRTS,
mCI, mCM, mCMB, mTAB, mCLI, mTMB, mTPA, mTPB,
mTIT, mIA, mIP, mOE, mOP, mOCD, mNOP,
mILL,
mTAW, mTAZ, mTHX, mTLY, mXAW, mXAZ, mXHR, mXHX, mXLS, mXLY, mXC,
mSFB, mRFB, mFBT, mFBF, mRAR, mINM, mDEM, mSTM, mTTM, mEI, mDI
};

1
src/tools/unidasm.cpp
View File

@ -392,6 +392,7 @@ static const dasm_table_entry dasm_table[] =
{ "axc51core", le, 0, []() -> util::disasm_interface * { return new axc51core_disassembler; } },
{ "axc208", le, 0, []() -> util::disasm_interface * { return new ax208_disassembler; } },
{ "b5000", le, 0, []() -> util::disasm_interface * { return new b5000_disassembler; } },
{ "b5900", le, 0, []() -> util::disasm_interface * { return new b5900_disassembler; } },
{ "capricorn", le, 0, []() -> util::disasm_interface * { return new capricorn_disassembler; } },
{ "ccpu", le, 0, []() -> util::disasm_interface * { return new ccpu_disassembler; } },
{ "cdp1801", le, 0, []() -> util::disasm_interface * { return new cosmac_disassembler(cosmac_disassembler::TYPE_1801); } },