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AUSSIEBYTE: Replaced timer with clock device. (nw)

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This commit is contained in:
Robbbert 2016-07-31 02:28:34 +10:00
parent f632efca45
commit 995794b80c
2 changed files with 9 additions and 9 deletions
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15
src/mame/drivers/aussiebyte.cpp
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@ -341,14 +341,11 @@ static const z80_daisy_config daisy_chain_intf[] =
************************************************************/ ************************************************************/
// baud rate generator. All inputs are 1.2288MHz. // baud rate generator. All inputs are 1.2288MHz.
TIMER_DEVICE_CALLBACK_MEMBER( aussiebyte_state::ctc_tick ) WRITE_LINE_MEMBER( aussiebyte_state::clock_w )
{ {
m_ctc->trg0(1); m_ctc->trg0(state);
m_ctc->trg0(0); m_ctc->trg1(state);
m_ctc->trg1(1); m_ctc->trg2(state);
m_ctc->trg1(0);
m_ctc->trg2(1);
m_ctc->trg2(0);
} }
WRITE_LINE_MEMBER( aussiebyte_state::ctc_z0_w ) WRITE_LINE_MEMBER( aussiebyte_state::ctc_z0_w )
@ -475,6 +472,9 @@ static MACHINE_CONFIG_START( aussiebyte, aussiebyte_state )
MCFG_DEVICE_ADD("cent_data_in", INPUT_BUFFER, 0) MCFG_DEVICE_ADD("cent_data_in", INPUT_BUFFER, 0)
MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics")
MCFG_DEVICE_ADD("ctc_clock", CLOCK, XTAL_4_9152MHz / 4)
MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(aussiebyte_state, clock_w))
MCFG_DEVICE_ADD("ctc", Z80CTC, XTAL_16MHz / 4) MCFG_DEVICE_ADD("ctc", Z80CTC, XTAL_16MHz / 4)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0)) MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(aussiebyte_state, ctc_z0_w)) // SIO1 Ch A MCFG_Z80CTC_ZC0_CB(WRITELINE(aussiebyte_state, ctc_z0_w)) // SIO1 Ch A
@ -532,7 +532,6 @@ static MACHINE_CONFIG_START( aussiebyte, aussiebyte_state )
MCFG_MC6845_ADDR_CHANGED_CB(aussiebyte_state, crtc_update_addr) MCFG_MC6845_ADDR_CHANGED_CB(aussiebyte_state, crtc_update_addr)
MCFG_MSM5832_ADD("rtc", XTAL_32_768kHz) MCFG_MSM5832_ADD("rtc", XTAL_32_768kHz)
MCFG_TIMER_DRIVER_ADD_PERIODIC("ctc_tick", aussiebyte_state, ctc_tick, attotime::from_hz(XTAL_4_9152MHz / 4))
MACHINE_CONFIG_END MACHINE_CONFIG_END

3
src/mame/includes/aussiebyte.h
View File

@ -20,6 +20,7 @@
#include "bus/rs232/rs232.h" #include "bus/rs232/rs232.h"
#include "machine/wd_fdc.h" #include "machine/wd_fdc.h"
#include "machine/msm5832.h" #include "machine/msm5832.h"
#include "machine/clock.h"
/*********************************************************** /***********************************************************
@ -78,9 +79,9 @@ public:
DECLARE_WRITE_LINE_MEMBER(sio1_rdyb_w); DECLARE_WRITE_LINE_MEMBER(sio1_rdyb_w);
DECLARE_WRITE_LINE_MEMBER(sio2_rdya_w); DECLARE_WRITE_LINE_MEMBER(sio2_rdya_w);
DECLARE_WRITE_LINE_MEMBER(sio2_rdyb_w); DECLARE_WRITE_LINE_MEMBER(sio2_rdyb_w);
DECLARE_WRITE_LINE_MEMBER(clock_w);
DECLARE_MACHINE_RESET(aussiebyte); DECLARE_MACHINE_RESET(aussiebyte);
DECLARE_DRIVER_INIT(aussiebyte); DECLARE_DRIVER_INIT(aussiebyte);
TIMER_DEVICE_CALLBACK_MEMBER(ctc_tick);
DECLARE_WRITE_LINE_MEMBER(ctc_z0_w); DECLARE_WRITE_LINE_MEMBER(ctc_z0_w);
DECLARE_WRITE_LINE_MEMBER(ctc_z1_w); DECLARE_WRITE_LINE_MEMBER(ctc_z1_w);
DECLARE_WRITE_LINE_MEMBER(ctc_z2_w); DECLARE_WRITE_LINE_MEMBER(ctc_z2_w);