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Fix FDC Busy bit for overlapped commands (#10464)
Fixes MT8464 The problem here is that the end of the previous command clears the BSY status bit which makes it appear to system code that the second command has completed (when it has not). The bug report has files to demonstrate the problem on a TRS-80 Model I emulation.
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@ -355,7 +355,9 @@ void wd_fdc_device_base::command_end()
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motor_timeout = 0;
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if(!drq && (status & S_BUSY)) {
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status &= ~S_BUSY;
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if (!t_cmd->enabled()) {
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status &= ~S_BUSY;
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}
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intrq = true;
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if(!intrq_cb.isnull())
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intrq_cb(intrq);
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