Fix FDC Busy bit for overlapped commands (#10464)

Fixes MT8464
The problem here is that the end of the previous command clears the BSY status bit which makes it appear to system code that the second command has completed (when it has not).
The bug report has files to demonstrate the problem on a TRS-80 Model I emulation.
This commit is contained in:
pnp2084 2022-10-23 21:10:29 -07:00 committed by GitHub
parent 347e0531b1
commit 99b3304c5b
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23

View File

@ -355,7 +355,9 @@ void wd_fdc_device_base::command_end()
motor_timeout = 0;
if(!drq && (status & S_BUSY)) {
status &= ~S_BUSY;
if (!t_cmd->enabled()) {
status &= ~S_BUSY;
}
intrq = true;
if(!intrq_cb.isnull())
intrq_cb(intrq);