diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index 9514e9f5a74..1379c572fa8 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -2572,3 +2572,18 @@ if (BUSES["M5"]~=null) then } end +--------------------------------------------------- +-- +--@src/devices/bus/newbrain/exp.h,BUSES["NEWBRAIN"] = true +--------------------------------------------------- + +if (BUSES["NEWBRAIN"]~=null) then + files { + MAME_DIR .. "src/devices/bus/newbrain/exp.cpp", + MAME_DIR .. "src/devices/bus/newbrain/exp.h", + MAME_DIR .. "src/devices/bus/newbrain/eim.cpp", + MAME_DIR .. "src/devices/bus/newbrain/eim.h", + MAME_DIR .. "src/devices/bus/newbrain/fdc.cpp", + MAME_DIR .. "src/devices/bus/newbrain/fdc.h", + } +end diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index fc00c6e760b..6c0dd4b0894 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -629,6 +629,7 @@ BUSES["NASBUS"] = true BUSES["NEOGEO"] = true BUSES["NES"] = true BUSES["NES_CTRL"] = true +BUSES["NEWBRAIN"] = true BUSES["NUBUS"] = true BUSES["O2"] = true BUSES["ORICEXT"] = true @@ -954,7 +955,7 @@ files { MAME_DIR .. "src/mame/video/jaguar.cpp", MAME_DIR .. "src/mame/video/jagblit.h", MAME_DIR .. "src/mame/video/jagblit.inc", - MAME_DIR .. "src/mame/video/jagobj.inc", + MAME_DIR .. "src/mame/video/jagobj.inc", MAME_DIR .. "src/mame/audio/gorf.cpp", MAME_DIR .. "src/mame/audio/wow.cpp", MAME_DIR .. "src/mame/drivers/astrocde.cpp", @@ -971,7 +972,7 @@ files { MAME_DIR .. "src/mame/machine/n64.cpp", MAME_DIR .. "src/mame/video/n64.cpp", MAME_DIR .. "src/mame/video/n64types.h", - MAME_DIR .. "src/mame/video/rdpfiltr.inc", + MAME_DIR .. "src/mame/video/rdpfiltr.inc", MAME_DIR .. "src/mame/video/n64.h", MAME_DIR .. "src/mame/video/rdpblend.cpp", MAME_DIR .. "src/mame/video/rdpblend.h", diff --git a/src/devices/bus/newbrain/eim.cpp b/src/devices/bus/newbrain/eim.cpp new file mode 100644 index 00000000000..0080b51e938 --- /dev/null +++ b/src/devices/bus/newbrain/eim.cpp @@ -0,0 +1,303 @@ +// license:BSD-3-Clause +// copyright-holders:Curt Coder +/********************************************************************** + + Grundy NewBrain Expansion Interface Module emulation + +**********************************************************************/ + +/* + + TODO: + + - everything + +*/ + +#include "eim.h" + + + +//************************************************************************** +// MACROS / CONSTANTS +//************************************************************************** + +#define LOG 0 + +#define MC6850_TAG "459" +#define ADC0809_TAG "427" +#define DAC0808_TAG "461" +#define Z80CTC_TAG "458" +#define RS232_TAG "rs232" + + + +//************************************************************************** +// DEVICE DEFINITIONS +//************************************************************************** + +const device_type NEWBRAIN_EIM = &device_creator; + + +//------------------------------------------------- +// ROM( newbrain_eim ) +//------------------------------------------------- + +ROM_START( newbrain_eim ) + ROM_REGION( 0x10000, "eim", 0 ) + ROM_LOAD( "e415-2.rom", 0x4000, 0x2000, CRC(5b0e390c) SHA1(0f99cae57af2e64f3f6b02e5325138d6ba015e72) ) + ROM_LOAD( "e415-3.rom", 0x4000, 0x2000, CRC(2f88bae5) SHA1(04e03f230f4b368027442a7c2084dae877f53713) ) // 18/8/83.aci + ROM_LOAD( "e416-3.rom", 0x6000, 0x2000, CRC(8b5099d8) SHA1(19b0cfce4c8b220eb1648b467f94113bafcb14e0) ) // 10/8/83.mtv + ROM_LOAD( "e417-2.rom", 0x8000, 0x2000, CRC(6a7afa20) SHA1(f90db4f8318777313a862b3d5bab83c2fd260010) ) +ROM_END + + +//------------------------------------------------- +// rom_region - device-specific ROM region +//------------------------------------------------- + +const rom_entry *newbrain_eim_t::device_rom_region() const +{ + return ROM_NAME( newbrain_eim ); +} + + +//------------------------------------------------- +// MACHINE_CONFIG_FRAGMENT( newbrain_eim ) +//------------------------------------------------- + +static MACHINE_CONFIG_FRAGMENT( newbrain_eim ) + // devices + MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_16MHz/8) + MCFG_Z80CTC_ZC0_CB(DEVWRITELINE(MC6850_TAG, acia6850_device, write_rxc)) + MCFG_Z80CTC_ZC1_CB(DEVWRITELINE(MC6850_TAG, acia6850_device, write_txc)) + MCFG_Z80CTC_ZC2_CB(WRITELINE(newbrain_eim_t, ctc_z2_w)) + + MCFG_TIMER_DRIVER_ADD_PERIODIC("z80ctc_c2", newbrain_eim_t, ctc_c2_tick, attotime::from_hz(XTAL_16MHz/4/13)) + MCFG_DEVICE_ADD(ADC0809_TAG, ADC0808, 500000) + MCFG_ADC0808_OUT_EOC_CB(WRITELINE(newbrain_eim_t, adc_eoc_w)) + MCFG_ADC0808_IN_VREF_POS_CB(newbrain_eim_t, adc_vref_pos_r) + MCFG_ADC0808_IN_VREF_NEG_CB(newbrain_eim_t, adc_vref_neg_r) + MCFG_ADC0808_IN_IN_0_CB(newbrain_eim_t, adc_input_r) + MCFG_ADC0808_IN_IN_1_CB(newbrain_eim_t, adc_input_r) + MCFG_ADC0808_IN_IN_2_CB(newbrain_eim_t, adc_input_r) + MCFG_ADC0808_IN_IN_3_CB(newbrain_eim_t, adc_input_r) + MCFG_ADC0808_IN_IN_4_CB(newbrain_eim_t, adc_input_r) + MCFG_ADC0808_IN_IN_5_CB(newbrain_eim_t, adc_input_r) + MCFG_ADC0808_IN_IN_6_CB(newbrain_eim_t, adc_input_r) + MCFG_ADC0808_IN_IN_7_CB(newbrain_eim_t, adc_input_r) + + MCFG_DEVICE_ADD(MC6850_TAG, ACIA6850, 0) + MCFG_ACIA6850_IRQ_HANDLER(WRITELINE(newbrain_eim_t, acia_interrupt)) + MCFG_RS232_PORT_ADD(RS232_TAG, default_rs232_devices, nullptr) + + MCFG_NEWBRAIN_EXPANSION_SLOT_ADD(NEWBRAIN_EXPANSION_SLOT_TAG, XTAL_16MHz/8, newbrain_expansion_cards, "fdc") + + // internal ram + MCFG_RAM_ADD(RAM_TAG) + MCFG_RAM_DEFAULT_SIZE("96K") +MACHINE_CONFIG_END + + +//------------------------------------------------- +// machine_config_additions - device-specific +// machine configurations +//------------------------------------------------- + +machine_config_constructor newbrain_eim_t::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( newbrain_eim ); +} + + + +//************************************************************************** +// LIVE DEVICE +//************************************************************************** + +//------------------------------------------------- +// newbrain_eim_t - constructor +//------------------------------------------------- + +newbrain_eim_t::newbrain_eim_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + device_t(mconfig, NEWBRAIN_EIM, "Newbrain EIM", tag, owner, clock, "newbrain_eim", __FILE__), + device_newbrain_expansion_slot_interface(mconfig, *this), + m_ctc(*this, Z80CTC_TAG), + m_acia(*this, MC6850_TAG), + m_exp(*this, NEWBRAIN_EXPANSION_SLOT_TAG), + m_rom(*this, "eim"), + m_ram(*this, RAM_TAG) +{ +} + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void newbrain_eim_t::device_start() +{ + // state saving + save_item(NAME(m_aciaint)); + save_item(NAME(m_anint)); +} + + +//------------------------------------------------- +// device_reset - device-specific reset +//------------------------------------------------- + +void newbrain_eim_t::device_reset() +{ +} + + +//------------------------------------------------- +// mreq_r - memory request read +//------------------------------------------------- + +UINT8 newbrain_eim_t::mreq_r(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) +{ + return m_exp->mreq_r(space, offset, data, romov, exrm, raminh); +} + + +//------------------------------------------------- +// mreq_w - memory request write +//------------------------------------------------- + +void newbrain_eim_t::mreq_w(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) +{ + m_exp->mreq_w(space, offset, data, romov, exrm, raminh); +} + + +//------------------------------------------------- +// iorq_r - I/O request read +//------------------------------------------------- + +UINT8 newbrain_eim_t::iorq_r(address_space &space, offs_t offset, UINT8 data, bool &prtov) +{ + return m_exp->iorq_r(space, offset, data, prtov); +} + + +//------------------------------------------------- +// iorq_w - I/O request write +//------------------------------------------------- + +void newbrain_eim_t::iorq_w(address_space &space, offs_t offset, UINT8 data, bool &prtov) +{ + m_exp->iorq_w(space, offset, data, prtov); +} + + +//------------------------------------------------- +// anout_r - +//------------------------------------------------- + +READ8_MEMBER( newbrain_eim_t::anout_r ) +{ + return 0xff; +} + + +//------------------------------------------------- +// anout_w - +//------------------------------------------------- + +WRITE8_MEMBER( newbrain_eim_t::anout_w ) +{ +} + + +//------------------------------------------------- +// anin_r - +//------------------------------------------------- + +READ8_MEMBER( newbrain_eim_t::anin_r ) +{ + return 0; +} + + +//------------------------------------------------- +// anio_w - +//------------------------------------------------- + +WRITE8_MEMBER( newbrain_eim_t::anio_w ) +{ +} + + +//------------------------------------------------- +// adc_eoc_w - +//------------------------------------------------- + +WRITE_LINE_MEMBER( newbrain_eim_t::adc_eoc_w ) +{ + m_anint = state; +} + + +//------------------------------------------------- +// adc_vref_pos_r - +//------------------------------------------------- + +ADC0808_ANALOG_READ_CB( newbrain_eim_t::adc_vref_pos_r ) +{ + return 5.0; +} + + +//------------------------------------------------- +// adc_vref_neg_r - +//------------------------------------------------- + +ADC0808_ANALOG_READ_CB( newbrain_eim_t::adc_vref_neg_r ) +{ + return 0.0; +} + + +//------------------------------------------------- +// adc_input_r - +//------------------------------------------------- + +ADC0808_ANALOG_READ_CB( newbrain_eim_t::adc_input_r ) +{ + return 0.0; +} + + +//------------------------------------------------- +// acia_interrupt - +//------------------------------------------------- + +WRITE_LINE_MEMBER( newbrain_eim_t::acia_interrupt ) +{ + m_aciaint = state; +} + + +//------------------------------------------------- +// ctc_z2_w - +//------------------------------------------------- + +WRITE_LINE_MEMBER( newbrain_eim_t::ctc_z2_w ) +{ + // connected to CTC channel 0/1 clock inputs + m_ctc->trg0(state); + m_ctc->trg1(state); +} + + +//------------------------------------------------- +// adc_input_r - +//------------------------------------------------- + +TIMER_DEVICE_CALLBACK_MEMBER(newbrain_eim_t::ctc_c2_tick) +{ + m_ctc->trg2(1); + m_ctc->trg2(0); +} diff --git a/src/devices/bus/newbrain/eim.h b/src/devices/bus/newbrain/eim.h new file mode 100644 index 00000000000..490a6a15c03 --- /dev/null +++ b/src/devices/bus/newbrain/eim.h @@ -0,0 +1,90 @@ +// license:BSD-3-Clause +// copyright-holders:Curt Coder +/********************************************************************** + + Grundy NewBrain Expansion Interface Module emulation + +**********************************************************************/ + +#pragma once + +#ifndef __NEWBRAIN_EIM__ +#define __NEWBRAIN_EIM__ + +#include "emu.h" +#include "exp.h" +#include "bus/rs232/rs232.h" +#include "machine/6850acia.h" +#include "machine/adc0808.h" +#include "machine/z80ctc.h" +#include "machine/ram.h" + + + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> newbrain_eim_t + +class newbrain_eim_t : public device_t, + public device_newbrain_expansion_slot_interface +{ +public: + // construction/destruction + newbrain_eim_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // optional information overrides + virtual const rom_entry *device_rom_region() const override; + virtual machine_config_constructor device_mconfig_additions() const override; + + DECLARE_READ8_MEMBER( anout_r ); + DECLARE_WRITE8_MEMBER( anout_w ); + DECLARE_READ8_MEMBER( anin_r ); + DECLARE_WRITE8_MEMBER( anio_w ); + DECLARE_READ8_MEMBER( st0_r ); + DECLARE_READ8_MEMBER( st1_r ); + DECLARE_READ8_MEMBER( st2_r ); + DECLARE_READ8_MEMBER( usbs_r ); + DECLARE_WRITE8_MEMBER( usbs_w ); + DECLARE_WRITE8_MEMBER( paging_w ); + DECLARE_WRITE_LINE_MEMBER( acia_tx ); + DECLARE_WRITE_LINE_MEMBER( acia_interrupt ); + DECLARE_WRITE_LINE_MEMBER( ctc_z2_w ); + DECLARE_WRITE_LINE_MEMBER( adc_eoc_w ); + + ADC0808_ANALOG_READ_CB(adc_vref_pos_r); + ADC0808_ANALOG_READ_CB(adc_vref_neg_r); + ADC0808_ANALOG_READ_CB(adc_input_r); + + TIMER_DEVICE_CALLBACK_MEMBER(ctc_c2_tick); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + // device_newbrain_expansion_slot_interface overrides + virtual UINT8 mreq_r(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) override; + virtual void mreq_w(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) override; + virtual UINT8 iorq_r(address_space &space, offs_t offset, UINT8 data, bool &prtov) override; + virtual void iorq_w(address_space &space, offs_t offset, UINT8 data, bool &prtov) override; + +private: + required_device m_ctc; + required_device m_acia; + required_device m_exp; + required_memory_region m_rom; + optional_shared_ptr m_ram; + + int m_aciaint; + int m_anint; +}; + + +// device type definition +extern const device_type NEWBRAIN_EIM; + + + +#endif diff --git a/src/devices/bus/newbrain/exp.cpp b/src/devices/bus/newbrain/exp.cpp new file mode 100644 index 00000000000..12f44ac243f --- /dev/null +++ b/src/devices/bus/newbrain/exp.cpp @@ -0,0 +1,142 @@ +// license:BSD-3-Clause +// copyright-holders:Curt Coder +/********************************************************************** + + Grundy NewBrain Expansion Port emulation + +**********************************************************************/ + +#include "exp.h" + + + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +const device_type NEWBRAIN_EXPANSION_SLOT = &device_creator; + + + +//************************************************************************** +// CARD INTERFACE +//************************************************************************** + +//------------------------------------------------- +// device_newbrain_expansion_slot_interface - constructor +//------------------------------------------------- + +device_newbrain_expansion_slot_interface::device_newbrain_expansion_slot_interface(const machine_config &mconfig, device_t &device) : + device_slot_card_interface(mconfig,device) +{ + m_slot = dynamic_cast(device.owner()); +} + + + +//************************************************************************** +// LIVE DEVICE +//************************************************************************** + +//------------------------------------------------- +// newbrain_expansion_slot_t - constructor +//------------------------------------------------- + +newbrain_expansion_slot_t::newbrain_expansion_slot_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + device_t(mconfig, NEWBRAIN_EXPANSION_SLOT, "NewBrain expansion port", tag, owner, clock, "newbrain_expansion_slot", __FILE__), + device_slot_interface(mconfig, *this), m_card(nullptr) +{ +} + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void newbrain_expansion_slot_t::device_start() +{ + m_card = dynamic_cast(get_card_device()); +} + + +//------------------------------------------------- +// device_reset - device-specific reset +//------------------------------------------------- + +void newbrain_expansion_slot_t::device_reset() +{ + if (m_card != nullptr) + { + m_card->device().reset(); + } +} + + +//------------------------------------------------- +// mreq_r - memory request read +//------------------------------------------------- + +UINT8 newbrain_expansion_slot_t::mreq_r(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) +{ + if (m_card != nullptr) + { + data = m_card->mreq_r(space, offset, data, romov, exrm, raminh); + } + + return data; +} + + +//------------------------------------------------- +// mreq_w - memory request write +//------------------------------------------------- + +void newbrain_expansion_slot_t::mreq_w(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) +{ + if (m_card != nullptr) + { + m_card->mreq_w(space, offset, data, romov, exrm, raminh); + } +} + + +//------------------------------------------------- +// iorq_r - I/O request read +//------------------------------------------------- + +UINT8 newbrain_expansion_slot_t::iorq_r(address_space &space, offs_t offset, UINT8 data, bool &prtov) +{ + if (m_card != nullptr) + { + data = m_card->iorq_r(space, offset, data, prtov); + } + + return data; +} + + +//------------------------------------------------- +// iorq_w - I/O request write +//------------------------------------------------- + +void newbrain_expansion_slot_t::iorq_w(address_space &space, offs_t offset, UINT8 data, bool &prtov) +{ + if (m_card != nullptr) + { + m_card->iorq_w(space, offset, data, prtov); + } +} + + +//------------------------------------------------- +// SLOT_INTERFACE( newbrain_expansion_cards ) +//------------------------------------------------- + +// slot devices +#include "eim.h" +#include "fdc.h" + +SLOT_INTERFACE_START( newbrain_expansion_cards ) + SLOT_INTERFACE("eim", NEWBRAIN_EIM) + SLOT_INTERFACE("fdc", NEWBRAIN_FDC) +SLOT_INTERFACE_END diff --git a/src/devices/bus/newbrain/exp.h b/src/devices/bus/newbrain/exp.h new file mode 100644 index 00000000000..dc8bbc87cf5 --- /dev/null +++ b/src/devices/bus/newbrain/exp.h @@ -0,0 +1,127 @@ +// license:BSD-3-Clause +// copyright-holders:Curt Coder +/********************************************************************** + + Grundy NewBrain Expansion Port emulation + +********************************************************************** + + GND 1 26 A6 + 1/8C 2 27 _RAMENB + A14 3 28 EXRM2 + A13 4 29 EXRM1 + D5 5 30 EXRM0 + RMSL 6 31 _ROMOV + D4 7 32 _BUSRQ + D3 8 33 _M1 + D6 9 34 _RST + D7 10 35 _RFRSH + A11 11 36 _WAIT + A10 12 37 A4 + A8 13 38 _BUSAK + A9 14 39 A15 + A12 15 40 _WR + A7 16 41 _INT + A3 17 42 _RD + A2 18 43 _NMI + A1 19 44 _HALT + A0 20 45 _MREQ + D0 21 46 _IORQ + D1 22 47 PRTOV + _FCTR 23 48 _RAMINH + D2 24 49 +5V + A5 25 50 . + +**********************************************************************/ + +#pragma once + +#ifndef __NEWBRAIN_EXPANSION_SLOT__ +#define __NEWBRAIN_EXPANSION_SLOT__ + +#include "emu.h" + + + +//************************************************************************** +// CONSTANTS +//************************************************************************** + +#define NEWBRAIN_EXPANSION_SLOT_TAG "exp" + + + +//************************************************************************** +// INTERFACE CONFIGURATION MACROS +//************************************************************************** + +#define MCFG_NEWBRAIN_EXPANSION_SLOT_ADD(_tag, _clock, _slot_intf, _def_slot) \ + MCFG_DEVICE_ADD(_tag, NEWBRAIN_EXPANSION_SLOT, _clock) \ + MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) + + + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> newbrain_expansion_slot_t + +class device_newbrain_expansion_slot_interface; + +class newbrain_expansion_slot_t : public device_t, + public device_slot_interface +{ +public: + // construction/destruction + newbrain_expansion_slot_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + virtual ~newbrain_expansion_slot_t() { } + + // computer interface + UINT8 mreq_r(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh); + void mreq_w(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh); + + UINT8 iorq_r(address_space &space, offs_t offset, UINT8 data, bool &prtov); + void iorq_w(address_space &space, offs_t offset, UINT8 data, bool &prtov); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + device_newbrain_expansion_slot_interface *m_card; +}; + + +// ======================> device_newbrain_expansion_slot_interface + +// class representing interface-specific live newbrain_expansion card +class device_newbrain_expansion_slot_interface : public device_slot_card_interface +{ +public: + // construction/destruction + device_newbrain_expansion_slot_interface(const machine_config &mconfig, device_t &device); + virtual ~device_newbrain_expansion_slot_interface() { } + + // memory access + virtual UINT8 mreq_r(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) { return data; }; + virtual void mreq_w(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) { }; + + // I/O access + virtual UINT8 iorq_r(address_space &space, offs_t offset, UINT8 data, bool &prtov) { return data; }; + virtual void iorq_w(address_space &space, offs_t offset, UINT8 data, bool &prtov) { }; + +protected: + newbrain_expansion_slot_t *m_slot; +}; + + +// device type definition +extern const device_type NEWBRAIN_EXPANSION_SLOT; + + +SLOT_INTERFACE_EXTERN( newbrain_expansion_cards ); + + + +#endif diff --git a/src/devices/bus/newbrain/fdc.cpp b/src/devices/bus/newbrain/fdc.cpp new file mode 100644 index 00000000000..976cc6bf6fd --- /dev/null +++ b/src/devices/bus/newbrain/fdc.cpp @@ -0,0 +1,340 @@ +// license:BSD-3-Clause +// copyright-holders:Curt Coder +/********************************************************************** + + Grundy NewBrain Expansion Interface Module emulation + +**********************************************************************/ + +/* + + TODO: + + - map d413 ROM to computer space + - paging + +*/ + +#include "fdc.h" + + + +//************************************************************************** +// MACROS / CONSTANTS +//************************************************************************** + +#define LOG 0 + +#define Z80_TAG "416" +#define UPD765_TAG "418" + + + +//************************************************************************** +// DEVICE DEFINITIONS +//************************************************************************** + +const device_type NEWBRAIN_FDC = &device_creator; + + +//------------------------------------------------- +// ROM( newbrain_fdc ) +//------------------------------------------------- + +ROM_START( newbrain_fdc ) + ROM_REGION( 0x2000, "d413", 0 ) + ROM_LOAD( "d413-2.rom", 0x0000, 0x2000, CRC(097591f1) SHA1(c2aa1d27d4f3a24ab0c8135df746a4a44201a7f4) ) + + ROM_REGION( 0x2000, Z80_TAG, 0 ) + ROM_DEFAULT_BIOS("issue2") + ROM_SYSTEM_BIOS( 0, "issue1", "Issue 1" ) + ROMX_LOAD( "d417-1.rom", 0x0000, 0x2000, CRC(40fad31c) SHA1(5137be4cc026972c0ffd4fa6990e8583bdfce163), ROM_BIOS(1) ) + ROM_SYSTEM_BIOS( 1, "issue2", "Issue 2" ) + ROMX_LOAD( "d417-2.rom", 0x0000, 0x2000, CRC(e8bda8b9) SHA1(c85a76a5ff7054f4ef4a472ce99ebaed1abd269c), ROM_BIOS(2) ) +ROM_END + + +//------------------------------------------------- +// rom_region - device-specific ROM region +//------------------------------------------------- + +const rom_entry *newbrain_fdc_t::device_rom_region() const +{ + return ROM_NAME( newbrain_fdc ); +} + + +//------------------------------------------------- +// ADDRESS_MAP( newbrain_fdc_mem ) +//------------------------------------------------- + +static ADDRESS_MAP_START( newbrain_fdc_mem, AS_PROGRAM, 8, newbrain_fdc_t ) + ADDRESS_MAP_UNMAP_HIGH + AM_RANGE(0x0000, 0x1fff) AM_ROM +ADDRESS_MAP_END + + +//------------------------------------------------- +// ADDRESS_MAP( newbrain_fdc_io ) +//------------------------------------------------- + +static ADDRESS_MAP_START( newbrain_fdc_io, AS_IO, 8, newbrain_fdc_t ) + ADDRESS_MAP_UNMAP_HIGH + ADDRESS_MAP_GLOBAL_MASK(0xd1) + AM_RANGE(0x00, 0x01) AM_MIRROR(0x1e) AM_DEVICE(UPD765_TAG, upd765a_device, map) + AM_RANGE(0x20, 0x20) AM_MIRROR(0x1f) AM_WRITE(fdc_auxiliary_w) + AM_RANGE(0x40, 0x40) AM_MIRROR(0x1f) AM_READ(fdc_control_r) +ADDRESS_MAP_END + + +//------------------------------------------------- +// newbrain_floppies +//------------------------------------------------- + +static SLOT_INTERFACE_START( newbrain_floppies ) + SLOT_INTERFACE( "525dd", FLOPPY_525_DD ) +SLOT_INTERFACE_END + + +//------------------------------------------------- +// MACHINE_CONFIG_FRAGMENT( newbrain_fdc ) +//------------------------------------------------- + +static MACHINE_CONFIG_FRAGMENT( newbrain_fdc ) + MCFG_CPU_ADD(Z80_TAG, Z80, XTAL_4MHz) + MCFG_CPU_PROGRAM_MAP(newbrain_fdc_mem) + MCFG_CPU_IO_MAP(newbrain_fdc_io) + + MCFG_UPD765A_ADD(UPD765_TAG, false, true) + MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(newbrain_fdc_t, fdc_int_w)) + + MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", newbrain_floppies, "525dd", floppy_image_device::default_floppy_formats) + MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", newbrain_floppies, "525dd", floppy_image_device::default_floppy_formats) + MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":2", newbrain_floppies, nullptr, floppy_image_device::default_floppy_formats) + MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":3", newbrain_floppies, nullptr, floppy_image_device::default_floppy_formats) + + MCFG_NEWBRAIN_EXPANSION_SLOT_ADD(NEWBRAIN_EXPANSION_SLOT_TAG, XTAL_16MHz/8, newbrain_expansion_cards, nullptr) +MACHINE_CONFIG_END + + +//------------------------------------------------- +// machine_config_additions - device-specific +// machine configurations +//------------------------------------------------- + +machine_config_constructor newbrain_fdc_t::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( newbrain_fdc ); +} + + +//************************************************************************** +// LIVE DEVICE +//************************************************************************** + +//------------------------------------------------- +// newbrain_fdc_t - constructor +//------------------------------------------------- + +newbrain_fdc_t::newbrain_fdc_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + device_t(mconfig, NEWBRAIN_FDC, "NewBrain FDC", tag, owner, clock, "newbrain_fdc", __FILE__), + device_newbrain_expansion_slot_interface(mconfig, *this), + m_maincpu(*this, Z80_TAG), + m_fdc(*this, UPD765_TAG), + m_floppy0(*this, UPD765_TAG ":0"), + m_floppy1(*this, UPD765_TAG ":1"), + m_floppy2(*this, UPD765_TAG ":2"), + m_floppy3(*this, UPD765_TAG ":3"), + m_exp(*this, NEWBRAIN_EXPANSION_SLOT_TAG) +{ +} + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void newbrain_fdc_t::device_start() +{ + save_item(NAME(m_paging)); + save_item(NAME(m_ma16)); + save_item(NAME(m_mpm)); + save_item(NAME(m_fdc_att)); + save_item(NAME(m_fdc_int)); + save_item(NAME(m_pa15)); +} + + +//------------------------------------------------- +// device_reset - device-specific reset +//------------------------------------------------- + +void newbrain_fdc_t::device_reset() +{ + m_maincpu->reset(); + + moton(0); + m_fdc->tc_w(0); + m_pa15 = 0; +} + + +//------------------------------------------------- +// mreq_r - memory request read +//------------------------------------------------- + +UINT8 newbrain_fdc_t::mreq_r(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) +{ + return m_exp->mreq_r(space, offset, data, romov, exrm, raminh); +} + + +//------------------------------------------------- +// mreq_w - memory request write +//------------------------------------------------- + +void newbrain_fdc_t::mreq_w(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) +{ + m_exp->mreq_w(space, offset, data, romov, exrm, raminh); +} + + +//------------------------------------------------- +// iorq_r - I/O request read +//------------------------------------------------- + +UINT8 newbrain_fdc_t::iorq_r(address_space &space, offs_t offset, UINT8 data, bool &prtov) +{ + return m_exp->iorq_r(space, offset, data, prtov); +} + + +//------------------------------------------------- +// iorq_w - I/O request write +//------------------------------------------------- + +void newbrain_fdc_t::iorq_w(address_space &space, offs_t offset, UINT8 data, bool &prtov) +{ + m_exp->iorq_w(space, offset, data, prtov); + + if ((offset & 0x20f) == 0x20f) + { + io_dec_w(space, 0, data); + } +} + + +//------------------------------------------------- +// moton - floppy motor on +//------------------------------------------------- + +void newbrain_fdc_t::moton(int state) +{ + if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(!state); + if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(!state); + if (m_floppy2->get_device()) m_floppy2->get_device()->mon_w(!state); + if (m_floppy3->get_device()) m_floppy3->get_device()->mon_w(!state); +} + + +//------------------------------------------------- +// fdc_int_w - +//------------------------------------------------- + +WRITE_LINE_MEMBER( newbrain_fdc_t::fdc_int_w ) +{ + m_fdc_int = state; +} + + +//------------------------------------------------- +// fdc_auxiliary_w - +//------------------------------------------------- + +WRITE8_MEMBER( newbrain_fdc_t::fdc_auxiliary_w ) +{ + /* + + bit description + + 0 MOTON + 1 765 RESET + 2 TC + 3 + 4 + 5 PA15 + 6 + 7 + + */ + + moton(BIT(data, 0)); + + if (BIT(data, 1)) + { + m_fdc->reset(); + } + + m_fdc->tc_w(BIT(data, 2)); + + m_pa15 = BIT(data, 5); +} + + +//------------------------------------------------- +// fdc_control_r - +//------------------------------------------------- + +READ8_MEMBER( newbrain_fdc_t::fdc_control_r ) +{ + /* + + bit description + + 0 + 1 + 2 + 3 + 4 + 5 FDC INT + 6 PAGING + 7 FDC ATT + + */ + + return (m_fdc_att << 7) | (m_paging << 6) | (m_fdc_int << 5); +} + + +//------------------------------------------------- +// io_dec_w - 0x20f +//------------------------------------------------- + +WRITE8_MEMBER( newbrain_fdc_t::io_dec_w ) +{ + /* + + bit description + + 0 PAGING + 1 + 2 MA16 + 3 MPM + 4 + 5 _FDC RESET + 6 + 7 FDC ATT + + */ + + m_paging = BIT(data, 0); + m_ma16 = BIT(data, 2); + m_mpm = BIT(data, 3); + + if (!BIT(data, 5)) + { + device_reset(); + } + + m_fdc_att = BIT(data, 7); +} diff --git a/src/devices/bus/newbrain/fdc.h b/src/devices/bus/newbrain/fdc.h new file mode 100644 index 00000000000..2e4e21abbc0 --- /dev/null +++ b/src/devices/bus/newbrain/fdc.h @@ -0,0 +1,79 @@ +// license:BSD-3-Clause +// copyright-holders:Curt Coder +/********************************************************************** + + Grundy NewBrain FDC emulation + +**********************************************************************/ + +#pragma once + +#ifndef __NEWBRAIN_FDC__ +#define __NEWBRAIN_FDC__ + +#include "emu.h" +#include "exp.h" +#include "cpu/z80/z80.h" +#include "machine/upd765.h" + + + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> newbrain_fdc_t + +class newbrain_fdc_t : public device_t, + public device_newbrain_expansion_slot_interface +{ +public: + // construction/destruction + newbrain_fdc_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // optional information overrides + virtual const rom_entry *device_rom_region() const override; + virtual machine_config_constructor device_mconfig_additions() const override; + + DECLARE_WRITE_LINE_MEMBER( fdc_int_w ); + DECLARE_WRITE8_MEMBER( fdc_auxiliary_w ); + DECLARE_READ8_MEMBER( fdc_control_r ); + DECLARE_WRITE8_MEMBER( io_dec_w ); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + // device_newbrain_expansion_slot_interface overrides + virtual UINT8 mreq_r(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) override; + virtual void mreq_w(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) override; + virtual UINT8 iorq_r(address_space &space, offs_t offset, UINT8 data, bool &prtov) override; + virtual void iorq_w(address_space &space, offs_t offset, UINT8 data, bool &prtov) override; + +private: + required_device m_maincpu; + required_device m_fdc; + required_device m_floppy0; + required_device m_floppy1; + required_device m_floppy2; + required_device m_floppy3; + required_device m_exp; + + void moton(int state); + + int m_paging; + int m_ma16; + int m_mpm; + int m_fdc_att; + int m_fdc_int; + int m_pa15; +}; + + +// device type definition +extern const device_type NEWBRAIN_FDC; + + + +#endif diff --git a/src/devices/cpu/cop400/cop400.cpp b/src/devices/cpu/cop400/cop400.cpp index e5039743800..bad120eeb03 100644 --- a/src/devices/cpu/cop400/cop400.cpp +++ b/src/devices/cpu/cop400/cop400.cpp @@ -86,6 +86,8 @@ const device_type COP445 = &device_creator; CONSTANTS ***************************************************************************/ +#define LOG_MICROBUS 0 + /* feature masks */ #define COP410_FEATURE 0x01 #define COP420_FEATURE 0x02 @@ -182,7 +184,7 @@ cop400_cpu_device::cop400_cpu_device(const machine_config &mconfig, device_type , m_read_cko(*this) , m_cki(COP400_CKI_DIVISOR_16) , m_cko(COP400_CKO_OSCILLATOR_OUTPUT) - , m_microbus(COP400_MICROBUS_DISABLED) + , m_has_microbus(false) , m_has_counter(has_counter) , m_has_inil(has_inil) , m_featuremask(featuremask) @@ -324,7 +326,7 @@ void cop400_cpu_device::WRITE_Q(UINT8 data) { Q = data; - if (BIT(EN, 2)) + if (!m_has_microbus && BIT(EN, 2)) { OUT_L(Q); } @@ -332,11 +334,6 @@ void cop400_cpu_device::WRITE_Q(UINT8 data) void cop400_cpu_device::WRITE_G(UINT8 data) { - if (m_microbus == COP400_MICROBUS_ENABLED) - { - data = (data & 0x0e) | m_microbus_int; - } - G = data; OUT_G(G); @@ -864,35 +861,6 @@ void cop400_cpu_device::inil_tick() } } -void cop400_cpu_device::microbus_tick() -{ - UINT8 in; - - in = IN_IN(); - - if (!BIT(in, 2)) - { - // chip select - - if (!BIT(in, 1)) - { - // read strobe - - OUT_L(Q); - - m_microbus_int = 1; - } - else if (!BIT(in, 3)) - { - // write strobe - - Q = IN_L(); - - m_microbus_int = 0; - } - } -} - /*************************************************************************** INITIALIZATION ***************************************************************************/ @@ -900,8 +868,7 @@ void cop400_cpu_device::microbus_tick() enum { TIMER_SERIAL, TIMER_COUNTER, - TIMER_INIL, - TIMER_MICROBUS + TIMER_INIL }; void cop400_cpu_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) @@ -919,10 +886,6 @@ void cop400_cpu_device::device_timer(emu_timer &timer, device_timer_id id, int p case TIMER_INIL: inil_tick(); break; - - case TIMER_MICROBUS: - microbus_tick(); - break; } } @@ -971,15 +934,6 @@ void cop400_cpu_device::device_start() m_inil_timer->adjust(attotime::zero, 0, attotime::from_ticks(16, clock())); } - /* allocate Microbus timer */ - - m_microbus_timer = nullptr; - if (m_microbus == COP400_MICROBUS_ENABLED) - { - m_microbus_timer = timer_alloc(TIMER_MICROBUS); - m_microbus_timer->adjust(attotime::zero, 0, attotime::from_ticks(16, clock())); - } - /* register for state saving */ save_item(NAME(m_pc)); @@ -1005,7 +959,6 @@ void cop400_cpu_device::device_start() save_item(NAME(m_si)); save_item(NAME(m_last_skip)); save_item(NAME(m_in)); - save_item(NAME(m_microbus_int)); save_item(NAME(m_halt)); save_item(NAME(m_idle)); @@ -1070,7 +1023,6 @@ void cop400_cpu_device::device_start() m_si = 0; m_skip_lbi = 0; m_last_skip = 0; - m_microbus_int = 0; m_skip = 0; } @@ -1237,3 +1189,19 @@ offs_t cop400_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT return CPU_DISASSEMBLE_NAME(cop410)(this, buffer, pc, oprom, opram, options); } + +READ8_MEMBER( cop400_cpu_device::microbus_rd ) +{ + if (LOG_MICROBUS) logerror("%s %s MICROBUS RD %02x\n", machine().time().as_string(), machine().describe_context(), Q); + + return Q; +} + +WRITE8_MEMBER( cop400_cpu_device::microbus_wr ) +{ + if (LOG_MICROBUS) logerror("%s %s MICROBUS WR %02x\n", machine().time().as_string(), machine().describe_context(), data); + + WRITE_G(G & 0xe); + + Q = data; +} diff --git a/src/devices/cpu/cop400/cop400.h b/src/devices/cpu/cop400/cop400.h index 43e7755f1f4..8b44c34cd06 100644 --- a/src/devices/cpu/cop400/cop400.h +++ b/src/devices/cpu/cop400/cop400.h @@ -111,12 +111,6 @@ enum cop400_cko_bond { COP400_CKO_GENERAL_PURPOSE_INPUT }; -/* microbus bonding options */ -enum cop400_microbus { - COP400_MICROBUS_DISABLED = 0, - COP400_MICROBUS_ENABLED -}; - #define MCFG_COP400_CONFIG(_cki, _cko, _microbus) \ cop400_cpu_device::set_cki(*device, _cki); \ @@ -146,7 +140,10 @@ public: static void set_cki(device_t &device, cop400_cki_bond cki) { downcast(device).m_cki = cki; } static void set_cko(device_t &device, cop400_cko_bond cko) { downcast(device).m_cko = cko; } - static void set_microbus(device_t &device, cop400_microbus microbus) { downcast(device).m_microbus = microbus; } + static void set_microbus(device_t &device, bool has_microbus) { downcast(device).m_has_microbus = has_microbus; } + + DECLARE_READ8_MEMBER( microbus_rd ); + DECLARE_WRITE8_MEMBER( microbus_wr ); protected: // device-level overrides @@ -194,7 +191,7 @@ protected: cop400_cki_bond m_cki; cop400_cko_bond m_cko; - cop400_microbus m_microbus; + bool m_has_microbus; bool m_has_counter; bool m_has_inil; @@ -241,9 +238,6 @@ protected: int m_halt; /* halt mode */ int m_idle; /* idle mode */ - /* microbus */ - int m_microbus_int; /* microbus interrupt */ - /* execution logic */ int m_InstLen[256]; /* instruction length in bytes */ int m_icount; /* instruction counter */ @@ -252,7 +246,6 @@ protected: emu_timer *m_serial_timer; emu_timer *m_counter_timer; emu_timer *m_inil_timer; - emu_timer *m_microbus_timer; typedef void ( cop400_cpu_device::*cop400_opcode_func ) (UINT8 opcode); @@ -277,7 +270,6 @@ protected: void serial_tick(); void counter_tick(); void inil_tick(); - void microbus_tick(); void PUSH(UINT16 data); void POP(); diff --git a/src/mame/drivers/advision.cpp b/src/mame/drivers/advision.cpp index d19956a4388..e303e3db28b 100644 --- a/src/mame/drivers/advision.cpp +++ b/src/mame/drivers/advision.cpp @@ -68,7 +68,7 @@ static MACHINE_CONFIG_START( advision, advision_state ) MCFG_CPU_IO_MAP(io_map) MCFG_CPU_ADD(COP411_TAG, COP411, 52631*16) // COP411L-KCN/N - MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_RAM_POWER_SUPPLY, COP400_MICROBUS_DISABLED) + MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_RAM_POWER_SUPPLY, false) MCFG_COP400_READ_L_CB(READ8(advision_state, sound_cmd_r)) MCFG_COP400_WRITE_G_CB(WRITE8(advision_state, sound_g_w)) MCFG_COP400_WRITE_D_CB(WRITE8(advision_state, sound_d_w)) diff --git a/src/mame/drivers/cidelsa.cpp b/src/mame/drivers/cidelsa.cpp index 6d2d91c21b1..3ccb993621b 100644 --- a/src/mame/drivers/cidelsa.cpp +++ b/src/mame/drivers/cidelsa.cpp @@ -460,7 +460,7 @@ static MACHINE_CONFIG_START( draco, draco_state ) MCFG_CPU_ADD(COP402N_TAG, COP402, DRACO_SND_CHR1) MCFG_CPU_PROGRAM_MAP(draco_sound_map) - MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED ) + MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false ) MCFG_COP400_WRITE_D_CB(WRITE8(draco_state, sound_bankswitch_w)) MCFG_COP400_WRITE_G_CB(WRITE8(draco_state, sound_g_w)) MCFG_COP400_READ_L_CB(READ8(draco_state, psg_r)) diff --git a/src/mame/drivers/hh_cop400.cpp b/src/mame/drivers/hh_cop400.cpp index a032acec210..78ef6c2271c 100644 --- a/src/mame/drivers/hh_cop400.cpp +++ b/src/mame/drivers/hh_cop400.cpp @@ -261,7 +261,7 @@ static MACHINE_CONFIG_START( ctstein, ctstein_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", COP421, 1000000) // approximation - RC osc. R=12K to +6V, C=100pf to GND - MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED) // guessed + MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_cop400_state, display_decay_tick, attotime::from_msec(1)) // MCFG_DEFAULT_LAYOUT(layout_ctstein) @@ -306,7 +306,7 @@ static MACHINE_CONFIG_START( h2hbaskb, h2hbaskb_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", COP420, 1000000) // approximation - RC osc. R=43K to +9V, C=101pf to GND - MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED) // guessed + MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_cop400_state, display_decay_tick, attotime::from_msec(1)) // MCFG_DEFAULT_LAYOUT(layout_h2hbaskb) @@ -416,7 +416,7 @@ static MACHINE_CONFIG_START( einvaderc, einvaderc_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", COP444, 1000000) // approximation - RC osc. R=47K to +9V, C=100pf to GND(-9V) - MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED) // guessed + MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed MCFG_COP400_READ_IN_CB(IOPORT("IN.0")) MCFG_COP400_WRITE_D_CB(WRITE8(einvaderc_state, write_d)) MCFG_COP400_WRITE_G_CB(WRITE8(einvaderc_state, write_g)) @@ -524,7 +524,7 @@ static MACHINE_CONFIG_START( funjacks, funjacks_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", COP410, 2000000) // approximation - RC osc. R=47K, C=56pf - MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED) // guessed + MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true) // guessed MCFG_COP400_WRITE_D_CB(WRITE8(funjacks_state, write_d)) MCFG_COP400_WRITE_L_CB(WRITE8(funjacks_state, write_l)) MCFG_COP400_WRITE_G_CB(WRITE8(funjacks_state, write_g)) @@ -620,7 +620,7 @@ static MACHINE_CONFIG_START( funrlgl, funrlgl_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", COP410, 2000000) // approximation - RC osc. R=51K, C=91pf - MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED) // guessed + MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true) // guessed MCFG_COP400_WRITE_D_CB(WRITE8(funrlgl_state, write_d)) MCFG_COP400_WRITE_L_CB(WRITE8(funrlgl_state, write_l)) MCFG_COP400_WRITE_G_CB(WRITE8(funrlgl_state, write_g)) @@ -669,7 +669,7 @@ static MACHINE_CONFIG_START( plus1, plus1_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", COP410, 1000000) // approximation - RC osc. R=51K to +5V, C=100pf to GND - MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED) // guessed + MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true) // guessed /* no visual feedback! */ @@ -800,7 +800,7 @@ static MACHINE_CONFIG_START( lightfgt, lightfgt_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", COP421, 950000) // approximation - RC osc. R=82K to +6V, C=56pf to GND(-6V) - MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED) // guessed + MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed MCFG_COP400_WRITE_SO_CB(WRITELINE(lightfgt_state, write_so)) MCFG_COP400_WRITE_D_CB(WRITE8(lightfgt_state, write_d)) MCFG_COP400_WRITE_L_CB(WRITE8(lightfgt_state, write_l)) diff --git a/src/mame/drivers/hh_hmcs40.cpp b/src/mame/drivers/hh_hmcs40.cpp index 36bfd7a52ab..0ed890fc5d5 100644 --- a/src/mame/drivers/hh_hmcs40.cpp +++ b/src/mame/drivers/hh_hmcs40.cpp @@ -2788,7 +2788,7 @@ static MACHINE_CONFIG_START( eturtles, eturtles_state ) MCFG_HMCS40_WRITE_D_CB(WRITE16(eturtles_state, grid_w)) MCFG_CPU_ADD("audiocpu", COP411, 215000) // approximation - MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED) // guessed + MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed MCFG_COP400_WRITE_SK_CB(WRITELINE(eturtles_state, speaker_w)) MCFG_COP400_WRITE_D_CB(WRITE8(eturtles_state, cop_irq_w)) MCFG_COP400_READ_L_CB(READ8(eturtles_state, cop_latch_r)) @@ -2895,7 +2895,7 @@ static MACHINE_CONFIG_START( estargte, estargte_state ) MCFG_HMCS40_WRITE_D_CB(WRITE16(eturtles_state, grid_w)) MCFG_CPU_ADD("audiocpu", COP411, 190000) // approximation - MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED) // guessed + MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed MCFG_COP400_WRITE_SK_CB(WRITELINE(eturtles_state, speaker_w)) MCFG_COP400_WRITE_D_CB(WRITE8(eturtles_state, cop_irq_w)) MCFG_COP400_READ_L_CB(READ8(estargte_state, cop_data_r)) diff --git a/src/mame/drivers/lisa.cpp b/src/mame/drivers/lisa.cpp index f92b4bf386f..e7e06b5cb12 100644 --- a/src/mame/drivers/lisa.cpp +++ b/src/mame/drivers/lisa.cpp @@ -102,10 +102,10 @@ static MACHINE_CONFIG_START( lisa, lisa_state ) MCFG_CPU_VBLANK_INT_DRIVER("screen", lisa_state, lisa_interrupt) MCFG_CPU_ADD(COP421_TAG, COP421, 3900000) - MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED ) + MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true ) MCFG_CPU_ADD(KB_COP421_TAG, COP421, 3900000) // ? - MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED ) + MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true ) MCFG_CPU_ADD("fdccpu", M6504, 2000000) /* 16.000 MHz / 8 in when DIS asserted, 16.000 MHz / 9 otherwise (?) */ MCFG_CPU_PROGRAM_MAP(lisa_fdc_map) diff --git a/src/mame/drivers/looping.cpp b/src/mame/drivers/looping.cpp index 09ba6ffeda2..fedf2eb00b5 100644 --- a/src/mame/drivers/looping.cpp +++ b/src/mame/drivers/looping.cpp @@ -626,7 +626,7 @@ static MACHINE_CONFIG_START( looping, looping_state ) MCFG_TMS99xx_ADD("audiocpu", TMS9980A, SOUND_CLOCK/4, looping_sound_map, looping_sound_io_map) MCFG_CPU_ADD("mcu", COP420, COP_CLOCK) - MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED ) + MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false ) MCFG_COP400_WRITE_L_CB(WRITE8(looping_state, cop_l_w)) MCFG_COP400_READ_L_CB(READ8(looping_state, cop_unk_r)) MCFG_COP400_READ_G_CB(READ8(looping_state, cop_unk_r)) diff --git a/src/mame/drivers/newbrain.cpp b/src/mame/drivers/newbrain.cpp index df6c71fb59b..ec40490edc3 100644 --- a/src/mame/drivers/newbrain.cpp +++ b/src/mame/drivers/newbrain.cpp @@ -1,7 +1,5 @@ // license:BSD-3-Clause // copyright-holders:Curt Coder -#include "includes/newbrain.h" -#include "formats/mfi_dsk.h" /* @@ -33,14 +31,18 @@ TODO: - - bitmapped graphics mode - - COP420 microbus access - - escape key is missing + - keyboard + - only key 7 is recognized + - escape key mapping + - VFD + - reset/powerup time constants + - bitmapped video + - accurate video timing + - cassette + - EIM + - floppy - CP/M 2.2 ROMs - - floppy disc controller - - convert FDC into a device - - convert EIM into a device - + - localized ROM sets - Micropage ROM/RAM card - Z80 PIO board - peripheral (PI) box @@ -48,6 +50,29 @@ */ + +#include "includes/newbrain.h" + + + +//************************************************************************** +// MACROS / CONSTANTS +//************************************************************************** + +#define LOG 0 +#define LOG_COP 0 +#define LOG_VFD 0 + + + +//************************************************************************** +// IMPLEMENTATION +//************************************************************************** + +//------------------------------------------------- +// check_interrupt - +//------------------------------------------------- + void newbrain_state::check_interrupt() { int level = (!m_clkint || !m_copint) ? ASSERT_LINE : CLEAR_LINE; @@ -55,344 +80,350 @@ void newbrain_state::check_interrupt() m_maincpu->set_input_line(INPUT_LINE_IRQ0, level); } -/* Bank Switching */ -#define memory_install_unmapped(program, bank, bank_start, bank_end) \ - program.unmap_readwrite(bank_start, bank_end); +//------------------------------------------------- +// mreq_r - memory request read +//------------------------------------------------- -#define memory_install_rom_helper(program, bank, bank_start, bank_end) \ - program.install_read_bank(bank_start, bank_end, bank); \ - program.unmap_write(bank_start, bank_end); - -#define memory_install_ram_helper(program, bank, bank_start, bank_end) \ - program.install_readwrite_bank(bank_start, bank_end, bank); - -void newbrain_eim_state::bankswitch() +READ8_MEMBER( newbrain_state::mreq_r ) { - address_space &program = m_maincpu->space(AS_PROGRAM); - int bank; + bool romov = 1, raminh = 0; + int exrm = 0; + UINT8 data = m_exp->mreq_r(space, offset, 0xff, romov, exrm, raminh); - for (bank = 1; bank < 9; bank++) + int rom0 = 1, rom1 = 1, rom2 = 1; + int a15_14_13 = romov ? (offset >> 13) : exrm; + if (!m_pwrup) a15_14_13 = 7; + int a15g = BIT(a15_14_13, 2); + + switch (a15_14_13) { - int page = (m_a16 << 3) | bank; - UINT8 data = ~m_pr[page]; - int ch = (data >> 3) & 0x03; - int eim_bank = data & 0x07; - - UINT16 eim_bank_start = eim_bank * 0x2000; - UINT16 bank_start = (bank - 1) * 0x2000; - UINT16 bank_end = bank_start + 0x1fff; - char bank_name[10]; - sprintf(bank_name,"bank%d",bank); - switch (ch) - { - case 0: - /* ROM */ - memory_install_rom_helper(program, bank_name, bank_start, bank_end); - membank(bank_name)->configure_entry(0, m_eim_rom->base() + eim_bank_start); - break; - - case 2: - /* RAM */ - memory_install_ram_helper(program, bank_name, bank_start, bank_end); - membank(bank_name)->configure_entry(0, m_eim_ram + eim_bank_start); - break; - - default: - logerror("Invalid memory channel %u!\n", ch); - break; - } - } -} - -void newbrain_state::bankswitch() -{ - address_space &program = m_maincpu->space(AS_PROGRAM); - int bank; - - for (bank = 1; bank < 9; bank++) - { - UINT16 bank_start = (bank - 1) * 0x2000; - UINT16 bank_end = bank_start + 0x1fff; - char bank_name[10]; - sprintf(bank_name,"bank%d",bank); - - if (m_pwrup) - { - /* all banks point to ROM at 0xe000 */ - memory_install_rom_helper(program, bank_name, bank_start, bank_end); - membank(bank_name)->configure_entry(0, m_rom->base() + 0xe000); - } - else - { - membank(bank_name)->configure_entry(0, m_rom->base() + bank_start); - - if (bank < 5) - { - /* bank is RAM */ - memory_install_ram_helper(program, bank_name, bank_start, bank_end); - } - else if (bank == 5) - { - /* 0x8000-0x9fff */ - if (m_eim_rom) - { - /* expansion interface ROM */ - memory_install_rom_helper(program, bank_name, bank_start, bank_end); - membank(bank_name)->configure_entry(0, m_eim_rom->base() + 0x4000); - } - else - { - /* mirror of 0xa000-0xbfff */ - if (m_rom->base()[0xa001] == 0) - { - /* unmapped on the M model */ - memory_install_unmapped(program, bank_name, bank_start, bank_end); - } - else - { - /* bank is ROM on the A model */ - memory_install_rom_helper(program, bank_name, bank_start, bank_end); - } - - membank(bank_name)->configure_entry(0, m_rom->base() + 0xa000); - } - } - else if (bank == 6) - { - /* 0xa000-0xbfff */ - if (m_rom->base()[0xa001] == 0) - { - /* unmapped on the M model */ - memory_install_unmapped(program, bank_name, bank_start, bank_end); - } - else - { - /* bank is ROM on the A model */ - memory_install_rom_helper(program, bank_name, bank_start, bank_end); - } - } - else - { - /* bank is ROM */ - memory_install_rom_helper(program, bank_name, bank_start, bank_end); - } - } - - membank(bank_name)->set_entry(0); - } -} - -/* Enable/Status */ - -WRITE8_MEMBER( newbrain_state::enrg1_w ) -{ - /* - - bit signal description - - 0 _CLK enable frame frequency clock interrupts - 1 enable user interrupt - 2 TVP enable video display - 3 enable V24 - 4 V24 Select Receive Bit 0 - 5 V24 Select Receive Bit 1 - 6 V24 Select Transmit Bit 0 - 7 V24 Select Transmit Bit 1 - - */ - - m_enrg1 = data; -} - -WRITE8_MEMBER( newbrain_state::a_enrg1_w ) -{ - /* - - bit signal description - - 0 _CLK Clock Enable - 1 - 2 TVP TV Enable - 3 IOPOWER - 4 _CTS Clear to Send V24 - 5 DO Transmit Data V24 - 6 - 7 PO Transmit Data Printer - - */ - - m_enrg1 = data; -} - -READ8_MEMBER( newbrain_state::ust_r ) -{ - /* - - bit signal description - - 0 variable - 1 variable - 2 MNS mains present - 3 _USRINT0 user status - 4 _USRINT user interrupt - 5 _CLKINT clock interrupt - 6 _ACINT ACIA interrupt - 7 _COPINT COP interrupt - - */ - - UINT8 data = (m_copint << 7) | (m_aciaint << 6) | (m_clkint << 5) | (m_userint << 4) | 0x04; - - switch ((m_enrg1 & NEWBRAIN_ENRG1_UST_BIT_0_MASK) >> 6) - { - case 0: - // excess, 1=24, 0=4 - if (m_tvctl & NEWBRAIN_VIDEO_32_40) - { - data |= 0x01; - } - break; - - case 1: - // characters per line, 1=40, 0=80 - if (m_tvctl & NEWBRAIN_VIDEO_80L) - { - data |= 0x01; - } - break; - - case 2: - // tape in - break; - - case 3: - // calling indicator - break; + case 5: rom0 = 0; break; + case 6: rom1 = 0; break; + case 7: rom2 = 0; break; } - switch ((m_enrg1 & NEWBRAIN_ENRG1_UST_BIT_1_MASK) >> 4) + if (!a15g && !raminh) { - case 0: - // PWRUP, if set indicates that power is supplied to Z80 and memory - if (m_pwrup) - { - data |= 0x02; - } - break; + data = m_ram->pointer()[offset]; + } - case 1: - // TVCNSL, if set then processor has video device as primary console output - if (m_tvcnsl) - { - data |= 0x02; - } - break; + if (!rom0) + { + data = m_rom->base()[0x0000 + (offset & 0x1fff)]; + } - case 2: - // _BEE, if set then processor is Model A type - if (m_bee) - { - data |= 0x02; - } - break; + if (!rom1) + { + data = m_rom->base()[0x2000 + (offset & 0x1fff)]; + } - case 3: - // _CALLIND, calling indicator - data |= 0x02; - break; + if (!rom2) + { + data = m_rom->base()[0x4000 + (offset & 0x1fff)]; } return data; } -READ8_MEMBER( newbrain_state::a_ust_r ) + +//------------------------------------------------- +// mreq_w - memory request write +//------------------------------------------------- + +WRITE8_MEMBER( newbrain_state::mreq_w ) +{ + bool romov = 1, raminh = 0; + int exrm = 0; + m_exp->mreq_w(space, offset, data, romov, exrm, raminh); + + int a15_14_13 = romov ? (offset >> 13) : exrm; + if (!m_pwrup) a15_14_13 = 7; + int a15g = BIT(a15_14_13, 2); + + if (!a15g && !raminh) + { + m_ram->pointer()[offset] = data; + } +} + + +//------------------------------------------------- +// iorq_r - I/O request read +//------------------------------------------------- + +READ8_MEMBER( newbrain_state::iorq_r ) +{ + bool prtov = 0; + UINT8 data = m_exp->iorq_r(space, offset, 0xff, prtov); + + if (!prtov) + { + switch ((offset >> 2) & 0x07) + { + case 1: // EXP1 + switch (offset & 0x03) + { + case 0: // CLCLK + clclk(); + break; + + case 2: // COP + data = m_cop->microbus_rd(space, 0); + break; + } + break; + + case 5: // UST + if (BIT(offset, 1)) + { + data = ust_b_r(space, offset, data); + } + else + { + data = ust_a_r(space, offset, data); + } + break; + } + } + + return data; +} + + +//------------------------------------------------- +// iorq_w - I/O request write +//------------------------------------------------- + +WRITE8_MEMBER( newbrain_state::iorq_w ) +{ + bool prtov = 0; + m_exp->iorq_w(space, offset, 0xff, prtov); + + if (!prtov) + { + switch ((offset >> 2) & 0x07) + { + case 1: // EXP1 + switch (offset & 0x03) + { + case 0: // CLCLK + clclk(); + break; + + case 2: // COP + m_cop->microbus_wr(space, offset, data); + break; + + case 3: // ENRG1 + enrg1_w(space, offset, data); + break; + } + break; + + case 2: // TVL + tvl(data, BIT(offset, 6)); + break; + + case 3: // TVTL + tvtl_w(space, offset, data); + break; + } + } +} + + +//------------------------------------------------- +// clclk - clear clock interrupt +//------------------------------------------------- + +void newbrain_state::clclk() +{ + if (LOG) logerror("%s %s CLCLK\n", machine().time().as_string(), machine().describe_context()); + + m_clkint = 1; + check_interrupt(); +} + + +//------------------------------------------------- +// enrg1_w - +//------------------------------------------------- + +WRITE8_MEMBER( newbrain_state::enrg1_w ) { /* - bit signal description + bit signal - 0 +5V + 0 _CLK + 1 + 2 TVP + 3 + 4 _RTSD + 5 DO + 6 + 7 PO + + */ + + if (LOG) logerror("%s %s ENRG1 %02x\n", machine().time().as_string(), machine().describe_context(), data); + + // clock enable + m_clk = BIT(data, 0); + + // TV enable + m_tvp = BIT(data, 2); + + // V24 + m_rs232_v24->write_rts(BIT(data, 4)); + m_rs232_v24->write_txd(BIT(data, 5)); + + // printer + m_rs232_prn->write_txd(BIT(data, 7)); +} + + +//------------------------------------------------- +// ust_r - +//------------------------------------------------- + +READ8_MEMBER( newbrain_state::ust_a_r ) +{ + /* + + bit signal + + 0 +5V 1 PWRUP 2 3 4 - 5 _CLKINT clock interrupt + 5 _CLKINT 6 - 7 _COPINT COP interrupt + 7 _COPINT */ - return (m_copint << 7) | (m_clkint << 5) | (m_pwrup << 1) | 0x01; + UINT8 data = 0x5d; + + // powered up + data |= m_pwrup << 1; + + // interrupts + data |= m_clkint << 5; + data |= m_copint << 7; + + return data; } -READ8_MEMBER( newbrain_state::user_r ) + +//------------------------------------------------- +// user_r - +//------------------------------------------------- + +READ8_MEMBER( newbrain_state::ust_b_r ) { /* - bit signal description + bit signal - 0 RDDK Received Data V24 - 1 _CTSD _Clear to Send V24 + 0 RDDK + 1 _CTSD 2 3 4 - 5 TPIN Tape in + 5 TPIN 6 - 7 _CTSP _Clear to Send Printer + 7 _CTSP */ - m_user = 0; + UINT8 data = 0x5c; - return 0xff; + // V24 + data |= m_rs232_v24->rxd_r(); + data |= m_rs232_v24->cts_r() << 1; + + // tape + data |= tpin() << 5; + + // printer + data |= m_rs232_prn->cts_r() << 7; + + return data; } -WRITE8_MEMBER( newbrain_state::user_w ) + +//------------------------------------------------- +// cop_in_r - +//------------------------------------------------- + +READ8_MEMBER( newbrain_state::cop_in_r ) { - m_user = data; + /* + + bit description + + IN0 K8 (CD4076 Q2) + IN1 _RD + IN2 _COP + IN3 _WR + + */ + + UINT8 data = 0xe; + + // keyboard + data |= BIT(m_keydata, 2); + + if (LOG_COP) logerror("%s %s IN %01x\n", machine().time().as_string(), machine().describe_context(), data); + + return data; } -/* Interrupts */ -READ8_MEMBER( newbrain_state::clclk_r ) +//------------------------------------------------- +// cop_g_r - +//------------------------------------------------- + +READ8_MEMBER( newbrain_state::cop_g_r ) { - m_clkint = 1; - check_interrupt(); + /* - return 0xff; + bit description + + G0 +5V + G1 K9 (CD4076 Q1) + G2 K7 (CD4076 Q0) + G3 K3 (CD4076 Q3) + + */ + + UINT8 data = 0x1; + + // keyboard + data |= BIT(m_keydata, 1) << 1; + data |= BIT(m_keydata, 0) << 2; + data |= BIT(m_keydata, 3) << 3; + + if (LOG_COP) logerror("%s %s G %01x\n", machine().time().as_string(), machine().describe_context(), data); + + return data; } -WRITE8_MEMBER( newbrain_state::clclk_w ) + +//------------------------------------------------- +// cop_g_w - +//------------------------------------------------- + +void newbrain_state::tm() { - m_clkint = 1; - check_interrupt(); -} + cassette_state tm1 = (!m_cop_g3 && !m_cop_k6) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED; + cassette_state tm2 = (!m_cop_g1 && !m_cop_k6) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED; -READ8_MEMBER( newbrain_state::clusr_r ) -{ - m_userint = 1; - - return 0xff; -} - -WRITE8_MEMBER( newbrain_state::clusr_w ) -{ - m_userint = 1; -} - -/* COP420 */ - -READ8_MEMBER( newbrain_state::cop_l_r ) -{ - // connected to the Z80 data bus - return m_cop_bus; -} - -WRITE8_MEMBER( newbrain_state::cop_l_w ) -{ - // connected to the Z80 data bus - m_cop_bus = data; + m_cassette1->change_state(tm1, CASSETTE_MASK_MOTOR); + m_cassette2->change_state(tm2, CASSETTE_MASK_MOTOR); } WRITE8_MEMBER( newbrain_state::cop_g_w ) @@ -403,35 +434,25 @@ WRITE8_MEMBER( newbrain_state::cop_g_w ) G0 _COPINT G1 _TM1 - G2 not connected + G2 G3 _TM2 */ - m_copint = BIT(data, 0); + if (LOG_COP) logerror("%s %s COPINT %u TM1 %u TM2 %u\n", machine().time().as_string(), machine().describe_context(), BIT(data, 0), BIT(data, 1), BIT(data, 3)); + + m_copint = !BIT(data, 0); check_interrupt(); - /* tape motor enable */ - - m_cassette1->change_state(BIT(data,1) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR); - m_cassette2->change_state(BIT(data,3) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR); + m_cop_g1 = BIT(data, 1); + m_cop_g3 = BIT(data, 3); + tm(); } -READ8_MEMBER( newbrain_state::cop_g_r ) -{ - /* - bit description - - G0 not connected - G1 K9 - G2 K7 - G3 K3 - - */ - - return (BIT(m_keydata, 3) << 3) | (BIT(m_keydata, 0) << 2) | (BIT(m_keydata, 1) << 1); -} +//------------------------------------------------- +// cop_d_w - +//------------------------------------------------- WRITE8_MEMBER( newbrain_state::cop_d_w ) { @@ -445,733 +466,309 @@ WRITE8_MEMBER( newbrain_state::cop_d_w ) */ - /* keyboard row reset */ + int k4 = !BIT(data, 0); + int k6 = !BIT(data, 2); - if (!BIT(data, 0)) - { - m_keylatch = 0; - } - - /* tape data output */ + if (LOG_COP) logerror("%s %s K4 %u K6 %u\n", machine().time().as_string(), machine().describe_context(), k4, k6); m_cop_tdo = BIT(data, 1); - m_cassette1->output(m_cop_tdo ? -1.0 : +1.0); m_cassette2->output(m_cop_tdo ? -1.0 : +1.0); - /* keyboard and display clock */ + if (k4) { + // CD4024 RST + m_keylatch = 0; - if (!BIT(data, 2)) - { + if (LOG_COP) logerror("%s %s keylatch reset\n", machine().time().as_string(), machine().describe_context()); + } else if (m_cop_k6 && !k6) { + // CD4024 CLK m_keylatch++; + m_keylatch &= 0x0f; - if (m_keylatch == 16) + if (LOG_COP) logerror("%s %s keylatch %u\n", machine().time().as_string(), machine().describe_context(), m_keylatch); + } + + if (!m_cop_k6 && k6) { + //CD4076 CLK + switch (m_keylatch) { - m_keylatch = 0; + case 0: m_keydata = m_y0->read(); break; + case 1: m_keydata = m_y1->read(); break; + case 2: m_keydata = m_y2->read(); break; + case 3: m_keydata = m_y3->read(); break; + case 4: m_keydata = m_y4->read(); break; + case 5: m_keydata = m_y5->read(); break; + case 6: m_keydata = m_y6->read(); break; + case 7: m_keydata = m_y7->read(); break; + case 8: m_keydata = m_y8->read(); break; + case 9: m_keydata = m_y9->read(); break; + case 10: m_keydata = m_y10->read(); break; + case 11: m_keydata = m_y11->read(); break; + case 12: m_keydata = m_y12->read(); break; + case 13: m_keydata = m_y13->read(); break; + case 14: m_keydata = m_y14->read(); break; + case 15: m_keydata = m_y15->read(); break; } - m_keydata = m_key_row[m_keylatch]->read(); + if (LOG_COP) logerror("%s %s keydata %01x\n", machine().time().as_string(), machine().describe_context(), m_keydata); + } else if (m_cop_k6 && k6) { + m_keydata = 0; + } else if (!k6) { + m_keydata = 0x0f; - output().set_digit_value(m_keylatch, m_segment_data[m_keylatch]); + if (LOG_COP) logerror("%s %s keydata disabled\n", machine().time().as_string(), machine().describe_context()); + + output().set_digit_value(m_keylatch, m_segment_data); + } else { } + + m_cop_k6 = k6; + tm(); } -READ8_MEMBER( newbrain_state::cop_in_r ) + +//------------------------------------------------- +// k1_w - +//------------------------------------------------- + +WRITE_LINE_MEMBER( newbrain_state::k1_w ) { - /* + if (LOG_VFD) logerror("%s %s SO %u\n", machine().time().as_string(), machine().describe_context(), state); - bit description - - IN0 K8 - IN1 _RD - IN2 _COP - IN3 _WR - - */ - - return (m_cop_wr << 3) | (m_cop_access << 2) | (m_cop_rd << 1) | BIT(m_keydata, 2); -} - -WRITE_LINE_MEMBER( newbrain_state::cop_so_w ) -{ - // connected to K1 m_cop_so = state; } -WRITE_LINE_MEMBER( newbrain_state::cop_sk_w ) + +//------------------------------------------------- +// k2_w - +//------------------------------------------------- + +WRITE_LINE_MEMBER( newbrain_state::k2_w ) { - // connected to K2 - m_segment_data[m_keylatch] >>= 1; - m_segment_data[m_keylatch] = (m_cop_so << 15) | (m_segment_data[m_keylatch] & 0x7fff); -} + if (LOG_VFD) logerror("%s %s SK %u\n", machine().time().as_string(), machine().describe_context(), state); -READ_LINE_MEMBER( newbrain_state::cop_si_r ) -{ - // connected to TDI - m_cop_tdi = (((m_cassette1)->input() > +1.0) || ((m_cassette2)->input() > +1.0)) ^ m_cop_tdo; - - return m_cop_tdi; -} - -/* Video */ - -void newbrain_state::tvram_w(UINT8 data, int a6) -{ - /* latch video address counter bits A5-A0 */ - m_tvram = (m_tvctl & NEWBRAIN_VIDEO_80L) ? 0x04 : 0x02; - - /* latch video address counter bit A6 */ - m_tvram |= a6 << 6; - - /* latch data to video address counter bits A14-A7 */ - m_tvram = (data << 7); -} - -READ8_MEMBER( newbrain_state::tvl_r ) -{ - UINT8 data = 0xff; - - tvram_w(data, !offset); - - return data; -} - -WRITE8_MEMBER( newbrain_state::tvl_w ) -{ - tvram_w(data, !offset); -} - -WRITE8_MEMBER( newbrain_state::tvctl_w ) -{ - /* - - bit signal description - - 0 RV 1 reverses video over entire field, ie. black on white - 1 FS 0 generates 128 characters and 128 reverse field characters from 8 bit character code. 1 generates 256 characters from 8 bit character code - 2 32/_40 0 generates 320 or 640 horizontal dots in pixel graphics mode. 1 generates 256 or 512 horizontal dots in pixel graphics mode - 3 UCR 0 selects 256 characters expressed in an 8x10 matrix, and 25 lines (max) displayed. 1 selects 256 characters in an 8x8 matrix, and 31 lines (max) displayed - 4 - 5 - 6 80L 0 selects 40 character line length. 1 selects 80 character line length - 7 - - */ - - m_tvctl = data; -} - -/* Disc Controller */ - -WRITE8_MEMBER( newbrain_eim_state::fdc_auxiliary_w ) -{ - /* - - bit description - - 0 MOTON - 1 765 RESET - 2 TC - 3 - 4 - 5 PA15 - 6 - 7 - - */ - - m_floppy->mon_w(!BIT(data, 0)); - - if(BIT(data, 1)) - m_fdc->reset(); - - m_fdc->tc_w(BIT(data, 2)); -} - -READ8_MEMBER( newbrain_eim_state::fdc_control_r ) -{ - /* - - bit description - - 0 - 1 - 2 - 3 - 4 - 5 FDC INT - 6 PAGING - 7 FDC ATT - - */ - - return (m_fdc_att << 7) | (m_paging << 6) | (m_fdc_int << 5); -} - -READ8_MEMBER( newbrain_eim_state::ust2_r ) -{ - /* - - bit description - - 0 RDDK (V24 RxD) - 1 _CTSD (V24 Clear to Send) - 2 - 3 - 4 - 5 TPIN - 6 - 7 _CTSP (Printer Clear to Send) - - */ - - return 0; -} - -#define NEWBRAIN_COPCMD_NULLCOM 0xd0 -#define NEWBRAIN_COPCMD_DISPCOM 0xa0 -//#define NEWBRAIN_COPCMD_TIMCOM 0x -#define NEWBRAIN_COPCMD_PDNCOM 0xb8 -#define NEWBRAIN_COPCMD_TAPECOM 0x80 - -#define NEWBRAIN_COP_TAPE_RECORD 0x00 -#define NEWBRAIN_COP_TAPE_PLAYBK 0x04 -#define NEWBRAIN_COP_TAPE_MOTOR1 0x08 -#define NEWBRAIN_COP_TAPE_MOTOR2 0x02 - -#define NEWBRAIN_COP_TIMER0 0x01 - -#define NEWBRAIN_COP_NO_DATA 0x01 -#define NEWBRAIN_COP_BREAK_PRESSED 0x02 - -#define NEWBRAIN_COP_REGINT 0x00 -/*#define NEWBRAIN_COP_CASSERR 0x -#define NEWBRAIN_COP_CASSIN 0x -#define NEWBRAIN_COP_KBD 0x -#define NEWBRAIN_COP_CASSOUT 0x*/ - -enum -{ - NEWBRAIN_COP_STATE_COMMAND = 0, - NEWBRAIN_COP_STATE_DATA -}; - - -READ8_MEMBER( newbrain_state::cop_r ) -{ - m_copint = 1; - check_interrupt(); - - return m_copdata; -} - -WRITE8_MEMBER( newbrain_state::cop_w ) -{ - m_copdata = data; - - switch (m_copstate) + if (state) { - case NEWBRAIN_COP_STATE_COMMAND: - logerror("COP command %02x\n", data); + m_segment_data >>= 1; + m_segment_data = (m_cop_so << 15) | (m_segment_data & 0x7fff); - switch (data) - { - case NEWBRAIN_COPCMD_NULLCOM: - break; - - case NEWBRAIN_COPCMD_DISPCOM: - m_copregint = 0; - m_copbytes = 18; - m_copstate = NEWBRAIN_COP_STATE_DATA; - - m_copdata = NEWBRAIN_COP_NO_DATA; - m_copint = 0; - check_interrupt(); - - break; - -#if 0 - case NEWBRAIN_COPCMD_TIMCOM: - m_copregint = 0; - m_copbytes = 6; - m_copstate = NEWBRAIN_COP_STATE_DATA; - break; -#endif - case NEWBRAIN_COPCMD_PDNCOM: - /* power down */ - m_copregint = 0; - break; - - default: - if (data & NEWBRAIN_COPCMD_TAPECOM) - { - m_copregint = 0; - } - } - break; - - case NEWBRAIN_COP_STATE_DATA: - logerror("COP data %02x\n", data); - m_copbytes--; - - if (m_copbytes == 0) - { - m_copstate = NEWBRAIN_COP_STATE_COMMAND; - m_copregint = 1; - } - - m_copdata = NEWBRAIN_COP_NO_DATA; - m_copint = 0; - check_interrupt(); - - break; + if (LOG_VFD) logerror("%s %s SEGMENT %04x\n", machine().time().as_string(), machine().describe_context(), m_segment_data); } } -TIMER_DEVICE_CALLBACK_MEMBER(newbrain_state::cop_regint_tick) + +//------------------------------------------------- +// tdi_r - +//------------------------------------------------- + +int newbrain_state::tpin() { - if (m_copregint) - { - logerror("COP REGINT\n"); - m_copint = 0; - check_interrupt(); - } + return (m_cassette1->input() > +1.0) || (m_cassette2->input() > +1.0); } -/* Expansion Interface Module */ - -WRITE8_MEMBER( newbrain_eim_state::enrg2_w ) +READ_LINE_MEMBER( newbrain_state::tdi_r ) { - /* - - bit signal description - - 0 _USERP 0 enables user data bus interrupt and also parallel latched data output (or centronics printer) interrupt - 1 ANP 1 enables ADC conversion complete interrupt and also calling indicator interrupt - 2 MLTMD 1 enables serial receive clock into multiplier input of DAC and signals data terminal not ready - 3 MSPD 1 enables 50K Baud serial data rate to be obtained ie. CTC input clock of 800 kHz. 0 selects xxx.692 kHz - 4 ENOR 1 enables serial receive clock to sound output summer, and also selects serial input from the printer port. 0 selects serial input from the comms port - 5 ANSW 1 enables second bank of 4 analogue inputs (voltage, non-ratiometric), ie. ch4-7, and enabled sound output, 0 selects ch03 - 6 ENOT 1 enables serial transmit clock to sound ouput summer, and also selects serial output to the printer port. 0 selects serial output to the comms port - 7 9th output bit for centronics printer port - - */ - - m_enrg2 = data; + return tpin() ^ m_cop_tdo; } -WRITE8_MEMBER( newbrain_eim_state::pr_w ) -{ - /* - bit signal description - 0 HP0 - 1 HP1 - 2 HP2 - 3 HP3 - 4 HP4 - 5 HP5 - 6 HP6 - 7 HP11 +//************************************************************************** +// ADDRESS MAPS +//************************************************************************** - HP0-HP2 are decoded to _ROM0..._ROM7 signals - HP3-HP4 are decoded to _CH0..._CH3 signals +//------------------------------------------------- +// ADDRESS_MAP( newbrain_mreq ) +//------------------------------------------------- - */ - - int page = (BIT(offset, 12) >> 9) | (BIT(offset, 15) >> 13) | (BIT(offset, 14) >> 13) | (BIT(offset, 13) >> 13); - int bank = (BIT(offset, 11) >> 3) | (data & 0x7f); - - m_pr[page] = bank; - - bankswitch(); -} - -READ8_MEMBER( newbrain_eim_state::user_r ) -{ - m_user = 0xff; - - return 0xff; -} - -WRITE8_MEMBER( newbrain_eim_state::user_w ) -{ - m_user = data; -} - -READ8_MEMBER( newbrain_eim_state::anout_r ) -{ - return 0xff; -} - -WRITE8_MEMBER( newbrain_eim_state::anout_w ) -{ -} - -READ8_MEMBER( newbrain_eim_state::anin_r ) -{ -// int channel = offset & 0x03; - - return 0; -} - -WRITE8_MEMBER( newbrain_eim_state::anio_w ) -{ -// int channel = offset & 0x03; -} - -READ8_MEMBER( newbrain_eim_state::st0_r ) -{ - /* - - bit signal description - - 0 fixed at 1 - indicates excess of 24 or 48, obsolete - 1 PWRUP 1 indicates power up from 'cold' - necessary in battery machines with power switching - 2 1 indicates analogue or calling indicator interrupts - 3 _USRINT0 0 indicates centronics printer (latched output data) port interrupt - 4 _USRINT 0 indicates parallel data bus port interrupt - 5 _CLKINT 0 indicates frame frequency clock interrupt - 6 _ACINT 0 indicates ACIA interrupt - 7 _COPINT 0 indicates interrupt from micro-controller COP420M - - */ - - return (m_copint << 7) | (m_aciaint << 6) | (m_clkint << 5) | (m_userint << 4) | (m_userint0 << 3) | (m_pwrup) << 1 | 0x01; -} - -READ8_MEMBER( newbrain_eim_state::st1_r ) -{ - /* - - bit signal description - - 0 - 1 - 2 N/_RV 1 selects normal video on power up (white on black), 0 selects reversed video (appears as D0 on the first 200 EI's) - 3 ANCH 1 indicates power is being taken from the mains supply - 4 40/_80 1 indicates that 40 column video is selected on power up. 0 selects 80 column video - 5 - 6 TVCNSL 1 indicates that a video display is required on power up - 7 - - */ - - return (m_tvcnsl << 6) | 0x10 | 0x08 | 0x04; -} - -READ8_MEMBER( newbrain_eim_state::st2_r ) -{ - /* - - bit signal description - - 0 received serial data from communications port - 1 0 indicates 'clear-to-send' condition at communications port - 2 - 3 - 4 - 5 logic level tape input - 6 - 7 0 indicates 'clear-to-send' condition at printer port - - */ - - return 0; -} - -READ8_MEMBER( newbrain_eim_state::usbs_r ) -{ - return 0xff; -} - -WRITE8_MEMBER( newbrain_eim_state::usbs_w ) -{ -} - -WRITE8_MEMBER( newbrain_eim_state::paging_w ) -{ - if (BIT(offset, 8)) - { - // expansion interface module - - /* - - bit signal description - - 0 PG 1 enables paging circuits - 1 WPL unused - 2 A16 1 sets local A16 to 1 (ie. causes second set of 8 page registers to select addressed memory) - 3 _MPM 0 selects multi-processing mode. among other effects this extends the page registers from 8 to 12 bits in length - 4 HISLT 1 isolates the local machine. this is used in multi-processing mode - 5 - 6 - 7 - - */ - - m_paging = BIT(data, 0); - m_a16 = BIT(data, 2); - m_mpm = BIT(data, 3); - } - else if (BIT(offset, 9)) - { - // disc controller - - /* - - bit signal description - - 0 PAGING 1 enables paging circuits - 1 - 2 HA16 1 sets local A16 to 1 (ie. causes second set of 8 page registers to select addressed memory) - 3 MPM 0 selects multi-processing mode. among other effects this extends the page registers from 8 to 12 bits in length - 4 - 5 _FDC RESET - 6 - 7 FDC ATT - - */ - - m_fdccpu->set_input_line(INPUT_LINE_RESET, BIT(data, 5) ? HOLD_LINE : CLEAR_LINE); - - m_paging = BIT(data, 0); - m_a16 = BIT(data, 2); - m_mpm = BIT(data, 3); - m_fdc_att = BIT(data, 7); - } - else if (BIT(offset, 10)) - { - // network controller - } -} - -/* A/D Converter */ - -WRITE_LINE_MEMBER( newbrain_eim_state::adc_eoc_w ) -{ - m_anint = state; -} - -ADC0808_ANALOG_READ_CB( newbrain_eim_state::adc_vref_pos_r ) -{ - return 5.0; -} - -ADC0808_ANALOG_READ_CB( newbrain_eim_state::adc_vref_neg_r ) -{ - return 0.0; -} - -ADC0808_ANALOG_READ_CB( newbrain_eim_state::adc_input_r ) -{ - return 0.0; -} - -/* Memory Maps */ - -static ADDRESS_MAP_START( newbrain_map, AS_PROGRAM, 8, newbrain_state ) +static ADDRESS_MAP_START( newbrain_mreq, AS_PROGRAM, 8, newbrain_state ) ADDRESS_MAP_UNMAP_HIGH - AM_RANGE(0x0000, 0x1fff) AM_RAMBANK("bank1") - AM_RANGE(0x2000, 0x3fff) AM_RAMBANK("bank2") - AM_RANGE(0x4000, 0x5fff) AM_RAMBANK("bank3") - AM_RANGE(0x6000, 0x7fff) AM_RAMBANK("bank4") - AM_RANGE(0x8000, 0x9fff) AM_RAMBANK("bank5") - AM_RANGE(0xa000, 0xbfff) AM_RAMBANK("bank6") - AM_RANGE(0xc000, 0xdfff) AM_RAMBANK("bank7") - AM_RANGE(0xe000, 0xffff) AM_RAMBANK("bank8") + AM_RANGE(0x0000, 0xffff) AM_READWRITE(mreq_r, mreq_w) ADDRESS_MAP_END -static ADDRESS_MAP_START( newbrain_ei_io_map, AS_IO, 8, newbrain_eim_state ) + +//------------------------------------------------- +// ADDRESS_MAP( newbrain_iorq ) +//------------------------------------------------- + +static ADDRESS_MAP_START( newbrain_iorq, AS_IO, 8, newbrain_state ) ADDRESS_MAP_UNMAP_HIGH - AM_RANGE(0x00, 0x00) AM_MIRROR(0xff00) AM_READWRITE(clusr_r, clusr_w) - AM_RANGE(0x01, 0x01) AM_MIRROR(0xff00) AM_WRITE(enrg2_w) - AM_RANGE(0x02, 0x02) AM_MIRROR(0xff00) AM_MASK(0xff00) AM_WRITE(pr_w) - AM_RANGE(0x03, 0x03) AM_MIRROR(0xff00) AM_READWRITE(user_r, user_w) - AM_RANGE(0x04, 0x04) AM_MIRROR(0xff00) AM_READWRITE(clclk_r, clclk_w) - AM_RANGE(0x05, 0x05) AM_MIRROR(0xff00) AM_READWRITE(anout_r, anout_w) - AM_RANGE(0x06, 0x06) AM_MIRROR(0xff00) AM_READWRITE(cop_r, cop_w) - AM_RANGE(0x07, 0x07) AM_MIRROR(0xff00) AM_WRITE(enrg1_w) - AM_RANGE(0x08, 0x09) AM_MIRROR(0xff02) AM_READWRITE(tvl_r, tvl_w) - AM_RANGE(0x0c, 0x0c) AM_MIRROR(0xff03) AM_WRITE(tvctl_w) - AM_RANGE(0x10, 0x13) AM_MIRROR(0xff00) AM_READWRITE(anin_r, anio_w) - AM_RANGE(0x14, 0x14) AM_MIRROR(0xff00) AM_READ(st0_r) - AM_RANGE(0x15, 0x15) AM_MIRROR(0xff00) AM_READ(st1_r) - AM_RANGE(0x16, 0x16) AM_MIRROR(0xff00) AM_READ(st2_r) - AM_RANGE(0x17, 0x17) AM_MIRROR(0xff00) AM_READWRITE(usbs_r, usbs_w) - AM_RANGE(0x18, 0x18) AM_MIRROR(0xff00) AM_DEVREADWRITE(MC6850_TAG, acia6850_device, status_r, control_w) - AM_RANGE(0x19, 0x19) AM_MIRROR(0xff00) AM_DEVREADWRITE(MC6850_TAG, acia6850_device, data_r, data_w) - AM_RANGE(0x1c, 0x1f) AM_MIRROR(0xff00) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_device, read, write) - AM_RANGE(0xff, 0xff) AM_MIRROR(0xff00) AM_MASK(0xff00) AM_WRITE(paging_w) + AM_RANGE(0x0000, 0xffff) AM_READWRITE(iorq_r, iorq_w) ADDRESS_MAP_END -static ADDRESS_MAP_START( newbrain_a_io_map, AS_IO, 8, newbrain_state ) - ADDRESS_MAP_UNMAP_HIGH - AM_RANGE(0x00, 0x00) AM_MIRROR(0xffc0) AM_READWRITE(clusr_r, clusr_w) - AM_RANGE(0x03, 0x03) AM_MIRROR(0xffc0) AM_WRITE(user_w) - AM_RANGE(0x04, 0x04) AM_MIRROR(0xffc0) AM_READWRITE(clclk_r, clclk_w) - AM_RANGE(0x06, 0x06) AM_MIRROR(0xffc0) AM_READWRITE(cop_r, cop_w) - AM_RANGE(0x07, 0x07) AM_MIRROR(0xffc0) AM_WRITE(a_enrg1_w) - AM_RANGE(0x08, 0x09) AM_MIRROR(0xffc2) AM_READWRITE(tvl_r, tvl_w) - AM_RANGE(0x0c, 0x0c) AM_MIRROR(0xffc3) AM_WRITE(tvctl_w) - AM_RANGE(0x14, 0x14) AM_MIRROR(0xffc3) AM_READ(a_ust_r) - AM_RANGE(0x16, 0x16) AM_MIRROR(0xffc0) AM_READ(user_r) -ADDRESS_MAP_END -static ADDRESS_MAP_START( newbrain_fdc_map, AS_PROGRAM, 8, newbrain_eim_state ) - ADDRESS_MAP_UNMAP_HIGH - AM_RANGE(0x0000, 0x1fff) AM_ROM -ADDRESS_MAP_END -static ADDRESS_MAP_START( newbrain_fdc_io_map, AS_IO, 8, newbrain_eim_state ) - ADDRESS_MAP_UNMAP_HIGH - ADDRESS_MAP_GLOBAL_MASK(0xff) - AM_RANGE(0x00, 0x01) AM_DEVICE(UPD765_TAG, upd765a_device, map) - AM_RANGE(0x20, 0x20) AM_WRITE(fdc_auxiliary_w) - AM_RANGE(0x40, 0x40) AM_READ(fdc_control_r) -ADDRESS_MAP_END +//************************************************************************** +// INPUT PORTS +//************************************************************************** -/* Input Ports */ +//------------------------------------------------- +// INPUT_PORTS( newbrain ) +//------------------------------------------------- static INPUT_PORTS_START( newbrain ) PORT_START("Y0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("STOP") PORT_CODE(KEYCODE_END) PORT_CHAR(UCHAR_MAMEKEY(END)) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("STOP") PORT_CODE(KEYCODE_END) PORT_CHAR(UCHAR_MAMEKEY(END)) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("Y1") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_DOWN) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_RIGHT) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_UP) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(UTF8_DOWN) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(UTF8_RIGHT) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(UTF8_UP) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) PORT_START("Y2") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CHAR('8') - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CHAR('8') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') PORT_START("Y3") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_CHAR('9') - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_CHAR('9') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') PORT_START("Y4") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CHAR('0') - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CHAR('0') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') PORT_START("Y5") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('(') PORT_CHAR('[') - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('(') PORT_CHAR('[') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') PORT_START("Y6") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR(')') PORT_CHAR(']') - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR(')') PORT_CHAR(']') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') PORT_START("Y7") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("* \xC2\xA3") PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('*') PORT_CHAR(0x00A3) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("* \xC2\xA3") PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('*') PORT_CHAR(0x00A3) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') PORT_START("Y8") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("VIDEO TEXT") PORT_CODE(KEYCODE_RALT) PORT_CHAR(UCHAR_MAMEKEY(RALT)) // Vd - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("VIDEO TEXT") PORT_CODE(KEYCODE_RALT) PORT_CHAR(UCHAR_MAMEKEY(RALT)) // Vd + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') PORT_START("Y9") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') PORT_START("Y10") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('@') - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('@') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') PORT_START("Y11") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('-') PORT_CHAR('\\') - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('-') PORT_CHAR('\\') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') PORT_START("Y12") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('+') PORT_CHAR('^') - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("INSERT") PORT_CODE(KEYCODE_INSERT) PORT_CHAR(UCHAR_MAMEKEY(INSERT)) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('+') PORT_CHAR('^') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("INSERT") PORT_CODE(KEYCODE_INSERT) PORT_CHAR(UCHAR_MAMEKEY(INSERT)) PORT_START("Y13") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("NEW LINE") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) // NL - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("NEW LINE") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) // NL + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') PORT_START("Y14") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("SPACE") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("HOME") PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(HOME)) // CH + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("SPACE") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("HOME") PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(HOME)) // CH PORT_START("Y15") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("SHIFT") PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // SH - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("GRAPHICS") PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(LALT)) // GR - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("REPEAT") // RPT - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("CONTROL") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL)) // GL + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("SHIFT") PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // SH + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("GRAPHICS") PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(LALT)) // GR + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("REPEAT") // RPT + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("CONTROL") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL)) // GL INPUT_PORTS_END -/* Machine Initialization */ -WRITE_LINE_MEMBER( newbrain_eim_state::acia_tx ) -{ - m_acia_txd = state; -} -WRITE_LINE_MEMBER( newbrain_eim_state::acia_interrupt ) -{ - m_aciaint = state; -} +//************************************************************************** +// MACHINE INITIALIZATION +//************************************************************************** -WRITE_LINE_MEMBER( newbrain_eim_state::fdc_interrupt ) -{ - m_fdc_int = state; -} - -WRITE_LINE_MEMBER( newbrain_eim_state::ctc_z2_w ) -{ - /* connected to CTC channel 0/1 clock inputs */ - m_ctc->trg0(state); - m_ctc->trg1(state); -} - -TIMER_DEVICE_CALLBACK_MEMBER(newbrain_eim_state::ctc_c2_tick) -{ - m_ctc->trg2(1); - m_ctc->trg2(0); -} - -inline int newbrain_state::get_reset_t() +int newbrain_state::get_reset_t() { return RES_K(220) * CAP_U(10) * 1000; // t = R128 * C125 = 2.2s } -inline int newbrain_state::get_pwrup_t() +int newbrain_state::get_pwrup_t() { return RES_K(560) * CAP_U(10) * 1000; // t = R129 * C127 = 5.6s } +INTERRUPT_GEN_MEMBER(newbrain_state::newbrain_interrupt) +{ + if (!m_clk) + { + m_clkint = 0; + check_interrupt(); + } +} + + +//------------------------------------------------- +// machine_start - +//------------------------------------------------- + +void newbrain_state::machine_start() +{ + // set power up timer + timer_set(attotime::from_usec(get_pwrup_t()), TIMER_ID_PWRUP); + + // state saving + save_item(NAME(m_clk)); + save_item(NAME(m_tvp)); + save_item(NAME(m_pwrup)); + save_item(NAME(m_clkint)); + save_item(NAME(m_copint)); + save_item(NAME(m_cop_so)); + save_item(NAME(m_cop_tdo)); + save_item(NAME(m_cop_g1)); + save_item(NAME(m_cop_g3)); + save_item(NAME(m_cop_k6)); + save_item(NAME(m_keylatch)); + save_item(NAME(m_keydata)); + save_item(NAME(m_segment_data)); +} + + +//------------------------------------------------- +// machine_reset - +//------------------------------------------------- + +void newbrain_state::machine_reset() +{ + m_maincpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); + m_cop->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); + + timer_set(attotime::from_usec(get_reset_t()), TIMER_ID_RESET); +} + + //------------------------------------------------- // device_timer - handler timer events //------------------------------------------------- @@ -1181,313 +778,143 @@ void newbrain_state::device_timer(emu_timer &timer, device_timer_id id, int para switch (id) { case TIMER_ID_RESET: + if (LOG) logerror("%s %s RESET 1\n", machine().time().as_string(), machine().describe_context()); + m_maincpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); - m_copcpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); + m_cop->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); break; case TIMER_ID_PWRUP: - m_pwrup = 0; - bankswitch(); + if (LOG) logerror("%s %s PWRUP 1\n", machine().time().as_string(), machine().describe_context()); + + m_pwrup = 1; break; } } -void newbrain_state::machine_start() -{ - m_copregint = 1; - /* set power up timer */ - timer_set(attotime::from_usec(get_pwrup_t()), TIMER_ID_PWRUP); - /* initialize variables */ - m_pwrup = 1; - m_userint = 1; - m_userint0 = 1; - m_clkint = 1; - m_aciaint = 1; - m_copint = 1; - m_bee = 1; - m_tvcnsl = 1; +//************************************************************************** +// MACHINE DRIVERS +//************************************************************************** - /* set up memory banking */ - bankswitch(); +//------------------------------------------------- +// MACHINE_CONFIG( newbrain ) +//------------------------------------------------- - // find keyboard rows - m_key_row[0] = m_y0; - m_key_row[1] = m_y1; - m_key_row[2] = m_y2; - m_key_row[3] = m_y3; - m_key_row[4] = m_y4; - m_key_row[5] = m_y5; - m_key_row[6] = m_y6; - m_key_row[7] = m_y7; - m_key_row[8] = m_y8; - m_key_row[9] = m_y9; - m_key_row[10] = m_y10; - m_key_row[11] = m_y11; - m_key_row[12] = m_y12; - m_key_row[13] = m_y13; - m_key_row[14] = m_y14; - m_key_row[15] = m_y15; - - /* register for state saving */ - save_item(NAME(m_pwrup)); - save_item(NAME(m_userint)); - save_item(NAME(m_userint0)); - save_item(NAME(m_clkint)); - save_item(NAME(m_aciaint)); - save_item(NAME(m_copint)); - save_item(NAME(m_anint)); - save_item(NAME(m_bee)); - save_item(NAME(m_enrg1)); - save_item(NAME(m_enrg2)); - save_item(NAME(m_cop_bus)); - save_item(NAME(m_cop_so)); - save_item(NAME(m_cop_tdo)); - save_item(NAME(m_cop_tdi)); - save_item(NAME(m_cop_rd)); - save_item(NAME(m_cop_wr)); - save_item(NAME(m_cop_access)); - save_item(NAME(m_keylatch)); - save_item(NAME(m_keydata)); - save_item(NAME(m_user)); -} - -void newbrain_eim_state::machine_start() -{ - newbrain_state::machine_start(); - - /* allocate expansion RAM */ - m_eim_ram.allocate(NEWBRAIN_EIM_RAM_SIZE); - - /* register for state saving */ - save_item(NAME(m_mpm)); - save_item(NAME(m_a16)); - save_item(NAME(m_pr)); - save_item(NAME(m_fdc_int)); - save_item(NAME(m_fdc_att)); - save_item(NAME(m_paging)); -} - -void newbrain_state::machine_reset() -{ - timer_set(attotime::from_usec(get_reset_t()), TIMER_ID_RESET); -} - -INTERRUPT_GEN_MEMBER(newbrain_state::newbrain_interrupt) -{ - if (!(m_enrg1 & NEWBRAIN_ENRG1_CLK)) - { - m_clkint = 0; - check_interrupt(); - } -} - -/* Machine Drivers */ - -/* F4 Character Displayer */ -static const gfx_layout newbrain_charlayout = -{ - 8, 10, /* 8 x 10 characters */ - 256, /* 256 characters */ - 1, /* 1 bits per pixel */ - { 0 }, /* no bitplanes */ - /* x offsets */ - { 0, 1, 2, 3, 4, 5, 6, 7 }, - /* y offsets */ - { 0*256*8, 1*256*8, 2*256*8, 3*256*8, 4*256*8, 5*256*8, 6*256*8, 7*256*8, 8*256*8, 9*256*8, 10*256*8, 11*256*8, 12*256*8, 13*256*8, 14*256*8, 15*256*8 }, - 8 /* every char takes 16 x 1 bytes */ -}; - -static GFXDECODE_START( newbrain ) - GFXDECODE_ENTRY( "chargen", 0x0000, newbrain_charlayout, 0, 1 ) -GFXDECODE_END - -static MACHINE_CONFIG_START( newbrain_a, newbrain_state ) +static MACHINE_CONFIG_START( newbrain, newbrain_state ) // basic system hardware MCFG_CPU_ADD(Z80_TAG, Z80, XTAL_16MHz/8) - MCFG_CPU_PROGRAM_MAP(newbrain_map) - MCFG_CPU_IO_MAP(newbrain_a_io_map) - MCFG_CPU_VBLANK_INT_DRIVER(SCREEN_TAG, newbrain_state, newbrain_interrupt) + MCFG_CPU_PROGRAM_MAP(newbrain_mreq) + MCFG_CPU_IO_MAP(newbrain_iorq) + MCFG_CPU_VBLANK_INT_DRIVER(SCREEN_TAG, newbrain_state, newbrain_interrupt) // TODO remove me MCFG_CPU_ADD(COP420_TAG, COP420, XTAL_16MHz/8) // COP420-GUW/N - MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED ) - MCFG_COP400_READ_L_CB(READ8(newbrain_state, cop_l_r)) - MCFG_COP400_WRITE_L_CB(WRITE8(newbrain_state, cop_l_w)) + MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true) MCFG_COP400_READ_G_CB(READ8(newbrain_state, cop_g_r)) MCFG_COP400_WRITE_G_CB(WRITE8(newbrain_state, cop_g_w)) MCFG_COP400_WRITE_D_CB(WRITE8(newbrain_state, cop_d_w)) MCFG_COP400_READ_IN_CB(READ8(newbrain_state, cop_in_r)) - MCFG_COP400_WRITE_SK_CB(WRITELINE(newbrain_state, cop_sk_w)) - MCFG_COP400_READ_SI_CB(READLINE(newbrain_state, cop_si_r)) - MCFG_COP400_WRITE_SO_CB(WRITELINE(newbrain_state, cop_so_w)) - - MCFG_GFXDECODE_ADD("gfxdecode", "palette", newbrain) - - MCFG_TIMER_DRIVER_ADD_PERIODIC("cop_regint", newbrain_state, cop_regint_tick, attotime::from_usec(12500)) + MCFG_COP400_WRITE_SO_CB(WRITELINE(newbrain_state, k1_w)) + MCFG_COP400_WRITE_SK_CB(WRITELINE(newbrain_state, k2_w)) + MCFG_COP400_READ_SI_CB(READLINE(newbrain_state, tdi_r)) // video hardware MCFG_FRAGMENT_ADD(newbrain_video) // devices - MCFG_CASSETTE_ADD("cassette") + MCFG_NEWBRAIN_EXPANSION_SLOT_ADD(NEWBRAIN_EXPANSION_SLOT_TAG, XTAL_16MHz/8, newbrain_expansion_cards, "eim") + + MCFG_CASSETTE_ADD(CASSETTE_TAG) MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_MOTOR_ENABLED | CASSETTE_SPEAKER_MUTED) - MCFG_CASSETTE_ADD("cassette2") + MCFG_CASSETTE_ADD(CASSETTE2_TAG) MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_MOTOR_ENABLED | CASSETTE_SPEAKER_MUTED) + MCFG_RS232_PORT_ADD(RS232_V24_TAG, default_rs232_devices, nullptr) + MCFG_RS232_PORT_ADD(RS232_PRN_TAG, default_rs232_devices, nullptr) + // internal ram MCFG_RAM_ADD(RAM_TAG) MCFG_RAM_DEFAULT_SIZE("32K") MACHINE_CONFIG_END -static SLOT_INTERFACE_START( newbrain_floppies ) - SLOT_INTERFACE( "525dd", FLOPPY_525_DD ) -SLOT_INTERFACE_END -static MACHINE_CONFIG_DERIVED_CLASS( newbrain_eim, newbrain_a, newbrain_eim_state ) - // basic system hardware - MCFG_CPU_MODIFY(Z80_TAG) - MCFG_CPU_IO_MAP(newbrain_ei_io_map) - MCFG_CPU_ADD(FDC_Z80_TAG, Z80, XTAL_4MHz) - MCFG_CPU_PROGRAM_MAP(newbrain_fdc_map) - MCFG_CPU_IO_MAP(newbrain_fdc_io_map) +//************************************************************************** +// ROMS +//************************************************************************** - // devices - MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_16MHz/8) - MCFG_Z80CTC_ZC0_CB(DEVWRITELINE(MC6850_TAG, acia6850_device, write_rxc)) - MCFG_Z80CTC_ZC1_CB(DEVWRITELINE(MC6850_TAG, acia6850_device, write_txc)) - MCFG_Z80CTC_ZC2_CB(WRITELINE(newbrain_eim_state, ctc_z2_w)) - - MCFG_TIMER_DRIVER_ADD_PERIODIC("z80ctc_c2", newbrain_eim_state, ctc_c2_tick, attotime::from_hz(XTAL_16MHz/4/13)) - MCFG_DEVICE_ADD(ADC0809_TAG, ADC0808, 500000) - MCFG_ADC0808_OUT_EOC_CB(WRITELINE(newbrain_eim_state, adc_eoc_w)) - MCFG_ADC0808_IN_VREF_POS_CB(newbrain_eim_state, adc_vref_pos_r) - MCFG_ADC0808_IN_VREF_NEG_CB(newbrain_eim_state, adc_vref_neg_r) - MCFG_ADC0808_IN_IN_0_CB(newbrain_eim_state, adc_input_r) - MCFG_ADC0808_IN_IN_1_CB(newbrain_eim_state, adc_input_r) - MCFG_ADC0808_IN_IN_2_CB(newbrain_eim_state, adc_input_r) - MCFG_ADC0808_IN_IN_3_CB(newbrain_eim_state, adc_input_r) - MCFG_ADC0808_IN_IN_4_CB(newbrain_eim_state, adc_input_r) - MCFG_ADC0808_IN_IN_5_CB(newbrain_eim_state, adc_input_r) - MCFG_ADC0808_IN_IN_6_CB(newbrain_eim_state, adc_input_r) - MCFG_ADC0808_IN_IN_7_CB(newbrain_eim_state, adc_input_r) - - MCFG_DEVICE_ADD(MC6850_TAG, ACIA6850, 0) - MCFG_ACIA6850_TXD_HANDLER(WRITELINE(newbrain_eim_state, acia_tx)) - MCFG_ACIA6850_IRQ_HANDLER(WRITELINE(newbrain_eim_state, acia_interrupt)) - - MCFG_UPD765A_ADD(UPD765_TAG, false, true) - MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", newbrain_floppies, "525dd", floppy_image_device::default_floppy_formats) - MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", newbrain_floppies, "525dd", floppy_image_device::default_floppy_formats) - - // internal ram - MCFG_RAM_MODIFY(RAM_TAG) - MCFG_RAM_DEFAULT_SIZE("96K") -MACHINE_CONFIG_END - -/* ROMs */ +//------------------------------------------------- +// ROM( newbrain ) +//------------------------------------------------- ROM_START( newbrain ) - ROM_REGION( 0x10000, Z80_TAG, 0 ) + ROM_REGION( 0x6000, Z80_TAG, 0 ) ROM_DEFAULT_BIOS( "rom20" ) ROM_SYSTEM_BIOS( 0, "issue1", "Issue 1 (v?)" ) - ROMX_LOAD( "aben.ic6", 0xa000, 0x2000, CRC(308f1f72) SHA1(a6fd9945a3dca47636887da2125fde3f9b1d4e25), ROM_BIOS(1) ) - ROMX_LOAD( "cd iss 1.ic7", 0xc000, 0x2000, CRC(6b4d9429) SHA1(ef688be4e75aced61f487c928258c8932a0ae00a), ROM_BIOS(1) ) - ROMX_LOAD( "ef iss 1.ic8", 0xe000, 0x2000, CRC(20dd0b49) SHA1(74b517ca223cefb588e9f49e72ff2d4f1627efc6), ROM_BIOS(1) ) + ROMX_LOAD( "aben.ic6", 0x0000, 0x2000, CRC(308f1f72) SHA1(a6fd9945a3dca47636887da2125fde3f9b1d4e25), ROM_BIOS(1) ) + ROMX_LOAD( "cd iss 1.ic7", 0x2000, 0x2000, CRC(6b4d9429) SHA1(ef688be4e75aced61f487c928258c8932a0ae00a), ROM_BIOS(1) ) + ROMX_LOAD( "ef iss 1.ic8", 0x4000, 0x2000, CRC(20dd0b49) SHA1(74b517ca223cefb588e9f49e72ff2d4f1627efc6), ROM_BIOS(1) ) ROM_SYSTEM_BIOS( 1, "issue2", "Issue 2 (v1.9)" ) - ROMX_LOAD( "aben19.ic6", 0xa000, 0x2000, CRC(d0283eb1) SHA1(351d248e69a77fa552c2584049006911fb381ff0), ROM_BIOS(2) ) - ROMX_LOAD( "cdi2.ic7", 0xc000, 0x2000, CRC(6b4d9429) SHA1(ef688be4e75aced61f487c928258c8932a0ae00a), ROM_BIOS(2) ) - ROMX_LOAD( "ef iss 1.ic8", 0xe000, 0x2000, CRC(20dd0b49) SHA1(74b517ca223cefb588e9f49e72ff2d4f1627efc6), ROM_BIOS(2) ) + ROMX_LOAD( "aben19.ic6", 0x0000, 0x2000, CRC(d0283eb1) SHA1(351d248e69a77fa552c2584049006911fb381ff0), ROM_BIOS(2) ) + ROMX_LOAD( "cdi2.ic7", 0x2000, 0x2000, CRC(6b4d9429) SHA1(ef688be4e75aced61f487c928258c8932a0ae00a), ROM_BIOS(2) ) + ROMX_LOAD( "ef iss 1.ic8", 0x4000, 0x2000, CRC(20dd0b49) SHA1(74b517ca223cefb588e9f49e72ff2d4f1627efc6), ROM_BIOS(2) ) ROM_SYSTEM_BIOS( 2, "issue3", "Issue 3 (v1.91)" ) - ROMX_LOAD( "aben191.ic6", 0xa000, 0x2000, CRC(b7be8d89) SHA1(cce8d0ae7aa40245907ea38b7956c62d039d45b7), ROM_BIOS(3) ) - ROMX_LOAD( "cdi3.ic7", 0xc000, 0x2000, CRC(6b4d9429) SHA1(ef688be4e75aced61f487c928258c8932a0ae00a), ROM_BIOS(3) ) - ROMX_LOAD( "ef iss 1.ic8", 0xe000, 0x2000, CRC(20dd0b49) SHA1(74b517ca223cefb588e9f49e72ff2d4f1627efc6), ROM_BIOS(3) ) + ROMX_LOAD( "aben191.ic6", 0x0000, 0x2000, CRC(b7be8d89) SHA1(cce8d0ae7aa40245907ea38b7956c62d039d45b7), ROM_BIOS(3) ) + ROMX_LOAD( "cdi3.ic7", 0x2000, 0x2000, CRC(6b4d9429) SHA1(ef688be4e75aced61f487c928258c8932a0ae00a), ROM_BIOS(3) ) + ROMX_LOAD( "ef iss 1.ic8", 0x4000, 0x2000, CRC(20dd0b49) SHA1(74b517ca223cefb588e9f49e72ff2d4f1627efc6), ROM_BIOS(3) ) ROM_SYSTEM_BIOS( 3, "series2", "Series 2 (v?)" ) - ROMX_LOAD( "abs2.ic6", 0xa000, 0x2000, CRC(9a042acb) SHA1(80d83a2ea3089504aa68b6cf978d80d296cd9bda), ROM_BIOS(4) ) - ROMX_LOAD( "cds2.ic7", 0xc000, 0x2000, CRC(6b4d9429) SHA1(ef688be4e75aced61f487c928258c8932a0ae00a), ROM_BIOS(4) ) - ROMX_LOAD( "efs2.ic8", 0xe000, 0x2000, CRC(b222d798) SHA1(c0c816b4d4135b762f2c5f1b24209d0096f22e56), ROM_BIOS(4) ) + ROMX_LOAD( "abs2.ic6", 0x0000, 0x2000, CRC(9a042acb) SHA1(80d83a2ea3089504aa68b6cf978d80d296cd9bda), ROM_BIOS(4) ) + ROMX_LOAD( "cds2.ic7", 0x2000, 0x2000, CRC(6b4d9429) SHA1(ef688be4e75aced61f487c928258c8932a0ae00a), ROM_BIOS(4) ) + ROMX_LOAD( "efs2.ic8", 0x4000, 0x2000, CRC(b222d798) SHA1(c0c816b4d4135b762f2c5f1b24209d0096f22e56), ROM_BIOS(4) ) ROM_SYSTEM_BIOS( 4, "rom20", "? (v2.0)" ) - ROMX_LOAD( "aben20.rom", 0xa000, 0x2000, CRC(3d76d0c8) SHA1(753b4530a518ad832e4b81c4e5430355ba3f62e0), ROM_BIOS(5) ) - ROMX_LOAD( "cd20tci.rom", 0xc000, 0x4000, CRC(f65b2350) SHA1(1ada7fbf207809537ec1ffb69808524300622ada), ROM_BIOS(5) ) + ROMX_LOAD( "aben20.rom", 0x0000, 0x2000, CRC(3d76d0c8) SHA1(753b4530a518ad832e4b81c4e5430355ba3f62e0), ROM_BIOS(5) ) + ROMX_LOAD( "cd20tci.rom", 0x2000, 0x4000, CRC(f65b2350) SHA1(1ada7fbf207809537ec1ffb69808524300622ada), ROM_BIOS(5) ) ROM_REGION( 0x400, COP420_TAG, 0 ) - ROM_LOAD( "cop420.419", 0x000, 0x400, NO_DUMP ) + ROM_LOAD( "cop420.419", 0x000, 0x400, CRC(a1388ee7) SHA1(5822e16aa794545600bf7a9dbee2ef467ca2a3e0) ) ROM_REGION( 0x1000, "chargen", ROMREGION_ERASE00 ) - ROM_LOAD( "char eprom iss 1.ic453", 0x0000, 0x0a01, BAD_DUMP CRC(46ecbc65) SHA1(3fe064d49a4de5e3b7383752e98ad35a674e26dd) ) // 8248R7 + ROM_LOAD( "char eprom iss 1.ic453", 0x0000, 0x0a01, CRC(46ecbc65) SHA1(3fe064d49a4de5e3b7383752e98ad35a674e26dd) ) // 8248R7 bad dump! ROM_END + +//------------------------------------------------- +// ROM( newbraina ) +//------------------------------------------------- + #define rom_newbraina rom_newbrain -ROM_START( newbraineim ) - ROM_REGION( 0x10000, Z80_TAG, 0 ) - ROM_DEFAULT_BIOS( "rom20" ) - ROM_SYSTEM_BIOS( 0, "issue1", "Issue 1 (v?)" ) - ROMX_LOAD( "aben.ic6", 0xa000, 0x2000, CRC(308f1f72) SHA1(a6fd9945a3dca47636887da2125fde3f9b1d4e25), ROM_BIOS(1) ) - ROMX_LOAD( "cd iss 1.ic7", 0xc000, 0x2000, CRC(6b4d9429) SHA1(ef688be4e75aced61f487c928258c8932a0ae00a), ROM_BIOS(1) ) - ROMX_LOAD( "ef iss 1.ic8", 0xe000, 0x2000, CRC(20dd0b49) SHA1(74b517ca223cefb588e9f49e72ff2d4f1627efc6), ROM_BIOS(1) ) - - ROM_SYSTEM_BIOS( 1, "issue2", "Issue 2 (v1.9)" ) - ROMX_LOAD( "aben19.ic6", 0xa000, 0x2000, CRC(d0283eb1) SHA1(351d248e69a77fa552c2584049006911fb381ff0), ROM_BIOS(2) ) - ROMX_LOAD( "cdi2.ic7", 0xc000, 0x2000, CRC(6b4d9429) SHA1(ef688be4e75aced61f487c928258c8932a0ae00a), ROM_BIOS(2) ) - ROMX_LOAD( "ef iss 1.ic8", 0xe000, 0x2000, CRC(20dd0b49) SHA1(74b517ca223cefb588e9f49e72ff2d4f1627efc6), ROM_BIOS(2) ) - - ROM_SYSTEM_BIOS( 2, "issue3", "Issue 3 (v1.91)" ) - ROMX_LOAD( "aben191.ic6", 0xa000, 0x2000, CRC(b7be8d89) SHA1(cce8d0ae7aa40245907ea38b7956c62d039d45b7), ROM_BIOS(3) ) - ROMX_LOAD( "cdi3.ic7", 0xc000, 0x2000, CRC(6b4d9429) SHA1(ef688be4e75aced61f487c928258c8932a0ae00a), ROM_BIOS(3) ) - ROMX_LOAD( "ef iss 1.ic8", 0xe000, 0x2000, CRC(20dd0b49) SHA1(74b517ca223cefb588e9f49e72ff2d4f1627efc6), ROM_BIOS(3) ) - - ROM_SYSTEM_BIOS( 3, "series2", "Series 2 (v?)" ) - ROMX_LOAD( "abs2.ic6", 0xa000, 0x2000, CRC(9a042acb) SHA1(80d83a2ea3089504aa68b6cf978d80d296cd9bda), ROM_BIOS(4) ) - ROMX_LOAD( "cds2.ic7", 0xc000, 0x2000, CRC(6b4d9429) SHA1(ef688be4e75aced61f487c928258c8932a0ae00a), ROM_BIOS(4) ) - ROMX_LOAD( "efs2.ic8", 0xe000, 0x2000, CRC(b222d798) SHA1(c0c816b4d4135b762f2c5f1b24209d0096f22e56), ROM_BIOS(4) ) - - ROM_SYSTEM_BIOS( 4, "rom20", "? (v2.0)" ) - ROMX_LOAD( "aben20.rom", 0xa000, 0x2000, CRC(3d76d0c8) SHA1(753b4530a518ad832e4b81c4e5430355ba3f62e0), ROM_BIOS(5) ) - ROMX_LOAD( "cd20tci.rom", 0xc000, 0x4000, CRC(f65b2350) SHA1(1ada7fbf207809537ec1ffb69808524300622ada), ROM_BIOS(5) ) - - ROM_REGION( 0x400, COP420_TAG, 0 ) - ROM_LOAD( "cop420.419", 0x000, 0x400, NO_DUMP ) - - ROM_REGION( 0x1000, "chargen", 0 ) - ROM_LOAD( "char eprom iss 1.ic453", 0x0000, 0x0a01, BAD_DUMP CRC(46ecbc65) SHA1(3fe064d49a4de5e3b7383752e98ad35a674e26dd) ) // 8248R7 - - ROM_REGION( 0x10000, "eim", 0 ) // Expansion Interface Module - ROM_LOAD( "e415-2.rom", 0x4000, 0x2000, CRC(5b0e390c) SHA1(0f99cae57af2e64f3f6b02e5325138d6ba015e72) ) - ROM_LOAD( "e415-3.rom", 0x4000, 0x2000, CRC(2f88bae5) SHA1(04e03f230f4b368027442a7c2084dae877f53713) ) // 18/8/83.aci - ROM_LOAD( "e416-3.rom", 0x6000, 0x2000, CRC(8b5099d8) SHA1(19b0cfce4c8b220eb1648b467f94113bafcb14e0) ) // 10/8/83.mtv - ROM_LOAD( "e417-2.rom", 0x8000, 0x2000, CRC(6a7afa20) SHA1(f90db4f8318777313a862b3d5bab83c2fd260010) ) - - ROM_REGION( 0x10000, FDC_Z80_TAG, 0 ) // Floppy Disk Controller - ROM_LOAD( "d413-2.rom", 0x0000, 0x2000, CRC(097591f1) SHA1(c2aa1d27d4f3a24ab0c8135df746a4a44201a7f4) ) - ROM_LOAD( "d417-1.rom", 0x0000, 0x2000, CRC(40fad31c) SHA1(5137be4cc026972c0ffd4fa6990e8583bdfce163) ) - ROM_LOAD( "d417-2.rom", 0x0000, 0x2000, CRC(e8bda8b9) SHA1(c85a76a5ff7054f4ef4a472ce99ebaed1abd269c) ) -ROM_END +//------------------------------------------------- +// ROM( newbrainmd ) +//------------------------------------------------- ROM_START( newbrainmd ) ROM_REGION( 0x10000, Z80_TAG, 0 ) - ROM_LOAD( "cdmd.rom", 0xc000, 0x2000, CRC(6b4d9429) SHA1(ef688be4e75aced61f487c928258c8932a0ae00a) ) - ROM_LOAD( "efmd.rom", 0xe000, 0x2000, CRC(20dd0b49) SHA1(74b517ca223cefb588e9f49e72ff2d4f1627efc6) ) + ROM_LOAD( "cdmd.rom", 0x2000, 0x2000, CRC(6b4d9429) SHA1(ef688be4e75aced61f487c928258c8932a0ae00a) ) + ROM_LOAD( "efmd.rom", 0x4000, 0x2000, CRC(20dd0b49) SHA1(74b517ca223cefb588e9f49e72ff2d4f1627efc6) ) ROM_REGION( 0x400, COP420_TAG, 0 ) - ROM_LOAD( "cop420.419", 0x000, 0x400, NO_DUMP ) + ROM_LOAD( "cop420.419", 0x000, 0x400, CRC(a1388ee7) SHA1(5822e16aa794545600bf7a9dbee2ef467ca2a3e0) ) ROM_REGION( 0x1000, "chargen", 0 ) ROM_LOAD( "char eprom iss 1.ic453", 0x0000, 0x0a01, BAD_DUMP CRC(46ecbc65) SHA1(3fe064d49a4de5e3b7383752e98ad35a674e26dd) ) // 8248R7 ROM_END -/* System Drivers */ + + +//************************************************************************** +// SYSTEM DRIVERS +//************************************************************************** // YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS -COMP( 1981, newbrain, 0, 0, newbrain_a, newbrain, driver_device, 0, "Grundy Business Systems Ltd", "NewBrain AD", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) -COMP( 1981, newbraineim,newbrain, 0, newbrain_eim, newbrain, driver_device, 0, "Grundy Business Systems Ltd", "NewBrain AD with Expansion Interface", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -COMP( 1981, newbraina, newbrain, 0, newbrain_a, newbrain, driver_device, 0, "Grundy Business Systems Ltd", "NewBrain A", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) -COMP( 1981, newbrainmd, newbrain, 0, newbrain_a, newbrain, driver_device, 0, "Grundy Business Systems Ltd", "NewBrain MD", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +COMP( 1981, newbrain, 0, 0, newbrain, newbrain, driver_device, 0, "Grundy Business Systems Ltd", "NewBrain AD", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE | MACHINE_NO_SOUND ) +COMP( 1981, newbraina, newbrain, 0, newbrain, newbrain, driver_device, 0, "Grundy Business Systems Ltd", "NewBrain A", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE | MACHINE_NO_SOUND ) +COMP( 1981, newbrainmd, newbrain, 0, newbrain, newbrain, driver_device, 0, "Grundy Business Systems Ltd", "NewBrain MD", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE | MACHINE_NO_SOUND ) diff --git a/src/mame/drivers/test_t400.cpp b/src/mame/drivers/test_t400.cpp index b577d3c77a4..4f1a755ae16 100644 --- a/src/mame/drivers/test_t400.cpp +++ b/src/mame/drivers/test_t400.cpp @@ -29,13 +29,13 @@ WRITE8_MEMBER( t400_test_suite_state::port_l_w ) static MACHINE_CONFIG_START( test_t410, t400_test_suite_state ) MCFG_CPU_ADD("maincpu", COP410, 1000000) - MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED ) + MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false ) MCFG_COP400_WRITE_L_CB(WRITE8(t400_test_suite_state, port_l_w)) MACHINE_CONFIG_END static MACHINE_CONFIG_START( test_t420, t400_test_suite_state ) MCFG_CPU_ADD("maincpu", COP420, 1000000) - MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED ) + MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true ) MCFG_COP400_WRITE_L_CB(WRITE8(t400_test_suite_state, port_l_w)) MACHINE_CONFIG_END diff --git a/src/mame/drivers/thayers.cpp b/src/mame/drivers/thayers.cpp index 88db79b9569..eb0bee157e7 100644 --- a/src/mame/drivers/thayers.cpp +++ b/src/mame/drivers/thayers.cpp @@ -780,7 +780,7 @@ static MACHINE_CONFIG_START( thayers, thayers_state ) MCFG_CPU_IO_MAP(thayers_io_map) MCFG_CPU_ADD("mcu", COP421, XTAL_4MHz/2) // COP421L-PCA/N - MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED ) + MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, false ) MCFG_COP400_READ_L_CB(READ8(thayers_state, cop_l_r)) MCFG_COP400_WRITE_L_CB(WRITE8(thayers_state, cop_l_w)) MCFG_COP400_READ_G_CB(READ8(thayers_state, cop_g_r)) diff --git a/src/mame/includes/newbrain.h b/src/mame/includes/newbrain.h index 72edaf3b451..be920d57c1b 100644 --- a/src/mame/includes/newbrain.h +++ b/src/mame/includes/newbrain.h @@ -7,51 +7,22 @@ #include "emu.h" +#include "bus/newbrain/exp.h" +#include "bus/rs232/rs232.h" #include "cpu/z80/z80.h" #include "cpu/z80/z80daisy.h" #include "cpu/cop400/cop400.h" #include "imagedev/cassette.h" -#include "machine/6850acia.h" -#include "machine/adc0808.h" -#include "machine/z80ctc.h" #include "machine/rescap.h" #include "machine/ram.h" -#include "machine/upd765.h" #define SCREEN_TAG "screen" #define Z80_TAG "409" #define COP420_TAG "419" -#define MC6850_TAG "459" -#define ADC0809_TAG "427" -#define DAC0808_TAG "461" -#define Z80CTC_TAG "458" -#define FDC_Z80_TAG "416" -#define UPD765_TAG "418" - -#define NEWBRAIN_EIM_RAM_SIZE 0x10000 - -#define NEWBRAIN_ENRG1_CLK 0x01 -#define NEWBRAIN_ENRG1_TVP 0x04 -#define NEWBRAIN_ENRG1_CTS 0x10 -#define NEWBRAIN_ENRG1_DO 0x20 -#define NEWBRAIN_ENRG1_PO 0x80 -#define NEWBRAIN_ENRG1_UST_BIT_1_MASK 0x30 -#define NEWBRAIN_ENRG1_UST_BIT_0_MASK 0xc0 - -#define NEWBRAIN_ENRG2_USERP 0x01 -#define NEWBRAIN_ENRG2_ANP 0x02 -#define NEWBRAIN_ENRG2_MLTMD 0x04 -#define NEWBRAIN_ENRG2_MSPD 0x08 -#define NEWBRAIN_ENRG2_ENOR 0x10 -#define NEWBRAIN_ENRG2_ANSW 0x20 -#define NEWBRAIN_ENRG2_ENOT 0x40 -#define NEWBRAIN_ENRG2_CENTRONICS_OUT 0x80 - -#define NEWBRAIN_VIDEO_RV 0x01 -#define NEWBRAIN_VIDEO_FS 0x02 -#define NEWBRAIN_VIDEO_32_40 0x04 -#define NEWBRAIN_VIDEO_UCR 0x08 -#define NEWBRAIN_VIDEO_80L 0x40 +#define CASSETTE_TAG "cassette" +#define CASSETTE2_TAG "cassette2" +#define RS232_V24_TAG "to" +#define RS232_PRN_TAG "po" class newbrain_state : public driver_device { @@ -59,12 +30,15 @@ public: newbrain_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this, Z80_TAG), - m_copcpu(*this, COP420_TAG), + m_cop(*this, COP420_TAG), m_palette(*this, "palette"), - m_cassette1(*this, "cassette"), - m_cassette2(*this, "cassette2"), + m_exp(*this, NEWBRAIN_EXPANSION_SLOT_TAG), + m_cassette1(*this, CASSETTE_TAG), + m_cassette2(*this, CASSETTE2_TAG), + m_rs232_v24(*this, RS232_V24_TAG), + m_rs232_prn(*this, RS232_PRN_TAG), + m_ram(*this, RAM_TAG), m_rom(*this, Z80_TAG), - m_eim_rom(*this, "eim"), m_char_rom(*this, "chargen"), m_y0(*this, "Y0"), m_y1(*this, "Y1"), @@ -81,39 +55,37 @@ public: m_y12(*this, "Y12"), m_y13(*this, "Y13"), m_y14(*this, "Y14"), - m_y15(*this, "Y15") + m_y15(*this, "Y15"), + m_pwrup(0), + m_userint(1), + m_clkint(1), + m_copint(1), + m_keylatch(0), + m_keydata(0xf) { } UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + DECLARE_READ8_MEMBER( mreq_r ); + DECLARE_WRITE8_MEMBER( mreq_w ); + DECLARE_READ8_MEMBER( iorq_r ); + DECLARE_WRITE8_MEMBER( iorq_w ); + DECLARE_WRITE8_MEMBER( enrg1_w ); - DECLARE_WRITE8_MEMBER( a_enrg1_w ); - DECLARE_READ8_MEMBER( ust_r ); - DECLARE_READ8_MEMBER( a_ust_r ); - DECLARE_READ8_MEMBER( user_r ); - DECLARE_WRITE8_MEMBER( user_w ); - DECLARE_READ8_MEMBER( clclk_r ); - DECLARE_WRITE8_MEMBER( clclk_w ); - DECLARE_READ8_MEMBER( clusr_r ); - DECLARE_WRITE8_MEMBER( clusr_w ); - DECLARE_READ8_MEMBER( cop_l_r ); - DECLARE_WRITE8_MEMBER( cop_l_w ); + DECLARE_WRITE8_MEMBER( tvtl_w ); + DECLARE_READ8_MEMBER( ust_a_r ); + DECLARE_READ8_MEMBER( ust_b_r ); + DECLARE_WRITE8_MEMBER( cop_g_w ); DECLARE_READ8_MEMBER( cop_g_r ); DECLARE_WRITE8_MEMBER( cop_d_w ); DECLARE_READ8_MEMBER( cop_in_r ); - DECLARE_WRITE_LINE_MEMBER( cop_sk_w ); - DECLARE_READ_LINE_MEMBER( cop_si_r ); - DECLARE_WRITE_LINE_MEMBER( cop_so_w ); - DECLARE_READ8_MEMBER( tvl_r ); - DECLARE_WRITE8_MEMBER( tvl_w ); - DECLARE_WRITE8_MEMBER( tvctl_w ); - DECLARE_READ8_MEMBER( cop_r ); - DECLARE_WRITE8_MEMBER( cop_w ); + DECLARE_WRITE_LINE_MEMBER( k2_w ); + DECLARE_READ_LINE_MEMBER( tdi_r ); + DECLARE_WRITE_LINE_MEMBER( k1_w ); INTERRUPT_GEN_MEMBER(newbrain_interrupt); - TIMER_DEVICE_CALLBACK_MEMBER(cop_regint_tick); protected: virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; @@ -129,19 +101,26 @@ protected: }; void check_interrupt(); - void bankswitch(); - void tvram_w(UINT8 data, int a6); - inline int get_reset_t(); - inline int get_pwrup_t(); - void screen_update(bitmap_rgb32 &bitmap, const rectangle &cliprect); + void clclk(); + int tpin(); + void tm(); - required_device m_maincpu; - required_device m_copcpu; + int get_reset_t(); + int get_pwrup_t(); + + void screen_update(bitmap_rgb32 &bitmap, const rectangle &cliprect); + void tvl(UINT8 data, int a6); + + required_device m_maincpu; + required_device m_cop; required_device m_palette; + required_device m_exp; required_device m_cassette1; required_device m_cassette2; + required_device m_rs232_v24; + required_device m_rs232_prn; + required_device m_ram; required_memory_region m_rom; - optional_memory_region m_eim_rom; required_memory_region m_char_rom; required_ioport m_y0; required_ioport m_y1; @@ -160,112 +139,31 @@ protected: required_ioport m_y14; required_ioport m_y15; - // processor state - int m_pwrup; // power up - int m_userint; // user interrupt - int m_userint0; // parallel port interrupt - int m_clkint; // clock interrupt - int m_aciaint; // ACIA interrupt - int m_copint; // COP interrupt - int m_anint; // A/DC interrupt - int m_bee; // identity - UINT8 m_enrg1; // enable register 1 - UINT8 m_enrg2; // enable register 2 - int m_acia_txd; // ACIA transmit + int m_clk; + int m_tvp; + int m_pwrup; + int m_userint; + int m_clkint; + int m_copint; - // COP420 state - UINT8 m_cop_bus; // data bus - int m_cop_so; // serial out - int m_cop_tdo; // tape data output - int m_cop_tdi; // tape data input - int m_cop_rd; // memory read - int m_cop_wr; // memory write - int m_cop_access; // COP access + int m_cop_so; + int m_cop_tdo; + int m_cop_g1; + int m_cop_g3; + int m_cop_k6; - // keyboard state - ioport_port* m_key_row[16]; - int m_keylatch; // keyboard row - int m_keydata; // keyboard column + int m_keylatch; + int m_keydata; + UINT16 m_segment_data; - // video state - int m_segment_data[16]; // VF segment data - int m_tvcnsl; // TV console required - int m_tvctl; // TV control register - UINT16 m_tvram; // TV start address - - // user bus state - UINT8 m_user; - - // devices - UINT8 m_copdata; - int m_copstate; - int m_copbytes; - int m_copregint; + int m_rv; + int m_fs; + int m_32_40; + int m_ucr; + int m_80l; + UINT16 m_tvl; }; -class newbrain_eim_state : public newbrain_state -{ -public: - newbrain_eim_state(const machine_config &mconfig, device_type type, const char *tag) - : newbrain_state(mconfig, type, tag), - m_fdccpu(*this, FDC_Z80_TAG), - m_ctc(*this, Z80CTC_TAG), - m_acia(*this, MC6850_TAG), - m_fdc(*this, UPD765_TAG), - m_floppy(*this, UPD765_TAG ":0:525dd"), - m_eim_ram(*this, "eim_ram") - { } - - required_device m_fdccpu; - required_device m_ctc; - required_device m_acia; - required_device m_fdc; - required_device m_floppy; - optional_shared_ptr m_eim_ram; - - virtual void machine_start() override; - - DECLARE_WRITE8_MEMBER( fdc_auxiliary_w ); - DECLARE_READ8_MEMBER( fdc_control_r ); - DECLARE_READ8_MEMBER( ust2_r ); - DECLARE_WRITE8_MEMBER( enrg2_w ); - DECLARE_WRITE8_MEMBER( pr_w ); - DECLARE_READ8_MEMBER( user_r ); - DECLARE_WRITE8_MEMBER( user_w ); - DECLARE_READ8_MEMBER( anout_r ); - DECLARE_WRITE8_MEMBER( anout_w ); - DECLARE_READ8_MEMBER( anin_r ); - DECLARE_WRITE8_MEMBER( anio_w ); - DECLARE_READ8_MEMBER( st0_r ); - DECLARE_READ8_MEMBER( st1_r ); - DECLARE_READ8_MEMBER( st2_r ); - DECLARE_READ8_MEMBER( usbs_r ); - DECLARE_WRITE8_MEMBER( usbs_w ); - DECLARE_WRITE8_MEMBER( paging_w ); - DECLARE_WRITE_LINE_MEMBER( acia_tx ); - DECLARE_WRITE_LINE_MEMBER( acia_interrupt ); - DECLARE_WRITE_LINE_MEMBER( fdc_interrupt ); - DECLARE_WRITE_LINE_MEMBER( ctc_z2_w ); - DECLARE_WRITE_LINE_MEMBER( adc_eoc_w ); - - ADC0808_ANALOG_READ_CB(adc_vref_pos_r); - ADC0808_ANALOG_READ_CB(adc_vref_neg_r); - ADC0808_ANALOG_READ_CB(adc_input_r); - - TIMER_DEVICE_CALLBACK_MEMBER(ctc_c2_tick); - - void bankswitch(); - - // paging state - int m_paging; // paging enabled - int m_mpm; // multi paging mode ? - int m_a16; // address line 16 - UINT8 m_pr[16]; // expansion interface paging register - - // floppy state - int m_fdc_int; // interrupt - int m_fdc_att; // attention -}; // ---------- defined in video/newbrain.c ---------- diff --git a/src/mame/layout/newbrain.lay b/src/mame/layout/newbrain.lay index 09df5730d76..9fb6f688033 100644 --- a/src/mame/layout/newbrain.lay +++ b/src/mame/layout/newbrain.lay @@ -1,11 +1,17 @@ - - - + + + + + + + + + @@ -13,53 +19,47 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 660a2bbc546..e0411e952cc 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -28221,7 +28221,6 @@ nespal // Nintendo Entertainment System PAL //@source:newbrain.cpp newbrain // newbraina // -newbraineim // newbrainmd // //@source:news.cpp diff --git a/src/mame/video/newbrain.cpp b/src/mame/video/newbrain.cpp index dd0ae2bd776..8e6b9f0cc7a 100644 --- a/src/mame/video/newbrain.cpp +++ b/src/mame/video/newbrain.cpp @@ -4,39 +4,81 @@ #include "rendlay.h" #include "newbrain.lh" +#define LOG 0 + +#define NEWBRAIN_VIDEO_RV 0x01 +#define NEWBRAIN_VIDEO_FS 0x02 +#define NEWBRAIN_VIDEO_32_40 0x04 +#define NEWBRAIN_VIDEO_UCR 0x08 +#define NEWBRAIN_VIDEO_80L 0x40 + +void newbrain_state::tvl(UINT8 data, int a6) +{ + /* latch video address counter bits A5-A0 */ + m_tvl = m_80l ? 0x04 : 0x02; + + /* latch video address counter bit A6 */ + m_tvl |= a6 << 6; + + /* latch data to video address counter bits A14-A7 */ + m_tvl |= (data << 7); + + if (LOG) logerror("%s %s TVL %04x\n", machine().time().as_string(), machine().describe_context(), m_tvl); +} + +WRITE8_MEMBER( newbrain_state::tvtl_w ) +{ + /* + + bit signal description + + 0 RV 1 reverses video over entire field, ie. black on white + 1 FS 0 generates 128 characters and 128 reverse field characters from 8 bit character code. 1 generates 256 characters from 8 bit character code + 2 32/_40 0 generates 320 or 640 horizontal dots in pixel graphics mode. 1 generates 256 or 512 horizontal dots in pixel graphics mode + 3 UCR 0 selects 256 characters expressed in an 8x10 matrix, and 25 lines (max) displayed. 1 selects 256 characters in an 8x8 matrix, and 31 lines (max) displayed + 4 + 5 + 6 80L 0 selects 40 character line length. 1 selects 80 character line length + 7 + + */ + + if (LOG) logerror("%s %s TVTL %02x\n", machine().time().as_string(), machine().describe_context(), data); + + m_rv = BIT(data, 0); + m_fs = BIT(data, 1); + m_32_40 = BIT(data, 2); + m_ucr = BIT(data, 3); + m_80l = BIT(data, 6); +} + void newbrain_state::video_start() { - /* register for state saving */ - save_item(NAME(m_tvcnsl)); - save_item(NAME(m_tvctl)); - save_item(NAME(m_tvram)); - save_item(NAME(m_segment_data)); + // state saving + save_item(NAME(m_rv)); + save_item(NAME(m_fs)); + save_item(NAME(m_32_40)); + save_item(NAME(m_ucr)); + save_item(NAME(m_80l)); + save_item(NAME(m_tvl)); } void newbrain_state::screen_update(bitmap_rgb32 &bitmap, const rectangle &cliprect) { - address_space &program = m_maincpu->space(AS_PROGRAM); - - int y, sx; - int columns = (m_tvctl & NEWBRAIN_VIDEO_80L) ? 80 : 40; - int excess = (m_tvctl & NEWBRAIN_VIDEO_32_40) ? 24 : 4; - int ucr = (m_tvctl & NEWBRAIN_VIDEO_UCR) ? 1 : 0; - int fs = (m_tvctl & NEWBRAIN_VIDEO_FS) ? 1 : 0; - int rv = (m_tvctl & NEWBRAIN_VIDEO_RV) ? 1 : 0; + int columns = m_80l ? 80 : 40; + int excess = m_32_40 ? 4 : 24; int gr = 0; - UINT16 videoram_addr = m_tvram; + UINT16 videoram_addr = m_tvl; UINT8 rc = 0; - for (y = 0; y < 250; y++) + for (int y = 0; y < 200; y++) { int x = 0; - for (sx = 0; sx < columns; sx++) + for (int sx = 0; sx < columns; sx++) { - int bit; - - UINT8 videoram_data = program.read_byte(videoram_addr + sx); + UINT8 videoram_data = m_ram->pointer()[(videoram_addr + sx) & 0x7fff]; UINT8 charrom_data; if (gr) @@ -47,25 +89,25 @@ void newbrain_state::screen_update(bitmap_rgb32 &bitmap, const rectangle &clipre else { /* render character rom data */ - UINT16 charrom_addr = (rc << 8) | ((BIT(videoram_data, 7) & fs) << 7) | (videoram_data & 0x7f); + UINT16 charrom_addr = (rc << 8) | ((BIT(videoram_data, 7) && m_fs) << 7) | (videoram_data & 0x7f); charrom_data = m_char_rom->base()[charrom_addr & 0xfff]; - if ((videoram_data & 0x80) && !fs) + if ((videoram_data & 0x80) && !m_fs) { /* invert character */ charrom_data ^= 0xff; } - if ((videoram_data & 0x60) && !ucr) + if ((videoram_data & 0x60) && !m_ucr) { /* strip bit D0 */ charrom_data &= 0xfe; } } - for (bit = 0; bit < 8; bit++) + for (int bit = 0; bit < 8; bit++) { - int color = BIT(charrom_data, 7) ^ rv; + int color = BIT(charrom_data, 7) ^ m_rv; bitmap.pix32(y, x++) = m_palette->pen(color); @@ -89,7 +131,7 @@ void newbrain_state::screen_update(bitmap_rgb32 &bitmap, const rectangle &clipre /* increase row counter */ rc++; - if (rc == (ucr ? 8 : 10)) + if (rc == (m_ucr ? 8 : 10)) { /* reset row counter */ rc = 0; @@ -103,7 +145,7 @@ void newbrain_state::screen_update(bitmap_rgb32 &bitmap, const rectangle &clipre UINT32 newbrain_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { - if (m_enrg1 & NEWBRAIN_ENRG1_TVP) + if (m_tvp) { screen_update(bitmap, cliprect); } @@ -115,6 +157,24 @@ UINT32 newbrain_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap return 0; } +/* F4 Character Displayer */ +static const gfx_layout newbrain_charlayout = +{ + 8, 10, /* 8 x 10 characters */ + 256, /* 256 characters */ + 1, /* 1 bits per pixel */ + { 0 }, /* no bitplanes */ + /* x offsets */ + { 0, 1, 2, 3, 4, 5, 6, 7 }, + /* y offsets */ + { 0*256*8, 1*256*8, 2*256*8, 3*256*8, 4*256*8, 5*256*8, 6*256*8, 7*256*8, 8*256*8, 9*256*8, 10*256*8, 11*256*8, 12*256*8, 13*256*8, 14*256*8, 15*256*8 }, + 8 /* every char takes 16 x 1 bytes */ +}; + +static GFXDECODE_START( newbrain ) + GFXDECODE_ENTRY( "chargen", 0x0000, newbrain_charlayout, 0, 1 ) +GFXDECODE_END + /* Machine Drivers */ MACHINE_CONFIG_FRAGMENT( newbrain_video ) @@ -127,5 +187,7 @@ MACHINE_CONFIG_FRAGMENT( newbrain_video ) MCFG_SCREEN_SIZE(640, 250) MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 249) - MCFG_PALETTE_ADD_BLACK_AND_WHITE("palette") + MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette") + + MCFG_GFXDECODE_ADD("gfxdecode", "palette", newbrain) MACHINE_CONFIG_END