mirror of
https://github.com/holub/mame
synced 2025-04-26 10:13:37 +03:00
latch8 is modern and devcb2 now (nw)
This commit is contained in:
Miodrag Milanovic
parent
da63363025
commit
99e76d5896
@ -7,254 +7,172 @@
|
||||
**********************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "sound/discrete.h"
|
||||
#include "latch8.h"
|
||||
#include "devlegcy.h"
|
||||
|
||||
struct latch8_t
|
||||
{
|
||||
latch8_config *intf;
|
||||
UINT8 value;
|
||||
UINT8 has_node_map;
|
||||
UINT8 has_devread;
|
||||
UINT8 has_read;
|
||||
device_t *devices[8];
|
||||
};
|
||||
|
||||
/* ----------------------------------------------------------------------- */
|
||||
|
||||
INLINE latch8_t *get_safe_token(device_t *device) {
|
||||
assert( device != NULL );
|
||||
assert( device->type() == LATCH8 );
|
||||
return ( latch8_t * ) downcast<latch8_device *>(device)->token();
|
||||
}
|
||||
|
||||
static void update(device_t *device, UINT8 new_val, UINT8 mask)
|
||||
void latch8_device::update(UINT8 new_val, UINT8 mask)
|
||||
{
|
||||
/* temporary hack until the discrete system is a device */
|
||||
latch8_t *latch8 = get_safe_token(device);
|
||||
UINT8 old_val = latch8->value;
|
||||
UINT8 old_val = m_value;
|
||||
|
||||
latch8->value = (latch8->value & ~mask) | (new_val & mask);
|
||||
m_value = (m_value & ~mask) | (new_val & mask);
|
||||
|
||||
if (latch8->has_node_map)
|
||||
if (m_has_node_map)
|
||||
{
|
||||
int i;
|
||||
UINT8 changed = old_val ^ latch8->value;
|
||||
UINT8 changed = old_val ^ m_value;
|
||||
for (i=0; i<8; i++)
|
||||
if (((changed & (1<<i)) != 0) && latch8->intf->node_map[i] != 0)
|
||||
discrete_sound_w(device->machine().device(latch8->intf->node_device[i]), device->machine().driver_data()->generic_space(), latch8->intf->node_map[i] , (latch8->value >> i) & 1);
|
||||
if (((changed & (1<<i)) != 0) && m_node_map[i] != 0) {
|
||||
if (i==0 && m_node_device_0!=NULL) discrete_sound_w(m_node_device_0, machine().driver_data()->generic_space(), m_node_map[i] , (m_value >> i) & 1);
|
||||
if (i==1 && m_node_device_1!=NULL) discrete_sound_w(m_node_device_1, machine().driver_data()->generic_space(), m_node_map[i] , (m_value >> i) & 1);
|
||||
if (i==2 && m_node_device_2!=NULL) discrete_sound_w(m_node_device_2, machine().driver_data()->generic_space(), m_node_map[i] , (m_value >> i) & 1);
|
||||
if (i==3 && m_node_device_3!=NULL) discrete_sound_w(m_node_device_3, machine().driver_data()->generic_space(), m_node_map[i] , (m_value >> i) & 1);
|
||||
if (i==4 && m_node_device_4!=NULL) discrete_sound_w(m_node_device_4, machine().driver_data()->generic_space(), m_node_map[i] , (m_value >> i) & 1);
|
||||
if (i==5 && m_node_device_5!=NULL) discrete_sound_w(m_node_device_5, machine().driver_data()->generic_space(), m_node_map[i] , (m_value >> i) & 1);
|
||||
if (i==6 && m_node_device_6!=NULL) discrete_sound_w(m_node_device_6, machine().driver_data()->generic_space(), m_node_map[i] , (m_value >> i) & 1);
|
||||
if (i==7 && m_node_device_7!=NULL) discrete_sound_w(m_node_device_7, machine().driver_data()->generic_space(), m_node_map[i] , (m_value >> i) & 1);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static TIMER_CALLBACK( latch8_timerproc )
|
||||
TIMER_CALLBACK_MEMBER( latch8_device::timerproc )
|
||||
{
|
||||
device_t *device = (device_t *)ptr;
|
||||
UINT8 new_val = param & 0xFF;
|
||||
UINT8 mask = param >> 8;
|
||||
|
||||
update(device, new_val, mask);
|
||||
update( new_val, mask);
|
||||
}
|
||||
|
||||
/* ----------------------------------------------------------------------- */
|
||||
|
||||
READ8_DEVICE_HANDLER( latch8_r )
|
||||
READ8_MEMBER( latch8_device::read )
|
||||
{
|
||||
latch8_t *latch8 = get_safe_token(device);
|
||||
UINT8 res;
|
||||
|
||||
assert(offset == 0);
|
||||
|
||||
res = latch8->value;
|
||||
if (latch8->has_devread)
|
||||
res = m_value;
|
||||
if (m_has_devread)
|
||||
{
|
||||
int i;
|
||||
for (i=0; i<8; i++)
|
||||
{
|
||||
device_t *read_dev = latch8->devices[i];
|
||||
if (read_dev != NULL)
|
||||
{
|
||||
res &= ~( 1 << i);
|
||||
res |= ((latch8->intf->devread[i].devread_handler(read_dev, device->machine().driver_data()->generic_space(), 0, 0xff) >> latch8->intf->devread[i].from_bit) & 0x01) << i;
|
||||
}
|
||||
{
|
||||
if (i==0 && !m_devread_0.isnull()) { res &= ~( 1 << i); res |= ((m_devread_0(space, 0, 0xff) >> m_from_bit[i]) & 0x01) << i; }
|
||||
if (i==1 && !m_devread_1.isnull()) { res &= ~( 1 << i); res |= ((m_devread_1(space, 0, 0xff) >> m_from_bit[i]) & 0x01) << i; }
|
||||
if (i==2 && !m_devread_2.isnull()) { res &= ~( 1 << i); res |= ((m_devread_2(space, 0, 0xff) >> m_from_bit[i]) & 0x01) << i; }
|
||||
if (i==3 && !m_devread_3.isnull()) { res &= ~( 1 << i); res |= ((m_devread_3(space, 0, 0xff) >> m_from_bit[i]) & 0x01) << i; }
|
||||
if (i==4 && !m_devread_4.isnull()) { res &= ~( 1 << i); res |= ((m_devread_4(space, 0, 0xff) >> m_from_bit[i]) & 0x01) << i; }
|
||||
if (i==5 && !m_devread_5.isnull()) { res &= ~( 1 << i); res |= ((m_devread_5(space, 0, 0xff) >> m_from_bit[i]) & 0x01) << i; }
|
||||
if (i==6 && !m_devread_6.isnull()) { res &= ~( 1 << i); res |= ((m_devread_6(space, 0, 0xff) >> m_from_bit[i]) & 0x01) << i; }
|
||||
if (i==7 && !m_devread_7.isnull()) { res &= ~( 1 << i); res |= ((m_devread_7(space, 0, 0xff) >> m_from_bit[i]) & 0x01) << i; }
|
||||
}
|
||||
}
|
||||
if (latch8->has_read)
|
||||
{
|
||||
/* temporary hack until all relevant systems are devices */
|
||||
address_space &space = device->machine().driver_data()->generic_space();
|
||||
int i;
|
||||
for (i=0; i<8; i++)
|
||||
{
|
||||
if (latch8->intf->devread[i].read_handler != NULL)
|
||||
{
|
||||
res &= ~( 1 << i);
|
||||
res |= ((latch8->intf->devread[i].read_handler(space, 0, 0xff) >> latch8->intf->devread[i].from_bit) & 0x01) << i;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return (res & ~latch8->intf->maskout) ^ latch8->intf->xorvalue;
|
||||
return (res & ~m_maskout) ^ m_xorvalue;
|
||||
}
|
||||
|
||||
|
||||
WRITE8_DEVICE_HANDLER( latch8_w )
|
||||
WRITE8_MEMBER( latch8_device::write )
|
||||
{
|
||||
latch8_t *latch8 = get_safe_token(device);
|
||||
assert(offset == 0);
|
||||
|
||||
if (latch8->intf->nosync != 0xff)
|
||||
device->machine().scheduler().synchronize(FUNC(latch8_timerproc), (0xFF << 8) | data, (void *)device);
|
||||
if (m_nosync != 0xff)
|
||||
machine().scheduler().synchronize(timer_expired_delegate(FUNC(latch8_device::timerproc),this), (0xFF << 8) | data);
|
||||
else
|
||||
update(device, data, 0xFF);
|
||||
update(data, 0xFF);
|
||||
}
|
||||
|
||||
|
||||
WRITE8_DEVICE_HANDLER( latch8_reset)
|
||||
WRITE8_MEMBER( latch8_device::reset_w )
|
||||
{
|
||||
latch8_t *latch8 = get_safe_token(device);
|
||||
|
||||
assert(offset == 0);
|
||||
|
||||
latch8->value = 0;
|
||||
m_value = 0;
|
||||
}
|
||||
|
||||
/* read bit x */
|
||||
/* return (latch >> x) & 0x01 */
|
||||
|
||||
INLINE UINT8 latch8_bitx_r(device_t *device, offs_t offset, int bit)
|
||||
UINT8 latch8_device::bitx_r( offs_t offset, int bit)
|
||||
{
|
||||
latch8_t *latch8 = get_safe_token(device);
|
||||
|
||||
assert( offset == 0);
|
||||
|
||||
return (latch8->value >> bit) & 0x01;
|
||||
return (m_value >> bit) & 0x01;
|
||||
}
|
||||
|
||||
READ8_DEVICE_HANDLER( latch8_bit0_r) { return latch8_bitx_r(device, offset, 0); }
|
||||
READ8_DEVICE_HANDLER( latch8_bit1_r) { return latch8_bitx_r(device, offset, 1); }
|
||||
READ8_DEVICE_HANDLER( latch8_bit2_r) { return latch8_bitx_r(device, offset, 2); }
|
||||
READ8_DEVICE_HANDLER( latch8_bit3_r) { return latch8_bitx_r(device, offset, 3); }
|
||||
READ8_DEVICE_HANDLER( latch8_bit4_r) { return latch8_bitx_r(device, offset, 4); }
|
||||
READ8_DEVICE_HANDLER( latch8_bit5_r) { return latch8_bitx_r(device, offset, 5); }
|
||||
READ8_DEVICE_HANDLER( latch8_bit6_r) { return latch8_bitx_r(device, offset, 6); }
|
||||
READ8_DEVICE_HANDLER( latch8_bit7_r) { return latch8_bitx_r(device, offset, 7); }
|
||||
READ8_MEMBER( latch8_device::bit0_r) { return bitx_r(offset, 0); }
|
||||
READ8_MEMBER( latch8_device::bit1_r) { return bitx_r(offset, 1); }
|
||||
READ8_MEMBER( latch8_device::bit2_r) { return bitx_r(offset, 2); }
|
||||
READ8_MEMBER( latch8_device::bit3_r) { return bitx_r(offset, 3); }
|
||||
READ8_MEMBER( latch8_device::bit4_r) { return bitx_r(offset, 4); }
|
||||
READ8_MEMBER( latch8_device::bit5_r) { return bitx_r(offset, 5); }
|
||||
READ8_MEMBER( latch8_device::bit6_r) { return bitx_r(offset, 6); }
|
||||
READ8_MEMBER( latch8_device::bit7_r) { return bitx_r(offset, 7); }
|
||||
|
||||
READ8_DEVICE_HANDLER( latch8_bit0_q_r) { return latch8_bitx_r(device, offset, 0) ^ 1; }
|
||||
READ8_DEVICE_HANDLER( latch8_bit1_q_r) { return latch8_bitx_r(device, offset, 1) ^ 1; }
|
||||
READ8_DEVICE_HANDLER( latch8_bit2_q_r) { return latch8_bitx_r(device, offset, 2) ^ 1; }
|
||||
READ8_DEVICE_HANDLER( latch8_bit3_q_r) { return latch8_bitx_r(device, offset, 3) ^ 1; }
|
||||
READ8_DEVICE_HANDLER( latch8_bit4_q_r) { return latch8_bitx_r(device, offset, 4) ^ 1; }
|
||||
READ8_DEVICE_HANDLER( latch8_bit5_q_r) { return latch8_bitx_r(device, offset, 5) ^ 1; }
|
||||
READ8_DEVICE_HANDLER( latch8_bit6_q_r) { return latch8_bitx_r(device, offset, 6) ^ 1; }
|
||||
READ8_DEVICE_HANDLER( latch8_bit7_q_r) { return latch8_bitx_r(device, offset, 7) ^ 1; }
|
||||
READ8_MEMBER( latch8_device::bit0_q_r) { return bitx_r(offset, 0) ^ 1; }
|
||||
READ8_MEMBER( latch8_device::bit1_q_r) { return bitx_r(offset, 1) ^ 1; }
|
||||
READ8_MEMBER( latch8_device::bit2_q_r) { return bitx_r(offset, 2) ^ 1; }
|
||||
READ8_MEMBER( latch8_device::bit3_q_r) { return bitx_r(offset, 3) ^ 1; }
|
||||
READ8_MEMBER( latch8_device::bit4_q_r) { return bitx_r(offset, 4) ^ 1; }
|
||||
READ8_MEMBER( latch8_device::bit5_q_r) { return bitx_r(offset, 5) ^ 1; }
|
||||
READ8_MEMBER( latch8_device::bit6_q_r) { return bitx_r(offset, 6) ^ 1; }
|
||||
READ8_MEMBER( latch8_device::bit7_q_r) { return bitx_r(offset, 7) ^ 1; }
|
||||
|
||||
/* write bit x from data into bit determined by offset */
|
||||
/* latch = (latch & ~(1<<offset)) | (((data >> x) & 0x01) << offset) */
|
||||
|
||||
INLINE void latch8_bitx_w(device_t *device, int bit, offs_t offset, UINT8 data)
|
||||
void latch8_device::bitx_w(int bit, offs_t offset, UINT8 data)
|
||||
{
|
||||
latch8_t *latch8 = get_safe_token(device);
|
||||
UINT8 mask = (1<<offset);
|
||||
UINT8 masked_data = (((data >> bit) & 0x01) << offset);
|
||||
|
||||
assert( offset < 8);
|
||||
|
||||
/* No need to synchronize ? */
|
||||
if (latch8->intf->nosync & mask)
|
||||
update(device, masked_data, mask);
|
||||
if (m_nosync & mask)
|
||||
update(masked_data, mask);
|
||||
else
|
||||
device->machine().scheduler().synchronize(FUNC(latch8_timerproc), (mask << 8) | masked_data, (void *) device);
|
||||
}
|
||||
|
||||
WRITE8_DEVICE_HANDLER( latch8_bit0_w ) { latch8_bitx_w(device, 0, offset, data); }
|
||||
WRITE8_DEVICE_HANDLER( latch8_bit1_w ) { latch8_bitx_w(device, 1, offset, data); }
|
||||
WRITE8_DEVICE_HANDLER( latch8_bit2_w ) { latch8_bitx_w(device, 2, offset, data); }
|
||||
WRITE8_DEVICE_HANDLER( latch8_bit3_w ) { latch8_bitx_w(device, 3, offset, data); }
|
||||
WRITE8_DEVICE_HANDLER( latch8_bit4_w ) { latch8_bitx_w(device, 4, offset, data); }
|
||||
WRITE8_DEVICE_HANDLER( latch8_bit5_w ) { latch8_bitx_w(device, 0, offset, data); }
|
||||
WRITE8_DEVICE_HANDLER( latch8_bit6_w ) { latch8_bitx_w(device, 0, offset, data); }
|
||||
WRITE8_DEVICE_HANDLER( latch8_bit7_w ) { latch8_bitx_w(device, 0, offset, data); }
|
||||
|
||||
/* ----------------------------------------------------------------------- */
|
||||
|
||||
/* device interface */
|
||||
|
||||
static DEVICE_START( latch8 )
|
||||
{
|
||||
latch8_t *latch8 = get_safe_token(device);
|
||||
int i;
|
||||
|
||||
/* validate arguments */
|
||||
latch8->intf = (latch8_config *)&downcast<latch8_device *>(device)->m_inline_config;
|
||||
|
||||
latch8->value = 0x0;
|
||||
|
||||
/* setup nodemap */
|
||||
for (i=0; i<8; i++)
|
||||
if (latch8->intf->node_map[i] )
|
||||
{
|
||||
if (!latch8->intf->node_device[i])
|
||||
fatalerror("Device %s: Bit %d has invalid discrete device\n", device->tag(), i);
|
||||
latch8->has_node_map = 1;
|
||||
}
|
||||
|
||||
/* setup device read handlers */
|
||||
for (i=0; i<8; i++)
|
||||
if (latch8->intf->devread[i].tag != NULL)
|
||||
{
|
||||
if (latch8->devices[i] != NULL)
|
||||
fatalerror("Device %s: Bit %d already has a handler.\n", device->tag(), i);
|
||||
latch8->devices[i] = device->machine().device(latch8->intf->devread[i].tag);
|
||||
if (latch8->devices[i] == NULL)
|
||||
fatalerror("Device %s: Unable to find device %s\n", device->tag(), latch8->intf->devread[i].tag);
|
||||
latch8->has_devread = 1;
|
||||
}
|
||||
|
||||
/* setup machine read handlers */
|
||||
for (i=0; i<8; i++)
|
||||
if (latch8->intf->devread[i].read_handler != NULL)
|
||||
{
|
||||
if (latch8->devices[i] != NULL)
|
||||
fatalerror("Device %s: Bit %d already has a handler.\n", device->tag(), i);
|
||||
latch8->has_read = 1;
|
||||
}
|
||||
|
||||
device->save_item(NAME(latch8->value));
|
||||
}
|
||||
|
||||
|
||||
static DEVICE_RESET( latch8 )
|
||||
{
|
||||
latch8_t *latch8 = get_safe_token(device);
|
||||
|
||||
latch8->value = 0;
|
||||
machine().scheduler().synchronize(timer_expired_delegate(FUNC(latch8_device::timerproc),this), (mask << 8) | masked_data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( latch8_device::bit0_w ) { bitx_w(0, offset, data); }
|
||||
WRITE8_MEMBER( latch8_device::bit1_w ) { bitx_w(1, offset, data); }
|
||||
WRITE8_MEMBER( latch8_device::bit2_w ) { bitx_w(2, offset, data); }
|
||||
WRITE8_MEMBER( latch8_device::bit3_w ) { bitx_w(3, offset, data); }
|
||||
WRITE8_MEMBER( latch8_device::bit4_w ) { bitx_w(4, offset, data); }
|
||||
WRITE8_MEMBER( latch8_device::bit5_w ) { bitx_w(0, offset, data); }
|
||||
WRITE8_MEMBER( latch8_device::bit6_w ) { bitx_w(0, offset, data); }
|
||||
WRITE8_MEMBER( latch8_device::bit7_w ) { bitx_w(0, offset, data); }
|
||||
|
||||
const device_type LATCH8 = &device_creator<latch8_device>;
|
||||
|
||||
latch8_device::latch8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: device_t(mconfig, LATCH8, "8 bit latch", tag, owner, clock, "latch8", __FILE__)
|
||||
: device_t(mconfig, LATCH8, "8 bit latch", tag, owner, clock, "latch8", __FILE__),
|
||||
m_value(0),
|
||||
m_has_node_map(0),
|
||||
m_has_devread(0),
|
||||
m_maskout(0),
|
||||
m_xorvalue(0),
|
||||
m_nosync(0),
|
||||
m_node_device_0(*this),
|
||||
m_node_device_1(*this),
|
||||
m_node_device_2(*this),
|
||||
m_node_device_3(*this),
|
||||
m_node_device_4(*this),
|
||||
m_node_device_5(*this),
|
||||
m_node_device_6(*this),
|
||||
m_node_device_7(*this),
|
||||
m_devread_0(*this),
|
||||
m_devread_1(*this),
|
||||
m_devread_2(*this),
|
||||
m_devread_3(*this),
|
||||
m_devread_4(*this),
|
||||
m_devread_5(*this),
|
||||
m_devread_6(*this),
|
||||
m_devread_7(*this)
|
||||
{
|
||||
m_token = global_alloc_clear(latch8_t);
|
||||
memset((void*)&m_inline_config,0,sizeof(m_inline_config));
|
||||
memset(m_node_map, 0, sizeof(m_node_map));
|
||||
memset(m_from_bit, 0, sizeof(m_from_bit));
|
||||
}
|
||||
|
||||
latch8_device::~latch8_device()
|
||||
{
|
||||
global_free(m_token);
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_config_complete - perform any
|
||||
// operations now that the configuration is
|
||||
// complete
|
||||
//-------------------------------------------------
|
||||
|
||||
void latch8_device::device_config_complete()
|
||||
{
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_start - device-specific startup
|
||||
@ -262,7 +180,54 @@ void latch8_device::device_config_complete()
|
||||
|
||||
void latch8_device::device_start()
|
||||
{
|
||||
DEVICE_START_NAME( latch8 )(this);
|
||||
m_devread_0.resolve();
|
||||
m_devread_1.resolve();
|
||||
m_devread_2.resolve();
|
||||
m_devread_3.resolve();
|
||||
m_devread_4.resolve();
|
||||
m_devread_5.resolve();
|
||||
m_devread_6.resolve();
|
||||
m_devread_7.resolve();
|
||||
|
||||
/* setup nodemap */
|
||||
for (int i=0; i<8; i++)
|
||||
if (m_node_map[i] )
|
||||
{
|
||||
if (i==0 && m_node_device_0==NULL) fatalerror("Device %s: Bit %d has invalid discrete device\n", tag(), i);
|
||||
if (i==1 && m_node_device_1==NULL) fatalerror("Device %s: Bit %d has invalid discrete device\n", tag(), i);
|
||||
if (i==2 && m_node_device_2==NULL) fatalerror("Device %s: Bit %d has invalid discrete device\n", tag(), i);
|
||||
if (i==3 && m_node_device_3==NULL) fatalerror("Device %s: Bit %d has invalid discrete device\n", tag(), i);
|
||||
if (i==4 && m_node_device_4==NULL) fatalerror("Device %s: Bit %d has invalid discrete device\n", tag(), i);
|
||||
if (i==5 && m_node_device_5==NULL) fatalerror("Device %s: Bit %d has invalid discrete device\n", tag(), i);
|
||||
if (i==6 && m_node_device_6==NULL) fatalerror("Device %s: Bit %d has invalid discrete device\n", tag(), i);
|
||||
if (i==7 && m_node_device_7==NULL) fatalerror("Device %s: Bit %d has invalid discrete device\n", tag(), i);
|
||||
|
||||
m_has_node_map = 1;
|
||||
}
|
||||
|
||||
/* setup device read handlers */
|
||||
if (!m_devread_0.isnull()) m_has_devread = 1;
|
||||
if (!m_devread_1.isnull()) m_has_devread = 1;
|
||||
if (!m_devread_2.isnull()) m_has_devread = 1;
|
||||
if (!m_devread_3.isnull()) m_has_devread = 1;
|
||||
if (!m_devread_4.isnull()) m_has_devread = 1;
|
||||
if (!m_devread_5.isnull()) m_has_devread = 1;
|
||||
if (!m_devread_6.isnull()) m_has_devread = 1;
|
||||
if (!m_devread_7.isnull()) m_has_devread = 1;
|
||||
|
||||
for (int i=0; i<8; i++)
|
||||
{
|
||||
if (!m_devread_0.isnull() && m_node_device_0!=NULL) fatalerror("Device %s: Bit %d already has a handler.\n", tag(), i);
|
||||
if (!m_devread_1.isnull() && m_node_device_1!=NULL) fatalerror("Device %s: Bit %d already has a handler.\n", tag(), i);
|
||||
if (!m_devread_2.isnull() && m_node_device_2!=NULL) fatalerror("Device %s: Bit %d already has a handler.\n", tag(), i);
|
||||
if (!m_devread_3.isnull() && m_node_device_3!=NULL) fatalerror("Device %s: Bit %d already has a handler.\n", tag(), i);
|
||||
if (!m_devread_4.isnull() && m_node_device_4!=NULL) fatalerror("Device %s: Bit %d already has a handler.\n", tag(), i);
|
||||
if (!m_devread_5.isnull() && m_node_device_5!=NULL) fatalerror("Device %s: Bit %d already has a handler.\n", tag(), i);
|
||||
if (!m_devread_6.isnull() && m_node_device_6!=NULL) fatalerror("Device %s: Bit %d already has a handler.\n", tag(), i);
|
||||
if (!m_devread_7.isnull() && m_node_device_7!=NULL) fatalerror("Device %s: Bit %d already has a handler.\n", tag(), i);
|
||||
}
|
||||
|
||||
save_item(NAME(m_value));
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
@ -271,5 +236,5 @@ void latch8_device::device_start()
|
||||
|
||||
void latch8_device::device_reset()
|
||||
{
|
||||
DEVICE_RESET_NAME( latch8 )(this);
|
||||
m_value = 0;
|
||||
}
|
||||
|
||||
@ -15,65 +15,126 @@
|
||||
#ifndef __LATCH8_H_
|
||||
#define __LATCH8_H_
|
||||
|
||||
#include "sound/discrete.h"
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
TYPE DEFINITIONS
|
||||
***************************************************************************/
|
||||
|
||||
struct latch8_devread
|
||||
{
|
||||
/* only for byte reads, does not affect bit reads and node_map */
|
||||
UINT32 from_bit;
|
||||
const char *tag;
|
||||
read8_device_func devread_handler;
|
||||
read8_space_func read_handler;
|
||||
};
|
||||
|
||||
struct latch8_config
|
||||
{
|
||||
/* only for byte reads, does not affect bit reads and node_map */
|
||||
UINT32 maskout;
|
||||
UINT32 xorvalue; /* after mask */
|
||||
UINT32 nosync;
|
||||
UINT32 node_map[8];
|
||||
const char * node_device[8];
|
||||
latch8_devread devread[8];
|
||||
};
|
||||
|
||||
class latch8_device : public device_t
|
||||
{
|
||||
public:
|
||||
latch8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
~latch8_device();
|
||||
|
||||
|
||||
/* write & read full byte */
|
||||
|
||||
// access to legacy token
|
||||
struct latch8_t *token() const { assert(m_token != NULL); return m_token; }
|
||||
latch8_config m_inline_config;
|
||||
DECLARE_READ8_MEMBER( read );
|
||||
DECLARE_WRITE8_MEMBER( write );
|
||||
|
||||
void set_maskout(UINT32 maskout) { m_inline_config.maskout = maskout; }
|
||||
void set_xorvalue(UINT32 xorvalue) { m_inline_config.xorvalue = xorvalue; }
|
||||
void set_nosync(UINT32 nosync) { m_inline_config.nosync = nosync; }
|
||||
/* reset the latch */
|
||||
|
||||
void set_discrete_node(const char *dev_tag, int bit, UINT32 node) { m_inline_config.node_device[bit] = dev_tag; m_inline_config.node_map[bit] = node; }
|
||||
void set_devread(int bit, const char *tag, read8_device_func handler, int from_bit)
|
||||
{
|
||||
m_inline_config.devread[bit].from_bit = from_bit;
|
||||
m_inline_config.devread[bit].tag = tag;
|
||||
m_inline_config.devread[bit].devread_handler = handler;
|
||||
}
|
||||
void set_read(int bit, read8_space_func handler, int from_bit)
|
||||
{
|
||||
m_inline_config.devread[bit].from_bit = from_bit;
|
||||
m_inline_config.devread[bit].read_handler = handler;
|
||||
}
|
||||
DECLARE_WRITE8_MEMBER( reset_w );
|
||||
|
||||
/* read bit x */
|
||||
/* return (latch >> x) & 0x01 */
|
||||
|
||||
DECLARE_READ8_MEMBER( bit0_r );
|
||||
DECLARE_READ8_MEMBER( bit1_r );
|
||||
DECLARE_READ8_MEMBER( bit2_r );
|
||||
DECLARE_READ8_MEMBER( bit3_r );
|
||||
DECLARE_READ8_MEMBER( bit4_r );
|
||||
DECLARE_READ8_MEMBER( bit5_r );
|
||||
DECLARE_READ8_MEMBER( bit6_r );
|
||||
DECLARE_READ8_MEMBER( bit7_r );
|
||||
|
||||
/* read inverted bit x */
|
||||
/* return (latch >> x) & 0x01 */
|
||||
|
||||
DECLARE_READ8_MEMBER( bit0_q_r );
|
||||
DECLARE_READ8_MEMBER( bit1_q_r );
|
||||
DECLARE_READ8_MEMBER( bit2_q_r );
|
||||
DECLARE_READ8_MEMBER( bit3_q_r );
|
||||
DECLARE_READ8_MEMBER( bit4_q_r );
|
||||
DECLARE_READ8_MEMBER( bit5_q_r );
|
||||
DECLARE_READ8_MEMBER( bit6_q_r );
|
||||
DECLARE_READ8_MEMBER( bit7_q_r );
|
||||
|
||||
/* write bit x from data into bit determined by offset */
|
||||
/* latch = (latch & ~(1<<offset)) | (((data >> x) & 0x01) << offset) */
|
||||
|
||||
DECLARE_WRITE8_MEMBER( bit0_w );
|
||||
DECLARE_WRITE8_MEMBER( bit1_w );
|
||||
DECLARE_WRITE8_MEMBER( bit2_w );
|
||||
DECLARE_WRITE8_MEMBER( bit3_w );
|
||||
DECLARE_WRITE8_MEMBER( bit4_w );
|
||||
DECLARE_WRITE8_MEMBER( bit5_w );
|
||||
DECLARE_WRITE8_MEMBER( bit6_w );
|
||||
DECLARE_WRITE8_MEMBER( bit7_w );
|
||||
|
||||
static void set_maskout(device_t &device, UINT32 maskout) { downcast<latch8_device &>(device).m_maskout = maskout; }
|
||||
static void set_xorvalue(device_t &device, UINT32 xorvalue) { downcast<latch8_device &>(device).m_xorvalue = xorvalue; }
|
||||
static void set_nosync(device_t &device, UINT32 nosync) { downcast<latch8_device &>(device).m_nosync = nosync; }
|
||||
|
||||
static void set_discrete_node_0(device_t &device, const char *tag, UINT32 node) { downcast<latch8_device &>(device).m_node_device_0.set_tag(tag); downcast<latch8_device &>(device).m_node_map[0] = node;}
|
||||
static void set_discrete_node_1(device_t &device, const char *tag, UINT32 node) { downcast<latch8_device &>(device).m_node_device_1.set_tag(tag); downcast<latch8_device &>(device).m_node_map[1] = node;}
|
||||
static void set_discrete_node_2(device_t &device, const char *tag, UINT32 node) { downcast<latch8_device &>(device).m_node_device_2.set_tag(tag); downcast<latch8_device &>(device).m_node_map[2] = node;}
|
||||
static void set_discrete_node_3(device_t &device, const char *tag, UINT32 node) { downcast<latch8_device &>(device).m_node_device_3.set_tag(tag); downcast<latch8_device &>(device).m_node_map[3] = node;}
|
||||
static void set_discrete_node_4(device_t &device, const char *tag, UINT32 node) { downcast<latch8_device &>(device).m_node_device_4.set_tag(tag); downcast<latch8_device &>(device).m_node_map[4] = node;}
|
||||
static void set_discrete_node_5(device_t &device, const char *tag, UINT32 node) { downcast<latch8_device &>(device).m_node_device_5.set_tag(tag); downcast<latch8_device &>(device).m_node_map[5] = node;}
|
||||
static void set_discrete_node_6(device_t &device, const char *tag, UINT32 node) { downcast<latch8_device &>(device).m_node_device_6.set_tag(tag); downcast<latch8_device &>(device).m_node_map[6] = node;}
|
||||
static void set_discrete_node_7(device_t &device, const char *tag, UINT32 node) { downcast<latch8_device &>(device).m_node_device_7.set_tag(tag); downcast<latch8_device &>(device).m_node_map[7] = node;}
|
||||
|
||||
template<class _Object> static devcb2_base &set_devread_0(device_t &device, _Object object, int from_bit) { downcast<latch8_device &>(device).m_from_bit[0] = from_bit; return downcast<latch8_device &>(device).m_devread_0.set_callback(object); }
|
||||
template<class _Object> static devcb2_base &set_devread_1(device_t &device, _Object object, int from_bit) { downcast<latch8_device &>(device).m_from_bit[1] = from_bit; return downcast<latch8_device &>(device).m_devread_1.set_callback(object); }
|
||||
template<class _Object> static devcb2_base &set_devread_2(device_t &device, _Object object, int from_bit) { downcast<latch8_device &>(device).m_from_bit[2] = from_bit; return downcast<latch8_device &>(device).m_devread_2.set_callback(object); }
|
||||
template<class _Object> static devcb2_base &set_devread_3(device_t &device, _Object object, int from_bit) { downcast<latch8_device &>(device).m_from_bit[3] = from_bit; return downcast<latch8_device &>(device).m_devread_3.set_callback(object); }
|
||||
template<class _Object> static devcb2_base &set_devread_4(device_t &device, _Object object, int from_bit) { downcast<latch8_device &>(device).m_from_bit[4] = from_bit; return downcast<latch8_device &>(device).m_devread_4.set_callback(object); }
|
||||
template<class _Object> static devcb2_base &set_devread_5(device_t &device, _Object object, int from_bit) { downcast<latch8_device &>(device).m_from_bit[5] = from_bit; return downcast<latch8_device &>(device).m_devread_5.set_callback(object); }
|
||||
template<class _Object> static devcb2_base &set_devread_6(device_t &device, _Object object, int from_bit) { downcast<latch8_device &>(device).m_from_bit[6] = from_bit; return downcast<latch8_device &>(device).m_devread_6.set_callback(object); }
|
||||
template<class _Object> static devcb2_base &set_devread_7(device_t &device, _Object object, int from_bit) { downcast<latch8_device &>(device).m_from_bit[7] = from_bit; return downcast<latch8_device &>(device).m_devread_7.set_callback(object); }
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_config_complete();
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
TIMER_CALLBACK_MEMBER( timerproc );
|
||||
void update(UINT8 new_val, UINT8 mask);
|
||||
inline UINT8 bitx_r( offs_t offset, int bit);
|
||||
inline void bitx_w(int bit, offs_t offset, UINT8 data);
|
||||
private:
|
||||
// internal state
|
||||
struct latch8_t *m_token;
|
||||
UINT8 m_value;
|
||||
UINT8 m_has_node_map;
|
||||
UINT8 m_has_devread;
|
||||
|
||||
/* only for byte reads, does not affect bit reads and node_map */
|
||||
UINT32 m_maskout;
|
||||
UINT32 m_xorvalue; /* after mask */
|
||||
UINT32 m_nosync;
|
||||
UINT32 m_node_map[8];
|
||||
|
||||
optional_device<discrete_device> m_node_device_0;
|
||||
optional_device<discrete_device> m_node_device_1;
|
||||
optional_device<discrete_device> m_node_device_2;
|
||||
optional_device<discrete_device> m_node_device_3;
|
||||
optional_device<discrete_device> m_node_device_4;
|
||||
optional_device<discrete_device> m_node_device_5;
|
||||
optional_device<discrete_device> m_node_device_6;
|
||||
optional_device<discrete_device> m_node_device_7;
|
||||
|
||||
devcb2_read8 m_devread_0;
|
||||
devcb2_read8 m_devread_1;
|
||||
devcb2_read8 m_devread_2;
|
||||
devcb2_read8 m_devread_3;
|
||||
devcb2_read8 m_devread_4;
|
||||
devcb2_read8 m_devread_5;
|
||||
devcb2_read8 m_devread_6;
|
||||
devcb2_read8 m_devread_7;
|
||||
|
||||
UINT32 m_from_bit[8];
|
||||
};
|
||||
|
||||
extern const device_type LATCH8;
|
||||
@ -87,85 +148,79 @@ extern const device_type LATCH8;
|
||||
|
||||
/* Bit mask specifying bits to be masked *out* */
|
||||
#define MCFG_LATCH8_MASKOUT(_maskout) \
|
||||
static_cast<latch8_device *>(device)->set_maskout(_maskout);
|
||||
latch8_device::set_maskout(*device, _maskout);
|
||||
|
||||
/* Bit mask specifying bits to be inverted */
|
||||
#define MCFG_LATCH8_INVERT(_xor) \
|
||||
static_cast<latch8_device *>(device)->set_xorvalue(_xor);
|
||||
latch8_device::set_xorvalue(*device, _xor);
|
||||
|
||||
/* Bit mask specifying bits not needing cpu synchronization. */
|
||||
#define MCFG_LATCH8_NOSYNC(_nosync) \
|
||||
static_cast<latch8_device *>(device)->set_nosync(_nosync);
|
||||
latch8_device::set_nosync(*device, _nosync);
|
||||
|
||||
/* Write bit to discrete node */
|
||||
#define MCFG_LATCH8_DISCRETE_NODE(_device, _bit, _node) \
|
||||
static_cast<latch8_device *>(device)->set_discrete_node(_device, _bit, _node);
|
||||
#define MCFG_LATCH8_DISCRETE_NODE_0(_tag, _node) \
|
||||
latch8_device::set_discrete_node_0(*device, "^" _tag, _node);
|
||||
|
||||
#define MCFG_LATCH8_DISCRETE_NODE_1(_tag, _node) \
|
||||
latch8_device::set_discrete_node_1(*device, "^" _tag, _node);
|
||||
|
||||
#define MCFG_LATCH8_DISCRETE_NODE_2(_tag, _node) \
|
||||
latch8_device::set_discrete_node_2(*device, "^" _tag, _node);
|
||||
|
||||
#define MCFG_LATCH8_DISCRETE_NODE_3(_tag, _node) \
|
||||
latch8_device::set_discrete_node_3(*device, "^" _tag, _node);
|
||||
|
||||
#define MCFG_LATCH8_DISCRETE_NODE_4(_tag, _node) \
|
||||
latch8_device::set_discrete_node_4(*device, "^" _tag, _node);
|
||||
|
||||
#define MCFG_LATCH8_DISCRETE_NODE_5(_tag, _node) \
|
||||
latch8_device::set_discrete_node_5(*device, "^" _tag, _node);
|
||||
|
||||
#define MCFG_LATCH8_DISCRETE_NODE_6(_tag, _node) \
|
||||
latch8_device::set_discrete_node_6(*device, "^" _tag, _node);
|
||||
|
||||
#define MCFG_LATCH8_DISCRETE_NODE_7(_tag, _node) \
|
||||
latch8_device::set_discrete_node_7(*device, "^" _tag, _node);
|
||||
|
||||
/* Upon read, replace bits by reading from another device handler */
|
||||
#define MCFG_LATCH8_DEVREAD(_bit, _tag, _handler, _from_bit) \
|
||||
static_cast<latch8_device *>(device)->set_devread(_bit, _tag, _handler, _from_bit);
|
||||
#define MCFG_LATCH8_DEVREAD_0(_devcb, _from_bit) \
|
||||
devcb = &latch8_device::set_devread_0(*device, DEVCB2_##_devcb, _from_bit);
|
||||
|
||||
#define MCFG_LATCH8_DEVREAD_1(_devcb, _from_bit) \
|
||||
devcb = &latch8_device::set_devread_1(*device, DEVCB2_##_devcb, _from_bit);
|
||||
|
||||
#define MCFG_LATCH8_DEVREAD_2(_devcb, _from_bit) \
|
||||
devcb = &latch8_device::set_devread_2(*device, DEVCB2_##_devcb, _from_bit);
|
||||
|
||||
#define MCFG_LATCH8_DEVREAD_3(_devcb, _from_bit) \
|
||||
devcb = &latch8_device::set_devread_3(*device, DEVCB2_##_devcb, _from_bit);
|
||||
|
||||
#define MCFG_LATCH8_DEVREAD_4(_devcb, _from_bit) \
|
||||
devcb = &latch8_device::set_devread_4(*device, DEVCB2_##_devcb, _from_bit);
|
||||
|
||||
#define MCFG_LATCH8_DEVREAD_5(_devcb, _from_bit) \
|
||||
devcb = &latch8_device::set_devread_5(*device, DEVCB2_##_devcb, _from_bit);
|
||||
|
||||
#define MCFG_LATCH8_DEVREAD_6(_devcb, _from_bit) \
|
||||
devcb = &latch8_device::set_devread_6(*device, DEVCB2_##_devcb, _from_bit);
|
||||
|
||||
#define MCFG_LATCH8_DEVREAD_7(_devcb, _from_bit) \
|
||||
devcb = &latch8_device::set_devread_7(*device, DEVCB2_##_devcb, _from_bit);
|
||||
|
||||
/* Upon read, replace bits by reading from another machine handler */
|
||||
#define MCFG_LATCH8_READ(_bit, _handler, _from_bit) \
|
||||
static_cast<latch8_device *>(device)->set_read(_bit, _handler, _from_bit);
|
||||
|
||||
/* Accessor macros */
|
||||
|
||||
#define AM_LATCH8_READ(_tag) \
|
||||
AM_DEVREAD_LEGACY(_tag, latch8_r)
|
||||
AM_DEVREAD(_tag, latch8_device, read)
|
||||
|
||||
#define AM_LATCH8_READBIT(_tag, _bit) \
|
||||
AM_DEVREAD_LEGACY(_tag, latch8_bit ## _bit ## _q_r)
|
||||
AM_DEVREAD(_tag, latch8_device, bit ## _bit ## _q_r)
|
||||
|
||||
#define AM_LATCH8_WRITE(_tag) \
|
||||
AM_DEVWRITE_LEGACY(_tag, latch8_w)
|
||||
AM_DEVWRITE(_tag, latch8_device, write)
|
||||
|
||||
#define AM_LATCH8_READWRITE(_tag) \
|
||||
AM_DEVREADWRITE_LEGACY(_tag, latch8_r, latch8_w)
|
||||
|
||||
/* write & read full byte */
|
||||
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_r );
|
||||
DECLARE_WRITE8_DEVICE_HANDLER( latch8_w );
|
||||
|
||||
/* reset the latch */
|
||||
|
||||
DECLARE_WRITE8_DEVICE_HANDLER( latch8_reset );
|
||||
|
||||
/* read bit x */
|
||||
/* return (latch >> x) & 0x01 */
|
||||
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit0_r );
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit1_r );
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit2_r );
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit3_r );
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit4_r );
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit5_r );
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit6_r );
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit7_r );
|
||||
|
||||
/* read inverted bit x */
|
||||
/* return (latch >> x) & 0x01 */
|
||||
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit0_q_r );
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit1_q_r );
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit2_q_r );
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit3_q_r );
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit4_q_r );
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit5_q_r );
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit6_q_r );
|
||||
DECLARE_READ8_DEVICE_HANDLER( latch8_bit7_q_r );
|
||||
|
||||
/* write bit x from data into bit determined by offset */
|
||||
/* latch = (latch & ~(1<<offset)) | (((data >> x) & 0x01) << offset) */
|
||||
|
||||
DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit0_w );
|
||||
DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit1_w );
|
||||
DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit2_w );
|
||||
DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit3_w );
|
||||
DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit4_w );
|
||||
DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit5_w );
|
||||
DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit6_w );
|
||||
DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit7_w );
|
||||
AM_DEVREADWRITE(_tag, latch8_device, read, write)
|
||||
|
||||
#endif /* __LATCH8_H_ */
|
||||
|
||||
@ -1200,15 +1200,15 @@ Addresses found at @0x510, cpu2
|
||||
|
||||
WRITE8_MEMBER(dkong_state::M58817_command_w)
|
||||
{
|
||||
tms5110_device *tms5110 = machine().device<tms5110_device>("tms");
|
||||
tms5110->ctl_w(space, 0, data & 0x0f);
|
||||
tms5110->pdc_w((data>>4) & 0x01);
|
||||
m58817_device *m58817 = machine().device<m58817_device>("tms");
|
||||
m58817->ctl_w(space, 0, data & 0x0f);
|
||||
m58817->pdc_w((data>>4) & 0x01);
|
||||
/* FIXME 0x20 is CS */
|
||||
}
|
||||
|
||||
READ8_DEVICE_HANDLER(M58817_status_r)
|
||||
READ8_MEMBER(dkong_state::M58817_status_r)
|
||||
{
|
||||
m58817_device *m58817 = (m58817_device *) device;
|
||||
m58817_device *m58817 = machine().device<m58817_device>("tms");
|
||||
return m58817->status_r(space, offset, mem_mask);
|
||||
}
|
||||
|
||||
@ -1237,12 +1237,12 @@ READ8_MEMBER(dkong_state::dkong_voice_status_r)
|
||||
|
||||
READ8_MEMBER(dkong_state::dkong_tune_r)
|
||||
{
|
||||
device_t *device = machine().device("ls175.3d");
|
||||
UINT8 page = latch8_r(m_dev_vp2, space, 0) & 0x47;
|
||||
latch8_device *m_ls175_3d = machine().device<latch8_device>("ls175.3d");
|
||||
UINT8 page = m_dev_vp2->read(space, 0) & 0x47;
|
||||
|
||||
if ( page & 0x40 )
|
||||
{
|
||||
return (latch8_r(device, space, 0) & 0x0F) | (dkong_voice_status_r(space, 0) << 4);
|
||||
return (m_ls175_3d->read(space, 0) & 0x0F) | (dkong_voice_status_r(space, 0) << 4);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -1302,7 +1302,7 @@ static ADDRESS_MAP_START( dkongjr_sound_io_map, AS_IO, 8, dkong_state )
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( radarscp1_sound_io_map, AS_IO, 8, dkong_state )
|
||||
AM_RANGE(0x00, 0x00) AM_MIRROR(0xff) AM_DEVREAD_LEGACY("ls175.3d", latch8_r)
|
||||
AM_RANGE(0x00, 0x00) AM_MIRROR(0xff) AM_DEVREAD("ls175.3d", latch8_device, read)
|
||||
AM_RANGE(0x00, 0xff) AM_WRITE(dkong_p1_w) /* DAC here */
|
||||
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_LATCH8_READ("virtual_p1")
|
||||
AM_WRITE(M58817_command_w)
|
||||
@ -1362,11 +1362,11 @@ MACHINE_CONFIG_FRAGMENT( dkong2b_audio )
|
||||
MCFG_LATCH8_INVERT(0x0F)
|
||||
|
||||
MCFG_LATCH8_ADD("ls259.6h")
|
||||
MCFG_LATCH8_DISCRETE_NODE("discrete", 0, DS_SOUND0_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE("discrete", 1, DS_SOUND1_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE("discrete", 2, DS_SOUND2_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE("discrete", 6, DS_SOUND6_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE("discrete", 7, DS_SOUND7_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE_0("discrete",DS_SOUND0_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE_1("discrete",DS_SOUND1_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE_2("discrete",DS_SOUND2_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE_6("discrete",DS_SOUND6_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE_7("discrete",DS_SOUND7_INP)
|
||||
|
||||
/* If P2.Bit7 -> is apparently an external signal decay or other output control
|
||||
* If P2.Bit6 -> activates the external compressed sample ROM (not radarscp1)
|
||||
@ -1377,8 +1377,8 @@ MACHINE_CONFIG_FRAGMENT( dkong2b_audio )
|
||||
|
||||
MCFG_LATCH8_ADD( "virtual_p2" ) /* virtual latch for port B */
|
||||
MCFG_LATCH8_INVERT( 0x20 ) /* signal is inverted */
|
||||
MCFG_LATCH8_DEVREAD(5, "ls259.6h", latch8_r, 3)
|
||||
MCFG_LATCH8_DISCRETE_NODE("discrete", 7, DS_DISCHARGE_INV)
|
||||
MCFG_LATCH8_DEVREAD_5(DEVREAD8("ls259.6h", latch8_device, read), 3)
|
||||
MCFG_LATCH8_DISCRETE_NODE_7("discrete", DS_DISCHARGE_INV)
|
||||
|
||||
MCFG_CPU_ADD("soundcpu", MB8884, I8035_CLOCK)
|
||||
MCFG_CPU_PROGRAM_MAP(dkong_sound_map)
|
||||
@ -1404,8 +1404,8 @@ MACHINE_CONFIG_DERIVED( radarscp1_audio, radarscp_audio )
|
||||
/* virtual_p2 is not read -see memory map-, all bits are output bits */
|
||||
MCFG_LATCH8_ADD( "virtual_p1" ) /* virtual latch for port A */
|
||||
MCFG_LATCH8_INVERT( 0x80 ) /* signal is inverted */
|
||||
MCFG_LATCH8_DEVREAD(7, "ls259.6h", latch8_r, 3)
|
||||
MCFG_LATCH8_DEVREAD(6, "tms", M58817_status_r, 0)
|
||||
MCFG_LATCH8_DEVREAD_7(DEVREAD8("ls259.6h", latch8_device, read), 3)
|
||||
MCFG_LATCH8_DEVREAD_6(READ8(dkong_state,M58817_status_r), 0)
|
||||
|
||||
/* tms memory controller */
|
||||
MCFG_DEVICE_ADD("m58819", M58819, 0)
|
||||
@ -1424,22 +1424,22 @@ MACHINE_CONFIG_FRAGMENT( dkongjr_audio )
|
||||
MCFG_LATCH8_MASKOUT(0xE0)
|
||||
|
||||
MCFG_LATCH8_ADD( "ls259.6h")
|
||||
MCFG_LATCH8_DISCRETE_NODE("discrete", 0, DS_SOUND0_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE("discrete", 1, DS_SOUND1_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE("discrete", 2, DS_SOUND2_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE("discrete", 7, DS_SOUND7_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE_0("discrete", DS_SOUND0_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE_1("discrete", DS_SOUND1_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE_2("discrete", DS_SOUND2_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE_7("discrete", DS_SOUND7_INP)
|
||||
|
||||
MCFG_LATCH8_ADD( "ls259.5h")
|
||||
MCFG_LATCH8_DISCRETE_NODE("discrete", 1, DS_SOUND9_INP)
|
||||
MCFG_LATCH8_DISCRETE_NODE_1("discrete", DS_SOUND9_INP)
|
||||
|
||||
MCFG_LATCH8_ADD( "ls259.4h")
|
||||
|
||||
MCFG_LATCH8_ADD( "virtual_p2" ) /* virtual latch for port B */
|
||||
MCFG_LATCH8_INVERT( 0x70 ) /* all signals are inverted */
|
||||
MCFG_LATCH8_DEVREAD(6, "ls259.4h", latch8_r, 1)
|
||||
MCFG_LATCH8_DEVREAD(5, "ls259.6h", latch8_r, 3)
|
||||
MCFG_LATCH8_DEVREAD(4, "ls259.6h", latch8_r, 6)
|
||||
MCFG_LATCH8_DISCRETE_NODE("discrete", 7, DS_DISCHARGE_INV)
|
||||
MCFG_LATCH8_DEVREAD_6(DEVREAD8("ls259.4h", latch8_device, read), 1)
|
||||
MCFG_LATCH8_DEVREAD_5(DEVREAD8("ls259.6h", latch8_device, read), 3)
|
||||
MCFG_LATCH8_DEVREAD_4(DEVREAD8("ls259.6h", latch8_device, read), 6)
|
||||
MCFG_LATCH8_DISCRETE_NODE_7("discrete", DS_DISCHARGE_INV)
|
||||
|
||||
MCFG_CPU_ADD("soundcpu", MB8884, I8035_CLOCK)
|
||||
MCFG_CPU_PROGRAM_MAP(dkong_sound_map)
|
||||
|
||||
@ -327,7 +327,6 @@ this is a legitimate Nintendo Kit.
|
||||
#include "cpu/m6502/m6502.h"
|
||||
#include "includes/dkong.h"
|
||||
#include "machine/8257dma.h"
|
||||
#include "machine/latch8.h"
|
||||
#include "machine/eepromser.h"
|
||||
|
||||
/*************************************
|
||||
@ -580,7 +579,7 @@ WRITE8_MEMBER(dkong_state::p8257_drq_w)
|
||||
READ8_MEMBER(dkong_state::dkong_in2_r)
|
||||
{
|
||||
/* mcu status (sound feedback) is inverted bit4 from port B (8039) */
|
||||
UINT8 mcustatus = latch8_bit4_q_r(m_dev_vp2, space, 0);
|
||||
UINT8 mcustatus = m_dev_vp2->bit4_q_r(space, 0);
|
||||
UINT8 r;
|
||||
|
||||
r = (ioport("IN2")->read() & 0xBF) | (mcustatus << 6);
|
||||
@ -778,7 +777,7 @@ static ADDRESS_MAP_START( dkong_map, AS_PROGRAM, 8, dkong_state )
|
||||
AM_RANGE(0x7c80, 0x7c80) AM_READ_PORT("IN1") AM_WRITE(radarscp_grid_color_w)/* IN1 */
|
||||
|
||||
AM_RANGE(0x7d00, 0x7d00) AM_READ(dkong_in2_r) /* IN2 */
|
||||
AM_RANGE(0x7d00, 0x7d07) AM_DEVWRITE_LEGACY("ls259.6h", latch8_bit0_w) /* Sound signals */
|
||||
AM_RANGE(0x7d00, 0x7d07) AM_DEVWRITE("ls259.6h", latch8_device, bit0_w) /* Sound signals */
|
||||
|
||||
AM_RANGE(0x7d80, 0x7d80) AM_READ_PORT("DSW0") AM_WRITE(dkong_audio_irq_w) /* DSW0 */
|
||||
AM_RANGE(0x7d81, 0x7d81) AM_WRITE(radarscp_grid_enable_w)
|
||||
@ -800,10 +799,10 @@ static ADDRESS_MAP_START( dkongjr_map, AS_PROGRAM, 8, dkong_state )
|
||||
AM_RANGE(0x7c00, 0x7c00) AM_READ_PORT("IN0") AM_LATCH8_WRITE("ls174.3d") /* IN0, sound interface */
|
||||
|
||||
AM_RANGE(0x7c80, 0x7c80) AM_READ_PORT("IN1") AM_WRITE(dkongjr_gfxbank_w)
|
||||
AM_RANGE(0x7c80, 0x7c87) AM_DEVWRITE_LEGACY("ls259.4h", latch8_bit0_w) /* latch for sound and signals above */
|
||||
AM_RANGE(0x7c80, 0x7c87) AM_DEVWRITE("ls259.4h", latch8_device, bit0_w) /* latch for sound and signals above */
|
||||
|
||||
AM_RANGE(0x7d00, 0x7d00) AM_READ(dkongjr_in2_r) /* IN2 */
|
||||
AM_RANGE(0x7d00, 0x7d07) AM_DEVWRITE_LEGACY("ls259.6h",latch8_bit0_w) /* Sound addrs */
|
||||
AM_RANGE(0x7d00, 0x7d07) AM_DEVWRITE("ls259.6h", latch8_device, bit0_w) /* Sound addrs */
|
||||
|
||||
AM_RANGE(0x7d80, 0x7d80) AM_READ_PORT("DSW0") AM_WRITE(dkong_audio_irq_w) /* DSW0 */
|
||||
AM_RANGE(0x7d82, 0x7d82) AM_WRITE(dkong_flipscreen_w)
|
||||
@ -811,7 +810,7 @@ static ADDRESS_MAP_START( dkongjr_map, AS_PROGRAM, 8, dkong_state )
|
||||
AM_RANGE(0x7d84, 0x7d84) AM_WRITE(nmi_mask_w)
|
||||
AM_RANGE(0x7d85, 0x7d85) AM_WRITE(p8257_drq_w) /* P8257 ==> /DRQ0 /DRQ1 */
|
||||
AM_RANGE(0x7d86, 0x7d87) AM_WRITE(dkong_palettebank_w)
|
||||
AM_RANGE(0x7d80, 0x7d87) AM_DEVWRITE_LEGACY("ls259.5h", latch8_bit0_w) /* latch for sound and signals above*/
|
||||
AM_RANGE(0x7d80, 0x7d87) AM_DEVWRITE("ls259.5h", latch8_device, bit0_w) /* latch for sound and signals above*/
|
||||
|
||||
AM_RANGE(0x8000, 0x9fff) AM_ROM /* bootleg DKjr only */
|
||||
AM_RANGE(0xb000, 0xbfff) AM_ROM /* pestplce only */
|
||||
@ -855,10 +854,10 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( s2650_map, AS_PROGRAM, 8, dkong_state )
|
||||
AM_RANGE(0x0000, 0x0fff) AM_ROM
|
||||
AM_RANGE(0x1000, 0x13ff) AM_RAM AM_SHARE("sprite_ram") /* 0x7000 */
|
||||
AM_RANGE(0x1400, 0x1400) AM_MIRROR(0x007f) AM_READ_PORT("IN0") AM_DEVWRITE_LEGACY("ls175.3d", latch8_w)
|
||||
AM_RANGE(0x1400, 0x1400) AM_MIRROR(0x007f) AM_READ_PORT("IN0") AM_DEVWRITE("ls175.3d", latch8_device, write)
|
||||
AM_RANGE(0x1480, 0x1480) AM_READ_PORT("IN1")
|
||||
AM_RANGE(0x1500, 0x1500) AM_MIRROR(0x007f) AM_READ(dkong_in2_r) /* IN2 */
|
||||
AM_RANGE(0x1500, 0x1507) AM_DEVWRITE_LEGACY("ls259.6h", latch8_bit0_w) /* Sound signals */
|
||||
AM_RANGE(0x1500, 0x1507) AM_DEVWRITE("ls259.6h", latch8_device, bit0_w) /* Sound signals */
|
||||
AM_RANGE(0x1580, 0x1580) AM_READ_PORT("DSW0") AM_WRITE(dkong_audio_irq_w) /* DSW0 */
|
||||
AM_RANGE(0x1582, 0x1582) AM_WRITE(dkong_flipscreen_w)
|
||||
AM_RANGE(0x1583, 0x1583) AM_WRITE(dkong_spritebank_w) /* 2 PSL Signal */
|
||||
|
||||
@ -250,6 +250,7 @@ public:
|
||||
DECLARE_MACHINE_RESET(strtheat);
|
||||
DECLARE_MACHINE_RESET(drakton);
|
||||
DECLARE_WRITE8_MEMBER(M58817_command_w);
|
||||
DECLARE_READ8_MEMBER(M58817_status_r);
|
||||
DECLARE_READ8_MEMBER(dkong_voice_status_r);
|
||||
DECLARE_READ8_MEMBER(dkong_tune_r);
|
||||
DECLARE_WRITE8_MEMBER(dkong_p1_w);
|
||||
|
||||
@ -10,7 +10,6 @@
|
||||
#include "emu.h"
|
||||
#include "video/resnet.h"
|
||||
#include "includes/dkong.h"
|
||||
#include "machine/latch8.h"
|
||||
|
||||
#define RADARSCP_BCK_COL_OFFSET 256
|
||||
#define RADARSCP_GRID_COL_OFFSET (RADARSCP_BCK_COL_OFFSET + 256)
|
||||
@ -708,7 +707,7 @@ void dkong_state::radarscp_step(int line_cnt)
|
||||
|
||||
/* Now mix with SND02 (sound 2) line - on 74ls259, bit2 */
|
||||
address_space &space = machine().driver_data()->generic_space();
|
||||
m_rflip_sig = latch8_bit2_r(m_dev_6h, space, 0) & m_lfsr_5I;
|
||||
m_rflip_sig = m_dev_6h->bit2_r(space, 0) & m_lfsr_5I;
|
||||
|
||||
/* blue background generation */
|
||||
|
||||
@ -773,7 +772,7 @@ void dkong_state::radarscp_step(int line_cnt)
|
||||
*
|
||||
* Mixed with ANS line (bit 5) from Port B of 8039
|
||||
*/
|
||||
if (m_grid_on && latch8_bit5_r(m_dev_vp2, space, 0))
|
||||
if (m_grid_on && m_dev_vp2->bit5_r(space, 0))
|
||||
{
|
||||
diff = (0.0 - m_cv3);
|
||||
diff = diff - diff*exp(0.0 - (1.0/RC32 * dt) );
|
||||
|
||||
Loading…
Reference in New Issue
Block a user