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https://github.com/holub/mame
synced 2025-10-04 16:34:53 +03:00
Better fix for cuebrckj0102u5gre. At least it is plausible that this is the way the real hardware works.
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@ -2270,6 +2270,11 @@ void K052109_set_RMRD_line(int state)
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K052109_RMRD_line = state;
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}
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int K052109_get_RMRD_line(void)
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{
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return K052109_RMRD_line;
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}
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void K052109_tilemap_update(void)
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{
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@ -75,6 +75,7 @@ WRITE16_HANDLER( K052109_word_w );
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READ16_HANDLER( K052109_lsb_r );
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WRITE16_HANDLER( K052109_lsb_w );
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void K052109_set_RMRD_line(int state);
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int K052109_get_RMRD_line(void);
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void K052109_tilemap_update(void);
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int K052109_is_IRQ_enabled(void);
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void K052109_set_layer_offsets(int layer, int dx, int dy);
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@ -10,6 +10,7 @@ static int prmrsocr_sprite_bank;
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static int sorted_layer[3];
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static int dim_c,dim_v; /* ssriders, tmnt2 */
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static int lastdim,lasten;
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static int priorityflag;
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static tilemap *roz_tilemap;
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@ -63,23 +64,15 @@ static void mia_tile_callback(int layer,int bank,int *code,int *color,int *flags
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static void cuebrick_tile_callback(int layer,int bank,int *code,int *color,int *flags,int *priority)
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{
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/* HACK! - since konamiic.c calls here with layer=0 when reading the ROM, detect this
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and return the proper value in 'code' */
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if ((cpu_getactivecpu() == 0) && ((activecpu_get_pc() & 0xffff0) == 0x002630))
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*code |= ((*color & 0xf) << 8);
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/* normal access via the tilemap code */
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else
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{
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if (layer == 0)
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{
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*code |= ((*color & 0x01) << 8);
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*color = layer_colorbase[layer] + ((*color & 0x80) >> 5) + ((*color & 0x10) >> 1);
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}
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else
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{
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*code |= ((*color & 0xf) << 8);
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*color = layer_colorbase[layer] + ((*color & 0xe0) >> 5);
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}
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if ((K052109_get_RMRD_line() == CLEAR_LINE) && (layer == 0))
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{
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*code |= ((*color & 0x01) << 8);
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*color = layer_colorbase[layer] + ((*color & 0x80) >> 5) + ((*color & 0x10) >> 1);
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}
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else
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{
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*code |= ((*color & 0xf) << 8);
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*color = layer_colorbase[layer] + ((*color & 0xe0) >> 5);
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}
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}
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@ -355,7 +348,7 @@ WRITE16_HANDLER( tmnt_0a0000_w )
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interrupt_enable_w(0,data & 0x20);
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/* bit 7 = enable char ROM reading through the video RAM */
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K052109_set_RMRD_line((data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
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K052109_set_RMRD_line(data & 0x80 ? ASSERT_LINE : CLEAR_LINE);
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/* other bits unused */
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}
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