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Petit Lot (ver. 4.1) [buffi]

New clones marked not working
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Ichi Ban Jyan (Ver 2.35) [buffi]

- misc/fresh.cpp: small cleanups

- skeleton/cle68k.cpp: added 2nd RAMDAC place-holder
This commit is contained in:
Ivan Vangelista 2025-04-03 17:11:54 +02:00
parent c5629193ce
commit 9a2b909a9e
5 changed files with 267 additions and 114 deletions
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21
src/mame/dynax/royalmah.cpp
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@ -5998,7 +5998,7 @@ HSync - 15.510kHz
ROM_START( ichiban ) // TODO: how does the banking work? ROM_START( ichiban ) // TODO: how does the banking work?
ROM_REGION( 0x60000, "maincpu", 0 ) // opcodes in first half are mixed with pseudo-random garbage ROM_REGION( 0x60000, "maincpu", 0 ) // opcodes in first half are mixed with pseudo-random garbage
ROM_LOAD( "3.u15", 0x00000, 0x20000, CRC(76240568) SHA1(cf055d1eaae25661a49ec4722a2c7caca862e66a) ) ROM_LOAD( "3.u15", 0x00000, 0x20000, CRC(76240568) SHA1(cf055d1eaae25661a49ec4722a2c7caca862e66a) ) // at 0x10008 ICHI-BAN-JYAN Ver3.05 1993/02/07 by OCT
ROM_LOAD( "1.u28", 0x20000, 0x08000, CRC(2caa4d3f) SHA1(5e5af164880140b764c097a65388c22ba5ea572b) ) // bank 2 (title screen) ROM_LOAD( "1.u28", 0x20000, 0x08000, CRC(2caa4d3f) SHA1(5e5af164880140b764c097a65388c22ba5ea572b) ) // bank 2 (title screen)
ROM_IGNORE(0x18000) ROM_IGNORE(0x18000)
ROM_LOAD( "2.u14", 0x30000, 0x08000, CRC(b4834d8e) SHA1(836ddf7586dc5440faf88f5ec50a32265e9a0ec8) ) // bank 4 (mahjong tiles) ROM_LOAD( "2.u14", 0x30000, 0x08000, CRC(b4834d8e) SHA1(836ddf7586dc5440faf88f5ec50a32265e9a0ec8) ) // bank 4 (mahjong tiles)
@ -6018,7 +6018,21 @@ ROM_START( ichiban ) // TODO: how does the banking work?
ROM_REGION( 0x600, "proms", 0 ) ROM_REGION( 0x600, "proms", 0 )
ROM_LOAD( "mjr.u36", 0x000, 0x200, CRC(31cd7a90) SHA1(1525ad19d748561a52626e4ab13df67d9bedf3b8) ) ROM_LOAD( "mjr.u36", 0x000, 0x200, CRC(31cd7a90) SHA1(1525ad19d748561a52626e4ab13df67d9bedf3b8) ) // all 3 BPROMs are AM27S13 or compatible
ROM_LOAD( "mjg.u37", 0x200, 0x200, CRC(5b3562aa) SHA1(ada60d2a5a5a657d7b209d18a23b685305d9ff7b) )
ROM_LOAD( "mjb.u38", 0x400, 0x200, CRC(0ef881cb) SHA1(44b61a443d683f5cb2d1b1a4f74d8a8f41021de5) )
ROM_END
ROM_START( ichiban235 ) // TODO: how does the banking work?
ROM_REGION( 0x60000, "maincpu", 0 ) // opcodes in first half are mixed with pseudo-random garbage
ROM_LOAD( "a3.u15", 0x00000, 0x20000, CRC(28e2b636) SHA1(8e813fe1b589f31a3535662b8bfe577b3f862b8c) ) // at 0x10008 ICHI-BAN-JYAN Ver2.35 1992/11/30 by OCT
ROM_LOAD( "a1.u28", 0x20000, 0x08000, CRC(2caa4d3f) SHA1(5e5af164880140b764c097a65388c22ba5ea572b) ) // == 1 above, bank 2 (title screen)
ROM_IGNORE(0x18000)
ROM_LOAD( "a2.u14", 0x30000, 0x08000, CRC(b4834d8e) SHA1(836ddf7586dc5440faf88f5ec50a32265e9a0ec8) ) // == 2 above, bank 4 (mahjong tiles)
ROM_IGNORE(0x18000)
ROM_REGION( 0x600, "proms", 0 )
ROM_LOAD( "mjr.u36", 0x000, 0x200, CRC(31cd7a90) SHA1(1525ad19d748561a52626e4ab13df67d9bedf3b8) ) // all 3 BPROMs are AM27S13 or compatible
ROM_LOAD( "mjg.u37", 0x200, 0x200, CRC(5b3562aa) SHA1(ada60d2a5a5a657d7b209d18a23b685305d9ff7b) ) ROM_LOAD( "mjg.u37", 0x200, 0x200, CRC(5b3562aa) SHA1(ada60d2a5a5a657d7b209d18a23b685305d9ff7b) )
ROM_LOAD( "mjb.u38", 0x400, 0x200, CRC(0ef881cb) SHA1(44b61a443d683f5cb2d1b1a4f74d8a8f41021de5) ) ROM_LOAD( "mjb.u38", 0x400, 0x200, CRC(0ef881cb) SHA1(44b61a443d683f5cb2d1b1a4f74d8a8f41021de5) )
ROM_END ROM_END
@ -6312,7 +6326,8 @@ GAME( 1991, mjvegas, mjvegasa, mjvegas, mjvegasa, royalmah_prgbank_state,
GAME( 1992, cafetime, 0, cafetime, cafetime, royalmah_prgbank_state, init_cafetime, ROT0, "Dynax", "Mahjong Cafe Time", 0 ) GAME( 1992, cafetime, 0, cafetime, cafetime, royalmah_prgbank_state, init_cafetime, ROT0, "Dynax", "Mahjong Cafe Time", 0 )
GAME( 1993, cafedoll, 0, cafedoll, cafedoll, royalmah_prgbank_state, init_cafedoll, ROT0, "Dynax", "Mahjong Cafe Doll (Japan, Ver. 1.00)", MACHINE_NOT_WORKING ) // fails protection check (at 0x178 it puts 0x55 in 0xFFBF instead of 0x56 like the code expects and chaos ensues) GAME( 1993, cafedoll, 0, cafedoll, cafedoll, royalmah_prgbank_state, init_cafedoll, ROT0, "Dynax", "Mahjong Cafe Doll (Japan, Ver. 1.00)", MACHINE_NOT_WORKING ) // fails protection check (at 0x178 it puts 0x55 in 0xFFBF instead of 0x56 like the code expects and chaos ensues)
GAME( 1993, cafedollg, cafedoll, cafedoll, cafedoll, royalmah_prgbank_state, init_cafedoll, ROT0, "Dynax", "Mahjong Cafe Doll Great (Japan, Ver. 1.00)", MACHINE_NOT_WORKING ) // fails protection check (at 0x178 it puts 0x55 in 0xFFBF instead of 0x56 like the code expects and chaos ensues) GAME( 1993, cafedollg, cafedoll, cafedoll, cafedoll, royalmah_prgbank_state, init_cafedoll, ROT0, "Dynax", "Mahjong Cafe Doll Great (Japan, Ver. 1.00)", MACHINE_NOT_WORKING ) // fails protection check (at 0x178 it puts 0x55 in 0xFFBF instead of 0x56 like the code expects and chaos ensues)
GAME( 1993, ichiban, 0, ichiban, ichiban, royalmah_prgbank_state, init_ichiban, ROT0, "Excel", "Ichi Ban Jyan", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // ROM banking is wrong, causing several GFX problems GAME( 1993, ichiban, 0, ichiban, ichiban, royalmah_prgbank_state, init_ichiban, ROT0, "Excel", "Ichi Ban Jyan (Ver 3.05)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // ROM banking is wrong, causing several GFX problems
GAME( 1993, ichiban235, ichiban, ichiban, ichiban, royalmah_prgbank_state, init_ichiban, ROT0, "Excel", "Ichi Ban Jyan (Ver 2.35)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // ROM banking is wrong, causing several GFX problems
GAME( 1993, dragonmj, 0, ichiban, ichiban, royalmah_prgbank_state, init_ichiban, ROT0, "OCT", "Dragon Mahjong (Ver 1.20)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // " - DRAGON Ver1.20 1993/11/09 GAME( 1993, dragonmj, 0, ichiban, ichiban, royalmah_prgbank_state, init_ichiban, ROT0, "OCT", "Dragon Mahjong (Ver 1.20)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // " - DRAGON Ver1.20 1993/11/09
GAME( 1993, dragonmj103, dragonmj, ichiban, ichiban, royalmah_prgbank_state, init_ichiban, ROT0, "OCT", "Dragon Mahjong (Ver 1.03)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // " - DRAGON Ver1.03 1993/10/16 GAME( 1993, dragonmj103, dragonmj, ichiban, ichiban, royalmah_prgbank_state, init_ichiban, ROT0, "OCT", "Dragon Mahjong (Ver 1.03)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // " - DRAGON Ver1.03 1993/10/16
GAME( 1995, mjtensin, 0, mjtensin, mjtensin, royalmah_prgbank_state, init_mjtensin, ROT0, "Dynax", "Mahjong Tensinhai (Japan)", MACHINE_NOT_WORKING ) GAME( 1995, mjtensin, 0, mjtensin, mjtensin, royalmah_prgbank_state, init_mjtensin, ROT0, "Dynax", "Mahjong Tensinhai (Japan)", MACHINE_NOT_WORKING )

4
src/mame/mame.lst
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@ -17750,6 +17750,7 @@ dondenmj
dragonmj dragonmj
dragonmj103 dragonmj103
ichiban ichiban
ichiban235
ippatsu ippatsu
jangtaku jangtaku
janoh janoh
@ -43191,6 +43192,9 @@ sh4robot
@source:skeleton/shine.cpp @source:skeleton/shine.cpp
shine shine
@source:skeleton/shoken_md06.cpp
petitlot
@source:skeleton/si5500.cpp @source:skeleton/si5500.cpp
si5500 si5500

163
src/mame/misc/fresh.cpp
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@ -1,11 +1,11 @@
// license:BSD-3-Clause // license:BSD-3-Clause
// copyright-holders:David Haywood // copyright-holders: David Haywood
/* /*
fruit fresh by chain leisure electronic co., ltd. Fruit Fresh by Chain Leisure Electronic Co., LTD.
cpu 68000 xtal 24Mhz CPU 68000 XTAL 24MHz
4* 8 dipswitchs 4* 8 dipswitchs
@ -13,18 +13,20 @@ cpu 68000 xtal 24Mhz
SW1 for reset? SW1 for reset?
2x Altera epm7064lc84 2x Altera EPM7064lC84
rom 5 and 6 are prg roms ROM 5 and 6 are prg ROMs
*/ */
// notes : is the reel scrolling (division of the screen) done with raster interrupts? // notes : is the reel scrolling (division of the screen) done with raster interrupts?
#include "emu.h" #include "emu.h"
#include "cpu/m68000/m68000.h" #include "cpu/m68000/m68000.h"
#include "machine/timer.h" #include "machine/timer.h"
#include "sound/ymopl.h" #include "sound/ymopl.h"
#include "emupal.h" #include "emupal.h"
#include "screen.h" #include "screen.h"
#include "speaker.h" #include "speaker.h"
@ -38,46 +40,36 @@ class fresh_state : public driver_device
public: public:
fresh_state(const machine_config &mconfig, device_type type, const char *tag) : fresh_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag), driver_device(mconfig, type, tag),
m_bg_videoram(*this, "bg_videoram"), m_bg_videoram(*this, "bg_videoram%u", 0U),
m_bg_2_videoram(*this, "bg_videoram_2"), m_attr_videoram(*this, "attr_videoram%u", 0U),
m_attr_videoram(*this, "attr_videoram"),
m_attr_2_videoram(*this, "attr_videoram_2"),
m_maincpu(*this, "maincpu"), m_maincpu(*this, "maincpu"),
m_gfxdecode(*this, "gfxdecode"), m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette") m_palette(*this, "palette")
{ } { }
void fresh(machine_config &config); void fresh(machine_config &config) ATTR_COLD;
protected: protected:
virtual void video_start() override ATTR_COLD; virtual void video_start() override ATTR_COLD;
private: private:
tilemap_t *m_bg_tilemap = nullptr; tilemap_t *m_bg_tilemap[2]{};
tilemap_t *m_bg_2_tilemap = nullptr;
required_shared_ptr<uint16_t> m_bg_videoram; required_shared_ptr_array<uint16_t, 2> m_bg_videoram;
required_shared_ptr<uint16_t> m_bg_2_videoram; required_shared_ptr_array<uint16_t, 2> m_attr_videoram;
required_shared_ptr<uint16_t> m_attr_videoram;
required_shared_ptr<uint16_t> m_attr_2_videoram;
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
required_device<gfxdecode_device> m_gfxdecode; required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette; required_device<palette_device> m_palette;
void fresh_bg_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void fresh_attr_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
TILE_GET_INFO_MEMBER(get_fresh_bg_tile_info);
void fresh_bg_2_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void fresh_attr_2_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
TILE_GET_INFO_MEMBER(get_fresh_bg_2_tile_info);
uint16_t m_d30000_value = 0; uint16_t m_d30000_value = 0;
void d30000_write(uint16_t data) template <uint8_t Which> void bg_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
{ template <uint8_t Which> void attr_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
m_d30000_value = data; template <uint8_t Which> TILE_GET_INFO_MEMBER(get_bg_tile_info);
}
void d30000_write(uint16_t data) { m_d30000_value = data; }
void c71000_write(uint16_t data) void c71000_write(uint16_t data)
{ {
@ -96,93 +88,65 @@ private:
logerror("c76000_write (scroll 3) %04x (m_d30000_value = %04x)\n", data, m_d30000_value); logerror("c76000_write (scroll 3) %04x (m_d30000_value = %04x)\n", data, m_d30000_value);
} }
uint16_t unk_r() uint16_t unk_r() { return machine().rand(); }
{ uint16_t unk2_r() { return 0x10; }
return machine().rand();
}
uint16_t unk2_r()
{
return 0x10;
}
TIMER_DEVICE_CALLBACK_MEMBER(fake_scanline); TIMER_DEVICE_CALLBACK_MEMBER(fake_scanline);
uint32_t screen_update_fresh(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void fresh_map(address_map &map) ATTR_COLD; void program_map(address_map &map) ATTR_COLD;
}; };
TILE_GET_INFO_MEMBER(fresh_state::get_fresh_bg_tile_info) template <uint8_t Which>
TILE_GET_INFO_MEMBER(fresh_state::get_bg_tile_info)
{ {
int tileno, pal; int const tileno = m_bg_videoram[Which][tile_index];
tileno = m_bg_videoram[tile_index]; int const pal = m_attr_videoram[Which][tile_index];
pal = m_attr_videoram[tile_index]; tileinfo.set(Which ^ 1, tileno, pal, 0);
tileinfo.set(1, tileno, pal, 0);
} }
void fresh_state::fresh_bg_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask) template <uint8_t Which>
void fresh_state::bg_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{ {
COMBINE_DATA(&m_bg_videoram[offset]); COMBINE_DATA(&m_bg_videoram[Which][offset]);
m_bg_tilemap->mark_tile_dirty(offset); m_bg_tilemap[Which]->mark_tile_dirty(offset);
} }
void fresh_state::fresh_attr_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask) template <uint8_t Which>
void fresh_state::attr_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{ {
COMBINE_DATA(&m_attr_videoram[offset]); COMBINE_DATA(&m_attr_videoram[Which][offset]);
m_bg_tilemap->mark_tile_dirty(offset); m_bg_tilemap[Which]->mark_tile_dirty(offset);
} }
TILE_GET_INFO_MEMBER(fresh_state::get_fresh_bg_2_tile_info)
{
int tileno, pal;
tileno = m_bg_2_videoram[tile_index];
pal = m_attr_2_videoram[tile_index];
tileinfo.set(0, tileno, pal, 0);
}
void fresh_state::fresh_bg_2_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_bg_2_videoram[offset]);
m_bg_2_tilemap->mark_tile_dirty(offset);
}
void fresh_state::fresh_attr_2_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_attr_2_videoram[offset]);
m_bg_2_tilemap->mark_tile_dirty(offset);
}
void fresh_state::video_start() void fresh_state::video_start()
{ {
m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(fresh_state::get_fresh_bg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 512); m_bg_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(fresh_state::get_bg_tile_info<0>)), TILEMAP_SCAN_ROWS, 8, 8, 64, 512);
m_bg_2_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(fresh_state::get_fresh_bg_2_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 512); m_bg_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(fresh_state::get_bg_tile_info<1>)), TILEMAP_SCAN_ROWS, 8, 8, 64, 512);
m_bg_tilemap->set_transparent_pen(255); m_bg_tilemap[0]->set_transparent_pen(255);
} }
uint32_t fresh_state::screen_update_fresh(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) uint32_t fresh_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{ {
m_bg_2_tilemap->draw(screen, bitmap, cliprect, 0, 0); m_bg_tilemap[1]->draw(screen, bitmap, cliprect, 0, 0);
m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0); m_bg_tilemap[0]->draw(screen, bitmap, cliprect, 0, 0);
return 0; return 0;
} }
void fresh_state::fresh_map(address_map &map) void fresh_state::program_map(address_map &map)
{ {
map(0x000000, 0x03ffff).rom(); map(0x000000, 0x03ffff).rom();
map(0xc00000, 0xc0ffff).ram().w(FUNC(fresh_state::fresh_bg_2_videoram_w)).share("bg_videoram_2"); map(0xc00000, 0xc0ffff).ram().w(FUNC(fresh_state::bg_videoram_w<1>)).share(m_bg_videoram[1]);
map(0xc10000, 0xc1ffff).ram().w(FUNC(fresh_state::fresh_attr_2_videoram_w)).share("attr_videoram_2"); map(0xc10000, 0xc1ffff).ram().w(FUNC(fresh_state::attr_videoram_w<1>)).share(m_attr_videoram[1]);
map(0xc20000, 0xc2ffff).ram().w(FUNC(fresh_state::fresh_bg_videoram_w)).share("bg_videoram"); map(0xc20000, 0xc2ffff).ram().w(FUNC(fresh_state::bg_videoram_w<0>)).share(m_bg_videoram[0]);
map(0xc30000, 0xc3ffff).ram().w(FUNC(fresh_state::fresh_attr_videoram_w)).share("attr_videoram"); map(0xc30000, 0xc3ffff).ram().w(FUNC(fresh_state::attr_videoram_w<0>)).share(m_attr_videoram[0]);
// map(0xc70000, 0xc70001).ram(); // map(0xc70000, 0xc70001).ram();
// map(0xc70002, 0xc70003).ram(); // map(0xc70002, 0xc70003).ram();
@ -220,8 +184,6 @@ void fresh_state::fresh_map(address_map &map)
map(0xf00000, 0xf0ffff).ram(); map(0xf00000, 0xf0ffff).ram();
} }
static INPUT_PORTS_START( fresh ) static INPUT_PORTS_START( fresh )
@ -561,26 +523,26 @@ GFXDECODE_END
TIMER_DEVICE_CALLBACK_MEMBER(fresh_state::fake_scanline) TIMER_DEVICE_CALLBACK_MEMBER(fresh_state::fake_scanline)
{ {
int scanline = param; int const scanline = param;
if(scanline == 0) if (scanline == 0)
{ {
logerror("new frame\n"); logerror("new frame\n");
m_maincpu->set_input_line(4, HOLD_LINE); m_maincpu->set_input_line(4, HOLD_LINE);
} }
// if(scanline == 32) // if (scanline == 32)
// m_maincpu->set_input_line(4, HOLD_LINE); // m_maincpu->set_input_line(4, HOLD_LINE);
if(scanline == 64) if (scanline == 64)
m_maincpu->set_input_line(5, HOLD_LINE); m_maincpu->set_input_line(5, HOLD_LINE);
// if(scanline == 96) // if (scanline == 96)
// m_maincpu->set_input_line(5, HOLD_LINE); // m_maincpu->set_input_line(5, HOLD_LINE);
if(scanline == 200) // vbl? if (scanline == 200) // vbl?
m_maincpu->set_input_line(6, HOLD_LINE); m_maincpu->set_input_line(6, HOLD_LINE);
} }
@ -588,38 +550,39 @@ TIMER_DEVICE_CALLBACK_MEMBER(fresh_state::fake_scanline)
void fresh_state::fresh(machine_config &config) void fresh_state::fresh(machine_config &config)
{ {
/* basic machine hardware */ // basic machine hardware
M68000(config, m_maincpu, 24000000/2); M68000(config, m_maincpu, 24_MHz_XTAL / 2);
m_maincpu->set_addrmap(AS_PROGRAM, &fresh_state::fresh_map); m_maincpu->set_addrmap(AS_PROGRAM, &fresh_state::program_map);
TIMER(config, "scantimer").configure_scanline(FUNC(fresh_state::fake_scanline), "screen", 0, 1); TIMER(config, "scantimer").configure_scanline(FUNC(fresh_state::fake_scanline), "screen", 0, 1);
/* video hardware */ // video hardware
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_refresh_hz(60); screen.set_refresh_hz(60);
screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
screen.set_size(64*8, 32*8); screen.set_size(64*8, 32*8);
screen.set_visarea_full(); screen.set_visarea_full();
screen.set_screen_update(FUNC(fresh_state::screen_update_fresh)); screen.set_screen_update(FUNC(fresh_state::screen_update));
screen.set_palette(m_palette); screen.set_palette(m_palette);
PALETTE(config, m_palette).set_format(palette_device::xBGR_888, 0x1000); // or 0xc00 PALETTE(config, m_palette).set_format(palette_device::xBGR_888, 0x1000); // or 0xc00
GFXDECODE(config, m_gfxdecode, m_palette, gfx_fresh); GFXDECODE(config, m_gfxdecode, m_palette, gfx_fresh);
/* sound hw? */ // sound hardware
SPEAKER(config, "mono").front_center(); SPEAKER(config, "mono").front_center();
YM2413(config, "ymsnd", 4000000).add_route(ALL_OUTPUTS, "mono", 1.0); // actual clock and type unknown YM2413(config, "ymsnd", 4'000'000).add_route(ALL_OUTPUTS, "mono", 1.0); // actual clock and type unknown
} }
ROM_START( fresh ) ROM_START( fresh )
ROM_REGION( 0x40000, "maincpu", 0 ) /* 68k */ ROM_REGION( 0x40000, "maincpu", 0 )
ROM_LOAD16_BYTE( "fruit-fresh5.u44", 0x00001, 0x20000, CRC(cb37d3c5) SHA1(3b7797d475769d37ed1e9774df8d4b5899fb92a3) )
ROM_LOAD16_BYTE( "fruit-fresh6.u59", 0x00000, 0x20000, CRC(fc0290be) SHA1(02e3b3563b15ae585684a8f510f48a8c90b248fa) ) ROM_LOAD16_BYTE( "fruit-fresh6.u59", 0x00000, 0x20000, CRC(fc0290be) SHA1(02e3b3563b15ae585684a8f510f48a8c90b248fa) )
ROM_LOAD16_BYTE( "fruit-fresh5.u44", 0x00001, 0x20000, CRC(cb37d3c5) SHA1(3b7797d475769d37ed1e9774df8d4b5899fb92a3) )
ROM_REGION( 0x100000, "gfx1", 0 ) ROM_REGION( 0x100000, "gfx1", 0 )
ROM_LOAD( "fruit-fresh1.u18", 0x00000, 0x80000, CRC(ee77cdcd) SHA1(8e162640d23bd1b5a2ed9305cc4b9df1cb0f3e80) ) ROM_LOAD( "fruit-fresh1.u18", 0x00000, 0x80000, CRC(ee77cdcd) SHA1(8e162640d23bd1b5a2ed9305cc4b9df1cb0f3e80) )
ROM_LOAD( "fruit-fresh3.u19", 0x80000, 0x80000, CRC(80cc71b3) SHA1(89a2272266ccdbd01abbc85c1f8200fa9d8aa441) ) ROM_LOAD( "fruit-fresh3.u19", 0x80000, 0x80000, CRC(80cc71b3) SHA1(89a2272266ccdbd01abbc85c1f8200fa9d8aa441) )
ROM_REGION( 0x100000, "gfx2", 0 ) ROM_REGION( 0x100000, "gfx2", 0 )
ROM_LOAD( "fruit-fresh2.u45", 0x00000, 0x80000, CRC(8a06a1ab) SHA1(4bc020e4a031df995e6ebaf49d62989004092b60) ) ROM_LOAD( "fruit-fresh2.u45", 0x00000, 0x80000, CRC(8a06a1ab) SHA1(4bc020e4a031df995e6ebaf49d62989004092b60) )
ROM_LOAD( "fruit-fresh4.u46", 0x80000, 0x80000, CRC(9b6c7571) SHA1(649cf3c50e2cd8c02f0f730e5ded59cf0ea37c37) ) ROM_LOAD( "fruit-fresh4.u46", 0x80000, 0x80000, CRC(9b6c7571) SHA1(649cf3c50e2cd8c02f0f730e5ded59cf0ea37c37) )

35
src/mame/skeleton/cle68k.cpp
View File

@ -14,7 +14,7 @@ Lattice ispLSI 1016 60LJ
Lattice iM4A5-32/32 10JC-12JI Lattice iM4A5-32/32 10JC-12JI
2x HM6264LP-70 RAM (near ispLSI 1016) 2x HM6264LP-70 RAM (near ispLSI 1016)
2x HM6264LP-70 RAM (near CPU ROMs) 2x HM6264LP-70 RAM (near CPU ROMs)
2x HM86171-80 RAM (near CPU ROMs) 2x HM86171-80 RAMDAC (near CPU ROMs)
12 MHz XTAL (for M68K) 12 MHz XTAL (for M68K)
AT90S4414 MCU (AVR core) AT90S4414 MCU (AVR core)
11.0592 MHz XTAL (for AT90?) 11.0592 MHz XTAL (for AT90?)
@ -51,6 +51,7 @@ public:
driver_device(mconfig, type, tag), driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"), m_maincpu(*this, "maincpu"),
m_gfxdecode(*this, "gfxdecode"), m_gfxdecode(*this, "gfxdecode"),
m_ramdac(*this, "ramdac%u", 0U),
m_videoram(*this, "videoram%u", 0U), m_videoram(*this, "videoram%u", 0U),
m_attrram(*this, "attrram%u", 0U) m_attrram(*this, "attrram%u", 0U)
{ } { }
@ -63,6 +64,7 @@ protected:
private: private:
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
required_device<gfxdecode_device> m_gfxdecode; required_device<gfxdecode_device> m_gfxdecode;
required_device_array<ramdac_device, 2> m_ramdac;
required_shared_ptr_array<uint16_t, 2> m_videoram; required_shared_ptr_array<uint16_t, 2> m_videoram;
required_shared_ptr_array<uint16_t, 2> m_attrram; required_shared_ptr_array<uint16_t, 2> m_attrram;
@ -74,7 +76,7 @@ private:
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void program_map(address_map &map) ATTR_COLD; void program_map(address_map &map) ATTR_COLD;
void ramdac_map(address_map &map) ATTR_COLD; template <uint8_t Which> void ramdac_map(address_map &map) ATTR_COLD;
}; };
@ -84,7 +86,7 @@ TILE_GET_INFO_MEMBER(cle68k_state::get_tile_info)
int const tile = m_videoram[Which][tile_index]; int const tile = m_videoram[Which][tile_index];
int const color = m_attrram[Which][tile_index] & 0xff; int const color = m_attrram[Which][tile_index] & 0xff;
tileinfo.set(0, tile, color, 0); tileinfo.set(Which, tile, color, 0);
} }
template <uint8_t Which> template <uint8_t Which>
@ -127,9 +129,12 @@ void cle68k_state::program_map(address_map &map)
map(0x183000, 0x183fff).ram().w(FUNC(cle68k_state::videoram_w<1>)).share(m_videoram[1]); map(0x183000, 0x183fff).ram().w(FUNC(cle68k_state::videoram_w<1>)).share(m_videoram[1]);
map(0x1e0004, 0x1e0005).portr("IN0"); map(0x1e0004, 0x1e0005).portr("IN0");
map(0x1e0009, 0x1e0009).w("oki", FUNC(okim6295_device::write)); map(0x1e0009, 0x1e0009).w("oki", FUNC(okim6295_device::write));
map(0x1e0011, 0x1e0011).w("ramdac", FUNC(ramdac_device::index_w)); map(0x1e0010, 0x1e0010).w(m_ramdac[0], FUNC(ramdac_device::index_w));
map(0x1e0013, 0x1e0013).w("ramdac", FUNC(ramdac_device::pal_w)); map(0x1e0011, 0x1e0011).w(m_ramdac[1], FUNC(ramdac_device::index_w));
map(0x1e0015, 0x1e0015).w("ramdac", FUNC(ramdac_device::mask_w)); map(0x1e0012, 0x1e0012).w(m_ramdac[0], FUNC(ramdac_device::pal_w));
map(0x1e0013, 0x1e0013).w(m_ramdac[1], FUNC(ramdac_device::pal_w));
map(0x1e0014, 0x1e0014).w(m_ramdac[0], FUNC(ramdac_device::mask_w));
map(0x1e0015, 0x1e0015).w(m_ramdac[1], FUNC(ramdac_device::mask_w));
map(0x1e0030, 0x1e0031).portr("IN1").nopw(); // TODO: video reg? outputs? map(0x1e0030, 0x1e0031).portr("IN1").nopw(); // TODO: video reg? outputs?
map(0x1e0032, 0x1e0033).portr("DSW1"); map(0x1e0032, 0x1e0033).portr("DSW1");
map(0x1e0034, 0x1e0035).portr("DSW2"); map(0x1e0034, 0x1e0035).portr("DSW2");
@ -137,9 +142,10 @@ void cle68k_state::program_map(address_map &map)
map(0x1f0000, 0x1fffff).ram(); map(0x1f0000, 0x1fffff).ram();
} }
template <uint8_t Which>
void cle68k_state::ramdac_map(address_map &map) void cle68k_state::ramdac_map(address_map &map)
{ {
map(0x000, 0x2ff).rw("ramdac", FUNC(ramdac_device::ramdac_pal_r), FUNC(ramdac_device::ramdac_rgb666_w)); map(0x000, 0x2ff).rw(m_ramdac[Which], FUNC(ramdac_device::ramdac_pal_r), FUNC(ramdac_device::ramdac_rgb666_w));
} }
@ -389,7 +395,7 @@ static INPUT_PORTS_START( dmndhrtn ) // TODO: inputs
PORT_DIPSETTING( 0x0000, "500" ) PORT_DIPSETTING( 0x0000, "500" )
INPUT_PORTS_END INPUT_PORTS_END
INPUT_PORTS_START( honeybee ) INPUT_PORTS_START( honeybee ) // TODO: inputs
PORT_INCLUDE( dmndhrt ) PORT_INCLUDE( dmndhrt )
// DIP definitions taken from test mode // DIP definitions taken from test mode
@ -541,7 +547,8 @@ INPUT_PORTS_END
static GFXDECODE_START( gfx_cle68k ) // TODO: correct decoding static GFXDECODE_START( gfx_cle68k ) // TODO: correct decoding
GFXDECODE_ENTRY( "tiles", 0, gfx_8x8x4_packed_msb, 0, 16 ) GFXDECODE_ENTRY( "tiles", 0, gfx_8x8x4_packed_msb, 0x000, 1 )
GFXDECODE_ENTRY( "tiles", 0, gfx_8x8x4_packed_msb, 0x100, 1 )
GFXDECODE_END GFXDECODE_END
@ -562,9 +569,15 @@ void cle68k_state::cle68k(machine_config &config)
GFXDECODE(config, "gfxdecode", "palette", gfx_cle68k); GFXDECODE(config, "gfxdecode", "palette", gfx_cle68k);
PALETTE(config, "palette").set_entries(0x100); // TODO PALETTE(config, "palette").set_entries(0x200); // TODO
RAMDAC(config, "ramdac", 0, "palette").set_addrmap(0, &cle68k_state::ramdac_map); RAMDAC(config, m_ramdac[0], 0, "palette");
m_ramdac[0]->set_addrmap(0, &cle68k_state::ramdac_map<0>);
m_ramdac[0]->set_color_base(0);
RAMDAC(config, m_ramdac[1], 0, "palette");
m_ramdac[1]->set_addrmap(0, &cle68k_state::ramdac_map<1>);
m_ramdac[1]->set_color_base(0x100);
SPEAKER(config, "mono").front_center(); SPEAKER(config, "mono").front_center();

158
src/mame/skeleton/shoken_md06.cpp Normal file
View File

@ -0,0 +1,158 @@
// license:BSD-3-Clause
// copyright-holders:
/*
プチ☆ロット (Petite Lot) by Showa Giken (Shoken) - mechanical slot machine
Flyer shows at least two game titles: Time Cross and Hyper Rush.
Are those actually different ROMs or just different covers?
'MD06 MAIN' PCB:
KL5C80A12CFP CPU
IC62C256-70U SRAM (battery backed) under program ROM
RTC62423-A RTC
bank of 8 DIP switches
bank of 4 DIP switches
5 10-position rotary switches
push-button (reset?)
16.00000 MHz XTAL
unpopulates spaces marked for MSM9810B and ROM
DIP sheets are available
*/
#include "emu.h"
#include "cpu/z80/kl5c80a12.h"
#include "machine/msm6242.h"
#include "emupal.h"
#include "screen.h"
#include "speaker.h"
#include "tilemap.h"
namespace {
class shoken_md06_state : public driver_device
{
public:
shoken_md06_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu")
{ }
void petitlot(machine_config &config) ATTR_COLD;
private:
required_device<kl5c80a12_device> m_maincpu;
void program_map(address_map &map) ATTR_COLD;
void io_map(address_map &map) ATTR_COLD;
};
void shoken_md06_state::program_map(address_map &map)
{
map(0x00000, 0x04fff).rom();
map(0xe0000, 0xe3fff).ram();
}
void shoken_md06_state::io_map(address_map &map)
{
map.global_mask(0xff);
map.unmap_value_high();
}
static INPUT_PORTS_START( petitlot )
PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DSW1")
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DIP-A:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DIP-A:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DIP-A:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DIP-A:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DIP-A:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DIP-A:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DIP-A:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DIP-A:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSW2") // 4 DIPs
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DIP-B:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DIP-B:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DIP-B:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DIP-B:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN )
// TODO: 5 10-position rotary switches
INPUT_PORTS_END
void shoken_md06_state::petitlot(machine_config &config)
{
// basic machine hardware
KL5C80A12(config, m_maincpu, 16_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &shoken_md06_state::program_map);
m_maincpu->set_addrmap(AS_IO, &shoken_md06_state::io_map);
RTC62423(config, "rtc", 0);
// sound hardware
SPEAKER(config, "mono").front_center();
// TODO: sound related ICs aren't present?
}
ROM_START( petitlot )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "md06_ver4_1.ic6", 0x00000, 0x10000, CRC(ebc81f10) SHA1(28ac52aeadfbf792da95c01b16fb88f7a5eb1d4e) ) // 1xxxxxxxxxxxxxxx = 0xFF
ROM_END
} // anonymous namespace
GAME( 2001, petitlot, 0, petitlot, petitlot, shoken_md06_state, empty_init, ROT0, "Shoken", "Petit Lot (ver. 4.1)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL )