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Merge branch 'master' of https://github.com/mamedev/mame

Browse Source
This commit is contained in:
Ariane Fugmann 2017-01-12 19:48:40 +01:00
commit 9a613f569d
227 changed files with 11782 additions and 5758 deletions
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6
3rdparty/asio/include/asio/detail/impl/win_mutex.ipp vendored
View File

@ -44,7 +44,8 @@ int win_mutex::do_init()
# if defined(UNDER_CE)
::InitializeCriticalSection(&crit_section_);
# elif defined(ASIO_WINDOWS_APP)
::InitializeCriticalSectionEx(&crit_section_, 0x80000000, 0);
if (!::InitializeCriticalSectionEx(&crit_section_, 0xFFFFFF, 0))
return ::GetLastError();
# else
if (!::InitializeCriticalSectionAndSpinCount(&crit_section_, 0x80000000))
return ::GetLastError();
@ -56,7 +57,8 @@ int win_mutex::do_init()
# if defined(UNDER_CE)
::InitializeCriticalSection(&crit_section_);
# elif defined(ASIO_WINDOWS_APP)
::InitializeCriticalSectionEx(&crit_section_, 0x80000000, 0);
if (!::InitializeCriticalSectionEx(&crit_section_, 0xFFFFFF, 0))
return ::GetLastError();
# else
if (!::InitializeCriticalSectionAndSpinCount(&crit_section_, 0x80000000))
return ::GetLastError();

5
3rdparty/bgfx/3rdparty/tinyexr/tinyexr.h vendored
View File

@ -7076,8 +7076,7 @@ static const char *ReadString(std::string *s, const char *ptr) {
static bool ReadAttribute(std::string *name, std::string *type,
std::vector<unsigned char> *data, size_t *marker_size,
const char *marker, size_t size) {
using namespace bx;
size_t name_len = strnlen(marker, size);
size_t name_len = bx::strnlen(marker, size);
if (name_len == size) {
// String does not have a terminating character.
return false;
@ -7087,7 +7086,7 @@ static bool ReadAttribute(std::string *name, std::string *type,
marker += name_len + 1;
size -= name_len + 1;
size_t type_len = strnlen(marker, size);
size_t type_len = bx::strnlen(marker, size);
if (type_len == size) {
return false;
}

2
LICENSE.md
View File

@ -4,7 +4,7 @@ MAME is a registered trademark of Nicola Salmoria.
The text of version 2 of the GNU General Public License follows.
Copyright (C) 1997-2016 MAMEDev and contributors
Copyright (C) 1997-2017 MAMEDev and contributors
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by

46
hash/a2600.xml
View File

@ -5035,8 +5035,8 @@ Info from Atariage and Atarimania
</part>
</software>
<software name="dodgeeme" cloneof="dodgeem">
<description>Dodge 'Em (PAL)</description>
<software name="dodgeeme2" cloneof="dodgeem">
<description>Dodge 'Em (PAL, Earlier)</description>
<year>1980</year>
<publisher>Atari</publisher>
<part name="cart" interface="a2600_cart">
@ -5046,13 +5046,16 @@ Info from Atariage and Atarimania
</part>
</software>
<software name="dodgeemef" cloneof="dodgeem">
<description>Dodge 'Em (PAL) (Fixed?)</description>
<year>1980</year>
<software name="dodgeeme" cloneof="dodgeem">
<description>Dodge 'Em (PAL, Later)</description>
<year>1987</year>
<publisher>Atari</publisher>
<info name="serial" value="CX2637" />
<part name="cart" interface="a2600_cart">
<feature name="pcb" value="C011885 REV F" />
<feature name="u1" value="" /> <!-- ROM -->
<dataarea name="rom" size="4096">
<rom name="dodge 'em (head on) (1980) (atari, carla meninsky) (cx2637, cx2637p) (pal) [fixed].bin" size="4096" crc="10cfc6c0" sha1="b26674d6e30d1a0bb2719b9bb1b3ccfa346260cf" offset="0" />
<rom name="AIP.u1" size="4096" crc="10cfc6c0" sha1="b26674d6e30d1a0bb2719b9bb1b3ccfa346260cf" offset="0" />
</dataarea>
</part>
</software>
@ -7275,12 +7278,15 @@ Info from Atariage and Atarimania
</software>
<software name="haunted">
<description>Haunted House</description>
<year>1982</year>
<description>Haunted House (NTSC)</description>
<year>1981</year>
<publisher>Atari</publisher>
<info name="serial" value="CX2654" />
<part name="cart" interface="a2600_cart">
<feature name="pcb" value="C011885 REV F" />
<feature name="u1" value="" /> <!-- ROM -->
<dataarea name="rom" size="4096">
<rom name="haunted house (mystery mansion, graves' manor, nightmare manor) (1982) (atari, james andreasen - sears) (cx2654 - 49-75141).bin" size="4096" crc="aa62d961" sha1="1476c869619075b551b20f2c7f95b11e0d16aec1" offset="0" />
<rom name="054.u1" size="4096" crc="aa62d961" sha1="1476c869619075b551b20f2c7f95b11e0d16aec1" offset="0" />
</dataarea>
</part>
</software>
@ -10655,11 +10661,14 @@ Info from Atariage and Atarimania
<software name="outlawe" cloneof="outlaw">
<description>Outlaw (PAL)</description>
<year>1978</year>
<year>1979</year>
<publisher>Atari</publisher>
<info name="serial" value="CX-2605-P" />
<part name="cart" interface="a2600_cart">
<feature name="pcb" value="C010789" />
<feature name="u1" value="" /> <!-- ROM -->
<dataarea name="rom" size="2048">
<rom name="outlaw (1978) (atari, david crane) (cx2605, cx2605p) (pal).bin" size="2048" crc="64f136d2" sha1="4a1514a7cf4279fded1b0db6f5b31818b9ff011c" offset="0" />
<rom name="B113.u1" size="2048" crc="64f136d2" sha1="4a1514a7cf4279fded1b0db6f5b31818b9ff011c" offset="0" />
</dataarea>
</part>
</software>
@ -16865,11 +16874,15 @@ Info from Atariage and Atarimania
<software name="tubybird">
<description>Tuby Bird (PAL)</description>
<year>19??</year>
<publisher>Suntek</publisher>
<year>1983?</year>
<publisher>Suntek, Quelle</publisher>
<info name="serial" value="SS-020 (Suntek), 465.302 8 (Quelle)" />
<info name="alt_title" value="Vogel Flieh (Quelle)"/>
<part name="cart" interface="a2600_cart">
<feature name="pcb" value="21003A" />
<feature name="u1" value="" /> <!-- Epoxy blob ROM -->
<dataarea name="rom" size="4096">
<rom name="tuby bird (aka dolphin) (rainbow vision - suntek) (ss-020) (pal).bin" size="4096" crc="1ca034ca" sha1="f4f941b779bcb7902df0eb7cf6b985f56e751183" offset="0" />
<rom name="u1" size="4096" crc="1ca034ca" sha1="f4f941b779bcb7902df0eb7cf6b985f56e751183" offset="0" />
</dataarea>
</part>
</software>
@ -17539,9 +17552,12 @@ Info from Atariage and Atarimania
<description>Weltraumtunnel (PAL)</description>
<year>1983</year>
<publisher>Quelle</publisher>
<info name="alt_title" value="Laaser Voley"/>
<part name="cart" interface="a2600_cart">
<feature name="pcb" value="0019" />
<feature name="u1" value="" /> <!-- Epoxy blob ROM -->
<dataarea name="rom" size="4096">
<rom name="weltraumtunnel (aka laser gates) (1983) (quelle) (292.651 7) (pal).bin" size="4096" crc="dc1d3627" sha1="c513703d638c01b0c26922d5e3e7bfb65ea597da" offset="0" />
<rom name="u1" size="4096" crc="dc1d3627" sha1="c513703d638c01b0c26922d5e3e7bfb65ea597da" offset="0" />
</dataarea>
</part>
</software>

340
hash/ibm5150.xml
View File

@ -3246,7 +3246,7 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
<rom name="disk 1.img" size="368640" crc="db07d99a" sha1="121ad3c636a69dae3a8eee96ef2ebf1152e9d00f" offset="0" />
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<part name="flop2" interface="floppy_5_25">
<feature name="disk_serial" value="02043 036214.330A" />
<feature name="disk_label" value="Additional Programs and Microsoft GW-Basic Interpreter" />
<dataarea name="flop" size="368640">
@ -3255,20 +3255,44 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
<!-- not original, from jsmachines -->
<software name="msdos4">
<description>MS-DOS (Version 4.00)</description>
<year>1985</year>
<description>MS-DOS (Version 4.00, 5.25")</description>
<year>1988</year>
<publisher>Microsoft</publisher>
<info name="version" value="4.00" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="368640">
<rom name="msdos400m-disk1.img" size="368640" crc="67848d5c" sha1="9e44fc3ed1f689c4136a08d48f9efa156cbaf250" offset="0" />
<feature name="part_id" value="Install"/>
<dataarea name="flop" size = "368640">
<rom name="install.img" size="368640" crc="5e687262" sha1="9ff81f18e79ede18784f17fa2e188ba943190ee0" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<dataarea name="flop" size="368640">
<rom name="msdos400m-disk2-unpatched.img" size="368640" crc="85a8cb6c" sha1="88d8ec84a6e24f2c918508dc65de0cdee182a48e" offset="0" />
<feature name="part_id" value="Select"/>
<dataarea name="flop" size = "368640">
<rom name="select.img" size="368640" crc="a4bd9aff" sha1="1e2c2f440b40db3d670f3dad808229b3b50bfd26" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_5_25">
<feature name="part_id" value="Operating 1"/>
<dataarea name="flop" size = "368640">
<rom name="operati1.img" size="368640" crc="8e7ed1cd" sha1="ca9863e9b5b6308d7c796eb396f2d51a75c487ce" offset="0"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_5_25">
<feature name="part_id" value="Operating 2"/>
<dataarea name="flop" size = "368640">
<rom name="operati2.img" size="368640" crc="763b2fe6" sha1="9ea0c76b920ced51a994f01fd0766051aec015a8" offset="0"/>
</dataarea>
</part>
<part name="flop5" interface="floppy_5_25">
<feature name="part_id" value="Operating 3"/>
<dataarea name="flop" size = "368640">
<rom name="operati3.img" size="368640" crc="aa0d3cc8" sha1="7996c3eaabb838a76f6f24a3ac026484ccaf3818" offset="0"/>
</dataarea>
</part>
<part name="flop6" interface="floppy_5_25">
<feature name="part_id" value="MS-DOS Shell"/>
<dataarea name="flop" size = "368640">
<rom name="msshell.img" size="368640" crc="dbdfcea9" sha1="44322802855025b398b98f0dc59b050f73801fdd" offset="0"/>
</dataarea>
</part>
</software>
@ -3278,31 +3302,37 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
<year>1988</year>
<publisher>Microsoft</publisher>
<part name="flop1" interface="floppy_5_25">
<feature name="part_id" value="Install"/>
<dataarea name="flop" size="369152">
<rom name="install.img" size="369152" crc="ceeb1691" sha1="9d69d99a7c7a9b903e3f8c1e3f02b68270feff9c" offset="0" />
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<dataarea name="flop" size="369152">
<rom name="operating 1.img" size="369152" crc="1b37564d" sha1="bce6027533ff4252229fe017f676de0cff653b3a" offset="0" />
</dataarea>
</part>
<part name="flop3" interface="floppy_5_25">
<dataarea name="flop" size="369152">
<rom name="operating 2.img" size="369152" crc="d33a9768" sha1="0dba1f9ce818dae3ced74e04dab9a07976a3d720" offset="0" />
</dataarea>
</part>
<part name="flop4" interface="floppy_5_25">
<dataarea name="flop" size="369152">
<rom name="operating 3.img" size="369152" crc="6776d4f9" sha1="6d2a569c2d1cd3237bc1964c14b10396dd9c461e" offset="0" />
</dataarea>
</part>
<part name="flop5" interface="floppy_5_25">
<feature name="part_id" value="Select"/>
<dataarea name="flop" size="369152">
<rom name="select.img" size="369152" crc="7979de98" sha1="23fc5ce0ac5dee1a89fbe8ba6f96e5f1a5f7800b" offset="0" />
</dataarea>
</part>
<part name="flop3" interface="floppy_5_25">
<feature name="part_id" value="Operating 1"/>
<dataarea name="flop" size="369152">
<rom name="operating 1.img" size="369152" crc="1b37564d" sha1="bce6027533ff4252229fe017f676de0cff653b3a" offset="0" />
</dataarea>
</part>
<part name="flop4" interface="floppy_5_25">
<feature name="part_id" value="Operating 2"/>
<dataarea name="flop" size="369152">
<rom name="operating 2.img" size="369152" crc="d33a9768" sha1="0dba1f9ce818dae3ced74e04dab9a07976a3d720" offset="0" />
</dataarea>
</part>
<part name="flop5" interface="floppy_5_25">
<feature name="part_id" value="Operating 3"/>
<dataarea name="flop" size="369152">
<rom name="operating 3.img" size="369152" crc="6776d4f9" sha1="6d2a569c2d1cd3237bc1964c14b10396dd9c461e" offset="0" />
</dataarea>
</part>
<part name="flop6" interface="floppy_5_25">
<feature name="part_id" value="Shell"/>
<dataarea name="flop" size="369152">
<rom name="shell.img" size="369152" crc="c40b54a2" sha1="181b6668eb5f3f11f817ccc5d576389911254261" offset="0" />
</dataarea>
@ -3315,22 +3345,67 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
<publisher>Microsoft</publisher>
<info name="version" value="4.01" />
<part name="flop1" interface="floppy_3_5">
<feature name="part_id" value="Setup"/>
<dataarea name="flop" size="737280">
<rom name="setup.img" size="737280" crc="ff363533" sha1="6cbf2bcf051d168d542c289aeb630f98fc2a56a7" offset="0" />
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<feature name="part_id" value="Operating"/>
<dataarea name="flop" size="737280">
<rom name="operating.img" size="737280" crc="f0e2b019" sha1="e4f0dc4df9df1581a2acb109b5159ca142005707" offset="0" />
</dataarea>
</part>
<part name="flop3" interface="floppy_3_5">
<feature name="part_id" value="DOS Shell"/>
<dataarea name="flop" size="737280">
<rom name="dos shell.img" size="737280" crc="7be56e89" sha1="2f45b4a5140c04d572a8be6e3ef4011edb741b5b" offset="0" />
</dataarea>
</part>
</software>
<software name="msdos401de" cloneof="msdos401">
<description>MS-DOS (Version 4.01, 5.25", German)</description>
<year>1988</year>
<publisher>Microsoft</publisher>
<part name="flop1" interface="floppy_5_25">
<feature name="part_id" value="Install"/>
<dataarea name="flop" size = "368640">
<rom name="Disk1_Install.img" size="368640" crc="b6af746f" sha1="e111893a36c5b42b3f80d57bad3e81af6d310e44" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<feature name="part_id" value="Select"/>
<dataarea name="flop" size = "368640">
<rom name="Disk2_Select.img" size="368640" crc="ffc604f5" sha1="02bd4be4b94818594aa5332fbc653658c9ba2fa3" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_5_25">
<feature name="part_id" value="Operating 1"/>
<dataarea name="flop" size = "368640">
<rom name="Disk3_Operating1.img" size="368640" crc="84ef2b68" sha1="35bbdf7aecbf3578ec89ee1debe22d451f837005" offset="0"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_5_25">
<feature name="part_id" value="Operating 2"/>
<dataarea name="flop" size = "368640">
<rom name="Disk4_Operating2.img" size="368640" crc="9c3d3253" sha1="cf26e80e923cd775f5706d10847187454c5bbe4b" offset="0"/>
</dataarea>
</part>
<part name="flop5" interface="floppy_5_25">
<feature name="part_id" value="Operating 3"/>
<dataarea name="flop" size = "368640">
<rom name="Disk5_Operating3.img" size="368640" crc="7a45f189" sha1="865dea0102a4cb9e3fd074237073ad0582344a76" offset="0"/>
</dataarea>
</part>
<part name="flop6" interface="floppy_5_25">
<feature name="part_id" value="Shell"/>
<dataarea name="flop" size = "368640">
<rom name="Disk6_Shell.img" size="368640" crc="cce16acb" sha1="a4b7ebecddeae93cac83402cd3b9c9f8a6cfa615" offset="0"/>
</dataarea>
</part>
</software>
<software name="msdos5">
<description>MS-DOS (Version 5.00, 5.25")</description>
<year>1991</year>
@ -3515,6 +3590,24 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
<software name="mmsdos4">
<description>Multitasking MS-DOS (Version 4.00)</description>
<year>1985</year>
<publisher>Microsoft</publisher>
<info name="version" value="4.00" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="368640">
<!-- modified to promote jsmachines website -->
<rom name="msdos400m-disk1.img" size="368640" crc="67848d5c" sha1="9e44fc3ed1f689c4136a08d48f9efa156cbaf250" offset="0" status="baddump" />
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<dataarea name="flop" size="368640">
<rom name="msdos400m-disk2-unpatched.img" size="368640" crc="85a8cb6c" sha1="88d8ec84a6e24f2c918508dc65de0cdee182a48e" offset="0" />
</dataarea>
</part>
</software>
<software name="pcdos1">
<description>IBM Personal Computer DOS (Version 1.00)</description>
<year>1981</year>
@ -3691,6 +3784,108 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
<software name="xenix86">
<description>SCO XENIX System V release 2.1.3 for i8086</description>
<year>1986</year>
<publisher>SCO</publisher>
<part name="flop1" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Installation) volume N1"/>
<dataarea name="flop" size = "368640">
<rom name="N1.img" size="368640" crc="6fcc1980" sha1="8b061f59883f5d01ba41e9826b8b5b21dd08742e" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Installation) volume N2 (filesystem)"/>
<dataarea name="flop" size = "368640">
<rom name="N2.img" size="368640" crc="5b12523b" sha1="ff8da1597644696ad44ae5716986b9052e94612e" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Installation) volume N3"/>
<dataarea name="flop" size = "368640">
<rom name="N3.img" size="368640" crc="5524258c" sha1="01aa1e5c91347224a61d092e32e449bac3a84206" offset="0"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Installation) volume N4"/>
<dataarea name="flop" size = "368640">
<rom name="N4.img" size="368640" crc="a5990e6c" sha1="e76eb4df575df013f9d51a6a3cee9ea33fbcf37b" offset="0"/>
</dataarea>
</part>
<part name="flop5" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Installation) volume N5"/>
<dataarea name="flop" size = "368640">
<rom name="N5.img" size="368640" crc="ba491b53" sha1="892650b17264d86f7dbe445d87579a22a853f42a" offset="0"/>
</dataarea>
</part>
<part name="flop6" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Installation) volume N6"/>
<dataarea name="flop" size = "368640">
<rom name="N6.img" size="368640" crc="3267b017" sha1="c56bf17e356bb3896a32fa4c8e024ca464fdb4f6" offset="0"/>
</dataarea>
</part>
<part name="flop7" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Basic Utilities) volume B1"/>
<dataarea name="flop" size = "368640">
<rom name="B1.img" size="368640" crc="98142384" sha1="a00f0e73d2a2d77a40f2ccee50f958bc147b3fc3" offset="0"/>
</dataarea>
</part>
<part name="flop8" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Basic Utilities) volume B2"/>
<dataarea name="flop" size = "368640">
<rom name="B2.img" size="368640" crc="68d2be65" sha1="9304330188a5d2134c5599c0fe6ce535cec47395" offset="0"/>
</dataarea>
</part>
<part name="flop9" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Basic Utilities) volume B3"/>
<dataarea name="flop" size = "368640">
<rom name="B3.img" size="368640" crc="ca60b254" sha1="451fd8b3278522f29dff0c0db90c3e8f5064d6bf" offset="0"/>
</dataarea>
</part>
<part name="flop10" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Extended Utilities) volume X1"/>
<dataarea name="flop" size = "368640">
<rom name="X1.img" size="368640" crc="3b60b53f" sha1="ed3325d37f3ae51be6bcb86c203d8e57201705ec" offset="0"/>
</dataarea>
</part>
<part name="flop11" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Extended Utilities) volume X2"/>
<dataarea name="flop" size = "368640">
<rom name="X2.img" size="368640" crc="c412eee0" sha1="d5892f4718b2ca6405d0b8fd1e804aad7afaa7cb" offset="0"/>
</dataarea>
</part>
<part name="flop12" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Extended Utilities) volume X3"/>
<dataarea name="flop" size = "368640">
<rom name="X3.img" size="368640" crc="0587d8a0" sha1="076d4dd386361236860f62914e8664d79e900c9e" offset="0"/>
</dataarea>
</part>
<part name="flop13" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Extended Utilities) volume X4"/>
<dataarea name="flop" size = "368640">
<rom name="X4.img" size="368640" crc="b06929bd" sha1="22672aaf660622543b5b94a8d0d16fdf15cc9f90" offset="0"/>
</dataarea>
</part>
<part name="flop14" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Extended Utilities) volume X5"/>
<dataarea name="flop" size = "368640">
<rom name="X5.img" size="368640" crc="684362b2" sha1="3caaaedd71fc513b6ef3f90b82d9738424f6a03c" offset="0"/>
</dataarea>
</part>
<part name="flop15" interface="floppy_5_25">
<feature name="part_id" value="Operating System (Extended Utilities) volume X6"/>
<dataarea name="flop" size = "368640">
<rom name="X6.img" size="368640" crc="74a03c5a" sha1="2d3f88b65f688f0321f0f4cfeb490b70b414ca8a" offset="0"/>
</dataarea>
</part>
<part name="flop16" interface="floppy_5_25">
<feature name="part_id" value="SCO Xenix Games volume 1"/>
<dataarea name="flop" size = "368640">
<rom name="Games.img" size="368640" crc="1434af0b" sha1="64f2a5e6ab9aec467f01f4f72f9479cb3ff1bcfa" offset="0"/>
</dataarea>
</part>
</software>
<!-- Dos based Games -->
<software name="2400ad" supported="no"> <!-- unemulated protection, game needs cracked exe to play ATM -->
@ -3774,6 +3969,17 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
<software name="arcadefb">
<description>Arcade Football</description>
<year>1989</year>
<publisher>Software Simulations</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="arcadefb.360" size="368640" crc="da3a302f" sha1="61a3b9dcb9ffd72326abf4df89c35ffa2a288288" offset="0"/>
</dataarea>
</part>
</software>
<software name="bargames">
<description>Bar Games</description>
<year>1989</year>
@ -3987,6 +4193,38 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
<software name="diehard">
<description>Die Hard (5.25")</description>
<year>1989</year>
<publisher>Activision</publisher>
<info name="developer" value="Dynamix" />
<part name="flop1" interface="floppy_5_25">
<feature name="disk_serial" value="PD-209-1-04" />
<dataarea name="flop" size = "368640">
<rom name="Die Hard [1989] [Activision] [1 of 2].img" size="368640" crc="9e2a69ba" sha1="ea809c2b59719a7cf9a3518ded7ab6a099f17954" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<feature name="disk_serial" value="PD-209-2-04" />
<dataarea name="flop" size = "368640">
<rom name="Die Hard [1989] [Activision] [2 of 2].img" size="368640" crc="688a99d3" sha1="c65650ab19f7fe7fdfb70e41f6381ba61b783c29" offset="0"/>
</dataarea>
</part>
</software>
<software name="diehard35" cloneof="diehard">
<description>Die Hard (3.5")</description>
<year>1989</year>
<publisher>Activision</publisher>
<info name="developer" value="Dynamix" />
<part name="flop1" interface="floppy_3_5">
<feature name="disk_serial" value="PD-209-04T" />
<dataarea name="flop" size = "737280">
<rom name="Die Hard [1989] [Activision] [1 of 1].img" size="737280" crc="3822f52d" sha1="93e5d4bec30de4a8aa2ce357fbb36eb147cb8c04" offset="0"/>
</dataarea>
</part>
</software>
<software name="dmnstomb">
<description>Demon's Tomb - The Awakening</description>
<year>1989</year>
@ -4348,6 +4586,23 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
<software name="superman">
<description>Superman - The Man of Steel</description>
<year>1989</year>
<publisher>First Star Software</publisher>
<info name="developer" value="Tynesoft" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="Superman - The Man of Steel [1989] [First Star Software] [5.25] [1 of 2].img" size="368640" crc="3d4265ef" sha1="291a90461751ab9241119f1d2911e4cdabe300c1" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="Superman - The Man of Steel [1989] [First Star Software] [5.25] [2 of 2].img" size="368640" crc="e904711c" sha1="d66e64bd467b1dd0dedbe613b087e1ea63fcb38f" offset="0"/>
</dataarea>
</part>
</software>
<software name="tetris">
<description>Tetris (5.25")</description>
<year>1987</year>
@ -4370,6 +4625,43 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</part>
</software>
<software name="wayneg">
<description>Wayne Gretzky Hockey (5.25")</description>
<year>1989</year>
<publisher>Bethesda</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="Wayne Gretzky Hockey [Bethesda] [1989] [5.25] [1].img" size="368640" crc="3e97b79e" sha1="2d638a2550340b4d7bab0e351e5598450e882557" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="Wayne Gretzky Hockey [Bethesda] [1989] [5.25] [2].img" size="368640" crc="ad2930c9" sha1="6cf9adf8b97682e61d02e10ee86e9575debcf53b" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="Wayne Gretzky Hockey [Bethesda] [1989] [5.25] [3].img" size="368640" crc="ac5525ea" sha1="03617ad99a6a154cf338cb4ae901044e1b782cfd" offset="0"/>
</dataarea>
</part>
</software>
<software name="wayneg35" cloneof="wayneg">
<description>Wayne Gretzky Hockey (3.5")</description>
<year>1989</year>
<publisher>Bethesda</publisher>
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "737280">
<rom name="Wayne Gretzky Hockey [Bethesda] [1989] [3.5] [1].img" size="737280" crc="219b4be7" sha1="f463208fd0a89e43bc17005bba52e53048efe59b" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size = "737280">
<rom name="Wayne Gretzky Hockey [Bethesda] [1989] [3.5] [2].img" size="737280" crc="e88466f0" sha1="09666337e905aabb33770b785c47e13f4d7b76e1" offset="0"/>
</dataarea>
</part>
</software>
<software name="weirddrm">
<description>Weird Dreams</description>
<year>1989</year>

323
hash/ibm5170.xml
View File

@ -3552,6 +3552,293 @@ Missing files come here
</part>
</software>
<software name="winword2">
<description>Word for Windows 2.0c (3.5")</description>
<year>1992</year>
<publisher>Microsoft</publisher>
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="disk01.img" size="1474560" crc="cc84c6c2" sha1="8f175e961adcb95ae38b8c1f4934bc1d905dd4f1" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="disk02.img" size="1474560" crc="3d3849b7" sha1="ac7f50eb3fc33356a6995edf5c4fc3ec4105dbca" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="disk03.img" size="1474560" crc="c8702fd5" sha1="6d0eb17a54ede4803571d607593274dfe992735e" offset="0"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="disk04.img" size="1474560" crc="a4b9bae8" sha1="94d38d803a6def6b37b997f6f5a3d59874db7eb3" offset="0"/>
</dataarea>
</part>
<part name="flop5" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="disk05.img" size="1474560" crc="69105238" sha1="be379c3ea95d184fbcb59e4d880c4ebf40a8d17a" offset="0"/>
</dataarea>
</part>
<part name="flop6" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="disk06.img" size="1474560" crc="7aa5254c" sha1="92687a36db2cca40548950fef5e6f2d105ce5858" offset="0"/>
</dataarea>
</part>
</software>
<software name="winword2_525" cloneof="winword2">
<description>Word for Windows 2.0c (5.25")</description>
<year>1992</year>
<publisher>Microsoft</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size = "1228800">
<rom name="disk01_2.0c_525.img" size="1228800" crc="50492e1f" sha1="069c5a35c8cdd0b1fe16cba0441ade22d9d9ff32" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<dataarea name="flop" size = "1228800">
<rom name="disk02_2.0c_525.img" size="1228800" crc="2ab4ed35" sha1="eb4fe02a5eeedc6b03e2f1433174405da92856df" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_5_25">
<dataarea name="flop" size = "1228800">
<rom name="disk03_2.0c_525.img" size="1228800" crc="e64d1550" sha1="5b60c9301097745b787bd2f804404d51aabeb5a8" offset="0"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_5_25">
<dataarea name="flop" size = "1228800">
<rom name="disk04_2.0c_525.img" size="1228800" crc="a89719c0" sha1="17c2d56d5e50cdefe56c1e6dd7d63fe2b3529e97" offset="0"/>
</dataarea>
</part>
<part name="flop5" interface="floppy_5_25">
<dataarea name="flop" size = "1228800">
<rom name="disk05_2.0c_525.img" size="1228800" crc="4952d934" sha1="24a9f71e306ed0fee3df8e998825abbe731670de" offset="0"/>
</dataarea>
</part>
<part name="flop6" interface="floppy_5_25">
<dataarea name="flop" size = "1228800">
<rom name="disk06_2.0c_525.img" size="1228800" crc="f3345f09" sha1="a1ee64585f1104fc575eb8b623ad2d238c4ac0e2" offset="0"/>
</dataarea>
</part>
<part name="flop7" interface="floppy_5_25">
<dataarea name="flop" size = "1228800">
<rom name="disk07_2.0c_525.img" size="1228800" crc="40a9ee0c" sha1="ad924d4c79d0d7c3a3faaecb70a0eb6bb49e4803" offset="0"/>
</dataarea>
</part>
</software>
<software name="winword2a" cloneof="winword2">
<description>Word for Windows 2.0a (3.5")</description>
<year>1992</year>
<publisher>Microsoft</publisher>
<part name="flop1" interface="floppy_3_5">
<feature name="part_id" value="Setup"/>
<dataarea name="flop" size = "1474560">
<rom name="Disk01 - Setup.img" size="1474560" crc="c1a20ea9" sha1="f469a6e63672891c2fa8c1646689e731974bbc32" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<feature name="part_id" value="Program"/>
<dataarea name="flop" size = "1474560">
<rom name="Disk02 - Program.img" size="1474560" crc="510b5a0a" sha1="9244bc791968238921ea21d230bc1e03748aaeda" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_3_5">
<feature name="part_id" value="Drawing, Equation Editor"/>
<dataarea name="flop" size = "1474560">
<rom name="Disk03 - Drawing, Equation Editor.img" size="1474560" crc="c8a26400" sha1="d2942f8cca81bf4257045ff3803dbea0c893cc27" offset="0"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_3_5">
<feature name="part_id" value="Proofing Tools"/>
<dataarea name="flop" size = "1474560">
<rom name="Disk04 - Proofing Tools.img" size="1474560" crc="c8807e3f" sha1="9cc1398b83c28f5b2b25a954f24a0f68d312f971" offset="0"/>
</dataarea>
</part>
<part name="flop5" interface="floppy_3_5">
<feature name="part_id" value="Conversions"/>
<dataarea name="flop" size = "1474560">
<rom name="Disk05 - Conversions.img" size="1474560" crc="77018608" sha1="8eb809b3ad55ad6d94d01c1e0e6d89b5ea97e48b" offset="0"/>
</dataarea>
</part>
<part name="flop6" interface="floppy_3_5">
<feature name="part_id" value="Online Help"/>
<dataarea name="flop" size = "1474560">
<rom name="Disk06 - Online Help.img" size="1474560" crc="165ca0bd" sha1="39ff90b8f07a0f5ff0fc92c8e0aeb173befe018e" offset="0"/>
</dataarea>
</part>
</software>
<software name="winword2b" cloneof="winword2">
<description>Word for Windows 2.0 (3.5")</description>
<year>1991</year>
<publisher>Microsoft</publisher>
<part name="flop1" interface="floppy_3_5">
<feature name="part_id" value="Setup - Disk 1"/>
<feature name="disk_serial" value="Disk Assy 059-051-509" />
<dataarea name="flop" size = "1474560">
<rom name="msw20-1.img" size="1474560" crc="16b22ae5" sha1="0bc6b567bb63f2b93cddef072a3dfbe30d485aff" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<feature name="part_id" value="Program - Disk 2"/>
<feature name="disk_serial" value="Disk Assy 059-051-510" />
<dataarea name="flop" size = "1474560">
<rom name="msw20-2.img" size="1474560" crc="3baf11b2" sha1="0a22eafd1870fc7b8ae031a6a567eb9ca5da1551" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_3_5">
<feature name="part_id" value="Drawing/Equation Editor - Disk 3"/>
<feature name="disk_serial" value="Disk Assy 059-051-511" />
<dataarea name="flop" size = "1474560">
<rom name="msw20-3.img" size="1474560" crc="90efe1d2" sha1="de7d5531593493cde28e06c88b3413d3f5366615" offset="0"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_3_5">
<feature name="part_id" value="Proofing Tools - Disk 4"/>
<feature name="disk_serial" value="Disk Assy 059-051-512" />
<dataarea name="flop" size = "1474560">
<rom name="msw20-4.img" size="1474560" crc="d78979a6" sha1="05933331b83a81f38a0df78814cdd9f3b1a14052" offset="0"/>
</dataarea>
</part>
<part name="flop5" interface="floppy_3_5">
<feature name="part_id" value="Conversions - Disk 5"/>
<feature name="disk_serial" value="Disk Assy 059-051-513" />
<dataarea name="flop" size = "1474560">
<rom name="msw20-5.img" size="1474560" crc="dcde6ea9" sha1="5e0d6463f3f92fffb1a7d8d8c6c66faf943b207a" offset="0"/>
</dataarea>
</part>
<part name="flop6" interface="floppy_3_5">
<feature name="part_id" value="Online Help - Disk 6"/>
<feature name="disk_serial" value="Disk Assy 059-051-522" />
<dataarea name="flop" size = "1474560">
<rom name="msw20-6.img" size="1474560" crc="3b642f1d" sha1="fa4b08ee25860d3aa10085644a53447d28d60433" offset="0"/>
</dataarea>
</part>
</software>
<software name="winword2b_525" cloneof="winword2">
<!-- bad dump - disks have files and folders modified in 1999 and 2010 -->
<description>Word for Windows 2.0 (5.25")</description>
<year>1991</year>
<publisher>Microsoft</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size = "1228800">
<rom name="Disk01_525.img" size="1228800" crc="bbb94fe1" sha1="8337072add284e1993267d56b94548940dd9c12d" offset="0" status="baddump"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<dataarea name="flop" size = "1228800">
<rom name="Disk02_525.img" size="1228800" crc="b6d6584f" sha1="91e11376c95fc59d33eb2a03c59082ac069d009d" offset="0" status="baddump"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_5_25">
<dataarea name="flop" size = "1228800">
<rom name="Disk03_525.img" size="1228800" crc="961980e5" sha1="5e3c163ee606dba15d04bee92ae363ecd9e92b0b" offset="0" status="baddump"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_5_25">
<dataarea name="flop" size = "1228800">
<rom name="Disk04_525.img" size="1228800" crc="814e93cf" sha1="f9f2992b1a3a0981baa0fd9783c457df3e7cb65b" offset="0" status="baddump"/>
</dataarea>
</part>
<part name="flop5" interface="floppy_5_25">
<dataarea name="flop" size = "1228800">
<rom name="Disk05_525.img" size="1228800" crc="6474b694" sha1="1b7f63f9bdd80360dc328d8417a256d2f85488bd" offset="0" status="baddump"/>
</dataarea>
</part>
<part name="flop6" interface="floppy_5_25">
<dataarea name="flop" size = "1228800">
<rom name="Disk06_525.img" size="1228800" crc="7ae96b5b" sha1="bbe2d370c6e4ae1938ccd0709181d6cba4899940" offset="0" status="baddump"/>
</dataarea>
</part>
<part name="flop7" interface="floppy_5_25">
<dataarea name="flop" size = "1228800">
<rom name="Disk07_525.img" size="1228800" crc="790cbc16" sha1="310cfdca7b19795c86e04586d48d7b1e4afede21" offset="0" status="baddump"/>
</dataarea>
</part>
</software>
<software name="winword2it" cloneof="winword2">
<description>Word for Windows 2.0 (3.5", Italian)</description>
<year>1992</year>
<publisher>Microsoft</publisher>
<!-- 1024-byte footer removed from 1475584-byte images -->
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="disk1.img" size="1474560" crc="d9d9ef21" sha1="3d019394f0468053b05478d7dbb944100dc8ce88" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="disk2.img" size="1474560" crc="9e5c86c0" sha1="2f0e7a8f0ceb0ad9fc3a5e64f7a46e6e96937c71" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="disk3.img" size="1474560" crc="298e4c62" sha1="93017d2e94717ae3c93acbf5a623f2772433ab66" offset="0"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="disk4.img" size="1474560" crc="4eb5caec" sha1="55fa0fe14bc3149b041814d3a6d8e3c89f84bdcf" offset="0"/>
</dataarea>
</part>
<part name="flop5" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="disk5.img" size="1474560" crc="c50ddd5b" sha1="fdad6fc0afc475aef1634ac7f603dd51f5bcf410" offset="0"/>
</dataarea>
</part>
<part name="flop6" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="disk6.img" size="1474560" crc="02d83ae4" sha1="97b8700834f236e882be2c4bfdb6405fab1712c8" offset="0"/>
</dataarea>
</part>
<part name="flop7" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="disk7.img" size="1474560" crc="f4ac68b9" sha1="f1aeb7217beafebd6934e7c23f2a1c5e54519071" offset="0"/>
</dataarea>
</part>
<part name="flop8" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="disk8.img" size="1474560" crc="332cd1ff" sha1="8b3960e8fc87549df5b79e2909e6869d1dd149ad" offset="0"/>
</dataarea>
</part>
</software>
<software name="winword2tr" cloneof="winword2">
<description>Word for Windows 2.0c (3.5", Turkish)</description>
<year>1993</year>
<publisher>Microsoft</publisher>
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Disk01tr.img" size="1474560" crc="5ac376cd" sha1="1c5dec19a91a95ae95ab402b621cbf55e4385f53" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Disk02tr.img" size="1474560" crc="2d9db19e" sha1="4a6c49ec0d9902bba7ba33d57921b7dbbda8e94c" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Disk03tr.img" size="1474560" crc="d0eae336" sha1="0d080ad7624032832198ce145f8a31e9aa0feafa" offset="0"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Disk04tr.img" size="1474560" crc="805a32d2" sha1="916cc34bf277864cef3e27931184c92e7526166e" offset="0"/>
</dataarea>
</part>
<part name="flop5" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Disk05tr.img" size="1474560" crc="975d57c4" sha1="bb7c49b9aa57c9e47f026e795f9cc17ad9c00dc1" offset="0"/>
</dataarea>
</part>
</software>
<software name="wp60">
<description>WordPerfect 6.0 for DOS</description>
<year>1993</year>
@ -4317,7 +4604,7 @@ Missing files come here
<!-- from a registered version ordered circa 2004 -->
<description>Duke Nukum (V 2.0)</description>
<year>1991</year>
<publisher>Apogee</publisher>
<publisher>Apogee Software</publisher>
<info name="version" value="2.0" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
@ -4326,6 +4613,38 @@ Missing files come here
</part>
</software>
<software name="duke2">
<description>Duke Nukem II (v1.0, re-issue)</description>
<year>1993</year>
<publisher>Apogee Software</publisher>
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Duke Nukem II (USA) (Re-release) (Disk 1).img" size="1474560" crc="e8ff13c7" sha1="97b82903ec2725e8eba50b00084474ed890a4daf" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Duke Nukem II (USA) (Re-release) (Disk 2).img" size="1474560" crc="2d0c4ecc" sha1="d3376349a7a26ef906d51b74d93c84310afe1906" offset="0"/>
</dataarea>
</part>
</software>
<software name="duke2a" cloneof="duke2">
<description>Duke Nukem II</description>
<year>1993</year>
<publisher>Apogee Software</publisher>
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Duke Nukem II (USA) (Disk 1).img" size="1474560" crc="1bd5a714" sha1="149486014a05f47987e7c2974ff07b0cdab8ab10" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Duke Nukem II (USA) (Disk 2).img" size="1474560" crc="07a5265f" sha1="2b7e949dd818263153dcd2874e772d89e95b092f" offset="0"/>
</dataarea>
</part>
</software>
<software name="epicpina">
<!-- from Acer CPR 1.2 recovery CD-ROM -->
<description>Epic Pinball: Special ACER Edition</description>
@ -4589,7 +4908,7 @@ Missing files come here
<software name="raptor12">
<description>Raptor - Call of the Shadows</description>
<year>1994</year>
<publisher>Apogee Software, Ltd.</publisher>
<publisher>Apogee Software</publisher>
<info name="version" value="1.2" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">

149
hash/ibm6580.xml Normal file
View File

@ -0,0 +1,149 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="ibm6580" description="IBM Displaywriter disk images">
<software name="abc0051">
<description>Displaywriter System Communications Diagnostics (ABC005-1, P/N 4466806)</description>
<year>1983</year>
<publisher>IBM</publisher>
<part name="flop1" interface="floppy_8">
<dataarea name="flop" size="188446">
<rom name="ABC0051.IMD" size="188446" crc="d23ce97e" sha1="065aa15d6815d86689c6ebdd5d6280527991209a" offset="0" />
</dataarea>
</part>
</software>
<software name="abc0051d">
<description>Displaywriter System Communications Diagnostics (ABC005-1D, P/N 4466806)</description>
<year>1983</year>
<publisher>IBM</publisher>
<part name="flop1" interface="floppy_8">
<dataarea name="flop" size="188436">
<rom name="ABC0051D.IMD" size="188436" crc="8e546e77" sha1="ae0431e30ca85afcf1b6a08fafa47e471f7a8327" offset="0" />
</dataarea>
</part>
</software>
<software name="ced0122d">
<description>Displaywriter System Diagnostics (CED012-2D, P/N 4466805)</description>
<year>1983</year>
<publisher>IBM</publisher>
<part name="flop1" interface="floppy_8">
<dataarea name="flop" size="270354">
<rom name="CED0122D.IMD" size="270354" crc="a6070e50" sha1="62e4cd029ff178a092c932f9ec36321f174bae98" offset="0" />
</dataarea>
</part>
</software>
<software name="ced112d">
<description>Displaywriter System Diagnostics (CED011-2D)</description>
<year>198?</year>
<publisher>IBM</publisher>
<part name="flop1" interface="floppy_8">
<dataarea name="flop" size="262064">
<rom name="CED112D.IMD" size="262064" crc="afad5fc8" sha1="325817b9643739636b1be0bd1c8b79e855ef5f50" offset="0" />
</dataarea>
</part>
</software>
<software name="ced12a1">
<description>Displaywriter System Diagnostics (CED012A-1, P/N 6079274, SUB 4466804)</description>
<year>1983</year>
<publisher>IBM</publisher>
<part name="flop1" interface="floppy_8">
<dataarea name="flop" size="266999">
<rom name="CED12A1.IMD" size="266999" crc="f0f2cad9" sha1="69a70c9e988817eafab9caa486d8d5bcf5d80257" offset="0" />
</dataarea>
</part>
</software>
<software name="ced12a2d">
<description>Displaywriter System Diagnostics (CED012A-2D, P/N 6079275, SUB 4466805)</description>
<year>1983</year>
<publisher>IBM</publisher>
<part name="flop1" interface="floppy_8">
<dataarea name="flop" size="269785">
<rom name="CED12A2D.IMD" size="269785" crc="dd1c9531" sha1="c401a9e1fe6fda958fa56d3e6f26fe77585921ff" offset="0" />
</dataarea>
</part>
</software>
<software name="ced13a1">
<description>Displaywriter System Diagnostics (CED013A-1)</description>
<year>1983</year>
<publisher>IBM</publisher>
<part name="flop1" interface="floppy_8">
<dataarea name="flop" size="265686">
<rom name="CED13A1.IMD" size="265686" crc="e47023dc" sha1="bee94c1beec98b9a8d9487ab92e92605fd944c4b" offset="0" />
</dataarea>
</part>
</software>
<software name="ced13a2d">
<description>Displaywriter System Diagnostics (CED013A-2D, P/N 6079203)</description>
<year>1983</year>
<publisher>IBM</publisher>
<part name="flop1" interface="floppy_8">
<dataarea name="flop" size="269564">
<rom name="CED13A2D.IMD" size="269564" crc="25c29ca3" sha1="cfaec7942c28f71c80f2b28de735ffb17295b3c9" offset="0" />
</dataarea>
</part>
</software>
<software name="pdd12a1">
<description>Displaywriter Problem Determination Diskette (PDD012A-1, P/N 6079279, SUB 4466807)</description>
<year>1983</year>
<publisher>IBM</publisher>
<part name="flop1" interface="floppy_8">
<dataarea name="flop" size="239681">
<rom name="PDD12A1.IMD" size="239681" crc="c97a236b" sha1="b4d150eeb6f1244158896acbefe9ee28d305b6d8" offset="0" />
</dataarea>
</part>
</software>
<software name="pdd12a2d">
<description>Displaywriter Problem Determination Diskette (PDD012A-2D, P/N 6079280, SUB 4466808)</description>
<year>1983</year>
<publisher>IBM</publisher>
<part name="flop1" interface="floppy_8">
<dataarea name="flop" size="262167">
<rom name="PDD12A2D.IMD" size="262167" crc="ed546091" sha1="2f21c19c601a53ffb7436208827e170665c16fb2" offset="0" />
</dataarea>
</part>
</software>
<software name="pdd13a1">
<description>Displaywriter Problem Determination Diskette (PDD013-1)</description>
<year>1983</year>
<publisher>IBM</publisher>
<part name="flop1" interface="floppy_8">
<dataarea name="flop" size="248352">
<rom name="PDD13A1.IMD" size="248352" crc="5ea96ddb" sha1="7d2e1b821b056dc7248b4720fb6fabb27e3eeca9" offset="0" />
</dataarea>
</part>
</software>
<software name="1aanfa">
<description>Displaywriter Textpack 1 (1AANFA)</description>
<year>198?</year>
<publisher>IBM</publisher>
<part name="flop1" interface="floppy_8">
<dataarea name="flop" size="274586">
<rom name="TEXTAPACK1.IMD" size="274586" crc="d6e46d80" sha1="f75ab3f00341aa7df58b166b8d16d8c0b0a28cd5" offset="0" />
</dataarea>
</part>
</software>
</softwarelist>

8
hash/megadriv.xml
View File

@ -4816,11 +4816,12 @@ Info on Sega chip labels (from Sunbeam / Digital Corruption)
<description>Mega Games I (Euro)</description>
<year>1992</year>
<publisher>Sega</publisher>
<info name="release" value="19921001"/>
<part name="cart" interface="megadriv_cart">
<feature name="pcb" value="171-5978BA"/>
<feature name="pcb" value="171-5978BA"/> <!-- Also found with 171-5978B -->
<feature name="u1" value="MPR-15009 W50"/> <!-- location not really marked on PCB, using u1 for consistency -->
<dataarea name="rom" width="16" endianness="big" size="1048576">
<rom name="mpr-15009 w50.u1" size="1048576" crc="db753224" sha1="076df34a01094ce0893f32600e24323567e2a23b" offset="0x000000"/>
<rom name="MPR-15009 W50.u1" size="1048576" crc="db753224" sha1="076df34a01094ce0893f32600e24323567e2a23b" offset="0x000000"/>
</dataarea>
</part>
</software>
@ -7385,11 +7386,12 @@ Info on Sega chip labels (from Sunbeam / Digital Corruption)
<description>Sonic the Hedgehog (Euro, USA)</description>
<year>1991</year>
<publisher>Sega</publisher>
<info name="release" value="19910623"/>
<part name="cart" interface="megadriv_cart">
<feature name="pcb" value="171-5703"/>
<feature name="ic1" value="MPR-13913-F, MPR-13913 W33"/>
<dataarea name="rom" width="16" endianness="big" size="524288">
<rom name="mpr-13913-f.ic1" size="524288" crc="f9394e97" sha1="6ddb7de1e17e7f6cdb88927bd906352030daa194" offset="0x000000"/>
<rom name="MPR-13913-F.ic1" size="524288" crc="f9394e97" sha1="6ddb7de1e17e7f6cdb88927bd906352030daa194" offset="0x000000"/>
</dataarea>
</part>
</software>

9
hash/n64.xml
View File

@ -10899,9 +10899,16 @@ clips onto the player's ear.
<year>1999</year>
<publisher>Acclaim Entertainment</publisher>
<info name="serial" value="NUS-NRWD-NOE"/>
<info name="release" value="19991226"/>
<info name="alt_title" value="Turok - Rage Wars (Cart)"/>
<part name="cart" interface="n64_cart">
<feature name="pcb_model" value="NUS-01A-02" />
<feature name="u1" value="U1" /> <!-- ROM -->
<feature name="u2" value="U2" /> <!-- empty socket -->
<feature name="u3" value="U3" /> <!-- CIC -->
<feature name="cart_back_label" value="NUS-EUR-1" />
<dataarea name="rom" size="8388608">
<rom name="turok - legenden des verlorenen landes (germany).bin" size="8388608" crc="a2754ca4" sha1="51792351f4fd61c11f4b3b755a5eb8b9ea725b72" offset="000000" />
<rom name="NUS-NRWD-0.u1" size="8388608" crc="a2754ca4" sha1="51792351f4fd61c11f4b3b755a5eb8b9ea725b72" offset="000000" />
</dataarea>
</part>
</software>

61
hash/snes.xml
View File

@ -9929,8 +9929,8 @@ more investigation needed...
<feature name="cart_back_label" value="920214" />
<feature name="slot" value="hirom" />
<dataarea name="rom" size="3145728">
<rom name="shvc-adkj-0 p0.u1" size="2097152" crc="5b606ef7" sha1="6b47084fba80ce07347010a7bb4af063f058936b" offset="0x000000" />
<rom name="shvc-adkj-0 p3.u2" size="1048576" crc="5b379b50" sha1="83b0507f1a84e686d76b5b869c1a5f2e22278097" offset="0x200000" />
<rom name="SHVC-ADKJ-0 P0.u1" size="2097152" crc="5b606ef7" sha1="6b47084fba80ce07347010a7bb4af063f058936b" offset="0x000000" />
<rom name="SHVC-ADKJ-0 P3.u2" size="1048576" crc="5b379b50" sha1="83b0507f1a84e686d76b5b869c1a5f2e22278097" offset="0x200000" />
</dataarea>
<dataarea name="nvram" size="8192">
</dataarea>
@ -11930,7 +11930,7 @@ more investigation needed...
<feature name="cart_back_label" value="901121" />
<feature name="slot" value="lorom" />
<dataarea name="rom" size="1048576">
<rom name="shvc-eh-0.u1" size="1048576" crc="5cb9bc35" sha1="745ebf8164ca7be58829c6130c0e06f330cd0748" offset="0x000000" />
<rom name="SHVC-EH-0.u1" size="1048576" crc="5cb9bc35" sha1="745ebf8164ca7be58829c6130c0e06f330cd0748" offset="0x000000" />
</dataarea>
<dataarea name="nvram" size="8192">
</dataarea>
@ -19340,17 +19340,17 @@ more investigation needed...
<description>Nintendo Scope 6 (Euro)</description>
<year>1992</year>
<publisher>Nintendo</publisher>
<info name="serial" value="SNSP-LR-FAH, SNSP-LR-FAH-1" />
<info name="serial" value="SNSP-LR-FAH, SNSP-LR-FAH-1, SNSP-LR-UKV" />
<part name="cart" interface="snes_cart">
<feature name="pcb" value="SHVC-1A0N-02" />
<feature name="u1" value="U1 MASK ROM" />
<feature name="u2" value="U2 CIC" />
<feature name="lockout" value="" />
<feature name="cart_model" value="SNSP-006" />
<feature name="cart_back_label" value="SNSP-FAH" />
<feature name="cart_back_label" value="SNSP-FAH, SNSP-UKV" />
<feature name="slot" value="lorom" />
<dataarea name="rom" size="1048576">
<rom name="spal-lr-0.u1" size="1048576" crc="b1859ca4" sha1="e5efb589e2dd783ef2d99f01caa866d8a3a04d16" offset="0x000000" />
<rom name="SPAL-LR-0.u1" size="1048576" crc="b1859ca4" sha1="e5efb589e2dd783ef2d99f01caa866d8a3a04d16" offset="0x000000" />
</dataarea>
</part>
</software>
@ -25243,7 +25243,7 @@ more investigation needed...
<feature name="cart_back_label" value="920214" />
<feature name="slot" value="lorom" />
<dataarea name="rom" size="1048576">
<rom name="shvc-fc-0.u1" size="1048576" crc="7c94c86c" sha1="9d60d55b690c02413aa668ed9da196b4f1449e81" offset="0x000000" />
<rom name="SHVC-FC-0.u1" size="1048576" crc="7c94c86c" sha1="9d60d55b690c02413aa668ed9da196b4f1449e81" offset="0x000000" />
</dataarea>
<dataarea name="nvram" size="8192">
</dataarea>
@ -28147,7 +28147,7 @@ Alternate board (XL-1)
<feature name="cart_back_label" value="SNSP-EUR, SNSP-FAH" />
<feature name="slot" value="lorom" />
<dataarea name="rom" size="524288">
<rom name="spal-fs-0.u1" size="524288" crc="442c47cb" sha1="6eb6dd6da1e8eefad24c30b59ededbd671b9db2c" offset="0x000000" />
<rom name="SPAL-FS-0.u1" size="524288" crc="442c47cb" sha1="6eb6dd6da1e8eefad24c30b59ededbd671b9db2c" offset="0x000000" />
</dataarea>
</part>
</software>
@ -33287,6 +33287,26 @@ Alternate board (XL-1)
</part>
</software>
<software name="lostvik">
<description>The Lost Vikings (Euro)</description>
<year>1993</year>
<publisher>Interplay</publisher>
<info name="serial" value="SNSP-LV-SCN" />
<info name="release" value="19931028" />
<part name="cart" interface="snes_cart">
<feature name="pcb" value="SHVC-1A0N-20" />
<feature name="u1" value="U1 MASK ROM" />
<feature name="u2" value="U2 CIC" />
<feature name="lockout" value="" />
<feature name="cart_model" value="SNSP-006" />
<feature name="cart_back_label" value="SNSP-UKV" />
<feature name="slot" value="lorom" />
<dataarea name="rom" size="1048576">
<rom name="SPAL-LV-0.u1" size="1048576" crc="66989491" sha1="2bd4c2af6e5d7252d16342fd1a64454dca3ce557" offset="0x000000" />
</dataarea>
</part>
</software>
<software name="turnburns" cloneof="turnburn">
<!-- single cartridge source: Zidanax -->
<description>Turn and Burn - No-Fly Zone (Spa)</description>
@ -46113,18 +46133,6 @@ to ensure nothing has been touched in the Retro Quest cart production in 2013/20
</part>
</software>
<software name="lostvik">
<description>The Lost Vikings (Euro)</description>
<year>1993</year>
<publisher>Interplay</publisher>
<part name="cart" interface="snes_cart">
<feature name="slot" value="lorom" />
<dataarea name="rom" size="1048576">
<rom name="lost vikings, the (europe).sfc" size="1048576" crc="66989491" sha1="2bd4c2af6e5d7252d16342fd1a64454dca3ce557" offset="0x000000" />
</dataarea>
</part>
</software>
<software name="lostvikf" cloneof="lostvik">
<description>The Lost Vikings (Fra)</description>
<year>1993</year>
@ -59520,19 +59528,6 @@ to ensure nothing has been touched in the Retro Quest cart production in 2013/20
</part>
</software>
<!-- Most likely this is simply a bad dump of syvalionp. -->
<software name="syvalionp2" cloneof="syvalion">
<description>Syvalion (Euro, Prototype 2)</description>
<year>1992</year>
<publisher>Toshiba EMI</publisher>
<part name="cart" interface="snes_cart">
<feature name="slot" value="lorom" />
<dataarea name="rom" size="1048576">
<rom name="syvalion (europe) (beta).sfc" size="1048576" crc="be122755" sha1="ddfa611f1177f371c1107dbd8e8ecdb19011a232" offset="0x000000" status="baddump" />
</dataarea>
</part>
</software>
<software name="syvalion">
<description>Syvalion (Euro)</description>
<year>1992</year>

135
hash/t1000.xml Normal file
View File

@ -0,0 +1,135 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="t1000" description="Tandy 1000 series disk images">
<!-- OS -->
<software name="msdos32tx">
<description>MS-DOS (Verson 3.20, Tandy version 03.20.21) (Tandy 1000 TX)</description>
<year>1986</year>
<publisher>Tandy</publisher>
<info name="developer" value="Microsoft" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "737280">
<rom name="tandy_1000_tx_dos.img" size="737280" crc="c8ce9264" sha1="51a5bd4bec7fa3f0c4e956e904861973ae3fc67f" offset="0"/>
</dataarea>
</part>
</software>
<!-- Apps -->
<software name="deskmate">
<description>DeskMate (Tandy 1000)</description>
<year>1984</year>
<publisher>Tandy</publisher>
<info name="version" value="01.01.00" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="Disk01.img" size="368640" crc="37853a62" sha1="198b017bf743f0a80d4dccaf4b061f3d0cae520b" offset="0"/>
</dataarea>
</part>
</software>
<software name="deskmate2">
<description>DeskMate II (Tandy 3000)</description>
<year>1986</year>
<publisher>Tandy</publisher>
<info name="version" value="01.00.00" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="3kdm2dk1.img" size="368640" crc="3d5062c7" sha1="7a5de2e2578ca81b118ae23b7dc33c6b5215faf8" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="3kdm2dk2.img" size="368640" crc="16837ecf" sha1="4f5242aaf00e52b3c9d1350fb8fcbaf7f683293e" offset="0"/>
</dataarea>
</part>
</software>
<software name="pdesk">
<description>Personal DeskMate</description>
<year>1986</year>
<publisher>Tandy</publisher>
<info name="version" value="01.01.00" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="rom" size = "327680">
<rom name="disk1.img" size="327680" crc="a87e8486" sha1="12726ec6326c72959407a787642ffd28ebabcb83" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_5_25">
<dataarea name="rom" size = "327680">
<rom name="disk2.img" size="327680" crc="62185391" sha1="cc8d1356e19662085360c9e6ec92ecac1b903262" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_5_25">
<dataarea name="rom" size = "327680">
<rom name="disk3.img" size="327680" crc="0f2e9386" sha1="85c6f340e8e60b5c78e33e0fd925e4ce6da0a9ac" offset="0"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_5_25">
<dataarea name="rom" size = "327680">
<rom name="disk4.img" size="327680" crc="8c9bc1ec" sha1="87c7eed7c0d8b0084a1d36808eefa5725d8f8c56" offset="0"/>
</dataarea>
</part>
</software>
<software name="pdesk2hx">
<description>Personal DeskMate 2 (Tandy 1000 HX)</description>
<year>1987</year>
<publisher>Tandy</publisher>
<info name="version" value="01.00.00" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "737280">
<rom name="deskmate2.dsk" size="737280" crc="60b41a4a" sha1="89881aba7e217e986aac81a038f148b8c0ecc1db" offset="0"/>
</dataarea>
</part>
</software>
<software name="pdesk2hxa" cloneof="pdesk2hx">
<description>Personal DeskMate 2 (Tandy 1000 HX, Alt)</description>
<year>1987</year>
<publisher>Tandy</publisher>
<info name="version" value="01.00.00" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="rom" size = "737280">
<rom name="pdm2.img" size="737280" crc="deabce9d" sha1="2fc26931661204f90c4803fd9f4bbbe1e0f9faf3" offset="0"/>
</dataarea>
</part>
</software>
<software name="pdesk2tx" supported="no">
<description>Personal DeskMate 2 (Tandy 1000 TX)</description>
<year>1987</year>
<publisher>Tandy</publisher>
<info name="version" value="01.00.00" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "737280">
<rom name="tandy_1000tx_personal_deskmate_2.img" size="737280" crc="cd3446cb" sha1="b0575ed4a3dbf3d15bfd7d36eaf95f4116adefba" offset="0"/>
</dataarea>
</part>
</software>
<!-- Games -->
<software name="kingqst">
<description>King's Quest (Tandy)</description>
<year>1984</year>
<publisher>Sierra</publisher>
<info name="version" value="01.01.00" />
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="kq1tandy.img" size="368640" crc="6c5508cb" sha1="ae3aed4e06213035558637742fa64594e7f5f02b" offset="0"/>
</dataarea>
</part>
</software>
<software name="transyl">
<description>Transylvania (Tandy)</description>
<year>1986</year>
<publisher>Polarware</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size = "368640">
<rom name="transt1k.dsk" size="368640" crc="0bd2bbba" sha1="3a9fa90eaba2c3130d4a2fa029b5e6d9f8b5a859" offset="0"/>
</dataarea>
</part>
</software>
</softwarelist>

3608
hash/vsmile_cart.xml
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<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<!--
NOTE: This list is here only to document available dumps and it's not used (yet) by MESS!
-->
<!--
V.Smile Motion: 80-08**** (Smartridges are orange)
V.Smile Smartbook Software: 80-089*** (Smartridges are red)
V.Smile: 80-09**** (Smartridges are purple, some are gray because of plastic defects)
V.Smile Baby 80-099*** (Smartridges are yellow, incompatible with TV based V.Smile consoles)
Language:
********0 = US (White labels on back)
********1 = Italy Apparently distributed by company 'Giochi Preziosi'
********2 = Netherlands (Red or White labels on back)
********3 = UK (Red labels on back)
********4 = Germany (Blue labels on back)
********5 = France (Yellow labels on back, also for NTSC French-Canadian)
********6 = Portugal Apparently distributed by company 'Concentra' (White labels on back)
********7 = Spain (Green labels on back)
*******13 = Denmark Distributed by the company 'Top Toy A/S'
*******14 = Sweden Distributed by the company 'Top Toy A/S'
*******15 = Norway
*******?? = Finland
VTech V.Smile Baby cartridges
+========+===================+============================================================================+
| Dumped | Serial | Name |
+========+===================+============================================================================+
| | 80-099000(US) | Learn and Discover Home (white background on title) (pack-in) |
| | 80-099000(US) | Learn and Discover Home (green background on title) (standalone) |
| | 80-099002(NL) | Dierenhuis |
| | 80-099003(UK) | Learn and Discover Home (white background on title) (pack-in) |
| XX | 80-099004(GE) | Meine kleinen Tierfreunde (Explore and Learn Home on label) |
| | 80-099005(FR) | La Maison des animaux |
| XX | 80-099014(SE) | Lär och upptäck |
+========+===================+============================================================================+
| XX | 80-099020(US) | Pooh's Hundred Acre Wood Adventure |
| | 80-099022(NL) | Poeh's Honderd Bunderbos Avontuur |
| | 80-099023(UK) | Pooh's Hundred Acre Wood Adventure |
| XX | 80-099024(GE) | Puuhs Hundert-Morgen-Wald |
| | 80-099025(FR) | Winnie et ses amis dans la Faret des Reves Bieus |
| XX | 80-099034(SE) | Nalle Puhs Äventyr i Sjumilaskogen |
+========+===================+============================================================================+
| | 80-099040(US) | Baby Einstein - World of Discoveries |
| | 80-099040(US) | Baby Einstein - World of Discoveries (no # on front label) |
| | 80-099043(UK) | Baby Einstein - World of Discoveries |
| | 80-099045(FR) | Baby Einstein - Un Monde de decouvertes |
+========+===================+============================================================================+
| | 80-099060(US) | A Day On The Farm |
| | 80-099063(UK) | A Day On The Farm |
| XX | 80-099064(GE) | Mein erster Bauernhof |
| | 80-099065(FR) | Un jour a la ferme |
+========+===================+============================================================================+
| | 80-099080(US) | <Unknown> |
+========+===================+============================================================================+
| | 80-099100(US) | Noah's Ark Animal Adventure |
| | 80-099102(NL) | De ark van Noach |
| | 80-099103(UK) | Noah's Ark Animal Adventure |
| | 80-099105(FR) | L'arche de Noe - L'aventure des animaux |
+========+===================+============================================================================+
| | 80-099120(US) | Barney - Let's Go to a Party |
+========+===================+============================================================================+
| | 80-099140(US) | Teletubbies |
| | 80-099142(NL) | Teletubbies |
| | 80-099143(UK) | Teletubbies |
| | 80-099145(FR) | Teletubbies |
+========+===================+============================================================================+
| | 80-099160(US) | Discovery with Baby Mickey and Friends |
| | 80-099163(UK) | Discovery with Baby Mickey and Friends |
| | 80-099165(UK) | Les decouvertes de Mickey et ses amis |
+========+===================+============================================================================+
| | 80-099180(US) | Bailey Goes To Town (Included Bailey Plush Bear Controller) |
| | 80-099183(UK) | Bailey Goes To Town (Included Bailey Plush Bear Controller) |
+========+===================+============================================================================+
| | 80-099200(US) | Mother Goose |
+========+===================+============================================================================+
| | 80-099220(US) | Care Bears Play Day |
+========+===================+============================================================================+
| | 80-099240(US) | Backyardigans: Big Backyard Adventures |
+========+===================+============================================================================+
VTech V.Baby cartridges. Note that the VTech V.Baby is not the same console as the VTech V.Smile Baby.
The V.Baby currently have no dumps available, hence the carts are temporarily listed here.
+========+===================+============================================================================+
| Dumped | Serial | Name |
+========+===================+============================================================================+
| | 80-107100-001(US) | Meet Me at the Zoo (Orange, V.Baby packin) |
| | 80-220000(US) | The World of Eric Carle - The Very Hungry Caterpillar |
| | 80-220600(US) | Backyardigans |
| | 80-220700(US) | Noah's Ark - Animal Adventures |
| | 80-220800(US) | Mother Goose |
+========+===================+============================================================================+
-->
<softwarelist name="vsmileb_cart" description="VTech V.Smile Baby cartridges">
<software name="mktierf" supported="no">
<description>Meine kleinen Tierfreunde (Ger)</description>
<year>200?</year>
<publisher>VTech</publisher>
<info name="serial" value="80-099004(GE)" />
<part name="cart" interface="vsmileb_cart">
<feature name="pcb" value="707154" />
<feature name="pcb_model" value="707154-3" />
<feature name="u4" value="U4" /> <!-- EPOXY BLOB ROM -->
<dataarea name="rom" size="8388608">
<rom name="99004.u4" size="8388608" crc="7b48544b" sha1="a736ef1313762c493a366990406c3a7393457b6e" offset="0" />
</dataarea>
</part>
</software>
<software name="bauernhf" supported="no">
<description>Mein erster Bauernhof (Ger)</description>
<year>200?</year>
<publisher>VTech</publisher>
<info name="serial" value="80-099064(GE)" />
<part name="cart" interface="vsmileb_cart">
<feature name="pcb" value="707154" />
<feature name="pcb_model" value="707154-3" />
<feature name="u4" value="U4" /> <!-- ROM -->
<dataarea name="rom" size="8388608">
<rom name="27-08788-000.u4" size="8388608" crc="581e16f9" sha1="330b309644db9f017d275b9df0ffe7530ed5bcef" offset="0" />
</dataarea>
</part>
</software>
<software name="poohhawa" supported="no">
<description>Pooh's Hundred Acre Wood Adventure (USA)</description>
<year>2007</year>
<publisher>VTech</publisher>
<info name="serial" value="80-099020(US)" />
<part name="cart" interface="vsmileb_cart">
<dataarea name="rom" size="8388608">
<rom name="099020.bin" size="8388608" crc="a3ac4cd4" sha1="3562c632e0a1e70cb9e382ebb823449757afed67" offset="0" />
</dataarea>
</part>
</software>
<software name="poohhawag" cloneof="poohhawa" supported="no">
<description>Puuhs Hundert-Morgen-Wald (Ger)</description>
<year>2006?</year>
<publisher>VTech</publisher>
<info name="serial" value="80-099024(GE)" />
<part name="cart" interface="vsmileb_cart">
<feature name="pcb" value="707155" />
<feature name="pcb_model" value="707155-2" />
</part>
</software>
<software name="poohhawasw" cloneof="poohhawa" supported="no">
<description>Nalle Puhs Äventyr i Sjumilaskogen (Swe)</description>
<year>2007?</year>
<publisher>VTech</publisher>
<info name="serial" value="80-099034(SE)" />
<part name="cart" interface="vsmileb_cart">
<feature name="pcb" value="707154" />
<feature name="pcb_model" value="707154-4" />
<feature name="u4" value="U4" /> <!-- EPOXY BLOB ROM -->
<dataarea name="rom" size="8388608">
<rom name="99034.u4" size="8388608" crc="5dbe1c20" sha1="51f56cedbe99fc7438429a4c02c08f65d2313790" offset="0" />
</dataarea>
</part>
</software>
<software name="lupptack" cloneof="mktierf" supported="no">
<description>Lär och upptäck (Swe)</description>
<year>200?</year>
<publisher>VTech</publisher>
<info name="serial" value="80-099014(SE)" />
<part name="cart" interface="vsmileb_cart">
<feature name="pcb" value="707155" />
<feature name="pcb_model" value="707155-2" />
</part>
</software>
</softwarelist>

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<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<!--
NOTE: This list is here only to document available dumps and it's not used (yet) by MESS!
-->
<!--
V.Smile Motion: 80-08**** (Smartridges are orange)
V.Smile Smartbook Software: 80-089*** (Smartridges are red)
V.Smile: 80-09**** (Smartridges are purple, some are gray because of plastic defects)
V.Smile Baby 80-099*** (Smartridges are yellow, incompatible with TV based V.Smile consoles)
Language:
********0 = US (White labels on back)
********1 = Italy Apparently distributed by company 'Giochi Preziosi'
********2 = Netherlands (Red or White labels on back)
********3 = UK (Red labels on back)
********4 = Germany (Blue labels on back)
********5 = France (Yellow labels on back, also for NTSC French-Canadian)
********6 = Portugal Apparently distributed by company 'Concentra' (White labels on back)
********7 = Spain (Green labels on back)
*******13 = Denmark Distributed by the company 'Top Toy A/S'
*******14 = Sweden Distributed by the company 'Top Toy A/S'
*******15 = Norway
*******?? = Finland
+========+===================+============================================================================+
| | 80-084000(US) | Action Mania |
| | (IT) | ????? |
| | 80-084002(NL) | Sports Games |
| | 80-084003(UK) | Action Mania |
| | 80-084004(GE) | Sportskanone |
| | 80-084005(FR) | Sporti Folies |
| | 80-084006(PT) | Action Mania (84016 on cart) |
| | 80-084007(SP) | Action Mania |
+========+===================+============================================================================+
| | 80-084020(US) | Dora the Explorer: Dora's Fix It Adventure |
| | 80-084021(US) | Dora the Explorer: Dora's Fix It Adventure (pocket version) |
| | 80-084022(NL) | Dora: Dora's Reparatie Avontuur |
| | 80-084023(UK) | Dora the Explorer: Dora's Fix It Adventure |
| XX | 80-084024(GE) | Dora: Doras Reparatur-Abenteuer |
| | 80-084025(FR) | Dora L'Exploratrice : Les Adventures De Dora Apprentie Mecano |
| | 80-084026(PT) | Dora : em busca das pecas perdidas |
| | 80-084027(SP) | Dora : La Aventura arregla-todo de Dora |
+========+===================+============================================================================+
| | 80-084040(US) | Scooby-Doo! - Funland Frenzy |
| | 80-084043(UK) | Scooby-Doo! - Funland Frenzy |
| | 80-084044(GE) | Scooby-Doo! - Im Lernpark |
| | 80-084045(FR) | Scooby-Doo - Panique A Funland |
| | 80-084047(SP) | Scooby-Doo - Misterio en el Parque |
+========+===================+============================================================================+
| | 80-084060(US) | Thomas and Friends - Engines Working Together |
| | 80-084063(UK) | Thomas and Friends - Engines Working Together |
| | 80-084064(GE) | Thomas - Freunde halten zusammen |
+========+===================+============================================================================+
| | 80-084080(US) | Wall-E |
| | 80-084083(UK) | Wall-E |
| | 80-084084(GE) | Wall-E |
| | 80-084085(FR) | Wall-E |
| | 80-084087(SP) | Wall-E |
+========+===================+============================================================================+
| | 80-084100(US) | Wonder Pets - Save the Animals! |
| | 80-084103(UK) | Wonder Pets - Save the Animals! |
+========+===================+============================================================================+
| | 80-084120(US) | Kung Fu Panda - Path of the Panda |
| | 80-084123(UK) | Kung Fu Panda - Path of the Panda |
| XX | 80-084124(GE) | Kung Fu Panda - Der Weg des Panda |
| | 80-084125(FR) | Kung Fu Panda - La mission de Po |
+========+===================+============================================================================+
| | 80-084140(US) | Spider-Man & Friends - Secret Missions (AKA Professor V's Secret Missions with diff label)
| | 80-084143(UK) | Spider-Man & Friends - Secret Missions |
| | 80-084144(GE) | Spider-Man & Freunde - Geheime Missionen |
| | 80-084145(FR) | Spider-Man and ses amis - Missions Secretes |
| | 80-084147(SP) | Spider-Man y Amigos: Misiones Secretas (no # on label) |
+========+===================+============================================================================+
| | 80-084160(US) | Disney's Little Einsteins: The Glass Slipper Ball |
| | 80-084163(UK) | Disney's Little Einsteins: The Glass Slipper Ball |
| XX | 80-084164(GE) | Disney's Kleine Einsteins: Der Glaspantoffel-Ball |
| | 80-084167(SP) | Little Einsteins de Disney: El baile del zapatito de cristal |
+========+===================+============================================================================+
| | 80-084180(US) | Mickey Mouse Clubhouse |
| | 80-084182(NL) | Mickey Mouse Clubhouse |
| | 80-084183(UK) | Mickey Mouse Clubhouse |
| | 80-084184(GE) | Micky Maus Wunderhaus |
| | 80-084185(FR) | La Maison de Mickey |
| | 80-084186(PT) | A Casa do Mickey Mouse (84196 on cart) |
| | 80-084187(SP) | La Casa de Mickey Mouse |
+========+===================+============================================================================+
| | 80-084200(US) | Nascar Academy - Race Car Superstar |
+========+===================+============================================================================+
| | 80-084220(US) | Snow Park Challenge |
| | 80-084222(NL) | Wintersport Games |
| | 80-084223(UK) | Snow Park Challenge |
| | 80-084224(GE) | Wintersport |
| | 80-084225(FR) | ?????? picture too fuzzy for positve confirm |
+========+===================+============================================================================+
| | 80-084240(US) | Ni Hao Kai Lan |
| | 80-084245(FR) | Ni Hao Kai Lan |
+========+===================+============================================================================+
| | 80-084260(US) | My Pet Puppy (unreleased in USA?? UK version plays AOK on NTSC console) |
| | 80-084262(NL) | Mijn Puppy! |
| | 80-084263(UK) | My Pet Puppy |
| | 80-084264(GE) | Mein erster Hund |
| | 80-084265(FR) | Mon Youtou Tout Fou! |
| | 80-084267(SP) | Dakota y su Mascota |
+========+===================+============================================================================+
| | 80-084280(US) | Wild Waves |
| | 80-084282(NL) | Water-sport Games |
| | 80-084283(UJ) | Wild Waves |
| | 80-084284(GE) | Dolphis Wasser-abenteuer |
| | 80-084285(FR) | Martin le Dauphin |
+========+===================+============================================================================+
| | 80-084300(US) | Soccer Challenge |
| | 80-084303(UK) | Football Challenge |
| | 80-084304(GE) | Fussball Meisterschaft |
| | 80-084305(FR) | Football Challenge |
| | 80-084306(PT) | Football Challenge (cart#??) |
| | 80-084307(SP) | Campeonato de Futbol |
+========+===================+============================================================================+
| | 80-084320(US) | Disney Fairies: TinkerBell |
| | 80-084321(US) | Disney Fairies: TinkerBell (pocket version) |
| | 80-084322(NL) | TinkerBell |
| | 80-084323(UK) | TinkerBell |
| XX | 80-084324(GE) | TinkerBell |
| | 80-084325(FR) | La fee Clochette |
| | 80-084326(PT) | Sininho (84336 on cart) |
| | 80-084327(SP) | Campanilla |
+========+===================+============================================================================+
| | 80-084340(US) | Up! |
| | 80-084342(NL) | Up! |
| | 80-084344(GE) | Oben |
| | 80-084345(FR) | La-Haut |
| | 80-084347(SP) | Up! |
| | 80-084347-022(SP) | Up! (-022 is odd for SP) |
+========+===================+============================================================================+
| | 80-084360(US) | Handy Manny |
| | 80-084362(NL) | Handy Manny |
| | 80-084363(UK) | Handy Manny |
| | 80-084364(GE) | Meister Manny's Werkzeugkiste |
| | 80-084365(FR) | Manny Et Ses Outils |
| | 80-084366(PT) | Manny Maozinhas (84376 on cart) |
| | 80-084367(SP) | Manny Manitas |
+========+===================+============================================================================+
| | 80-084380(US) | Winnie the Pooh - The Honey Hunt |
| | (IT) | Winnie the Pooh - e la caccia al miele ??? |
| | 80-084383(UK) | Winnie the Pooh - The Honey Hunt |
| XX | 80-084384(GE) | Winnie Puuh - Die Honigjagd |
| | 80-084385(FR) | Winnie Rourson - La Chasse au miel de Winnie |
| | 80-084386(PT) | Winnie - Em Busca do Mel (84396 on cart) |
| | 80-084387(SP) | Winnie the Pooh - En busca de la miel |
+========+===================+============================================================================+
| | 80-084400(US) | Cars: Rev It Up in Radiator Springs |
| | 80-084402(NL) | Cars: Spektakel in Radiator Springs |
| | 80-084403(UK) | Cars: Rev it up in Radiator Springs |
| | 80-084404(GE) | Cars: Vollgas in Radiator Springs |
| | 80-084405(FR) | Cars: Quatre Roues |
| | 80-084406(PT) | Cars: Aventura Em Radiator Springs (84416 on cart) |
| | 80-084407(SP) | Cars: Acelera el Motor en Radiador Springs |
+========+===================+============================================================================+
| | 80-084420(US) | Toy Story 3 |
| | 80-084421(US) | Toy Story 3 (pocket version) |
| | (IT) | Toy Story 3 (EAN 8033836704196) GP470419? |
| | 80-084422(NL) | Toy Story 3 |
| | 80-084423(UK) | Toy Story 3 |
| | 80-084424(GE) | Toy Story 3 |
| | 80-084425(FR) | Toy Story 3 |
| | 80-084427(SP) | Toy Story 3 |
+========+===================+============================================================================+
| | 80-084440(US) | Monsters vs. Aliens |
| | 80-084442(NL) | Monsters vs. Aliens |
| | 80-084443(UK) | Monsters vs. Aliens |
| | 80-084444(GE) | Monsters vs. Aliens |
| | 80-084445(FR) | Monsters vs. Aliens |
| | 80-084447(SP) | Monstruos contra Alienigenas |
+========+===================+============================================================================+
| | 80-084460(US) | Noddy - Detective for a Day (unreleased in USA??) see 80-092540 |
| | 80-084463(UK) | Noddy - Detective for a Day |
| | 80-084465(FR) | Oui-Oui - Detective d'un jour |
| | 80-084467(SP) | Noddy - Detective por un Dia |
+========+===================+============================================================================+
| | 80-084480(US) | The Princess and the Frog (motion version) |
| | 80-084481(US) | The Princess and the Frog (pocket version) |
| | 80-084482(NL) | Prinses en de Kikker (label in english) |
| | 80-084483(UK) | The Princess and the Frog |
| | 80-084484(GE) | Kuess den Frosch |
| | 80-084485(FR) | La Princesse Et La Grenouille |
| | 80-084487(SP) | Tiana y el sapo - El gran Sueno de Tiana |
+========+===================+============================================================================+
| | 80-084500(US) | Shrek Forever After |
| | 80-084502(NL) | Sjrek voor eeuwig en altijd |
| | 80-084503(UK) | Shrek Forever After |
| | 80-084504(GE) | Fuer immer Shrek |
| | 80-084505(FR) | Shrek 4 - Il Etait une Fin |
| | 80-084507(SP) | Shrek Felices para siempre |
+========+===================+============================================================================+
| | 80-084520(US) | <Unknown> |
+========+===================+============================================================================+
| | 80-084540(US) | Super Why to the Rescue! The Beach Day Mystery |
| | 80-084541(US) | Super Why to the Rescue! The Beach Day Mystery (pocket version) |
+========+===================+============================================================================+
| | 80-084560(US) | <Unknown> |
+========+===================+============================================================================+
| | 80-084580(US) | Cars 2 (motion version) |
| | 80-084581(US) | Cars 2 (pocket version) |
| | 80-084583(UK) | Cars 2 |
| | 80-084584(GE) | Cars 2 |
| | 80-084585(FR) | Cars 2 |
| | 80-084587(SP) | Cars 2 |
+========+===================+============================================================================+
| | 80-084600(US) | <Unknown> (Should be Orange colored Cinderella - Cinderella's Magic Wishes)|
| | 80-084603(UK) | Cinderella - Cinderella's Magic Wishes |
| XX | 80-084604(GE) | Cinderella - Lernen im Maerchenland |
| | 80-084605(FR) | Cendrillon - ????? |
+========+===================+============================================================================+
| | 80-084620(US) | <Unknown> (Should be Orange colored Finding Nemo) |
| | 80-084624(GE) | Findet Nemo - Nemos Unterwasserabenteuer |
| | 80-084625(FR) | Le Monde de Nemo - Nemo a la decourverte de l'ocean |
| | 80-084627(SP) | Buscando a Nemo - Los Descubrimientos de Nemo |
+========+===================+============================================================================+
| | 80-084640(US) | <Unknown> (Should be Orange colored Spongebob) |
| | 80-084644(GE) | Spongebob Schwammkopf - Der Tag des Schwamms |
| | 80-084647(SP) | Bob Epsonja - Un dia en la vida de una esponja |
+========+===================+============================================================================+
V.Smile Smartbooks
Smartbooks currently have no dumps available, hence they are temporarily listed here.
+========+===================+============================================================================+
| | 80-089000(US) | Spider-Man &amp; Friends Where is Hulk? |
+========+===================+============================================================================+
| | 80-089020(US) | Toy Story 2 |
+========+===================+============================================================================+
| | 80-089040(US) | Dora the Explorer - Dora's Got a Puppy |
| | 80-089045(FR) | Dora's ?????? |
+========+===================+============================================================================+
| | 80-089060(US) | Scooby-Doo! - A Night of Fright is no Delight |
+========+===================+============================================================================+
-->
<softwarelist name="vsmilem_cart" description="VTech V.Smile Motion cartridges">
<software name="cinderla" supported="no">
<description>Disney Princess Cinderella - Lernen im Märchenland (Ger)</description>
<year>2010?</year>
<publisher>VTech</publisher>
<info name="serial" value="80-084604(GE)" />
<part name="cart" interface="vsmilem_cart">
<feature name="pcb" value="708201" />
<feature name="pcb_model" value="708201-7" />
<feature name="u1" value="" /> <!-- EPOXY BLOB ROM -->
<dataarea name="rom" size="8388608">
<rom name="C84604.u1" size="8388608" crc="0229cf3a" sha1="9c08e6370ecf08992924f067b64dd1950e3a2c6c" offset="0" />
</dataarea>
</part>
</software>
<software name="kfpanda" supported="no">
<description>DreamWorks Kung Fu Panda - Der Weg des Panda (Ger)</description>
<year>2008?</year>
<publisher>VTech</publisher>
<info name="serial" value="80-084124(GE)" />
<part name="cart" interface="vsmilem_cart">
<feature name="pcb" value="708201" />
<feature name="pcb_model" value="708201-4" />
<feature name="u1" value="" /> <!-- EPOXY BLOB ROM -->
<dataarea name="rom" size="8388608">
<rom name="84124 OK.u1" size="8388608" crc="16493095" sha1="07c75e46c294901ee9309d98c925a39dc1b5e384" offset="0" />
</dataarea>
</part>
</software>
<software name="dora" supported="no">
<description>Nick Dora - Doras Reparatur-Abenteuer (Ger)</description>
<year>2009?</year>
<publisher>VTech</publisher>
<info name="serial" value="80-084024(GE)" />
<part name="cart" interface="vsmilem_cart">
<feature name="pcb" value="708201" />
<feature name="pcb_model" value="708201-4" />
<feature name="u1" value="" /> <!-- EPOXY BLOB ROM -->
<dataarea name="rom" size="8388608">
<rom name="84024 OK.u1" size="8388608" crc="6769cb8b" sha1="615177d959983cdb67acdb8f3be063b3d09cb5db" offset="0" />
</dataarea>
</part>
</software>
<software name="kleinstn" supported="no">
<description>Kleine Einsteins (Ger)</description>
<year>200?</year>
<publisher>VTech</publisher>
<info name="serial" value="80-084164(GE)" />
<part name="cart" interface="vsmilem_cart">
<dataarea name="rom" size="8388608">
<rom name="80-084164.bin" size="8388608" crc="b0ec807e" sha1="e947c84efd3f061cbf10f73e412d4cfdd474bade" offset="0" />
</dataarea>
</part>
</software>
<software name="tinker" supported="no">
<description>TinkerBell (Ger)</description>
<year>2009?</year>
<publisher>VTech</publisher>
<info name="serial" value="80-084324(GE)" />
<part name="cart" interface="vsmilem_cart">
<feature name="pcb" value="708201" />
<feature name="pcb_model" value="708201-7" />
<feature name="u1" value="" /> <!-- EPOXY BLOB ROM -->
<dataarea name="rom" size="8388608">
<rom name="C84324.u1" size="8388608" crc="9e207566" sha1="bb3e180a2c69306b56f08909a05dc83309be0f09" offset="0" />
</dataarea>
</part>
</software>
<software name="pooh" supported="no">
<description>Winnie Puuh - Die Honigjagd (Ger)</description>
<year>2009?</year>
<publisher>VTech</publisher>
<info name="serial" value="80-084384(GE)" />
<part name="cart" interface="vsmilem_cart">
<feature name="pcb" value="708201" />
<feature name="pcb_model" value="708201-4" />
<feature name="u1" value="" /> <!-- EPOXY BLOB ROM -->
<dataarea name="rom" size="8388608">
<rom name="84384.u1" size="8388608" crc="60649955" sha1="2eda79cbf138e25ffb33281987cc885ec98e9b04" offset="0" />
</dataarea>
</part>
</software>
</softwarelist>

2
nl_examples/cdelay.c
View File

@ -37,7 +37,7 @@ NETLIST_START(cap_delay)
SOLVER(Solver, P_FREQ)
PARAM(Solver.ACCURACY, 1e-20)
PARAM(Solver.DYNAMIC_TS, P_DTS)
PARAM(Solver.MIN_TIMESTEP, 1e-6)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 1e-6)
CLOCK(clk, 5000)
TTL_7400_NAND(n1,clk,clk)

5
nl_examples/congo_bongo.c
View File

@ -46,8 +46,7 @@ NETLIST_START(dummy)
PARAM(Solver.NR_LOOPS, 9000)
PARAM(Solver.SOR_FACTOR, 0.001)
PARAM(Solver.GS_LOOPS, 1)
//PARAM(Solver.GS_THRESHOLD, 99)
PARAM(Solver.ITERATIVE, "MAT_CR")
PARAM(Solver.METHOD, "MAT_CR")
#if USE_OPTMIZATIONS
SOLVER(Solver, 24000)
@ -56,7 +55,7 @@ NETLIST_START(dummy)
SOLVER(Solver, 24000)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_LTE, 1e-4)
PARAM(Solver.MIN_TIMESTEP, 5e-7)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 5e-7)
PARAM(Solver.PARALLEL, 0)
PARAM(Solver.PIVOT, 0)
#endif

15
nl_examples/kidniki.c
View File

@ -13,15 +13,14 @@ NETLIST_START(dummy)
PARAM(Solver.ACCURACY, 1e-8)
PARAM(Solver.NR_LOOPS, 300)
PARAM(Solver.GS_LOOPS, 1)
PARAM(Solver.GS_THRESHOLD, 6)
//PARAM(Solver.ITERATIVE, "W")
PARAM(Solver.ITERATIVE, "MAT_CR")
//PARAM(Solver.ITERATIVE, "MAT")
//PARAM(Solver.ITERATIVE, "GMRES")
//PARAM(Solver.ITERATIVE, "SOR")
//PARAM(Solver.METHOD, "W")
PARAM(Solver.METHOD, "MAT_CR")
//PARAM(Solver.METHOD, "MAT")
//PARAM(Solver.METHOD, "GMRES")
//PARAM(Solver.METHOD, "SOR")
PARAM(Solver.DYNAMIC_TS, 0)
PARAM(Solver.DYNAMIC_LTE, 5e-3)
PARAM(Solver.MIN_TIMESTEP, 10e-6)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 10e-6)
PARAM(Solver.PARALLEL, 0)
PARAM(Solver.SOR_FACTOR, 1.00)
PARAM(Solver.PIVOT, 0)
@ -30,7 +29,7 @@ NETLIST_START(dummy)
PARAM(Solver.ACCURACY, 1e-8)
PARAM(Solver.NR_LOOPS, 300)
PARAM(Solver.GS_LOOPS, 20)
PARAM(Solver.ITERATIVE, "GMRES")
PARAM(Solver.METHOD, "GMRES")
PARAM(Solver.PARALLEL, 0)
#endif
//FIXME proper models!

1
nl_examples/norton_opamp.c
View File

@ -18,7 +18,6 @@ NETLIST_START(main)
PARAM(Solver.SOR_FACTOR, 1.0)
//PARAM(Solver.CONVERG, 1.0)
PARAM(Solver.GS_LOOPS, 5)
PARAM(Solver.GS_THRESHOLD, 5)
SUBMODEL(op1, opamp_fast)
/* Wired as non - inverting amplifier like in LM3900 datasheet */

1
nl_examples/opamp.c
View File

@ -18,7 +18,6 @@ NETLIST_START(main)
PARAM(Solver.NR_LOOPS, 30000 )
//PARAM(Solver.CONVERG, 1.0)
PARAM(Solver.GS_LOOPS, 30)
PARAM(Solver.GS_THRESHOLD, 99)
// Tie up +5 to opamps thought it's not currently needed
// Stay compatible

2
nl_examples/rl.c
View File

@ -17,7 +17,7 @@ NETLIST_START(lr)
SOLVER(Solver, 48000)
PARAM(Solver.ACCURACY, 1e-6)
CLOCK(clk, 50)
PARAM(Solver.ITERATIVE, "MAT_CR")
PARAM(Solver.METHOD, "MAT_CR")
IND(L1, 10)
RES(R1, 10000)

3
scripts/src/cpu.lua
View File

@ -1335,7 +1335,10 @@ if (CPUS["M6805"]~=null) then
files {
MAME_DIR .. "src/devices/cpu/m6805/m6805.cpp",
MAME_DIR .. "src/devices/cpu/m6805/m6805.h",
MAME_DIR .. "src/devices/cpu/m6805/6805defs.h",
MAME_DIR .. "src/devices/cpu/m6805/6805ops.hxx",
MAME_DIR .. "src/devices/cpu/m6805/m68705.cpp",
MAME_DIR .. "src/devices/cpu/m6805/m68705.h",
}
end

2
scripts/src/netlist.lua
View File

@ -192,6 +192,8 @@ project "netlist"
MAME_DIR .. "src/lib/netlist/devices/nlid_system.h",
MAME_DIR .. "src/lib/netlist/devices/nlid_proxy.cpp",
MAME_DIR .. "src/lib/netlist/devices/nlid_proxy.h",
MAME_DIR .. "src/lib/netlist/macro/nlm_base.cpp",
MAME_DIR .. "src/lib/netlist/macro/nlm_base.h",
MAME_DIR .. "src/lib/netlist/macro/nlm_ttl74xx.cpp",
MAME_DIR .. "src/lib/netlist/macro/nlm_ttl74xx.h",
MAME_DIR .. "src/lib/netlist/macro/nlm_cd4xxx.cpp",

18
scripts/target/mame/mess.lua
View File

@ -895,6 +895,7 @@ function linkProjects_mame_mess(_target, _subtarget)
"ccs",
"chromatics",
"coleco",
"compugraphic",
"cromemco",
"comx",
"concept",
@ -937,6 +938,7 @@ function linkProjects_mame_mess(_target, _subtarget)
"homebrew",
"homelab",
"hp",
"ibm6580",
"imp",
"intel",
"interton",
@ -1645,6 +1647,11 @@ files {
MAME_DIR .. "src/mame/machine/coleco.h",
}
createMESSProjects(_target, _subtarget, "compugraphic")
files {
MAME_DIR .. "src/mame/drivers/pwrview.cpp",
}
createMESSProjects(_target, _subtarget, "cromemco")
files {
MAME_DIR .. "src/mame/drivers/c10.cpp",
@ -1895,6 +1902,7 @@ files {
createMESSProjects(_target, _subtarget, "force")
files {
MAME_DIR .. "src/mame/drivers/miniforce.cpp",
MAME_DIR .. "src/mame/drivers/fccpu20.cpp",
MAME_DIR .. "src/mame/drivers/fccpu30.cpp",
MAME_DIR .. "src/mame/drivers/force68k.cpp",
@ -2027,6 +2035,15 @@ files {
MAME_DIR .. "src/mame/drivers/hk68v10.cpp",
}
createMESSProjects(_target, _subtarget, "ibm6580")
files {
MAME_DIR .. "src/mame/drivers/ibm6580.cpp",
MAME_DIR .. "src/mame/machine/ibm6580_kbd.cpp",
MAME_DIR .. "src/mame/machine/ibm6580_kbd.h",
MAME_DIR .. "src/mame/machine/ibm6580_fdc.cpp",
MAME_DIR .. "src/mame/machine/ibm6580_fdc.h",
}
createMESSProjects(_target, _subtarget, "intel")
files {
MAME_DIR .. "src/mame/drivers/basic52.cpp",
@ -3305,7 +3322,6 @@ files {
MAME_DIR .. "src/mame/drivers/hunter2.cpp",
MAME_DIR .. "src/mame/drivers/i7000.cpp",
MAME_DIR .. "src/mame/drivers/ibm3153.cpp",
MAME_DIR .. "src/mame/drivers/ibm6580.cpp",
MAME_DIR .. "src/mame/drivers/icatel.cpp",
MAME_DIR .. "src/mame/drivers/ie15.cpp",
MAME_DIR .. "src/mame/machine/ie15_kbd.cpp",

2
src/devices/bus/a2bus/mouse.h
View File

@ -14,7 +14,7 @@
#include "emu.h"
#include "a2bus.h"
#include "machine/6821pia.h"
#include "cpu/m6805/m6805.h"
#include "cpu/m6805/m68705.h"
//**************************************************************************
// TYPE DEFINITIONS

747
src/devices/cpu/cop400/cop400.cpp
View File

@ -48,11 +48,6 @@
TODO:
- remove InstLen
- run interrupt test suite
- run production test suite
- run microbus test suite
- when is the microbus int cleared?
- opcode support for 2048x8 and 128x4/160x4 memory sizes
- CKO sync input
- save internal RAM when CKO is RAM power supply pin
@ -88,12 +83,6 @@ const device_type COP445 = &device_creator<cop445_cpu_device>;
#define LOG_MICROBUS 0
/* feature masks */
#define COP410_FEATURE 0x01
#define COP420_FEATURE 0x02
#define COP444_FEATURE 0x04
#define COP440_FEATURE 0x08
/***************************************************************************
MACROS
@ -348,7 +337,7 @@ void cop400_cpu_device::WRITE_G(uint8_t data)
***************************************************************************/
#define INSTRUCTION(mnemonic) void (cop400_cpu_device::mnemonic)(uint8_t opcode)
#define INST(mnemonic) &cop400_cpu_device::mnemonic
#define OP(mnemonic) &cop400_cpu_device::mnemonic
INSTRUCTION(illegal)
{
@ -361,399 +350,400 @@ INSTRUCTION(illegal)
OPCODE TABLES
***************************************************************************/
const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP410_OPCODE_23_MAP[256] =
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP410_OPCODE_23_MAP[256] =
{
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(xad) },
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(xad) ,
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) }
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal)
};
void cop400_cpu_device::cop410_op23(uint8_t opcode)
{
uint8_t opcode23 = ROM(PC++);
uint8_t opcode23 = fetch();
(this->*COP410_OPCODE_23_MAP[opcode23].function)(opcode23);
(this->*COP410_OPCODE_23_MAP[opcode23])(opcode23);
}
const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP410_OPCODE_33_MAP[256] =
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP410_OPCODE_33_MAP[256] =
{
{1, INST(illegal) },{1, INST(skgbz0) },{1, INST(illegal) },{1, INST(skgbz2) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(skgbz1) },{1, INST(illegal) },{1, INST(skgbz3) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(skgz) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(ing) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(inl) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(halt) },{1, INST(illegal) },{1, INST(omg) },{1, INST(illegal) },{1, INST(camq) },{1, INST(illegal) },{1, INST(obd) },{1, INST(illegal) },
OP(illegal) , OP(skgbz0) , OP(illegal) , OP(skgbz2) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(skgbz1) , OP(illegal) , OP(skgbz3) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(skgz) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(ing) , OP(illegal) , OP(illegal) , OP(illegal) , OP(inl) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(halt) , OP(illegal) , OP(omg) , OP(illegal) , OP(camq) , OP(illegal) , OP(obd) , OP(illegal) ,
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },
{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) ,
OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) }
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal)
};
void cop400_cpu_device::cop410_op33(uint8_t opcode)
{
uint8_t opcode33 = ROM(PC++);
uint8_t opcode33 = fetch();
(this->*COP410_OPCODE_33_MAP[opcode33].function)(opcode33);
(this->*COP410_OPCODE_33_MAP[opcode33])(opcode33);
}
const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP410_OPCODE_MAP[256] =
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP410_OPCODE_MAP[256] =
{
{1, INST(clra) },{1, INST(skmbz0) },{1, INST(xor_) },{1, INST(skmbz2) },{1, INST(xis) },{1, INST(ld) },{1, INST(x) },{1, INST(xds) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{0, INST(illegal) },{1, INST(skmbz1) },{0, INST(illegal) },{1, INST(skmbz3) },{1, INST(xis) },{1, INST(ld) },{1, INST(x) },{1, INST(xds) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(skc) },{1, INST(ske) },{1, INST(sc) },{1, INST(cop410_op23) },{1, INST(xis) },{1, INST(ld) },{1, INST(x) },{1, INST(xds) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(asc) },{1, INST(add) },{1, INST(rc) },{1, INST(cop410_op33) },{1, INST(xis) },{1, INST(ld) },{1, INST(x) },{1, INST(xds) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
OP(clra) , OP(skmbz0) , OP(xor_) , OP(skmbz2) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(illegal) , OP(skmbz1) , OP(illegal) , OP(skmbz3) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(skc) , OP(ske) , OP(sc) , OP(cop410_op23) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(asc) , OP(add) , OP(rc) , OP(cop410_op33) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
{1, INST(comp) },{0, INST(illegal) },{1, INST(rmb2) },{1, INST(rmb3) },{1, INST(nop) },{1, INST(rmb1) },{1, INST(smb2) },{1, INST(smb1) },
{1, INST(ret) },{1, INST(retsk) },{0, INST(illegal) },{1, INST(smb3) },{1, INST(rmb0) },{1, INST(smb0) },{1, INST(cba) },{1, INST(xas) },
{1, INST(cab) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },
{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },
{2, INST(jmp) },{2, INST(jmp) },{0, INST(illegal) },{0, INST(illegal) },{0, INST(illegal) },{0, INST(illegal) },{0, INST(illegal) },{0, INST(illegal) },
{2, INST(jsr) },{2, INST(jsr) },{0, INST(illegal) },{0, INST(illegal) },{0, INST(illegal) },{0, INST(illegal) },{0, INST(illegal) },{0, INST(illegal) },
{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },
{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },
OP(comp) , OP(illegal) , OP(rmb2) , OP(rmb3) , OP(nop) , OP(rmb1) , OP(smb2) , OP(smb1) ,
OP(ret) , OP(retsk) , OP(illegal) , OP(smb3) , OP(rmb0) , OP(smb0) , OP(cba) , OP(xas) ,
OP(cab) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) ,
OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) ,
OP(jmp) , OP(jmp) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(jsr) , OP(jsr) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) ,
OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) ,
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{2, INST(lqid) },
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(lqid) ,
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{2, INST(jid) }
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jid)
};
const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP420_OPCODE_23_MAP[256] =
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP420_OPCODE_23_MAP[256] =
{
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) }
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal)
};
void cop400_cpu_device::cop420_op23(uint8_t opcode)
{
uint8_t opcode23 = ROM(PC++);
uint8_t opcode23 = fetch();
(this->*COP420_OPCODE_23_MAP[opcode23].function)(opcode23);
(this->*COP420_OPCODE_23_MAP[opcode23])(opcode23);
}
const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP420_OPCODE_33_MAP[256] =
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP420_OPCODE_33_MAP[256] =
{
{1, INST(illegal) },{1, INST(skgbz0) },{1, INST(illegal) },{1, INST(skgbz2) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(skgbz1) },{1, INST(illegal) },{1, INST(skgbz3) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(skgz) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(inin) },{1, INST(inil) },{1, INST(ing) },{1, INST(illegal) },{1, INST(cqma) },{1, INST(illegal) },{1, INST(inl) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(omg) },{1, INST(illegal) },{1, INST(camq) },{1, INST(illegal) },{1, INST(obd) },{1, INST(illegal) },
OP(illegal) , OP(skgbz0) , OP(illegal) , OP(skgbz2) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(skgbz1) , OP(illegal) , OP(skgbz3) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(skgz) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(inin) , OP(inil) , OP(ing) , OP(illegal) , OP(cqma) , OP(illegal) , OP(inl) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(omg) , OP(illegal) , OP(camq) , OP(illegal) , OP(obd) , OP(illegal) ,
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },
{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },
{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },
{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) ,
OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) ,
OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) ,
OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) }
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal)
};
void cop400_cpu_device::cop420_op33(uint8_t opcode)
{
uint8_t opcode33 = ROM(PC++);
uint8_t opcode33 = fetch();
(this->*COP420_OPCODE_33_MAP[opcode33].function)(opcode33);
(this->*COP420_OPCODE_33_MAP[opcode33])(opcode33);
}
const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP420_OPCODE_MAP[256] =
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP420_OPCODE_MAP[256] =
{
{1, INST(clra) },{1, INST(skmbz0) },{1, INST(xor_) },{1, INST(skmbz2) },{1, INST(xis) },{1, INST(ld) },{1, INST(x) },{1, INST(xds) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(casc) },{1, INST(skmbz1) },{1, INST(xabr) },{1, INST(skmbz3) },{1, INST(xis) },{1, INST(ld) },{1, INST(x) },{1, INST(xds) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(skc) },{1, INST(ske) },{1, INST(sc) },{1, INST(cop420_op23) },{1, INST(xis) },{1, INST(ld) },{1, INST(x) },{1, INST(xds) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(asc) },{1, INST(add) },{1, INST(rc) },{1, INST(cop420_op33) },{1, INST(xis) },{1, INST(ld) },{1, INST(x) },{1, INST(xds) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
OP(clra) , OP(skmbz0) , OP(xor_) , OP(skmbz2) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(casc) , OP(skmbz1) , OP(xabr) , OP(skmbz3) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(skc) , OP(ske) , OP(sc) , OP(cop420_op23) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(asc) , OP(add) , OP(rc) , OP(cop420_op33) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
{1, INST(comp) },{1, INST(skt) },{1, INST(rmb2) },{1, INST(rmb3) },{1, INST(nop) },{1, INST(rmb1) },{1, INST(smb2) },{1, INST(smb1) },
{1, INST(cop420_ret) },{1, INST(retsk) },{1, INST(adt) },{1, INST(smb3) },{1, INST(rmb0) },{1, INST(smb0) },{1, INST(cba) },{1, INST(xas) },
{1, INST(cab) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },
{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },
{2, INST(jmp) },{2, INST(jmp) },{2, INST(jmp) },{2, INST(jmp) },{0, INST(illegal) },{0, INST(illegal) },{0, INST(illegal) },{0, INST(illegal) },
{2, INST(jsr) },{2, INST(jsr) },{2, INST(jsr) },{2, INST(jsr) },{0, INST(illegal) },{0, INST(illegal) },{0, INST(illegal) },{0, INST(illegal) },
{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },
{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },
OP(comp) , OP(skt) , OP(rmb2) , OP(rmb3) , OP(nop) , OP(rmb1) , OP(smb2) , OP(smb1) ,
OP(cop420_ret) , OP(retsk) , OP(adt) , OP(smb3) , OP(rmb0) , OP(smb0) , OP(cba) , OP(xas) ,
OP(cab) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) ,
OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) ,
OP(jmp) , OP(jmp) , OP(jmp) , OP(jmp) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(jsr) , OP(jsr) , OP(jsr) , OP(jsr) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) ,
OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) ,
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{2, INST(lqid) },
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(lqid) ,
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{2, INST(jid) }
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jid)
};
const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP444_OPCODE_23_MAP[256] =
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP444_OPCODE_23_MAP[256] =
{
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },{1, INST(ldd) },
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad)
};
void cop400_cpu_device::cop444_op23(uint8_t opcode)
{
uint8_t opcode23 = ROM(PC++);
uint8_t opcode23 = fetch();
(this->*COP444_OPCODE_23_MAP[opcode23].function)(opcode23);
(this->*COP444_OPCODE_23_MAP[opcode23])(opcode23);
}
const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP444_OPCODE_33_MAP[256] =
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP444_OPCODE_33_MAP[256] =
{
{1, INST(illegal) },{1, INST(skgbz0) },{1, INST(illegal) },{1, INST(skgbz2) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(skgbz1) },{1, INST(illegal) },{1, INST(skgbz3) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(skgz) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(inin) },{1, INST(inil) },{1, INST(ing) },{1, INST(illegal) },{1, INST(cqma) },{1, INST(illegal) },{1, INST(inl) },{1, INST(ctma) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(it) },{1, INST(illegal) },{1, INST(omg) },{1, INST(illegal) },{1, INST(camq) },{1, INST(illegal) },{1, INST(obd) },{1, INST(camt) },
OP(illegal) , OP(skgbz0) , OP(illegal) , OP(skgbz2) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(skgbz1) , OP(illegal) , OP(skgbz3) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(skgz) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(inin) , OP(inil) , OP(ing) , OP(illegal) , OP(cqma) , OP(illegal) , OP(inl) , OP(ctma) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(it) , OP(illegal) , OP(omg) , OP(illegal) , OP(camq) , OP(illegal) , OP(obd) , OP(camt) ,
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },
{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },{1, INST(ogi) },
{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },
{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },{1, INST(lei) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) ,
OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) ,
OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) ,
OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi)
};
void cop400_cpu_device::cop444_op33(uint8_t opcode)
{
uint8_t opcode33 = ROM(PC++);
uint8_t opcode33 = fetch();
(this->*COP444_OPCODE_33_MAP[opcode33].function)(opcode33);
(this->*COP444_OPCODE_33_MAP[opcode33])(opcode33);
}
const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP444_OPCODE_MAP[256] =
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP444_OPCODE_MAP[256] =
{
{1, INST(clra) },{1, INST(skmbz0) },{1, INST(xor_) },{1, INST(skmbz2) },{1, INST(xis) },{1, INST(ld) },{1, INST(x) },{1, INST(xds) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(casc) },{1, INST(skmbz1) },{1, INST(cop444_xabr)},{1, INST(skmbz3) },{1, INST(xis) },{1, INST(ld) },{1, INST(x) },{1, INST(xds) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(skc) },{1, INST(ske) },{1, INST(sc) },{1, INST(cop444_op23) },{1, INST(xis) },{1, INST(ld) },{1, INST(x) },{1, INST(xds) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
{1, INST(asc) },{1, INST(add) },{1, INST(rc) },{1, INST(cop444_op33) },{1, INST(xis) },{1, INST(ld) },{1, INST(x) },{1, INST(xds) },
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
OP(clra) , OP(skmbz0) , OP(xor_) , OP(skmbz2) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(casc) , OP(skmbz1) , OP(cop444_xabr), OP(skmbz3) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(skc) , OP(ske) , OP(sc) , OP(cop444_op23) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(asc) , OP(add) , OP(rc) , OP(cop444_op33) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
{1, INST(comp) },{1, INST(skt) },{1, INST(rmb2) },{1, INST(rmb3) },{1, INST(nop) },{1, INST(rmb1) },{1, INST(smb2) },{1, INST(smb1) },
{1, INST(cop420_ret) },{1, INST(retsk) },{1, INST(adt) },{1, INST(smb3) },{1, INST(rmb0) },{1, INST(smb0) },{1, INST(cba) },{1, INST(xas) },
{1, INST(cab) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },
{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },{1, INST(aisc) },
{2, INST(jmp) },{2, INST(jmp) },{2, INST(jmp) },{2, INST(jmp) },{2, INST(jmp) },{2, INST(jmp) },{2, INST(jmp) },{2, INST(jmp) },
{2, INST(jsr) },{2, INST(jsr) },{2, INST(jsr) },{2, INST(jsr) },{2, INST(jsr) },{2, INST(jsr) },{2, INST(jsr) },{2, INST(jsr) },
{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },
{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },{1, INST(stii) },
OP(comp) , OP(skt) , OP(rmb2) , OP(rmb3) , OP(nop) , OP(rmb1) , OP(smb2) , OP(smb1) ,
OP(cop420_ret) , OP(retsk) , OP(adt) , OP(smb3) , OP(rmb0) , OP(smb0) , OP(cba) , OP(xas) ,
OP(cab) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) ,
OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) ,
OP(jmp) , OP(jmp) , OP(jmp) , OP(jmp) , OP(jmp) , OP(jmp) , OP(jmp) , OP(jmp) ,
OP(jsr) , OP(jsr) , OP(jsr) , OP(jsr) , OP(jsr) , OP(jsr) , OP(jsr) , OP(jsr) ,
OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) ,
OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) ,
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{2, INST(lqid) },
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(lqid) ,
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },
{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{1, INST(jp) },{2, INST(jid) }
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jid)
};
/***************************************************************************
TIMER CALLBACKS
***************************************************************************/
@ -833,17 +823,24 @@ void cop400_cpu_device::serial_tick()
void cop400_cpu_device::counter_tick()
{
T++;
if (m_featuremask & (COP444_FEATURE | COP440_FEATURE))
{
T++;
if (T == 0)
if (T == 0)
{
m_skt_latch = 1;
if (m_idle)
{
m_idle = 0;
m_halt = 0;
}
}
}
else
{
m_skt_latch = 1;
if (m_idle)
{
m_idle = 0;
m_halt = 0;
}
}
}
@ -869,12 +866,6 @@ void cop400_cpu_device::inil_tick()
INITIALIZATION
***************************************************************************/
enum {
TIMER_SERIAL,
TIMER_COUNTER,
TIMER_INIL
};
void cop400_cpu_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
@ -919,7 +910,7 @@ void cop400_cpu_device::device_start()
/* allocate serial timer */
m_serial_timer = timer_alloc(TIMER_SERIAL);
m_serial_timer->adjust(attotime::zero, 0, attotime::from_ticks(16, clock()));
m_serial_timer->adjust(attotime::zero, 0, attotime::from_ticks(m_cki, clock()));
/* allocate counter timer */
@ -927,7 +918,15 @@ void cop400_cpu_device::device_start()
if (m_has_counter)
{
m_counter_timer = timer_alloc(TIMER_COUNTER);
m_counter_timer->adjust(attotime::zero, 0, attotime::from_ticks(16 * 4, clock()));
if (m_featuremask & (COP444_FEATURE | COP440_FEATURE))
{
m_counter_timer->adjust(attotime::zero, 0, attotime::from_ticks(m_cki * 4, clock()));
}
else
{
m_counter_timer->adjust(attotime::zero, 0, attotime::from_ticks(m_cki * 1024, clock()));
}
}
/* allocate IN latch timer */
@ -936,7 +935,7 @@ void cop400_cpu_device::device_start()
if (m_has_inil)
{
m_inil_timer = timer_alloc(TIMER_INIL);
m_inil_timer->adjust(attotime::zero, 0, attotime::from_ticks(16, clock()));
m_inil_timer->adjust(attotime::zero, 0, attotime::from_ticks(m_cki, clock()));
}
/* register for state saving */
@ -1007,7 +1006,7 @@ void cop400_cpu_device::device_start()
state_add(COP400_SIO, "SIO", m_sio).mask(0xf);
state_add(COP400_SKL, "SKL", m_skl).mask(0x1);
if (m_featuremask & (COP420_FEATURE | COP444_FEATURE | COP440_FEATURE))
if (m_featuremask & (COP444_FEATURE | COP440_FEATURE))
{
state_add(COP400_T, "T", m_t);
}
@ -1058,43 +1057,39 @@ void cop400_cpu_device::device_reset()
EXECUTION
***************************************************************************/
uint8_t cop400_cpu_device::fetch()
{
m_icount--;
return ROM(PC++);
}
void cop400_cpu_device::execute_run()
{
do
{
// debugger hook
m_prevpc = PC;
debugger_instruction_hook(this, PC);
if (m_cko == COP400_CKO_HALT_IO_PORT)
{
// halt logic
if (m_cko == COP400_CKO_HALT_IO_PORT) {
m_halt = IN_CKO();
}
if (m_halt)
{
m_icount -= 1;
if (m_halt) {
m_icount--;
continue;
}
uint8_t opcode = ROM(PC);
int inst_cycles = m_opcode_map[opcode].cycles;
PC++;
(this->*(m_opcode_map[opcode].function))(opcode);
m_icount -= inst_cycles;
if (m_skip_lbi > 0) m_skip_lbi--;
// fetch opcode
uint8_t opcode = fetch();
cop400_opcode_func function = m_opcode_map[opcode];
// check for interrupt
if (BIT(EN, 1) && BIT(IL, 1))
{
cop400_opcode_func function = m_opcode_map[ROM(PC)].function;
if (BIT(EN, 1) && BIT(IL, 1)) {
// all successive transfer of control instructions and successive LBIs have been completed
if ((function != INST(jp)) && (function != INST(jmp)) && (function != INST(jsr)) && !m_skip_lbi)
{
if ((function != OP(jp)) && (function != OP(jmp)) && (function != OP(jsr)) && !m_skip_lbi) {
// store skip logic
m_last_skip = m_skip;
m_skip = 0;
@ -1112,31 +1107,29 @@ void cop400_cpu_device::execute_run()
IL &= ~2;
}
// skip next instruction?
if (m_skip)
{
cop400_opcode_func function = m_opcode_map[ROM(PC)].function;
opcode = ROM(PC);
if ((function == INST(lqid)) || (function == INST(jid)))
{
m_icount -= 1;
if (m_skip) {
// skip instruction
if (m_InstLen[opcode] == 2) {
// fetch second byte
opcode = fetch();
}
else
{
m_icount -= m_opcode_map[opcode].cycles;
}
PC += m_InstLen[opcode];
m_skip = 0;
continue;
}
// execute instruction
(this->*(function))(opcode);
// LBI skip logic
if (m_skip_lbi > 0) {
m_skip_lbi--;
}
} while (m_icount > 0);
}
/***************************************************************************
GENERAL CONTEXT ACCESS
***************************************************************************/

41
src/devices/cpu/cop400/cop400.h
View File

@ -191,6 +191,19 @@ protected:
devcb_write_line m_write_sk;
devcb_read_line m_read_cko;
enum {
COP410_FEATURE = 0x01,
COP420_FEATURE = 0x02,
COP444_FEATURE = 0x04,
COP440_FEATURE = 0x08
};
enum {
TIMER_SERIAL,
TIMER_COUNTER,
TIMER_INIL
};
cop400_cki_bond m_cki;
cop400_cko_bond m_cko;
bool m_has_microbus;
@ -251,23 +264,17 @@ protected:
typedef void ( cop400_cpu_device::*cop400_opcode_func ) (uint8_t opcode);
/* The opcode table now is a combination of cycle counts and function pointers */
struct cop400_opcode_map {
uint32_t cycles;
cop400_opcode_func function;
};
const cop400_opcode_func *m_opcode_map;
const cop400_opcode_map *m_opcode_map;
static const cop400_opcode_map COP410_OPCODE_23_MAP[256];
static const cop400_opcode_map COP410_OPCODE_33_MAP[256];
static const cop400_opcode_map COP410_OPCODE_MAP[256];
static const cop400_opcode_map COP420_OPCODE_23_MAP[256];
static const cop400_opcode_map COP420_OPCODE_33_MAP[256];
static const cop400_opcode_map COP420_OPCODE_MAP[256];
static const cop400_opcode_map COP444_OPCODE_23_MAP[256];
static const cop400_opcode_map COP444_OPCODE_33_MAP[256];
static const cop400_opcode_map COP444_OPCODE_MAP[256];
static const cop400_opcode_func COP410_OPCODE_23_MAP[256];
static const cop400_opcode_func COP410_OPCODE_33_MAP[256];
static const cop400_opcode_func COP410_OPCODE_MAP[256];
static const cop400_opcode_func COP420_OPCODE_23_MAP[256];
static const cop400_opcode_func COP420_OPCODE_33_MAP[256];
static const cop400_opcode_func COP420_OPCODE_MAP[256];
static const cop400_opcode_func COP444_OPCODE_23_MAP[256];
static const cop400_opcode_func COP444_OPCODE_33_MAP[256];
static const cop400_opcode_func COP444_OPCODE_MAP[256];
void serial_tick();
void counter_tick();
@ -278,6 +285,8 @@ protected:
void WRITE_Q(uint8_t data);
void WRITE_G(uint8_t data);
uint8_t fetch();
void illegal(uint8_t opcode);
void asc(uint8_t opcode);
void add(uint8_t opcode);

20
src/devices/cpu/cop400/cop400op.hxx
View File

@ -266,8 +266,9 @@ INSTRUCTION( casc )
INSTRUCTION( jid )
{
uint16_t addr = (PC & 0x700) | (A << 4) | RAM_R(B);
PC = (PC & 0x700) | ROM(addr);
PC = (PC & 0x700) | (A << 4) | RAM_R(B);
uint8_t operand = fetch();
PC = (PC & 0x700) | operand;
}
/*
@ -286,9 +287,8 @@ INSTRUCTION( jid )
INSTRUCTION( jmp )
{
uint16_t a = ((opcode & 0x07) << 8) | ROM(PC);
PC = a;
uint8_t operand = fetch();
PC = ((opcode & 0x07) << 8) | operand;
}
/*
@ -351,10 +351,9 @@ INSTRUCTION( jp )
INSTRUCTION( jsr )
{
uint16_t a = ((opcode & 0x07) << 8) | ROM(PC);
PUSH(PC + 1);
PC = a;
uint8_t operand = fetch();
PUSH(PC);
PC = ((opcode & 0x07) << 8) | operand;
}
/*
@ -554,7 +553,8 @@ INSTRUCTION( lqid )
{
PUSH(PC);
PC = (PC & 0x700) | (A << 4) | RAM_R(B);
WRITE_Q(ROM(PC));
uint8_t operand = fetch();
WRITE_Q(operand);
POP();
}

20
src/devices/cpu/cop400/cop410ds.cpp
View File

@ -20,22 +20,24 @@ CPU_DISASSEMBLE(cop410)
if ((opcode >= 0x80 && opcode <= 0xBE) || (opcode >= 0xC0 && opcode <= 0xFE))
{
if ((pc & 0x3E0) >= 0x80 && (pc & 0x3E0) < 0x100) //JP pages 2,3
int page = pc >> 6;
if (page == 2 || page == 3) //JP pages 2,3
{
address = (uint16_t)((pc & 0x380) | (opcode & 0x7F));
util::stream_format(stream, "JP %x", address);
address = (uint16_t)((pc & 0x180) | (opcode & 0x7F));
util::stream_format(stream, "JP %03x", address);
}
else
{
if ((opcode & 0xC0) == 0xC0) //JP other pages
{
address = (uint16_t)((pc & 0x3C0) | (opcode & 0x3F));
util::stream_format(stream, "JP %x", address);
address = (uint16_t)((pc & 0x1C0) | (opcode & 0x3F));
util::stream_format(stream, "JP %03x", address);
}
else //JSRP
{
address = (uint16_t)(0x80 | (opcode & 0x3F));
util::stream_format(stream, "JSRP %x", address);
util::stream_format(stream, "JSRP %03x", address);
flags = DASMFLAG_STEP_OVER;
}
}
@ -63,13 +65,13 @@ CPU_DISASSEMBLE(cop410)
else if (opcode >= 0x60 && opcode <= 0x61)
{
address = ((opcode & 0x01) << 8) | next_opcode;
util::stream_format(stream, "JMP %x", address);
util::stream_format(stream, "JMP %03x", address);
bytes = 2;
}
else if (opcode >= 0x68 && opcode <= 0x69)
{
address = ((opcode & 0x01) << 8) | next_opcode;
util::stream_format(stream, "JSR %x", address);
util::stream_format(stream, "JSR %03x", address);
flags = DASMFLAG_STEP_OVER;
bytes = 2;
}
@ -155,7 +157,7 @@ CPU_DISASSEMBLE(cop410)
if (next_opcode >= 0x80 && next_opcode <= 0xbf)
{
address = (uint16_t)(next_opcode & 0x3F);
util::stream_format(stream, "XAD %x,%x", ((address & 0x30) >> 4),address & 0x0F);
util::stream_format(stream, "XAD %u,%u", ((address & 0x30) >> 4),address & 0x0F);
}
else
{

18
src/devices/cpu/cop400/cop420ds.cpp
View File

@ -20,22 +20,24 @@ CPU_DISASSEMBLE(cop420)
if ((opcode >= 0x80 && opcode <= 0xBE) || (opcode >= 0xC0 && opcode <= 0xFE))
{
if ((pc & 0x3E0) >= 0x80 && (pc & 0x3E0) < 0x100) //JP pages 2,3
int page = pc >> 6;
if (page == 2 || page == 3) //JP pages 2,3
{
address = (uint16_t)((pc & 0x380) | (opcode & 0x7F));
util::stream_format(stream, "JP %x", address);
util::stream_format(stream, "JP %03x", address);
}
else
{
if ((opcode & 0xC0) == 0xC0) //JP other pages
{
address = (uint16_t)((pc & 0x3C0) | (opcode & 0x3F));
util::stream_format(stream, "JP %x", address);
util::stream_format(stream, "JP %03x", address);
}
else //JSRP
{
address = (uint16_t)(0x80 | (opcode & 0x3F));
util::stream_format(stream, "JSRP %x", address);
util::stream_format(stream, "JSRP %03x", address);
flags = DASMFLAG_STEP_OVER;
}
}
@ -63,13 +65,13 @@ CPU_DISASSEMBLE(cop420)
else if (opcode >= 0x60 && opcode <= 0x63)
{
address = ((opcode & 0x03) << 8) | next_opcode;
util::stream_format(stream, "JMP %x", address);
util::stream_format(stream, "JMP %03x", address);
bytes = 2;
}
else if (opcode >= 0x68 && opcode <= 0x6B)
{
address = ((opcode & 0x03) << 8) | next_opcode;
util::stream_format(stream, "JSR %x", address);
util::stream_format(stream, "JSR %03x", address);
flags = DASMFLAG_STEP_OVER;
bytes = 2;
}
@ -163,12 +165,12 @@ CPU_DISASSEMBLE(cop420)
if (next_opcode <= 0x3f)
{
address = (uint16_t)(next_opcode & 0x3F);
util::stream_format(stream, "LDD %x,%x", ((address & 0x30) >> 4),address & 0x0F);
util::stream_format(stream, "LDD %u,%u", ((address & 0x30) >> 4),address & 0x0F);
}
else if (next_opcode >= 0x80 && next_opcode <= 0xbf)
{
address = (uint16_t)(next_opcode & 0x3F);
util::stream_format(stream, "XAD %x,%x", ((address & 0x30) >> 4),address & 0x0F);
util::stream_format(stream, "XAD %u,%u", ((address & 0x30) >> 4),address & 0x0F);
}
else
{

22
src/devices/cpu/cop400/cop440ds.cpp
View File

@ -20,22 +20,24 @@ CPU_DISASSEMBLE(cop444)
if ((opcode >= 0x80 && opcode <= 0xBE) || (opcode >= 0xC0 && opcode <= 0xFE))
{
if ((pc & 0x3E0) >= 0x80 && (pc & 0x3E0) < 0x100) //JP pages 2,3
int page = pc >> 6;
if (page == 2 || page == 3) //JP pages 2,3
{
address = (uint16_t)((pc & 0x380) | (opcode & 0x7F));
util::stream_format(stream, "JP %x", address);
address = (uint16_t)((pc & 0x780) | (opcode & 0x7F));
util::stream_format(stream, "JP %03x", address);
}
else
{
if ((opcode & 0xC0) == 0xC0) //JP other pages
{
address = (uint16_t)((pc & 0x3C0) | (opcode & 0x3F));
util::stream_format(stream, "JP %x", address);
address = (uint16_t)((pc & 0x7C0) | (opcode & 0x3F));
util::stream_format(stream, "JP %03x", address);
}
else //JSRP
{
address = (uint16_t)(0x80 | (opcode & 0x3F));
util::stream_format(stream, "JSRP %x", address);
util::stream_format(stream, "JSRP %03x", address);
flags = DASMFLAG_STEP_OVER;
}
}
@ -63,13 +65,13 @@ CPU_DISASSEMBLE(cop444)
else if (opcode >= 0x60 && opcode <= 0x63)
{
address = ((opcode & 0x03) << 8) | next_opcode;
util::stream_format(stream, "JMP %x", address);
util::stream_format(stream, "JMP %03x", address);
bytes = 2;
}
else if (opcode >= 0x68 && opcode <= 0x6B)
{
address = ((opcode & 0x03) << 8) | next_opcode;
util::stream_format(stream, "JSR %x", address);
util::stream_format(stream, "JSR %03x", address);
flags = DASMFLAG_STEP_OVER;
bytes = 2;
}
@ -163,12 +165,12 @@ CPU_DISASSEMBLE(cop444)
if (next_opcode <= 0x3f)
{
address = (uint16_t)(next_opcode & 0x3F);
util::stream_format(stream, "LDD %x,%x", ((address & 0x30) >> 4),address & 0x0F);
util::stream_format(stream, "LDD %u,%u", ((address & 0x30) >> 4),address & 0x0F);
}
else if (next_opcode >= 0x80 && next_opcode <= 0xbf)
{
address = (uint16_t)(next_opcode & 0x3F);
util::stream_format(stream, "XAD %x,%x", ((address & 0x30) >> 4),address & 0x0F);
util::stream_format(stream, "XAD %u,%u", ((address & 0x30) >> 4),address & 0x0F);
}
else
{

22
src/devices/cpu/i86/i186.cpp
View File

@ -1024,14 +1024,23 @@ void i80186_cpu_device::device_timer(emu_timer &timer, device_timer_id id, int p
}
}
/* if we're continuous, reset */
if (t->control & 0x0001)
/* if we're continuous or altcounting, reset */
if((t->control & 1) || ((t->control & 2) && (which != 2) && !t->active_count))
{
int count;
if((t->control & 2) && (which != 2))
{
count = t->active_count ? t->maxA : t->maxB;
t->active_count = !t->active_count;
if(!t->active_count)
{
t->active_count = 1;
t->control |= 0x1000;
}
else
{
t->active_count = 0;
t->control &= ~0x1000;
}
}
else
count = t->maxA;
@ -1044,7 +1053,7 @@ void i80186_cpu_device::device_timer(emu_timer &timer, device_timer_id id, int p
else
{
t->int_timer->adjust(attotime::never, which);
t->control &= ~0x8000;
t->control &= ~0x9000;
}
t->count = 0;
break;
@ -1184,6 +1193,7 @@ void i80186_cpu_device::internal_timer_update(int which, int new_count, int new_
if (update_int_timer)
{
t->active_count = 0;
t->control &= ~0x1000;
if ((t->control & 0x8000) && !(t->control & 4))
{
int diff = t->maxA - t->count;
@ -1529,7 +1539,7 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
case 0x17:
if (LOG_PORTS) logerror("%05X:80186 interrupt request = %04X\n", pc(), data);
m_intr.request = (m_intr.request & ~0x00c0) | (data & 0x00c0);
m_intr.request = (m_intr.request & ~0x000c) | (data & 0x000c);
update_interrupt_state();
break;
@ -1696,7 +1706,7 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
{
uint32_t newmap = (data & 0xfff) << 8;
uint32_t oldmap = (m_reloc & 0xfff) << 8;
if (!(data & 0x1000) || ((data & 0x1000) && (m_reloc & 0x1000)))
if (m_reloc & 0x1000)
m_program->unmap_readwrite(oldmap, oldmap + 0xff);
if (data & 0x1000) // TODO: make work with 80188 if needed
m_program->install_readwrite_handler(newmap, newmap + 0xff, read16_delegate(FUNC(i80186_cpu_device::internal_port_r), this), write16_delegate(FUNC(i80186_cpu_device::internal_port_w), this));

536
src/devices/cpu/m6805/m6805.cpp
View File

@ -33,89 +33,13 @@
*****************************************************************************/
#include "emu.h"
#include "debugger.h"
#include "m6805.h"
#include "m6805defs.h"
#include "debugger.h"
#define IRQ_LEVEL_DETECT 0
/****************************************************************************/
/* Read a byte from given memory location */
/****************************************************************************/
#define M6805_RDMEM(addr) ((unsigned)m_program->read_byte(addr))
/****************************************************************************/
/* Write a byte to given memory location */
/****************************************************************************/
#define M6805_WRMEM(addr, value) (m_program->write_byte(addr, value))
/****************************************************************************/
/* M6805_RDOP() is identical to M6805_RDMEM() except it is used for reading */
/* opcodes. In case of system with memory mapped I/O, this function can be */
/* used to greatly speed up emulation */
/****************************************************************************/
#define M6805_RDOP(addr) ((unsigned)m_direct->read_byte(addr))
/****************************************************************************/
/* M6805_RDOP_ARG() is identical to M6805_RDOP() but it's used for reading */
/* opcode arguments. This difference can be used to support systems that */
/* use different encoding mechanisms for opcodes and opcode arguments */
/****************************************************************************/
#define M6805_RDOP_ARG(addr) ((unsigned)m_direct->read_byte(addr))
#define SP_MASK m_sp_mask /* stack pointer mask */
#define SP_LOW m_sp_low /* stack pointer low water mark */
#define PC m_pc.w.l /* program counter lower word */
#define S m_s.w.l /* stack pointer lower word */
#define A m_a /* accumulator */
#define X m_x /* index register */
#define CC m_cc /* condition codes */
#define EAD m_ea.d
#define EA m_ea.w.l
/* DS -- THESE ARE RE-DEFINED IN m6805.h TO RAM, ROM or FUNCTIONS IN cpuintrf.c */
#define RM(addr) M6805_RDMEM(addr)
#define WM(addr, value) M6805_WRMEM(addr, value)
#define M_RDOP(addr) M6805_RDOP(addr)
#define M_RDOP_ARG(addr) M6805_RDOP_ARG(addr)
/* macros to tweak the PC and SP */
#define SP_INC if( ++S > SP_MASK) S = SP_LOW
#define SP_DEC if( --S < SP_LOW) S = SP_MASK
#define SP_ADJUST(s) ( ( (s) & SP_MASK ) | SP_LOW )
/* macros to access memory */
#define IMMBYTE(b) {b = M_RDOP_ARG(PC++);}
#define IMMWORD(w) {w.d = 0; w.b.h = M_RDOP_ARG(PC); w.b.l = M_RDOP_ARG(PC+1); PC+=2;}
#define SKIPBYTE() {M_RDOP_ARG(PC++);}
#define PUSHBYTE(b) wr_s_handler_b(&b)
#define PUSHWORD(w) wr_s_handler_w(&w)
#define PULLBYTE(b) rd_s_handler_b(&b)
#define PULLWORD(w) rd_s_handler_w(&w)
/* CC masks H INZC
7654 3210 */
#define CFLAG 0x01
#define ZFLAG 0x02
#define NFLAG 0x04
#define IFLAG 0x08
#define HFLAG 0x10
#define CLR_NZ CC&=~(NFLAG|ZFLAG)
#define CLR_HNZC CC&=~(HFLAG|NFLAG|ZFLAG|CFLAG)
#define CLR_Z CC&=~(ZFLAG)
#define CLR_NZC CC&=~(NFLAG|ZFLAG|CFLAG)
#define CLR_ZC CC&=~(ZFLAG|CFLAG)
/* macros for CC -- CC bits affected should be reset before calling */
#define SET_Z(a) if(!a)SEZ
#define SET_Z8(a) SET_Z((uint8_t)a)
#define SET_N8(a) CC|=((a&0x80)>>5)
#define SET_H(a,b,r) CC|=((a^b^r)&0x10)
#define SET_C8(a) CC|=((a&0x100)>>8)
const uint8_t m6805_base_device::m_flags8i[256]= /* increment */
{
0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@ -155,47 +79,6 @@ const uint8_t m6805_base_device::m_flags8d[256]= /* decrement */
0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,
0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04
};
#define SET_FLAGS8I(a) {CC |= m_flags8i[(a) & 0xff];}
#define SET_FLAGS8D(a) {CC |= m_flags8d[(a) & 0xff];}
/* combos */
#define SET_NZ8(a) {SET_N8(a); SET_Z(a);}
#define SET_FLAGS8(a,b,r) {SET_N8(r); SET_Z8(r); SET_C8(r);}
/* for treating an unsigned uint8_t as a signed int16_t */
#define SIGNED(b) ((int16_t)(b & 0x80 ? b | 0xff00 : b))
/* Macros for addressing modes */
#define DIRECT EAD=0; IMMBYTE(m_ea.b.l)
#define IMM8 EA = PC++
#define EXTENDED IMMWORD(m_ea)
#define INDEXED EA = X
#define INDEXED1 {EAD = 0; IMMBYTE(m_ea.b.l); EA += X;}
#define INDEXED2 {IMMWORD(m_ea); EA += X;}
/* macros to set status flags */
#if defined(SEC)
#undef SEC
#endif
#define SEC CC |= CFLAG
#define CLC CC &=~ CFLAG
#define SEZ CC |= ZFLAG
#define CLZ CC &=~ ZFLAG
#define SEN CC |= NFLAG
#define CLN CC &=~ NFLAG
#define SEH CC |= HFLAG
#define CLH CC &=~ HFLAG
#define SEI CC |= IFLAG
#define CLI CC &=~ IFLAG
/* macros for convenience */
#define DIRBYTE(b) {DIRECT; b = RM(EAD);}
#define EXTBYTE(b) {EXTENDED; b = RM(EAD);}
#define IDXBYTE(b) {INDEXED; b = RM(EAD);}
#define IDX1BYTE(b) {INDEXED1; b = RM(EAD);}
#define IDX2BYTE(b) {INDEXED2; b = RM(EAD);}
/* Macros for branch instructions */
#define BRANCH(f) { uint8_t t; IMMBYTE(t); if(f) { PC += SIGNED(t); } }
/* what they say it is ... */
const uint8_t m6805_base_device::m_cycles1[] =
@ -220,9 +103,6 @@ const uint8_t m6805_base_device::m_cycles1[] =
};
/* pre-clear a PAIR union; clearing h2 and h3 only might be faster? */
#define CLEAR_PAIR(p) p->d = 0
void m6805_base_device::rd_s_handler_b(uint8_t *b)
{
SP_INC;
@ -261,35 +141,6 @@ void m6805_base_device::RM16(uint32_t addr, PAIR *p)
p->b.l = RM(addr);
}
/* Generate interrupt - m68705 version */
void m68705_device::interrupt()
{
if ((m_pending_interrupts & ((1 << M6805_IRQ_LINE) | M68705_INT_MASK)) != 0 )
{
if ((CC & IFLAG) == 0)
{
PUSHWORD(m_pc);
PUSHBYTE(m_x);
PUSHBYTE(m_a);
PUSHBYTE(m_cc);
SEI;
standard_irq_callback(0);
if ((m_pending_interrupts & (1 << M68705_IRQ_LINE)) != 0 )
{
m_pending_interrupts &= ~(1 << M68705_IRQ_LINE);
RM16(0xfffa, &m_pc);
}
else if ((m_pending_interrupts & (1 << M68705_INT_TIMER)) != 0)
{
m_pending_interrupts &= ~(1 << M68705_INT_TIMER);
RM16(0xfff8, &m_pc);
}
}
m_icount -= 11;
}
}
void m6805_base_device::interrupt_vector()
{
RM16(0xffff - 5, &m_pc);
@ -410,14 +261,14 @@ void m6805_base_device::interrupt()
//-------------------------------------------------
m6805_base_device::m6805_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, const char *name, uint32_t addr_width, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config("program", ENDIANNESS_BIG, 8, addr_width)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, 8, addr_width)
{
}
m6805_base_device::m6805_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, const char *name, uint32_t addr_width, address_map_delegate internal_map, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config("program", ENDIANNESS_BIG, 8, addr_width, 0, internal_map)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, 8, addr_width, 0, internal_map)
{
}
@ -940,377 +791,6 @@ void m68hc05eg_device::execute_set_input(int inputnum, int state)
}
/****************************************************************************
* M68705 section
****************************************************************************/
void m68705_device::device_reset()
{
m6805_base_device::device_reset();
RM16(0xfffe, &m_pc);
}
void m68705_device::execute_set_input(int inputnum, int state)
{
if (m_irq_state[inputnum] != state)
{
m_irq_state[inputnum] = state;
if (state != CLEAR_LINE)
{
m_pending_interrupts |= 1 << inputnum;
}
}
}
/* ddr - direction registers */
WRITE8_MEMBER(m68705_new_device::internal_ddrA_w)
{
const u8 ddr_old = m_ddrA;
m_ddrA = data;
// update outputs if lines switched to output
if ((m_ddrA & ~ddr_old) != 0)
update_portA_state();
}
WRITE8_MEMBER(m68705_new_device::internal_ddrB_w)
{
const u8 ddr_old = m_ddrB;
m_ddrB = data;
// update outputs if lines switched to output
if ((m_ddrB & ~ddr_old) != 0)
update_portB_state();
}
WRITE8_MEMBER(m68705_new_device::internal_ddrC_w)
{
const u8 ddr_old = m_ddrC;
m_ddrC = data;
// update outputs if lines switched to output
if ((m_ddrC & ~ddr_old) != 0)
update_portC_state();
}
/* read ports */
READ8_MEMBER(m68705_new_device::internal_portA_r)
{
if (!m_portA_cb_r.isnull())
m_portA_in = m_portA_cb_r(space, 0, ~m_ddrA); // pass the direction register as mem_mask so that externally we know which lines were actually pulled
u8 res = (m_portA_out & m_ddrA) | (m_portA_in & ~m_ddrA);
return res;
}
READ8_MEMBER(m68705_new_device::internal_portB_r)
{
if (!m_portB_cb_r.isnull())
m_portB_in = m_portB_cb_r(space, 0, ~m_ddrB);
u8 res = (m_portB_out & m_ddrB) | (m_portB_in & ~m_ddrB);
return res;
}
READ8_MEMBER(m68705_new_device::internal_portC_r)
{
if (!m_portC_cb_r.isnull())
m_portC_in = m_portC_cb_r(space, 0, ~m_ddrC);
u8 res = (m_portC_out & m_ddrC) | (m_portC_in & ~m_ddrC);
return res;
}
/* write ports */
WRITE8_MEMBER(m68705_new_device::internal_portA_w)
{
// load the output latch
m_portA_out = data;
// update the output lines
update_portA_state();
}
void m68705_new_device::update_portA_state()
{
// pass bits through DDR output mask
m_portA_in = (m_portA_out & m_ddrA) | (m_portA_in & ~m_ddrA);
// pass the direction register as mem_mask as mem_mask so that externally we know which lines were actually pushed
m_portA_cb_w(space(AS_PROGRAM), 0, m_portA_in, m_ddrA);
}
WRITE8_MEMBER(m68705_new_device::internal_portB_w)
{
// load the output latch
m_portB_out = data;
// update the output lines
update_portB_state();
}
void m68705_new_device::update_portB_state()
{
// pass bits through DDR output mask
m_portB_in = (m_portB_out & m_ddrB) | (m_portB_in & ~m_ddrB);
// pass the direction register as mem_mask as mem_mask so that externally we know which lines were actually pushed
m_portB_cb_w(space(AS_PROGRAM), 0, m_portB_in, m_ddrB);
}
WRITE8_MEMBER(m68705_new_device::internal_portC_w)
{
// load the output latch
m_portC_out = data;
// update the output lines
update_portC_state();
}
void m68705_new_device::update_portC_state()
{
// pass bits through DDR output mask
m_portC_in = (m_portC_out & m_ddrC) | (m_portC_in & ~m_ddrC);
// pass the direction register as mem_mask as mem_mask so that externally we know which lines were actually pushed
m_portC_cb_w(space(AS_PROGRAM), 0, m_portC_in, m_ddrC);
}
READ8_MEMBER(m68705_new_device::pa_r)
{
return m_portA_in;
}
READ8_MEMBER(m68705_new_device::pb_r)
{
return m_portB_in;
}
READ8_MEMBER(m68705_new_device::pc_r)
{
return m_portC_in;
}
WRITE8_MEMBER(m68705_new_device::pa_w)
{
COMBINE_DATA(&m_portA_in);
}
WRITE8_MEMBER(m68705_new_device::pb_w)
{
COMBINE_DATA(&m_portB_in);
}
WRITE8_MEMBER(m68705_new_device::pc_w)
{
COMBINE_DATA(&m_portC_in);
}
READ8_MEMBER(m68705_new_device::internal_68705_tdr_r)
{
//logerror("internal_68705 TDR read, returning %02X\n", m_tdr);
return m_tdr;
}
WRITE8_MEMBER(m68705_new_device::internal_68705_tdr_w)
{
//logerror("internal_68705 TDR written with %02X, was %02X\n", data, m_tdr);
m_tdr = data;
}
READ8_MEMBER(m68705_new_device::internal_68705_tcr_r)
{
//logerror("internal_68705 TCR read, returning %02X\n", (m_tcr&0xF7));
return (m_tcr & 0xF7);
}
WRITE8_MEMBER(m68705_new_device::internal_68705_tcr_w)
{
/*
logerror("internal_68705 TCR written with %02X\n", data);
if (data&0x80) logerror(" TIR=1, Timer Interrupt state is set\n"); else logerror(" TIR=0; Timer Interrupt state is cleared\n");
if (data&0x40) logerror(" TIM=1, Timer Interrupt is now masked\n"); else logerror(" TIM=0, Timer Interrupt is now unmasked\n");
if (data&0x20) logerror(" TIN=1, Timer Clock source is set to external\n"); else logerror(" TIN=0, Timer Clock source is set to internal\n");
if (data&0x10) logerror(" TIE=1, Timer External pin is enabled\n"); else logerror(" TIE=0, Timer External pin is disabled\n");
if (data&0x08) logerror(" PSC=1, Prescaler counter cleared\n"); else logerror(" PSC=0, Prescaler counter left alone\n");
logerror(" Prescaler: %d\n", (1<<(data&0x7)));
*/
// if timer was enabled but now isn't, shut it off.
// below is a hack assuming the TIMER pin isn't going anywhere except tied to +5v, so basically TIN is acting as an active-low timer enable, and TIE is ignored even in the case where TIE=1, the timer will end up being 5v ANDED against the internal timer clock which == the internal timer clock.
// Note this hack is incorrect; the timer pin actually does connect somewhere (vblank or maybe one of the V counter bits?), but the game never actually uses the timer pin in external clock mode, so the TIMER connection must be left over from development. We can apparently safely ignore it.
if ((m_tcr^data)&0x20)// check if TIN state changed
{
/* logerror("timer enable state changed!\n"); */
if (data&0x20) m_68705_timer->adjust(attotime::never, TIMER_68705_PRESCALER_EXPIRED);
else m_68705_timer->adjust(attotime::from_hz(((clock())/4)/(1<<(data&0x7))), TIMER_68705_PRESCALER_EXPIRED);
}
// prescaler check: if timer prescaler has changed, or the PSC bit is set, adjust the timer length for the prescaler expired timer, but only if the timer would be running
if ( (((m_tcr&0x07)!=(data&0x07))||(data&0x08)) && ((data&0x20)==0) )
{
/* logerror("timer reset due to PSC or prescaler change!\n"); */
m_68705_timer->adjust(attotime::from_hz(((clock())/4)/(1<<(data&0x7))), TIMER_68705_PRESCALER_EXPIRED);
}
m_tcr = data;
// if int state is set, and TIM is unmasked, assert an interrupt. otherwise clear it.
if ((m_tcr&0xC0) == 0x80)
set_input_line(M68705_INT_TIMER, ASSERT_LINE);
else
set_input_line(M68705_INT_TIMER, CLEAR_LINE);
}
void m68705_new_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
{
case TIMER_68705_PRESCALER_EXPIRED:
timer_68705_increment(ptr, param);
break;
default:
assert_always(false, "Unknown id in m68705_new_device::device_timer");
}
}
TIMER_CALLBACK_MEMBER(m68705_new_device::timer_68705_increment)
{
m_tdr++;
if (m_tdr == 0x00) m_tcr |= 0x80; // if we overflowed, set the int bit
if ((m_tcr&0xC0) == 0x80)
set_input_line(M68705_INT_TIMER, ASSERT_LINE);
else
set_input_line(M68705_INT_TIMER, CLEAR_LINE);
m_68705_timer->adjust(attotime::from_hz(((clock())/4)/(1<<(m_tcr&0x7))), TIMER_68705_PRESCALER_EXPIRED);
}
/*
The 68(7)05 peripheral memory map:
Common for Px, Rx, Ux parts:
0x00: Port A data (RW)
0x01: Port B data (RW)
0x02: Port C data (RW) [top 4 bits do nothing (read as 1s) on Px parts, work as expected on Rx, Ux parts]
0x03: [Port D data (RW), only on Rx, Ux parts]
0x04: Port A DDR (Write only, reads as 0xFF)
0x05: Port B DDR (Write only, reads as 0xFF)
0x06: Port C DDR (Write only, reads as 0xFF) [top 4 bits do nothing on Px parts, work as expected on Rx, Ux parts]
0x07: Unused (reads as 0xFF?)
0x08: Timer Data Register (RW; acts as ram when timer isn't counting, otherwise decrements once per prescaler expiry)
0x09: Timer Control Register (RW; on certain mask part and when MOR bit 6 is not set, all bits are RW except bit 3 which
always reads as zero. when MOR bit 6 is set and on all mask parts except one listed in errata in the 6805 daatsheet,
the top two bits are RW, bottom 6 always read as 1 and writes do nothing; on the errata chip, bit 3 is writable and
clears the prescaler, reads as zero)
0x0A: [Miscellaneous Register, only on Rx, Sx, Ux parts]
0x0B: [Eprom parts: Programming Control Register (write only?, low 3 bits; reads as 0xFF?); Unused (reads as 0xFF?) on
Mask parts]
0x0C: Unused (reads as 0xFF?)
0x0D: Unused (reads as 0xFF?)
0x0E: [A/D control register, only on Rx, Ux, Sx parts]
0x0F: [A/D result register, only on Rx, Ux, Sx parts]
0x10-0x7f: internal ram; SP can only point to 0x60-0x7F. Rx parts have an unused hole from 0x10-0x3F (reads as 0xFF?)
0x80-0xFF: Page 0 user rom
The remainder of the memory map differs here between parts, see appropriate datasheet for each part.
The four vectors are always stored in big endian form as the last 8 bytes of the address space.
Sx specific differences:
0x02: Port C data (RW) [top 6 bits do nothing (read as 1s) on Sx parts]
0x06: Port C DDR (Write only, reads as 0xFF) [top 6 bits do nothing on Sx parts]
0x0B: Timer 2 Data Register MSB
0x0C: Timer 2 Data Register LSB
0x0D: Timer 2 Control Register
0x10: SPI Data Register
0x11: SPI Control Register
0x12-0x3F: Unused (reads as 0xFF?)
MOR ADDRESS: Mask Option Register; does not exist on R2 and several other but not all mask parts, located at 0x784 on Px parts
Rx Parts: 40 pins; address space is 0x000-0xfff with an unused hole at 0x10-0x3f and and 0x100-0x7BF; has A/D converter, Ports A-D;
eprom parts have MOR at 0xF38; mask parts have selftest rom at similar area; selftest roms differ between the U2 and U3 versions
Px Parts: 28 pins; address space is 0x000-0x7ff; eprom parts have MOR at 0x784 and bootstrap rom at 0x785-0x7f7; mask parts have a
selftest rom at similar area; port c is just 4 bits.
Sx Parts: 40 pins; address space is 0x000-0xfff with an unused hole at 0x12-0x3f and and 0x100-0x9BF; has A/D converter; has SPI
serial; port C is just two bits; has an extra 16-bit timer compared to Ux/Rx; selftest rom at 0xF00-0xFF7
Ux Parts: 40 pins; address space is 0x000-0xfff; has A/D converter, Ports A-D; eprom parts have MOR at 0xF38; mask parts have
selftest rom at similar area; selftest roms differ between the U2 and U3 versions
*/
DEVICE_ADDRESS_MAP_START( internal_map, 8, m68705_new_device )
AM_RANGE(0x000, 0x000) AM_READWRITE(internal_portA_r, internal_portA_w)
AM_RANGE(0x001, 0x001) AM_READWRITE(internal_portB_r, internal_portB_w)
AM_RANGE(0x002, 0x002) AM_READWRITE(internal_portC_r, internal_portC_w)
AM_RANGE(0x004, 0x004) AM_WRITE(internal_ddrA_w)
AM_RANGE(0x005, 0x005) AM_WRITE(internal_ddrB_w)
AM_RANGE(0x006, 0x006) AM_WRITE(internal_ddrC_w)
AM_RANGE(0x008, 0x008) AM_READWRITE(internal_68705_tdr_r, internal_68705_tdr_w)
AM_RANGE(0x009, 0x009) AM_READWRITE(internal_68705_tcr_r, internal_68705_tcr_w)
AM_RANGE(0x010, 0x07f) AM_RAM
AM_RANGE(0x080, 0x7ff) AM_ROM
ADDRESS_MAP_END
void m68705_new_device::device_start()
{
m68705_device::device_start();
save_item(NAME(m_portA_in));
save_item(NAME(m_portB_in));
save_item(NAME(m_portC_in));
save_item(NAME(m_portA_out));
save_item(NAME(m_portB_out));
save_item(NAME(m_portC_out));
save_item(NAME(m_ddrA));
save_item(NAME(m_ddrB));
save_item(NAME(m_ddrC));
m_portA_cb_w.resolve_safe();
m_portB_cb_w.resolve_safe();
m_portC_cb_w.resolve_safe();
m_portA_cb_r.resolve();
m_portB_cb_r.resolve();
m_portC_cb_r.resolve();
m_portA_in = 0xff;
m_portB_in = 0xff;
m_portC_in = 0xff;
// allocate the MCU timer, and set it to fire NEVER.
m_68705_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(m68705_new_device::timer_68705_increment),this));
m_68705_timer->adjust(attotime::never);
save_item(NAME(m_tdr));
save_item(NAME(m_tcr));
}
void m68705_new_device::device_reset()
{
m68705_device::device_reset();
// all bits of ports A, B and C revert to inputs on reset
m_ddrA = 0;
m_ddrB = 0;
m_ddrC = 0;
m_tdr = 0xFF;
m_tcr = 0x7F;
//set_input_line(M68705_IRQ_LINE, CLEAR_LINE);
m_68705_timer->adjust(attotime::from_hz(((clock())/4)/(1<<7)));
}
/****************************************************************************
* HD63705 section
****************************************************************************/
@ -1355,6 +835,4 @@ void hd63705_device::execute_set_input(int inputnum, int state)
const device_type M6805 = &device_creator<m6805_device>;
const device_type M68HC05EG = &device_creator<m68hc05eg_device>;
const device_type M68705 = &device_creator<m68705_device>;
const device_type M68705_NEW = &device_creator<m68705_new_device>;
const device_type HD63705 = &device_creator<hd63705_device>;

195
src/devices/cpu/m6805/m6805.h
View File

@ -1,23 +1,19 @@
// license:BSD-3-Clause
// copyright-holders:Aaron Giles
/*** m6805: Portable 6805 emulator ******************************************/
#ifndef MAME_CPU_M6805_M6805_H
#define MAME_CPU_M6805_M6805_H
#pragma once
#ifndef __M6805_H__
#define __M6805_H__
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
class m6805_device;
// device type definition
extern const device_type M6805;
extern const device_type M68HC05EG;
extern const device_type M68705;
extern const device_type M68705_NEW;
extern const device_type HD63705;
// ======================> m6805_base_device
@ -28,9 +24,10 @@ class m6805_base_device : public cpu_device
public:
// construction/destruction
m6805_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, const char *name, uint32_t addr_width, const char *shortname, const char *source);
m6805_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, const char *name, uint32_t addr_width, address_map_delegate internal_map, const char *shortname, const char *source);
protected:
m6805_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, const char *name, uint32_t addr_width, address_map_delegate internal_map, const char *shortname, const char *source);
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
@ -62,6 +59,16 @@ private:
static const uint8_t m_cycles1[256];
protected:
enum
{
M6805_PC = 1,
M6805_S,
M6805_CC,
M6805_A,
M6805_X,
M6805_IRQ_STATE
};
void rd_s_handler_b(uint8_t *b);
void rd_s_handler_w(PAIR *p);
void wr_s_handler_b(uint8_t *b);
@ -290,6 +297,7 @@ protected:
direct_read_data *m_direct;
};
// ======================> m6805_device
class m6805_device : public m6805_base_device
@ -303,6 +311,7 @@ protected:
virtual void execute_set_input(int inputnum, int state) override;
};
// ======================> m68hc05eg_device
class m68hc05eg_device : public m6805_base_device
@ -321,159 +330,6 @@ protected:
virtual void interrupt_vector() override;
};
// ======================> m68705_device
class m68705_device : public m6805_base_device
{
public:
// construction/destruction
m68705_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6805_base_device(mconfig, tag, owner, clock, M68705, "M68705", 12, "m68705", __FILE__) { }
m68705_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, const char *name, uint32_t addr_width, address_map_delegate internal_map, const char *shortname, const char *source)
: m6805_base_device(mconfig, tag, owner, clock, type, name, addr_width, internal_map, shortname, source) { }
protected:
// device-level overrides
virtual void device_reset() override;
virtual void execute_set_input(int inputnum, int state) override;
virtual void interrupt() override;
};
// ======================> m68705_new_device
#define MCFG_M68705_PORTA_W_CB(_devcb) \
devcb = &m68705_new_device::set_portA_cb_w(*device, DEVCB_##_devcb);
#define MCFG_M68705_PORTB_W_CB(_devcb) \
devcb = &m68705_new_device::set_portB_cb_w(*device, DEVCB_##_devcb);
#define MCFG_M68705_PORTC_W_CB(_devcb) \
devcb = &m68705_new_device::set_portC_cb_w(*device, DEVCB_##_devcb);
#define MCFG_M68705_PORTA_R_CB(_devcb) \
devcb = &m68705_new_device::set_portA_cb_r(*device, DEVCB_##_devcb);
#define MCFG_M68705_PORTB_R_CB(_devcb) \
devcb = &m68705_new_device::set_portB_cb_r(*device, DEVCB_##_devcb);
#define MCFG_M68705_PORTC_R_CB(_devcb) \
devcb = &m68705_new_device::set_portC_cb_r(*device, DEVCB_##_devcb);
class m68705_new_device : public m68705_device
{
public:
// construction/destruction
m68705_new_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68705_device(mconfig, tag, owner, clock, M68705_NEW, "M68705 (NEW)", 11, address_map_delegate(FUNC(m68705_new_device::internal_map), this), "m68705_new", __FILE__),
m_portA_in(0),
m_portB_in(0),
m_portC_in(0),
m_portA_out(0),
m_portB_out(0),
m_portC_out(0),
m_ddrA(0),
m_ddrB(0),
m_ddrC(0),
m_portA_cb_w(*this),
m_portB_cb_w(*this),
m_portC_cb_w(*this),
m_portA_cb_r(*this),
m_portB_cb_r(*this),
m_portC_cb_r(*this)
{ }
// static configuration helpers
template<class _Object> static devcb_base &set_portA_cb_w(device_t &device, _Object object) { return downcast<m68705_new_device &>(device).m_portA_cb_w.set_callback(object); }
template<class _Object> static devcb_base &set_portB_cb_w(device_t &device, _Object object) { return downcast<m68705_new_device &>(device).m_portB_cb_w.set_callback(object); }
template<class _Object> static devcb_base &set_portC_cb_w(device_t &device, _Object object) { return downcast<m68705_new_device &>(device).m_portC_cb_w.set_callback(object); }
template<class _Object> static devcb_base &set_portA_cb_r(device_t &device, _Object object) { return downcast<m68705_new_device &>(device).m_portA_cb_r.set_callback(object); }
template<class _Object> static devcb_base &set_portB_cb_r(device_t &device, _Object object) { return downcast<m68705_new_device &>(device).m_portB_cb_r.set_callback(object); }
template<class _Object> static devcb_base &set_portC_cb_r(device_t &device, _Object object) { return downcast<m68705_new_device &>(device).m_portC_cb_r.set_callback(object); }
DECLARE_READ8_MEMBER(pa_r);
DECLARE_READ8_MEMBER(pb_r);
DECLARE_READ8_MEMBER(pc_r);
DECLARE_WRITE8_MEMBER(pa_w);
DECLARE_WRITE8_MEMBER(pb_w);
DECLARE_WRITE8_MEMBER(pc_w);
protected:
enum
{
TIMER_68705_PRESCALER_EXPIRED,
};
DECLARE_ADDRESS_MAP(internal_map, 8);
DECLARE_READ8_MEMBER(internal_portA_r);
DECLARE_READ8_MEMBER(internal_portB_r);
DECLARE_READ8_MEMBER(internal_portC_r);
DECLARE_WRITE8_MEMBER(internal_portA_w);
DECLARE_WRITE8_MEMBER(internal_portB_w);
DECLARE_WRITE8_MEMBER(internal_portC_w);
DECLARE_WRITE8_MEMBER(internal_ddrA_w);
DECLARE_WRITE8_MEMBER(internal_ddrB_w);
DECLARE_WRITE8_MEMBER(internal_ddrC_w);
DECLARE_READ8_MEMBER(internal_68705_tdr_r);
DECLARE_WRITE8_MEMBER(internal_68705_tdr_w);
DECLARE_READ8_MEMBER(internal_68705_tcr_r);
DECLARE_WRITE8_MEMBER(internal_68705_tcr_w);
void update_portA_state();
void update_portB_state();
void update_portC_state();
u8 m_portA_in;
u8 m_portB_in;
u8 m_portC_in;
u8 m_portA_out;
u8 m_portB_out;
u8 m_portC_out;
u8 m_ddrA;
u8 m_ddrB;
u8 m_ddrC;
u8 m_tdr;
u8 m_tcr;
/* Callbacks */
devcb_write8 m_portA_cb_w;
devcb_write8 m_portB_cb_w;
devcb_write8 m_portC_cb_w;
devcb_read8 m_portA_cb_r;
devcb_read8 m_portB_cb_r;
devcb_read8 m_portC_cb_r;
/* Timers */
emu_timer *m_68705_timer;
TIMER_CALLBACK_MEMBER(timer_68705_increment);
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// virtual void execute_set_input(int inputnum, int state) override;
// virtual void interrupt() override;
};
// ======================> hd63705_device
class hd63705_device : public m6805_base_device
@ -497,8 +353,6 @@ protected:
virtual void swi() override;
};
enum { M6805_PC=1, M6805_S, M6805_CC, M6805_A, M6805_X, M6805_IRQ_STATE };
#define M6805_IRQ_LINE 0
/****************************************************************************
@ -509,21 +363,6 @@ enum { M6805_PC=1, M6805_S, M6805_CC, M6805_A, M6805_X, M6805_IRQ_STATE };
#define M68HC05EG_INT_TIMER (M6805_IRQ_LINE+1)
#define M68HC05EG_INT_CPI (M6805_IRQ_LINE+2)
/****************************************************************************
* 68705 section
****************************************************************************/
#define M68705_A M6805_A
#define M68705_PC M6805_PC
#define M68705_S M6805_S
#define M68705_X M6805_X
#define M68705_CC M6805_CC
#define M68705_IRQ_STATE M6805_IRQ_STATE
#define M68705_INT_MASK 0x03
#define M68705_IRQ_LINE M6805_IRQ_LINE
#define M68705_INT_TIMER 0x01
/****************************************************************************
* HD63705 section
****************************************************************************/
@ -552,4 +391,4 @@ enum { M6805_PC=1, M6805_S, M6805_CC, M6805_A, M6805_X, M6805_IRQ_STATE };
CPU_DISASSEMBLE( m6805 );
#endif /* __M6805_H__ */
#endif // MAME_CPU_M6805_M6805_H

131
src/devices/cpu/m6805/m6805defs.h Normal file
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@ -0,0 +1,131 @@
// license:BSD-3-Clause
// copyright-holders:Aaron Giles
#ifndef MAME_CPU_M6805_M6805DEFS_H
#define MAME_CPU_M6805_M6805DEFS_H
#pragma once
/****************************************************************************/
/* Read a byte from given memory location */
/****************************************************************************/
#define M6805_RDMEM(addr) ((unsigned)m_program->read_byte(addr))
/****************************************************************************/
/* Write a byte to given memory location */
/****************************************************************************/
#define M6805_WRMEM(addr, value) (m_program->write_byte(addr, value))
/****************************************************************************/
/* M6805_RDOP() is identical to M6805_RDMEM() except it is used for reading */
/* opcodes. In case of system with memory mapped I/O, this function can be */
/* used to greatly speed up emulation */
/****************************************************************************/
#define M6805_RDOP(addr) ((unsigned)m_direct->read_byte(addr))
/****************************************************************************/
/* M6805_RDOP_ARG() is identical to M6805_RDOP() but it's used for reading */
/* opcode arguments. This difference can be used to support systems that */
/* use different encoding mechanisms for opcodes and opcode arguments */
/****************************************************************************/
#define M6805_RDOP_ARG(addr) ((unsigned)m_direct->read_byte(addr))
#define SP_MASK m_sp_mask /* stack pointer mask */
#define SP_LOW m_sp_low /* stack pointer low water mark */
#define PC m_pc.w.l /* program counter lower word */
#define S m_s.w.l /* stack pointer lower word */
#define A m_a /* accumulator */
#define X m_x /* index register */
#define CC m_cc /* condition codes */
#define EAD m_ea.d
#define EA m_ea.w.l
/* DS -- THESE ARE RE-DEFINED IN m6805.h TO RAM, ROM or FUNCTIONS IN cpuintrf.c */
#define RM(addr) M6805_RDMEM(addr)
#define WM(addr, value) M6805_WRMEM(addr, value)
#define M_RDOP(addr) M6805_RDOP(addr)
#define M_RDOP_ARG(addr) M6805_RDOP_ARG(addr)
/* macros to tweak the PC and SP */
#define SP_INC if( ++S > SP_MASK) S = SP_LOW
#define SP_DEC if( --S < SP_LOW) S = SP_MASK
#define SP_ADJUST(s) ( ( (s) & SP_MASK ) | SP_LOW )
/* macros to access memory */
#define IMMBYTE(b) {b = M_RDOP_ARG(PC++);}
#define IMMWORD(w) {w.d = 0; w.b.h = M_RDOP_ARG(PC); w.b.l = M_RDOP_ARG(PC+1); PC+=2;}
#define SKIPBYTE() {M_RDOP_ARG(PC++);}
#define PUSHBYTE(b) wr_s_handler_b(&b)
#define PUSHWORD(w) wr_s_handler_w(&w)
#define PULLBYTE(b) rd_s_handler_b(&b)
#define PULLWORD(w) rd_s_handler_w(&w)
/* CC masks H INZC
7654 3210 */
#define CFLAG 0x01
#define ZFLAG 0x02
#define NFLAG 0x04
#define IFLAG 0x08
#define HFLAG 0x10
#define CLR_NZ CC&=~(NFLAG|ZFLAG)
#define CLR_HNZC CC&=~(HFLAG|NFLAG|ZFLAG|CFLAG)
#define CLR_Z CC&=~(ZFLAG)
#define CLR_NZC CC&=~(NFLAG|ZFLAG|CFLAG)
#define CLR_ZC CC&=~(ZFLAG|CFLAG)
/* macros for CC -- CC bits affected should be reset before calling */
#define SET_Z(a) if(!a)SEZ
#define SET_Z8(a) SET_Z((uint8_t)a)
#define SET_N8(a) CC|=((a&0x80)>>5)
#define SET_H(a,b,r) CC|=((a^b^r)&0x10)
#define SET_C8(a) CC|=((a&0x100)>>8)
#define SET_FLAGS8I(a) {CC |= m_flags8i[(a) & 0xff];}
#define SET_FLAGS8D(a) {CC |= m_flags8d[(a) & 0xff];}
/* combos */
#define SET_NZ8(a) {SET_N8(a); SET_Z(a);}
#define SET_FLAGS8(a,b,r) {SET_N8(r); SET_Z8(r); SET_C8(r);}
/* for treating an unsigned uint8_t as a signed int16_t */
#define SIGNED(b) ((int16_t)(b & 0x80 ? b | 0xff00 : b))
/* Macros for addressing modes */
#define DIRECT EAD=0; IMMBYTE(m_ea.b.l)
#define IMM8 EA = PC++
#define EXTENDED IMMWORD(m_ea)
#define INDEXED EA = X
#define INDEXED1 {EAD = 0; IMMBYTE(m_ea.b.l); EA += X;}
#define INDEXED2 {IMMWORD(m_ea); EA += X;}
/* macros to set status flags */
#if defined(SEC)
#undef SEC
#endif
#define SEC CC |= CFLAG
#define CLC CC &=~ CFLAG
#define SEZ CC |= ZFLAG
#define CLZ CC &=~ ZFLAG
#define SEN CC |= NFLAG
#define CLN CC &=~ NFLAG
#define SEH CC |= HFLAG
#define CLH CC &=~ HFLAG
#define SEI CC |= IFLAG
#define CLI CC &=~ IFLAG
/* macros for convenience */
#define DIRBYTE(b) {DIRECT; b = RM(EAD);}
#define EXTBYTE(b) {EXTENDED; b = RM(EAD);}
#define IDXBYTE(b) {INDEXED; b = RM(EAD);}
#define IDX1BYTE(b) {INDEXED1; b = RM(EAD);}
#define IDX2BYTE(b) {INDEXED2; b = RM(EAD);}
/* Macros for branch instructions */
#define BRANCH(f) { uint8_t t; IMMBYTE(t); if(f) { PC += SIGNED(t); } }
/* pre-clear a PAIR union; clearing h2 and h3 only might be faster? */
#define CLEAR_PAIR(p) p->d = 0
#endif // MAME_CPU_M6805_M6805DEFS_H

555
src/devices/cpu/m6805/m68705.cpp Normal file
View File

@ -0,0 +1,555 @@
#include "emu.h"
#include "m68705.h"
#include "m6805defs.h"
namespace {
ROM_START( m68705p3 )
ROM_REGION(0x0073, "bootstrap", 0)
ROM_LOAD("bootstrap.bin", 0x0000, 0x0073, CRC(696e1383) SHA1(45104fe1dbd683d251ed2b9411b1f4befbb5aff4))
ROM_END
ROM_START( m68705p5 )
ROM_REGION(0x0073, "bootstrap", 0)
ROM_LOAD("bootstrap.bin", 0x0000, 0x0073, CRC(f70a8620) SHA1(c154f78c23f10bb903a531cb19e99121d5f7c19c))
ROM_END
ROM_START( m68705u3 )
ROM_REGION(0x0078, "bootstrap", 0)
ROM_LOAD("bootstrap.bin", 0x0000, 0x0073, CRC(5946479b) SHA1(834ea00aef5de12dbcd6421a6e21d5ea96cfbf37))
ROM_END
} // anonymous namespace
device_type const M68705 = &device_creator<m68705_device>;
device_type const M68705P3 = &device_creator<m68705p3_device>;
device_type const M68705P5 = &device_creator<m68705p5_device>;
device_type const M68705U3 = &device_creator<m68705u3_device>;
/****************************************************************************
* M68705 device (no peripherals)
****************************************************************************/
m68705_device::m68705_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
: m6805_base_device(mconfig, tag, owner, clock, M68705, "M68705", 12, "m68705", __FILE__)
{
}
m68705_device::m68705_device(
machine_config const &mconfig,
char const *tag,
device_t *owner,
u32 clock,
device_type type,
char const *name,
u32 addr_width,
address_map_delegate internal_map,
char const *shortname,
char const *source)
: m6805_base_device(mconfig, tag, owner, clock, type, name, addr_width, internal_map, shortname, source)
{
}
/* Generate interrupt - m68705 version */
void m68705_device::interrupt()
{
if ((m_pending_interrupts & ((1 << M6805_IRQ_LINE) | M68705_INT_MASK)) != 0 )
{
if ((CC & IFLAG) == 0)
{
PUSHWORD(m_pc);
PUSHBYTE(m_x);
PUSHBYTE(m_a);
PUSHBYTE(m_cc);
SEI;
standard_irq_callback(0);
if ((m_pending_interrupts & (1 << M68705_IRQ_LINE)) != 0 )
{
m_pending_interrupts &= ~(1 << M68705_IRQ_LINE);
RM16(0xfffa, &m_pc);
}
else if ((m_pending_interrupts & (1 << M68705_INT_TIMER)) != 0)
{
m_pending_interrupts &= ~(1 << M68705_INT_TIMER);
RM16(0xfff8, &m_pc);
}
}
m_icount -= 11;
}
}
void m68705_device::device_reset()
{
m6805_base_device::device_reset();
RM16(0xfffe, &m_pc);
}
void m68705_device::execute_set_input(int inputnum, int state)
{
if (m_irq_state[inputnum] != state)
{
m_irq_state[inputnum] = state;
if (state != CLEAR_LINE)
{
m_pending_interrupts |= 1 << inputnum;
}
}
}
/****************************************************************************
* M68705 "new" device
****************************************************************************/
/*
The 68(7)05 peripheral memory map:
Common for Px, Rx, Ux parts:
0x00: Port A data (RW)
0x01: Port B data (RW)
0x02: Port C data (RW) [top 4 bits do nothing (read as 1s) on Px parts, work as expected on Rx, Ux parts]
0x03: [Port D data (Read only), only on Rx, Ux parts]
0x04: Port A DDR (Write only, reads as 0xFF)
0x05: Port B DDR (Write only, reads as 0xFF)
0x06: Port C DDR (Write only, reads as 0xFF) [top 4 bits do nothing on Px parts, work as expected on Rx, Ux parts]
0x07: Unused (reads as 0xFF?)
0x08: Timer Data Register (RW; acts as ram when timer isn't counting, otherwise decrements once per prescaler expiry)
0x09: Timer Control Register (RW; on certain mask part and when MOR bit 6 is not set, all bits are RW except bit 3 which
always reads as zero. when MOR bit 6 is set and on all mask parts except one listed in errata in the 6805 daatsheet,
the top two bits are RW, bottom 6 always read as 1 and writes do nothing; on the errata chip, bit 3 is writable and
clears the prescaler, reads as zero)
0x0A: [Miscellaneous Register, only on Rx, Sx, Ux parts]
0x0B: [Eprom parts: Programming Control Register (write only?, low 3 bits; reads as 0xFF?); Unused (reads as 0xFF?) on
Mask parts]
0x0C: Unused (reads as 0xFF?)
0x0D: Unused (reads as 0xFF?)
0x0E: [A/D control register, only on Rx, Sx parts]
0x0F: [A/D result register, only on Rx, Sx parts]
0x10-0x7f: internal ram; SP can only point to 0x60-0x7F. U2/R2 parts have an unused hole from 0x10-0x3F (reads as 0xFF?)
0x80-0xFF: Page 0 user rom
The remainder of the memory map differs here between parts, see appropriate datasheet for each part.
The four vectors are always stored in big endian form as the last 8 bytes of the address space.
Sx specific differences:
0x02: Port C data (RW) [top 6 bits do nothing (read as 1s) on Sx parts]
0x06: Port C DDR (Write only, reads as 0xFF) [top 6 bits do nothing on Sx parts]
0x0B: Timer 2 Data Register MSB
0x0C: Timer 2 Data Register LSB
0x0D: Timer 2 Control Register
0x10: SPI Data Register
0x11: SPI Control Register
0x12-0x3F: Unused (reads as 0xFF?)
Port A has internal pull-ups (about 10kΩ), and can sink 1.6mA at 0.4V
making it capable of driving CMOS or one TTL load directly.
Port B has a true high-Z state (maximum 20µA for Px parts or 10µA for
Rx/Ux parts), and can sink 10mA at 1V (LED drive) or 3.2mA at 0.4V (two
TTL loads). It requires external pull-ups to drive CMOS.
Port C has a true high-Z state (maximum 20µA for Px parts or 10µA for
Rx/Ux parts), and can sink 1.6mA at 0.4V (one TTL load). It requires
external pull-ups to drive CMOS.
MOR ADDRESS: Mask Option Register; does not exist on R2 and several other but not all mask parts, located at 0x784 on Px parts
Px Parts:
* 28 pins
* address space is 0x000-0x7ff
* has Ports A-C
* port C is just 4 bits
* EPROM parts have MOR at 0x784 and bootstrap ROM at 0x785-0x7f7
* mask parts have a selftest rom at similar area
Rx Parts:
* 40 pins
* address space is 0x000-0xfff with an unused hole at 0xf39-0xf7f
* R2 parts have an unused hole at 0x10-0x3f and at 0x100-0x7bF
* has A/D converter, Ports A-D
* mask parts lack programmable prescaler
* EPROM parts have MOR at 0xf38 and bootstrap ROM at 0xf80-0xff7
* mask parts have selftest ROM at 0xf38-0xff7
* selftest ROMs differ between the U2 and U3 versions
Sx Parts:
* 40 pins
* address space is 0x000-0xfff with an unused hole at 0x12-0x3f and at 0x100-0x9BF
* has A/D converter, SPI serial
* port C is just two bits
* has an extra 16-bit timer compared to Ux/Rx
* selftest rom at 0xF00-0xFF7
Ux Parts:
* 40 pins
* address space is 0x000-0xfff with an unused hole at 0xf39-0xf7f
* U2 parts have an unused hole at 0x10-0x3f and at 0x100-0x7bF
* has Ports A-D
* EPROM parts have MOR at 0xf38 and bootstrap ROM at 0xf80-0xff7
* mask parts have selftest ROM at 0xf38-0xff7
* selftest ROMs differ between the U2 and U3 versions
*/
m68705_new_device::m68705_new_device(
machine_config const &mconfig,
char const *tag,
device_t *owner,
u32 clock,
device_type type,
char const *name,
u32 addr_width,
address_map_delegate internal_map,
char const *shortname,
char const *source)
: m68705_device(mconfig, tag, owner, clock, type, name, addr_width, internal_map, shortname, source)
, m_user_rom(*this, DEVICE_SELF, u32(1) << addr_width)
, m_port_open_drain{ false, false, false, false }
, m_port_mask{ 0x00, 0x00, 0x00, 0x00 }
, m_port_input{ 0xff, 0xff, 0xff, 0xff }
, m_port_latch{ 0xff, 0xff, 0xff, 0xff }
, m_port_ddr{ 0x00, 0x00, 0x00, 0x00 }
, m_port_cb_r{ { *this }, { *this }, { *this }, { *this } }
, m_port_cb_w{ { *this }, { *this }, { *this }, { *this } }
, m_pcr(0xff)
{
}
template <offs_t B> READ8_MEMBER(m68705_new_device::eprom_r)
{
// read locked out when /VPON and /PLE are asserted
return (BIT(m_pcr, 2) || BIT(m_pcr, 0)) ? m_user_rom[B + offset] : 0xff;
}
template <offs_t B> WRITE8_MEMBER(m68705_new_device::eprom_w)
{
// programming latch enabled when /VPON and /PLE are asserted
if (!BIT(m_pcr, 2) && !BIT(m_pcr, 0))
{
if (BIT(m_pcr, 1))
{
m_pl_data = data;
m_pl_addr = B + offset;
}
else
{
// this causes undefined behaviour, which is bad when EPROM programming is involved
logerror("warning: write to EPROM when /PGE = 0 (%x = %x)\n", B + offset, data);
}
}
}
template <std::size_t N> void m68705_new_device::set_port_open_drain(bool value)
{
m_port_open_drain[N] = value;
}
template <std::size_t N> void m68705_new_device::set_port_mask(u8 mask)
{
m_port_mask[N] = mask;
}
template <std::size_t N> READ8_MEMBER(m68705_new_device::port_r)
{
if (!m_port_cb_r[N].isnull()) m_port_input[N] = m_port_cb_r[N](space, 0, ~m_port_ddr[N]);
return m_port_mask[N] | (m_port_latch[N] & m_port_ddr[N]) | (m_port_input[N] & ~m_port_ddr[N]);
}
template <std::size_t N> WRITE8_MEMBER(m68705_new_device::port_latch_w)
{
data &= ~m_port_mask[N];
u8 const diff = m_port_latch[N] ^ data;
m_port_latch[N] = data;
if (diff & m_port_ddr[N])
port_cb_w<N>();
}
template <std::size_t N> WRITE8_MEMBER(m68705_new_device::port_ddr_w)
{
data &= ~m_port_mask[N];
if (data != m_port_ddr[N])
{
m_port_ddr[N] = data;
port_cb_w<N>();
}
}
template <std::size_t N> void m68705_new_device::port_cb_w()
{
u8 const data(m_port_open_drain[N]
? m_port_latch[N] | ~m_port_ddr[N]
: (m_port_latch[N] & m_port_ddr[N]) | (m_port_input[N] & ~m_port_ddr[N]));
u8 const mask(m_port_open_drain[N] ? (~m_port_latch[N] & m_port_ddr[N]) : m_port_ddr[N]);
m_port_cb_w[N](space(AS_PROGRAM), 0, data, mask);
}
READ8_MEMBER(m68705_new_device::pcr_r)
{
return m_pcr;
}
WRITE8_MEMBER(m68705_new_device::pcr_w)
{
data |= ((data & 0x01) << 1); // lock out /PGE if /PLE is not asserted
if (!BIT(m_pcr, 2) && (0x20 & ((m_pcr ^ data) & ~data)))
{
logerror("warning: unimplemented EPROM write %x |= %x\n", m_pl_addr, m_pl_data);
popmessage("%s: EPROM write", tag());
}
m_pcr = (m_pcr & 0xfc) | (data & 0x03);
}
READ8_MEMBER(m68705_new_device::internal_68705_tdr_r)
{
//logerror("internal_68705 TDR read, returning %02X\n", m_tdr);
return m_tdr;
}
WRITE8_MEMBER(m68705_new_device::internal_68705_tdr_w)
{
//logerror("internal_68705 TDR written with %02X, was %02X\n", data, m_tdr);
m_tdr = data;
}
READ8_MEMBER(m68705_new_device::internal_68705_tcr_r)
{
//logerror("internal_68705 TCR read, returning %02X\n", (m_tcr&0xF7));
return (m_tcr & 0xF7);
}
WRITE8_MEMBER(m68705_new_device::internal_68705_tcr_w)
{
/*
logerror("internal_68705 TCR written with %02X\n", data);
if (data&0x80) logerror(" TIR=1, Timer Interrupt state is set\n"); else logerror(" TIR=0; Timer Interrupt state is cleared\n");
if (data&0x40) logerror(" TIM=1, Timer Interrupt is now masked\n"); else logerror(" TIM=0, Timer Interrupt is now unmasked\n");
if (data&0x20) logerror(" TIN=1, Timer Clock source is set to external\n"); else logerror(" TIN=0, Timer Clock source is set to internal\n");
if (data&0x10) logerror(" TIE=1, Timer External pin is enabled\n"); else logerror(" TIE=0, Timer External pin is disabled\n");
if (data&0x08) logerror(" PSC=1, Prescaler counter cleared\n"); else logerror(" PSC=0, Prescaler counter left alone\n");
logerror(" Prescaler: %d\n", (1<<(data&0x7)));
*/
// if timer was enabled but now isn't, shut it off.
// below is a hack assuming the TIMER pin isn't going anywhere except tied to +5v, so basically TIN is acting as an active-low timer enable, and TIE is ignored even in the case where TIE=1, the timer will end up being 5v ANDED against the internal timer clock which == the internal timer clock.
// Note this hack is incorrect; the timer pin actually does connect somewhere (vblank or maybe one of the V counter bits?), but the game never actually uses the timer pin in external clock mode, so the TIMER connection must be left over from development. We can apparently safely ignore it.
if ((m_tcr^data)&0x20)// check if TIN state changed
{
/* logerror("timer enable state changed!\n"); */
if (data&0x20) m_68705_timer->adjust(attotime::never, TIMER_68705_PRESCALER_EXPIRED);
else m_68705_timer->adjust(attotime::from_hz(((clock())/4)/(1<<(data&0x7))), TIMER_68705_PRESCALER_EXPIRED);
}
// prescaler check: if timer prescaler has changed, or the PSC bit is set, adjust the timer length for the prescaler expired timer, but only if the timer would be running
if ( (((m_tcr&0x07)!=(data&0x07))||(data&0x08)) && ((data&0x20)==0) )
{
/* logerror("timer reset due to PSC or prescaler change!\n"); */
m_68705_timer->adjust(attotime::from_hz(((clock())/4)/(1<<(data&0x7))), TIMER_68705_PRESCALER_EXPIRED);
}
m_tcr = data;
// if int state is set, and TIM is unmasked, assert an interrupt. otherwise clear it.
if ((m_tcr&0xC0) == 0x80)
set_input_line(M68705_INT_TIMER, ASSERT_LINE);
else
set_input_line(M68705_INT_TIMER, CLEAR_LINE);
}
TIMER_CALLBACK_MEMBER(m68705_new_device::timer_68705_increment)
{
m_tdr++;
if (m_tdr == 0x00) m_tcr |= 0x80; // if we overflowed, set the int bit
if ((m_tcr&0xC0) == 0x80)
set_input_line(M68705_INT_TIMER, ASSERT_LINE);
else
set_input_line(M68705_INT_TIMER, CLEAR_LINE);
m_68705_timer->adjust(attotime::from_hz((clock() / 4) / (1 << (m_tcr & 0x07))), TIMER_68705_PRESCALER_EXPIRED);
}
void m68705_new_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
{
case TIMER_68705_PRESCALER_EXPIRED:
timer_68705_increment(ptr, param);
break;
default:
m68705_device::device_timer(timer, id, param, ptr);
}
}
void m68705_new_device::device_start()
{
m68705_device::device_start();
save_item(NAME(m_tdr));
save_item(NAME(m_tcr));
save_item(NAME(m_port_input));
save_item(NAME(m_port_latch));
save_item(NAME(m_port_ddr));
save_item(NAME(m_pcr));
save_item(NAME(m_pl_data));
save_item(NAME(m_pl_addr));
for (u8 &input : m_port_input) input = 0xff;
for (devcb_read8 &cb : m_port_cb_r) cb.resolve_safe(0xff);
for (devcb_write8 &cb : m_port_cb_w) cb.resolve_safe();
m_pcr = 0xff;
m_pl_data = 0xff;
m_pl_addr = 0xffff;
// allocate the MCU timer, and set it to fire NEVER.
m_68705_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(m68705_new_device::timer_68705_increment),this));
m_68705_timer->adjust(attotime::never);
}
void m68705_new_device::device_reset()
{
m68705_device::device_reset();
port_ddr_w<0>(space(AS_PROGRAM), 0, 0x00, 0xff);
port_ddr_w<1>(space(AS_PROGRAM), 0, 0x00, 0xff);
port_ddr_w<2>(space(AS_PROGRAM), 0, 0x00, 0xff);
port_ddr_w<3>(space(AS_PROGRAM), 0, 0x00, 0xff);
m_pcr |= 0xfb; // b2 (/VPON) is driven by external input and hence unaffected by reset
m_tdr = 0xff;
m_tcr = 0xff;
//set_input_line(M68705_IRQ_LINE, CLEAR_LINE);
m_68705_timer->adjust(attotime::from_hz((clock() / 4) / (1 << 7)));
}
void m68705_new_device::execute_set_input(int inputnum, int state)
{
switch (inputnum)
{
case M68705_VPP_LINE:
if (ASSERT_LINE == state)
m_pcr &= 0xfb;
else
m_pcr |= 0x40;
break;
default:
m68705_device::execute_set_input(inputnum, state);
}
}
/****************************************************************************
* M68705P3x family
****************************************************************************/
DEVICE_ADDRESS_MAP_START( p_map, 8, m68705p_device )
ADDRESS_MAP_GLOBAL_MASK(0x07ff)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x0000) AM_READWRITE(port_r<0>, port_latch_w<0>)
AM_RANGE(0x0001, 0x0001) AM_READWRITE(port_r<1>, port_latch_w<1>)
AM_RANGE(0x0002, 0x0002) AM_READWRITE(port_r<2>, port_latch_w<2>)
// 0x0003 not used (no port D)
AM_RANGE(0x0004, 0x0004) AM_WRITE(port_ddr_w<0>)
AM_RANGE(0x0005, 0x0005) AM_WRITE(port_ddr_w<1>)
AM_RANGE(0x0006, 0x0006) AM_WRITE(port_ddr_w<2>)
// 0x0007 not used (no port D)
AM_RANGE(0x0008, 0x0008) AM_READWRITE(internal_68705_tdr_r, internal_68705_tdr_w)
AM_RANGE(0x0009, 0x0009) AM_READWRITE(internal_68705_tcr_r, internal_68705_tcr_w)
// 0x000a not used
AM_RANGE(0x000b, 0x000b) AM_READWRITE(pcr_r, pcr_w)
// 0x000c-0x000f not used
AM_RANGE(0x0010, 0x007f) AM_RAM
AM_RANGE(0x0080, 0x0784) AM_READWRITE(eprom_r<0x0080>, eprom_w<0x0080>) // User EPROM
AM_RANGE(0x0785, 0x07f7) AM_ROM AM_REGION("bootstrap", 0)
AM_RANGE(0x07f8, 0x07ff) AM_READWRITE(eprom_r<0x07f8>, eprom_w<0x07f8>) // Interrupt vectors
ADDRESS_MAP_END
m68705p_device::m68705p_device(
machine_config const &mconfig,
char const *tag,
device_t *owner,
u32 clock,
device_type type,
char const *name,
char const *shortname,
char const *source)
: m68705_new_device(mconfig, tag, owner, clock, type, name, 11, address_map_delegate(FUNC(m68705p_device::p_map), this), shortname, source)
{
set_port_open_drain<0>(true); // Port A is open drain with internal pull-ups
set_port_mask<2>(0xf0); // Port C is four bits wide
set_port_mask<3>(0xff); // Port D isn't present
}
/****************************************************************************
* M68705P3 device
****************************************************************************/
m68705p3_device::m68705p3_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock)
: m68705p_device(mconfig, tag, owner, clock, M68705P3, "MC68705P3", "m68705p3", __FILE__)
{
}
tiny_rom_entry const *m68705p3_device::device_rom_region() const
{
return ROM_NAME(m68705p3);
}
/****************************************************************************
* M68705P5 device
****************************************************************************/
m68705p5_device::m68705p5_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock)
: m68705p_device(mconfig, tag, owner, clock, M68705P3, "MC68705P5", "m68705p5", __FILE__)
{
}
tiny_rom_entry const *m68705p5_device::device_rom_region() const
{
return ROM_NAME(m68705p5);
}
/****************************************************************************
* M68705U3 device
****************************************************************************/
DEVICE_ADDRESS_MAP_START( u_map, 8, m68705u3_device )
ADDRESS_MAP_GLOBAL_MASK(0x0fff)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x0000) AM_READWRITE(port_r<0>, port_latch_w<0>)
AM_RANGE(0x0001, 0x0001) AM_READWRITE(port_r<1>, port_latch_w<1>)
AM_RANGE(0x0002, 0x0002) AM_READWRITE(port_r<2>, port_latch_w<2>)
AM_RANGE(0x0003, 0x0003) AM_READWRITE(port_r<3>, port_latch_w<3>)
AM_RANGE(0x0004, 0x0004) AM_WRITE(port_ddr_w<0>)
AM_RANGE(0x0005, 0x0005) AM_WRITE(port_ddr_w<1>)
AM_RANGE(0x0006, 0x0006) AM_WRITE(port_ddr_w<2>)
// 0x0007 not used (port D is input only)
AM_RANGE(0x0008, 0x0008) AM_READWRITE(internal_68705_tdr_r, internal_68705_tdr_w)
AM_RANGE(0x0009, 0x0009) AM_READWRITE(internal_68705_tcr_r, internal_68705_tcr_w)
// 0x000a TODO: miscellaneous register
AM_RANGE(0x000b, 0x000b) AM_READWRITE(pcr_r, pcr_w)
// 0x000c-0x000f not used
AM_RANGE(0x0010, 0x007f) AM_RAM
AM_RANGE(0x0080, 0x0f38) AM_READWRITE(eprom_r<0x0080>, eprom_w<0x0080>) // User EPROM
// 0x0f39-0x0f7f not used
AM_RANGE(0x0f80, 0x0ff7) AM_ROM AM_REGION("bootstrap", 0)
AM_RANGE(0x0ff8, 0x0fff) AM_READWRITE(eprom_r<0x0ff8>, eprom_w<0x0ff8>) // Interrupt vectors
ADDRESS_MAP_END
m68705u3_device::m68705u3_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock)
: m68705_new_device(mconfig, tag, owner, clock, M68705U3, "MC68705U3", 11, address_map_delegate(FUNC(m68705u3_device::u_map), this), "m68705u3", __FILE__)
{
set_port_open_drain<0>(true); // Port A is open drain with internal pull-ups
}
tiny_rom_entry const *m68705u3_device::device_rom_region() const
{
return ROM_NAME(m68705u3);
}

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src/devices/cpu/m6805/m68705.h Normal file
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// license:BSD-3-Clause
// copyright-holders:Vas Crabb
#ifndef MAME_CPU_M6805_M68705_H
#define MAME_CPU_M6805_M68705_H
#pragma once
#include "m6805.h"
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
extern device_type const M68705;
extern device_type const M68705P3;
extern device_type const M68705P5;
extern device_type const M68705U3;
//**************************************************************************
// TYPE DECLARATIONS
//**************************************************************************
// ======================> m68705_device
class m68705_device : public m6805_base_device
{
public:
m68705_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
enum
{
M68705_A = M6805_A,
M68705_PC = M6805_PC,
M68705_S = M6805_S,
M68705_X = M6805_X,
M68705_CC = M6805_CC,
M68705_IRQ_STATE = M6805_IRQ_STATE
};
m68705_device(
machine_config const &mconfig,
char const *tag,
device_t *owner,
u32 clock,
device_type type,
char const *name,
u32 addr_width,
address_map_delegate internal_map,
char const *shortname,
char const *source);
virtual void device_reset() override;
virtual void execute_set_input(int inputnum, int state) override;
virtual void interrupt() override;
};
// ======================> m68705_new_device
#define MCFG_M68705_PORTA_R_CB(obj) \
devcb = &m68705_new_device::set_port_cb_r<0>(*device, DEVCB_##obj);
#define MCFG_M68705_PORTB_R_CB(obj) \
devcb = &m68705_new_device::set_port_cb_r<1>(*device, DEVCB_##obj);
#define MCFG_M68705_PORTC_R_CB(obj) \
devcb = &m68705_new_device::set_port_cb_r<2>(*device, DEVCB_##obj);
#define MCFG_M68705_PORTD_R_CB(obj) \
devcb = &m68705_new_device::set_port_cb_r<3>(*device, DEVCB_##obj);
#define MCFG_M68705_PORTA_W_CB(obj) \
devcb = &m68705_new_device::set_port_cb_w<0>(*device, DEVCB_##obj);
#define MCFG_M68705_PORTB_W_CB(obj) \
devcb = &m68705_new_device::set_port_cb_w<1>(*device, DEVCB_##obj);
#define MCFG_M68705_PORTC_W_CB(obj) \
devcb = &m68705_new_device::set_port_cb_w<2>(*device, DEVCB_##obj);
class m68705_new_device : public m68705_device
{
public:
// static configuration helpers
template<std::size_t N, typename Object> static devcb_base &set_port_cb_r(device_t &device, Object &&obj)
{ return downcast<m68705_new_device &>(device).m_port_cb_r[N].set_callback(std::forward<Object>(obj)); }
template<std::size_t N, typename Object> static devcb_base &set_port_cb_w(device_t &device, Object &&obj)
{ return downcast<m68705_new_device &>(device).m_port_cb_w[N].set_callback(std::forward<Object>(obj)); }
protected:
enum
{
PORT_COUNT = 4
};
enum
{
TIMER_68705_PRESCALER_EXPIRED,
};
m68705_new_device(
machine_config const &mconfig,
char const *tag,
device_t *owner,
u32 clock,
device_type type,
char const *name,
u32 addr_width,
address_map_delegate internal_map,
char const *shortname,
char const *source);
template <offs_t B> DECLARE_READ8_MEMBER(eprom_r);
template <offs_t B> DECLARE_WRITE8_MEMBER(eprom_w);
template <std::size_t N> void set_port_open_drain(bool value);
template <std::size_t N> void set_port_mask(u8 mask);
template <std::size_t N> DECLARE_WRITE8_MEMBER(port_input_w) { m_port_input[N] = data & ~m_port_mask[N]; }
template <std::size_t N> DECLARE_READ8_MEMBER(port_r);
template <std::size_t N> DECLARE_WRITE8_MEMBER(port_latch_w);
template <std::size_t N> DECLARE_WRITE8_MEMBER(port_ddr_w);
template <std::size_t N> void port_cb_w();
DECLARE_READ8_MEMBER(internal_68705_tdr_r);
DECLARE_WRITE8_MEMBER(internal_68705_tdr_w);
DECLARE_READ8_MEMBER(internal_68705_tcr_r);
DECLARE_WRITE8_MEMBER(internal_68705_tcr_w);
DECLARE_READ8_MEMBER(pcr_r);
DECLARE_WRITE8_MEMBER(pcr_w);
TIMER_CALLBACK_MEMBER(timer_68705_increment);
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
virtual void execute_set_input(int inputnum, int state) override;
u8 m_tdr;
u8 m_tcr;
/* Timers */
emu_timer *m_68705_timer;
private:
required_region_ptr<u8> m_user_rom;
bool m_port_open_drain[PORT_COUNT];
u8 m_port_mask[PORT_COUNT];
u8 m_port_input[PORT_COUNT];
u8 m_port_latch[PORT_COUNT];
u8 m_port_ddr[PORT_COUNT];
devcb_read8 m_port_cb_r[PORT_COUNT];
devcb_write8 m_port_cb_w[PORT_COUNT];
u8 m_pcr;
u8 m_pl_data;
u16 m_pl_addr;
};
// ======================> m68705p_device
class m68705p_device : public m68705_new_device
{
public:
DECLARE_WRITE8_MEMBER(pa_w) { port_input_w<0>(space, offset, data, mem_mask); }
DECLARE_WRITE8_MEMBER(pb_w) { port_input_w<1>(space, offset, data, mem_mask); }
DECLARE_WRITE8_MEMBER(pc_w) { port_input_w<2>(space, offset, data, mem_mask); }
protected:
DECLARE_ADDRESS_MAP(p_map, 8);
m68705p_device(
machine_config const &mconfig,
char const *tag,
device_t *owner,
u32 clock,
device_type type,
char const *name,
char const *shortname,
char const *source);
};
// ======================> m68705p3_device
class m68705p3_device : public m68705p_device
{
public:
m68705p3_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
virtual tiny_rom_entry const *device_rom_region() const override;
};
// ======================> m68705p5_device
class m68705p5_device : public m68705p_device
{
public:
m68705p5_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
virtual tiny_rom_entry const *device_rom_region() const override;
};
// ======================> m68705u3_device
class m68705u3_device : public m68705_new_device
{
public:
m68705u3_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
DECLARE_WRITE8_MEMBER(pa_w) { port_input_w<0>(space, offset, data, mem_mask); }
DECLARE_WRITE8_MEMBER(pb_w) { port_input_w<1>(space, offset, data, mem_mask); }
DECLARE_WRITE8_MEMBER(pc_w) { port_input_w<2>(space, offset, data, mem_mask); }
DECLARE_WRITE8_MEMBER(pd_w) { port_input_w<3>(space, offset, data, mem_mask); } // TODO: PD6 is also /INT2
protected:
DECLARE_ADDRESS_MAP(u_map, 8);
virtual tiny_rom_entry const *device_rom_region() const override;
};
/****************************************************************************
* 68705 section
****************************************************************************/
#define M68705_INT_MASK 0x03
#define M68705_IRQ_LINE (M6805_IRQ_LINE + 0)
#define M68705_INT_TIMER (M6805_IRQ_LINE + 1)
#define M68705_VPP_LINE (M6805_IRQ_LINE + 2)
#endif // MAME_CPU_M6805_M68705_H

2
src/devices/cpu/m6809/6x09dasm.cpp
View File

@ -5,7 +5,7 @@
6x09dasm.cpp - a 6809/6309/Konami opcode disassembler
Based on:
6809dasm.c - a 6809 opcode disassembler
6309dasm.c - a 6309 opcode disassembler
Version 1.0 5-AUG-2000
Copyright Tim Lindner

162
src/devices/cpu/pps4/pps4.cpp
View File

@ -5,14 +5,32 @@
*
* pps4.c
*
* Rockwell PPS-4 CPU
* Introduced in 1972, it ran at 256kHz. An improved version was released
* in 1975, but could only manage 200kHz. The chipset continued to be
* produced through the 1980s, but never found much acceptance. Chip
* numbers are 10660 (original), 11660, 12660.
* Rockwell Parallel Processing System (PPS-4) Microcomputer
*
* Introduced in 1972, the PPS-4 was a 4-bit PMOS CPU that ran at 256kHz.
* The improved PPS-4/2, released in 1975, doubled the width of discrete
* output and added an internal clock generator (intended for use with a
* 3.579545MHz NTSC XTAL), but the latter could only manage 200kHz. The
* chipset later evolved into the PPS-4/1 (MM76, MM78, etc.) series of
* MCUs which Rockwell continued to produce through the early 1980s.
*
* Part numbers are 10660 (original), 11660 (PPS-4/2), 12660.
*
* List of memory chips:
* 10432 RAM (256 x 4)
* 10932 RAM (512 x 4)
* A05XX ROM (1K x 8)
* A52XX ROM (2K x 8)
* A66XX ROM (4K x 8)
* A88XX ROM (8K x 8)
* A08XX ROM/RAM (704 x 8/72 x 4)
* A07XX ROM/RAM (1K x 8/116 x 4)
* A20XX ROM/RAM (1.5K x 8/128 x 4)
* A17XX ROM/RAM + I/O (2K x 8/128 x 4/16 x 1)
* A23XX ROM/RAM + I/O (1K x 8/128 x 4/16 x 1)
*
* List of support / peripheral chips:
* 10706 Clock generator
* 10706 4-phase clock generator
* 10738 Bus interface
* 11049 Interval timer
* 10686 General purpose I/O
@ -24,8 +42,10 @@
* 10815 keyboard/printer controller
* 10930 Serial data controller
* 15380 dot matrix printer controller
* 11696 Parallel input/output
*
* Note: External clock should be divided by 18 (not implemented).
* All of the above devices, except those providing 4-bit RAM, were also
* compatible with the failed PPS-8 series of 8-bit PMOS CPUs.
*
* Pinouts:
* 10660 11660
@ -55,6 +75,7 @@
* +--------------------+ +--------------------+
*
*****************************************************************************/
#include "emu.h"
#include "debugger.h"
#include "pps4.h"
@ -69,12 +90,26 @@
#endif
const device_type PPS4 = &device_creator<pps4_device>;
const device_type PPS4_2 = &device_creator<pps4_2_device>;
pps4_device::pps4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, PPS4, "PPS4", tag, owner, clock, "pps4", __FILE__ )
pps4_device::pps4_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, u32 clock, const char *shortname, const char *file)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, file)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 12)
, m_data_config("data", ENDIANNESS_LITTLE, 8, 12) // 4bit RAM
, m_io_config("io", ENDIANNESS_LITTLE, 8, 8+1) // 4bit IO
, m_io_config("io", ENDIANNESS_LITTLE, 8, 8) // 4bit IO
, m_dia_cb(*this)
, m_dib_cb(*this)
, m_do_cb(*this)
{
}
pps4_device::pps4_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: pps4_device(mconfig, PPS4, "PPS-4", tag, owner, clock, "pps4", __FILE__)
{
}
pps4_2_device::pps4_2_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: pps4_device(mconfig, PPS4_2, "PPS-4/2", tag, owner, clock, "pps4_2", __FILE__)
{
}
@ -82,9 +117,9 @@ pps4_device::pps4_device(const machine_config &mconfig, const char *tag, device_
* @brief pps4_device::M Return the memory at address B
* @return ROM/RAM(B)
*/
uint8_t pps4_device::M()
u8 pps4_device::M()
{
uint8_t ret = m_data->read_byte(m_B & ~m_SAG);
u8 ret = m_data->read_byte(m_B & ~m_SAG);
m_SAG = 0;
return ret;
}
@ -94,13 +129,13 @@ uint8_t pps4_device::M()
* @brief pps4_device::W Write to the memory address at B
* @return ROM/RAM(B)
*/
void pps4_device::W(uint8_t data)
void pps4_device::W(u8 data)
{
m_data->write_byte(m_B & ~m_SAG, data);
m_SAG = 0;
}
offs_t pps4_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
offs_t pps4_device::disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options)
{
extern CPU_DISASSEMBLE( pps4 );
return CPU_DISASSEMBLE_NAME(pps4)(this, stream, pc, oprom, opram, options);
@ -113,9 +148,9 @@ offs_t pps4_device::disasm_disassemble(std::ostream &stream, offs_t pc, const ui
* program counter is incremented. The icount is decremented.
* @return m_I the next opcode
*/
inline uint8_t pps4_device::ROP()
inline u8 pps4_device::ROP()
{
const uint8_t op = m_direct->read_byte(m_P & 0xFFF);
const u8 op = m_direct->read_byte(m_P & 0xFFF);
m_Ip = m_I1; // save previous opcode
m_P = (m_P + 1) & 0xFFF;
m_icount -= 1;
@ -129,9 +164,9 @@ inline uint8_t pps4_device::ROP()
* icount is decremented.
* @return m_I2 the next argument
*/
inline uint8_t pps4_device::ARG()
inline u8 pps4_device::ARG()
{
const uint8_t arg = m_direct->read_byte(m_P & 0xFFF);
const u8 arg = m_direct->read_byte(m_P & 0xFFF);
m_P = (m_P + 1) & 0xFFF;
m_icount -= 1;
return arg;
@ -265,7 +300,7 @@ void pps4_device::iADCSK()
*/
void pps4_device::iADI()
{
const uint8_t imm = ~m_I1 & 15;
const u8 imm = ~m_I1 & 15;
m_A = m_A + imm;
m_Skip = (m_A >> 4) & 1;
m_A = m_A & 15;
@ -490,7 +525,7 @@ void pps4_device::iRF2()
*/
void pps4_device::iLD()
{
const uint16_t i3c = ~m_I1 & 7;
const u16 i3c = ~m_I1 & 7;
m_A = M();
m_B = m_B ^ (i3c << 4);
}
@ -513,8 +548,8 @@ void pps4_device::iLD()
*/
void pps4_device::iEX()
{
const uint16_t i3c = ~m_I1 & 7;
const uint8_t mem = M();
const u16 i3c = ~m_I1 & 7;
const u8 mem = M();
W(m_A);
m_A = mem;
m_B = m_B ^ (i3c << 4);
@ -542,9 +577,9 @@ void pps4_device::iEX()
*/
void pps4_device::iEXD()
{
const uint8_t i3c = ~m_I1 & 7;
const uint8_t mem = M();
uint8_t bl = m_B & 15;
const u8 i3c = ~m_I1 & 7;
const u8 mem = M();
u8 bl = m_B & 15;
W(m_A);
m_A = mem;
m_B = m_B ^ (i3c << 4);
@ -696,7 +731,7 @@ void pps4_device::iLBUA()
void pps4_device::iXABL()
{
// swap A and BL
uint8_t bl = m_B & 15;
u8 bl = m_B & 15;
m_B = (m_B & ~15) | m_A;
m_A = bl;
}
@ -717,7 +752,7 @@ void pps4_device::iXABL()
void pps4_device::iXBMX()
{
// swap X and BM
const uint8_t bm = (m_B >> 4) & 15;
const u8 bm = (m_B >> 4) & 15;
m_B = (m_B & ~(15 << 4)) | (m_X << 4);
m_X = bm;
}
@ -786,7 +821,7 @@ void pps4_device::iXS()
*/
void pps4_device::iCYS()
{
const uint16_t sa = (m_SA >> 4) | (m_A << 8);
const u16 sa = (m_SA >> 4) | (m_A << 8);
m_A = m_SA & 15;
m_SA = sa;
}
@ -893,7 +928,7 @@ void pps4_device::iLBL()
*/
void pps4_device::iINCB()
{
uint8_t bl = m_B & 15;
u8 bl = m_B & 15;
bl = (bl + 1) & 15;
if (0 == bl) {
LOG(("%s: skip BL=%x\n", __FUNCTION__, bl));
@ -919,7 +954,7 @@ void pps4_device::iINCB()
*/
void pps4_device::iDECB()
{
uint8_t bl = m_B & 15;
u8 bl = m_B & 15;
bl = (bl - 1) & 15;
if (15 == bl) {
LOG(("%s: skip BL=%x\n", __FUNCTION__, bl));
@ -945,7 +980,7 @@ void pps4_device::iDECB()
*/
void pps4_device::iT()
{
const uint16_t p = (m_P & ~63) | (m_I1 & 63);
const u16 p = (m_P & ~63) | (m_I1 & 63);
LOG(("%s: P=%03x I=%02x -> P=%03x\n", __FUNCTION__, m_P, m_I1, p));
m_P = p;
}
@ -1084,8 +1119,8 @@ void pps4_device::iSKZ()
*/
void pps4_device::iSKBI()
{
const uint8_t i4 = m_I1 & 15;
const uint8_t bl = m_B & 15;
const u8 i4 = m_I1 & 15;
const u8 bl = m_B & 15;
m_Skip = bl == i4 ? 1 : 0;
}
@ -1184,18 +1219,20 @@ void pps4_device::iRTNSK()
* the CPU and sets up the I/O enable signal. The second
* ROM word is then received by the I/O devices and decoded
* for address and command. The contents of the accumulator
* inverted are placed on the data lines for acceptance by
* the I/O. At the same time, input data received by the I/O
* device is transferred to the accumulator inverted.
* inverted are placed on the data lines [I/D:4-1] for
* acceptance by the I/O. At the same time, input data
* received by the I/O device [on I/D:8-5] is transferred
* to the accumulator inverted.
*
* FIXME: Is BL on the I/D:8-5 lines during the I/O cycle?
* The ROM, RAM, I/O chips A17xx suggest this, because they
* expect the value of BL to address one of the sixteen
* The RAM address register (B) is placed on the address bus
* during the I/O request cycle. The original RAM chip ignores
* this and leaves the data bus alone at this time, but the
* A17xx uses the value of BL to address one of the sixteen
* input/output lines.
*/
void pps4_device::iIOL()
{
uint8_t ac = ((m_B & 15) << 4) | (~m_A & 15);
u8 ac = (~m_A & 15);
m_I2 = ARG();
m_io->write_byte(m_I2, ac);
LOG(("%s: port:%02x <- %x\n", __FUNCTION__, m_I2, ac));
@ -1219,7 +1256,7 @@ void pps4_device::iIOL()
*/
void pps4_device::iDIA()
{
m_A = m_io->read_byte(PPS4_PORT_A) & 15;
m_A = m_dia_cb() & 15;
}
/**
@ -1237,7 +1274,13 @@ void pps4_device::iDIA()
*/
void pps4_device::iDIB()
{
m_A = m_io->read_byte(PPS4_PORT_B) & 15;
m_A = m_dib_cb() & 15;
}
void pps4_2_device::iDIB()
{
// PPS-4/2 can write zeros onto bidirectional DIO pins to mask open-drain inputs
m_A = m_dib_cb() & m_DIO;
}
/**
@ -1255,7 +1298,14 @@ void pps4_device::iDIB()
*/
void pps4_device::iDOA()
{
m_io->write_byte(PPS4_PORT_A, m_A);
m_do_cb(m_A);
}
void pps4_2_device::iDOA()
{
// DOA also transfers contents of X to DIO on PPS-4/2
m_DIO = m_X;
m_do_cb(m_A | (m_X << 4));
}
/**
@ -1551,6 +1601,16 @@ void pps4_device::device_start()
state_add( STATE_GENFLAGS, "GENFLAGS", m_C).formatstr("%3s").noshow();
m_icountptr = &m_icount;
m_dia_cb.resolve_safe(0);
m_dib_cb.resolve_safe(0);
m_do_cb.resolve_safe();
}
void pps4_2_device::device_start()
{
pps4_device::device_start();
save_item(NAME(m_DIO));
}
void pps4_device::state_string_export(const device_state_entry &entry, std::string &str) const
@ -1586,3 +1646,19 @@ void pps4_device::device_reset()
m_I2 = 0; // Most recent parameter I2(8:1)
m_Ip = 0; // Previous instruction I(8:1)
}
void pps4_2_device::device_reset()
{
pps4_device::device_reset();
m_DIO = 15; // DIO clamp
}
READ16_MEMBER(pps4_device::address_bus_r)
{
if (&space == m_io || &space == m_data)
return m_B;
else if (&space == m_program)
return m_P;
else
return 0;
}

122
src/devices/cpu/pps4/pps4.h
View File

@ -19,26 +19,48 @@ enum
PPS4_SAG,
PPS4_I1,
PPS4_I2,
PPS4_Ip,
PPS4_PORT_A = 256,
PPS4_PORT_B = 257
PPS4_Ip
};
/***************************************************************************
TYPE DEFINITIONS
***************************************************************************/
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_PPS4_DISCRETE_INPUT_A_CB(_devcb) \
devcb = &pps4_device::set_dia_cb(*device, DEVCB_##_devcb);
#define MCFG_PPS4_DISCRETE_INPUT_B_CB(_devcb) \
devcb = &pps4_device::set_dib_cb(*device, DEVCB_##_devcb);
#define MCFG_PPS4_DISCRETE_OUTPUT_CB(_devcb) \
devcb = &pps4_device::set_do_cb(*device, DEVCB_##_devcb);
//**************************************************************************
// DEVICE TYPE DEFINITIONS
//**************************************************************************
extern const device_type PPS4;
extern const device_type PPS4_2;
/***************************************************************************
FUNCTION PROTOTYPES
***************************************************************************/
extern const device_type PPS4;
class pps4_device : public cpu_device
{
public:
// construction/destruction
pps4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
pps4_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
pps4_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, u32 clock, const char *shortname, const char *file);
public:
// static configuration helpers
template<class _Object> static devcb_base &set_dia_cb(device_t &device, _Object object) { return downcast<pps4_device &>(device).m_dia_cb.set_callback(object); }
template<class _Object> static devcb_base &set_dib_cb(device_t &device, _Object object) { return downcast<pps4_device &>(device).m_dib_cb.set_callback(object); }
template<class _Object> static devcb_base &set_do_cb(device_t &device, _Object object) { return downcast<pps4_device &>(device).m_do_cb.set_callback(object); }
DECLARE_READ16_MEMBER(address_bus_r);
protected:
// device-level overrides
@ -46,10 +68,10 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const override { return 1; }
virtual uint32_t execute_max_cycles() const override { return 3; }
virtual uint32_t execute_input_lines() const override { return 0; }
virtual uint32_t execute_default_irq_vector() const override { return 0; }
virtual u32 execute_min_cycles() const override { return 1; }
virtual u32 execute_max_cycles() const override { return 3; }
virtual u32 execute_input_lines() const override { return 0; }
virtual u32 execute_default_irq_vector() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@ -62,47 +84,51 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual u32 disasm_min_opcode_bytes() const override { return 1; }
virtual u32 disasm_max_opcode_bytes() const override { return 2; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options) override;
private:
protected:
address_space_config m_program_config;
address_space_config m_data_config;
address_space_config m_io_config;
devcb_read8 m_dia_cb;
devcb_read8 m_dib_cb;
devcb_write8 m_do_cb;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_data;
address_space *m_io;
int m_icount;
uint8_t m_A; //!< Accumulator A(4:1)
uint8_t m_X; //!< X register X(4:1)
uint16_t m_P; //!< program counter P(12:1)
uint16_t m_SA; //!< Shift register SA(12:1)
uint16_t m_SB; //!< Shift register SB(12:1)
uint8_t m_Skip; //!< Skip next instruction
uint16_t m_SAG; //!< Special address generation mask
uint16_t m_B; //!< B register B(12:1) (BL, BM and BH)
uint8_t m_C; //!< Carry flip-flop
uint8_t m_FF1; //!< Flip-flop 1
uint8_t m_FF2; //!< Flip-flop 2
uint8_t m_I1; //!< Most recent instruction I(8:1)
uint8_t m_I2; //!< Most recent parameter I2(8:1)
uint8_t m_Ip; //!< Previous instruction I(8:1)
u8 m_A; //!< Accumulator A(4:1)
u8 m_X; //!< X register X(4:1)
u16 m_P; //!< program counter P(12:1)
u16 m_SA; //!< Shift register SA(12:1)
u16 m_SB; //!< Shift register SB(12:1)
u8 m_Skip; //!< Skip next instruction
u16 m_SAG; //!< Special address generation mask
u16 m_B; //!< B register B(12:1) (BL, BM and BH)
u8 m_C; //!< Carry flip-flop
u8 m_FF1; //!< Flip-flop 1
u8 m_FF2; //!< Flip-flop 2
u8 m_I1; //!< Most recent instruction I(8:1)
u8 m_I2; //!< Most recent parameter I2(8:1)
u8 m_Ip; //!< Previous instruction I(8:1)
//! return memory at address B(12:1)
inline uint8_t M();
inline u8 M();
//! write to memory at address B(12:1)
inline void W(uint8_t data);
inline void W(u8 data);
//! return the next opcode (also in m_I)
inline uint8_t ROP();
inline u8 ROP();
//! return the next argument (also in m_I2)
inline uint8_t ARG();
inline u8 ARG();
void iAD(); //!< Add
void iADC(); //!< Add with carry-in
@ -151,11 +177,33 @@ private:
void iRTNSK(); //!< Return and skip
void iIOL(); //!< Input/Output long
void iDIA(); //!< Discrete input group A
void iDIB(); //!< Discrete input group B
void iDOA(); //!< Discrete output group A
virtual void iDIB(); //!< Discrete input group B
virtual void iDOA(); //!< Discrete output group A
void iSAG(); //!< Special address generation
void execute_one(); //!< execute one instruction
};
class pps4_2_device : public pps4_device
{
public:
// construction/destruction
pps4_2_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device_execute_interface overrides (NOTE: these assume internal XTAL divider is always used)
virtual u64 execute_clocks_to_cycles(u64 clocks) const override { return (clocks + 18 - 1) / 18; }
virtual u64 execute_cycles_to_clocks(u64 cycles) const override { return (cycles * 18); }
virtual void iDIB() override;
virtual void iDOA() override;
private:
u8 m_DIO; //!< DIO clamp
};
#endif // __PPS4_H__

34
src/devices/imagedev/floppy.cpp
View File

@ -110,6 +110,9 @@ const device_type TEAC_FD_55G = &device_creator<teac_fd_55g>;
// ALPS 5.25" drives
const device_type ALPS_3255190x = &device_creator<alps_3255190x>;
// IBM 8" drives
const device_type IBM_6360 = &device_creator<ibm_6360>;
const floppy_format_type floppy_image_device::default_floppy_formats[] = {
FLOPPY_D88_FORMAT,
@ -2258,3 +2261,34 @@ void alps_3255190x::handled_variants(uint32_t *variants, int &var_count) const
var_count = 0;
variants[var_count++] = floppy_image::SSSD;
}
//-------------------------------------------------
// IBM 6360 -- 8" single-sided single density
//-------------------------------------------------
ibm_6360::ibm_6360(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
floppy_image_device(mconfig, FLOPPY_8_SSSD, "IBM 6360 8\" single density single sided floppy drive", tag, owner, clock, "ibm_6360", __FILE__)
{
}
ibm_6360::~ibm_6360()
{
}
//ol ibm_6360::trk00_r() { return true; }
void ibm_6360::setup_characteristics()
{
form_factor = floppy_image::FF_8;
tracks = 77;
sides = 1;
motor_always_on = true;
set_rpm(360);
}
void ibm_6360::handled_variants(uint32_t *variants, int &var_count) const
{
var_count = 0;
variants[var_count++] = floppy_image::SSSD;
}

2
src/devices/imagedev/floppy.h
View File

@ -245,6 +245,7 @@ DECLARE_FLOPPY_IMAGE_DEVICE(teac_fd_55e, "floppy_5_25")
DECLARE_FLOPPY_IMAGE_DEVICE(teac_fd_55f, "floppy_5_25")
DECLARE_FLOPPY_IMAGE_DEVICE(teac_fd_55g, "floppy_5_25")
DECLARE_FLOPPY_IMAGE_DEVICE(alps_3255190x, "floppy_5_25")
DECLARE_FLOPPY_IMAGE_DEVICE(ibm_6360, "floppy_8")
extern const device_type FLOPPYSOUND;
@ -340,5 +341,6 @@ extern const device_type TEAC_FD_55E;
extern const device_type TEAC_FD_55F;
extern const device_type TEAC_FD_55G;
extern const device_type ALPS_3255190x;
extern const device_type IBM_6360;
#endif /* FLOPPY_H */

49
src/devices/machine/68230pit.cpp
View File

@ -137,9 +137,9 @@ void pit68230_device::device_start ()
// resolve callbacks
m_pa_out_cb.resolve_safe();
m_pa_in_cb.resolve_safe(0);
m_pa_in_cb.resolve();
m_pb_out_cb.resolve_safe();
m_pb_in_cb.resolve_safe(0);
m_pb_in_cb.resolve();
m_pc_out_cb.resolve_safe();
m_pc_in_cb.resolve(); // A temporary way to check if handler is installed with isnull(). TODO: Need better fix.
m_h1_out_cb.resolve_safe();
@ -292,9 +292,15 @@ void pit68230_device::pa_update_bit(uint8_t bit, uint8_t state)
return;
}
if (state)
{
m_padr |= (1 << bit);
m_pail |= (1 << bit);
}
else
{
m_padr &= ~(1 << bit);
m_pail &= ~(1 << bit);
}
}
void pit68230_device::pb_update_bit(uint8_t bit, uint8_t state)
@ -307,9 +313,15 @@ void pit68230_device::pb_update_bit(uint8_t bit, uint8_t state)
return;
}
if (state)
{
m_pbdr |= (1 << bit);
m_pbil |= (1 << bit);
}
else
{
m_pbdr &= ~(1 << bit);
m_pbil &= ~(1 << bit);
}
}
// TODO: Make sure port C is in the right alternate mode
@ -323,9 +335,15 @@ void pit68230_device::pc_update_bit(uint8_t bit, uint8_t state)
return;
}
if (state)
{
m_pcdr |= (1 << bit);
m_pcil |= (1 << bit);
}
else
{
m_pcdr &= ~(1 << bit);
m_pcil &= ~(1 << bit);
}
}
void pit68230_device::update_tin(uint8_t state)
@ -772,7 +790,14 @@ uint8_t pit68230_device::rr_pitreg_pbcr()
uint8_t pit68230_device::rr_pitreg_padr()
{
m_padr &= m_paddr;
m_padr |= (m_pa_in_cb() & ~m_paddr);
if (!m_pa_in_cb.isnull())
{
m_padr |= (m_pa_in_cb() & ~m_paddr);
}
else
{
m_padr |= (m_pail & ~m_paddr);
}
LOGDR(("%s %s <- %02x\n",tag(), FUNCNAME, m_padr));
return m_padr;
}
@ -787,19 +812,31 @@ uint8_t pit68230_device::rr_pitreg_padr()
uint8_t pit68230_device::rr_pitreg_pbdr()
{
m_pbdr &= m_pbddr;
m_pbdr |= (m_pb_in_cb() & ~m_pbddr);
if (!m_pb_in_cb.isnull())
{
m_pbdr |= (m_pb_in_cb() & ~m_pbddr);
}
else
{
m_pbdr |= (m_pbil & ~m_pbddr);
}
LOGDR(("%s %s <- %02x\n",tag(), FUNCNAME, m_pbdr));
//LOGDR(("%s %s <- %02x\n",tag(), FUNCNAME, m_pbdr));
return m_pbdr;
}
uint8_t pit68230_device::rr_pitreg_pcdr()
{
m_pcdr &= m_pcddr;
if (!m_pc_in_cb.isnull()) // Port C has alternate functions that may set bits apart from callback
{
m_pcdr &= m_pcddr;
m_pcdr |= (m_pc_in_cb() & ~m_pcddr);
}
else
{
m_pcdr |= (m_pcil & ~m_pcddr);
}
if (m_pcdr != 0) { LOGDR(("%s %s <- %02x\n",tag(), FUNCNAME, m_pcdr)); }
return m_pcdr;
}

3
src/devices/machine/68230pit.h
View File

@ -332,6 +332,9 @@ protected:
uint8_t m_padr; // Port A Data register
uint8_t m_pbdr; // Port B Data register
uint8_t m_pcdr; // Port C Data register
uint8_t m_pail; // Port A input lines
uint8_t m_pbil; // Port B input lines
uint8_t m_pcil; // Port C input lines
uint8_t m_psr; // Port Status Register
uint8_t m_tcr; // Timer Control Register
uint8_t m_tivr; // Timer Interrupt Vector register

5
src/devices/machine/hd63450.cpp
View File

@ -44,7 +44,10 @@ hd63450_device::hd63450_device(const machine_config &mconfig, const char *tag, d
void hd63450_device::device_start()
{
// get the CPU device
m_cpu = machine().device<cpu_device>(m_cpu_tag);
if ((m_cpu = machine().device<cpu_device>(m_cpu_tag)) == nullptr)
{
m_cpu = owner()->subdevice<cpu_device>(m_cpu_tag);
}
assert(m_cpu != nullptr);
// resolve callbacks

5
src/devices/machine/i8255.cpp
View File

@ -473,6 +473,11 @@ uint8_t i8255_device::read_pc()
{
// read data from port
data |= m_in_pc_cb(0) & mask;
if (port_c_upper_mode() == MODE_OUTPUT)
{
// read data from output latch
data |= m_output[PORT_C] & mask;
}
}
return data;

91
src/devices/machine/pci-ide.cpp
View File

@ -14,8 +14,11 @@ ide_pci_device::ide_pci_device(const machine_config &mconfig, const char *tag, d
}
DEVICE_ADDRESS_MAP_START(config_map, 32, ide_pci_device)
AM_RANGE(0x08, 0x0b) AM_WRITE8(prog_if_w, 0x0000ff00)
AM_RANGE(0x10, 0x1f) AM_WRITE(address_base_w)
AM_RANGE(0x40, 0x5f) AM_READWRITE(pcictrl_r, pcictrl_w)
AM_RANGE(0x70, 0x77) AM_DEVREADWRITE("ide", bus_master_ide_controller_device, bmdma_r, bmdma_w) // PCI646
AM_RANGE(0x78, 0x7f) AM_DEVREADWRITE("ide2", bus_master_ide_controller_device, bmdma_r, bmdma_w) // PCI646
AM_INHERIT_FROM(pci_device::config_map)
ADDRESS_MAP_END
@ -80,7 +83,17 @@ void ide_pci_device::device_start()
add_map(16, M_IO, FUNC(ide_pci_device::bus_master_map));
bank_infos[4].adr = 0xf00;
// Setup stored BARs
pci_bar[0] = 0x1f0;
pci_bar[1] = 0x3f4;
pci_bar[2] = 0x170;
pci_bar[3] = 0x374;
pci_bar[4] = 0xf00;
m_irq_handler.resolve_safe();
intr_pin = 0x1;
intr_line = 0xe;
}
void ide_pci_device::device_reset()
@ -94,8 +107,8 @@ void ide_pci_device::device_reset()
READ32_MEMBER(ide_pci_device::ide_read_cs1)
{
// PCI offset starts at 0x3f4, idectrl expects 0x3f0
uint32_t data = 0;
data = m_ide->read_cs1(space, ++offset, mem_mask);
uint32_t data;
data = m_ide->read_cs1(space, 1, mem_mask);
if (0)
logerror("%s:ide_read_cs1 offset=%08X data=%08X mask=%08X\n", machine().describe_context(), offset, data, mem_mask);
return data;
@ -104,21 +117,21 @@ READ32_MEMBER(ide_pci_device::ide_read_cs1)
WRITE32_MEMBER(ide_pci_device::ide_write_cs1)
{
// PCI offset starts at 0x3f4, idectrl expects 0x3f0
m_ide->write_cs1(space, ++offset, data, mem_mask);
m_ide->write_cs1(space, 1, data, mem_mask);
}
READ32_MEMBER(ide_pci_device::ide2_read_cs1)
{
// PCI offset starts at 0x374, idectrl expects 0x370
uint32_t data = 0;
data = m_ide2->read_cs1(space, ++offset, mem_mask);
uint32_t data;
data = m_ide2->read_cs1(space, 1, mem_mask);
return data;
}
WRITE32_MEMBER(ide_pci_device::ide2_write_cs1)
{
// PCI offset starts at 0x374, idectrl expects 0x370
m_ide2->write_cs1(space, ++offset, data, mem_mask);
m_ide2->write_cs1(space, 1, data, mem_mask);
}
WRITE_LINE_MEMBER(ide_pci_device::ide_interrupt)
@ -141,6 +154,42 @@ WRITE_LINE_MEMBER(ide_pci_device::ide_interrupt)
logerror("%s:ide_interrupt %i set to %i\n", machine().describe_context(), m_irq_num, state);
}
WRITE8_MEMBER(ide_pci_device::prog_if_w)
{
uint32_t oldVal = pclass;
pclass = (pclass & ~(0xff)) | (data & 0xff);
// Check for switch to/from compatibility (legacy) mode from/to pci mode
if ((oldVal ^ pclass) & 0x5) {
// Map Primary IDE Channel
if (pclass & 0x1) {
// PCI Mode
// Enabling BAR 4 in legacy mode
bank_infos[4].flags &= ~M_DISABLED;
pci_device::address_base_w(space, 0, pci_bar[0]);
pci_device::address_base_w(space, 1, pci_bar[1]);
} else {
// Legacy Mode
// Disabling BAR 4 in legacy mode
bank_infos[4].flags |= M_DISABLED;
pci_device::address_base_w(space, 0, 0x1f0);
pci_device::address_base_w(space, 1, 0x3f4);
}
// Map Primary IDE Channel
if (pclass & 0x4) {
// PCI Mode
pci_device::address_base_w(space, 2, pci_bar[2]);
pci_device::address_base_w(space, 3, pci_bar[3]);
}
else {
// Legacy Mode
pci_device::address_base_w(space, 2, 0x170);
pci_device::address_base_w(space, 3, 0x374);
}
}
if (1)
logerror("%s:prog_if_w pclass = %06X\n", machine().describe_context(), pclass);
}
READ32_MEMBER(ide_pci_device::pcictrl_r)
{
return m_config_data[offset];
@ -150,7 +199,7 @@ WRITE32_MEMBER(ide_pci_device::pcictrl_w)
{
COMBINE_DATA(&m_config_data[offset]);
// PCI646U2 Offset 0x50 is interrupt status
if (main_id == 0x10950646 && offset == 0x10 / 4 && (data & 0x4)) {
if (main_id == 0x10950646 && offset == (0x10 / 4) && (data & 0x4)) {
m_config_data[0x10 / 4] &= ~0x4;
if (0)
logerror("%s:ide_pci_device::pcictrl_w Clearing interrupt status\n", machine().describe_context());
@ -161,24 +210,24 @@ WRITE32_MEMBER(ide_pci_device::address_base_w)
{
// data==0xffffffff is used to identify required memory space
if (data != 0xffffffff) {
// Bits 0 (ide) and 2 (ide2) control if the mapping is legacy or BAR
// Save local copy of BAR
pci_bar[offset] = data;
// Bits 0 (primary) and 2 (secondary) control if the mapping is legacy or BAR
switch (offset) {
case 0:
if ((pclass & 0x1) == 0)
data = (data & 0xfffff000) | 0x1f0;
case 0: case 1:
if ((pclass & 0x1) == 1)
pci_device::address_base_w(space, offset, data);
break;
case 1:
if ((pclass & 0x1) == 0)
data = (data & 0xfffff000) | 0x3f4;
break;
case 2:
if ((pclass & 0x4) == 0)
data = (data & 0xfffff000) | 0x170;
case 2: case 3:
if ((pclass & 0x4) == 1)
pci_device::address_base_w(space, offset, data);
break;
default:
if ((pclass & 0x4) == 0)
data = (data & 0xfffff000) | 0x374;
pci_device::address_base_w(space, offset, data);
// Not sure what to do for the bus master ide BAR in legacy mode
// prog_if_w will disable register in legacy mode
if ((pclass & 0x5) == 0)
logerror("Mapping bar[%i] in legacy mode\n", offset);
}
}
pci_device::address_base_w(space, offset, data);
}

2
src/devices/machine/pci-ide.h
View File

@ -53,6 +53,7 @@ private:
cpu_device *m_cpu;
int m_irq_num;
devcb_write_line m_irq_handler;
uint32_t pci_bar[6];
uint32_t m_config_data[0x10];
DECLARE_ADDRESS_MAP(chan1_data_command_map, 32);
@ -60,6 +61,7 @@ private:
DECLARE_ADDRESS_MAP(chan2_data_command_map, 32);
DECLARE_ADDRESS_MAP(chan2_control_map, 32);
DECLARE_ADDRESS_MAP(bus_master_map, 32);
DECLARE_WRITE8_MEMBER(prog_if_w);
DECLARE_READ32_MEMBER(pcictrl_r);
DECLARE_WRITE32_MEMBER(pcictrl_w);
DECLARE_WRITE32_MEMBER(address_base_w);

50
src/devices/machine/pci.cpp
View File

@ -23,6 +23,8 @@ DEVICE_ADDRESS_MAP_START(config_map, 32, pci_device)
AM_RANGE(0x2c, 0x2f) AM_WRITENOP
AM_RANGE(0x30, 0x33) AM_READWRITE (expansion_base_r, expansion_base_w)
AM_RANGE(0x34, 0x37) AM_READ8 (capptr_r, 0x000000ff)
AM_RANGE(0x3c, 0x3f) AM_READWRITE8(interrupt_line_r, interrupt_line_w, 0x000000ff)
AM_RANGE(0x3c, 0x3f) AM_READWRITE8(interrupt_pin_r, interrupt_pin_w, 0x0000ff00)
ADDRESS_MAP_END
DEVICE_ADDRESS_MAP_START(config_map, 32, pci_bridge_device)
@ -67,6 +69,8 @@ pci_device::pci_device(const machine_config &mconfig, device_type type, const ch
pclass = 0xffffff;
subsystem_id = 0xffffffff;
is_multifunction_device = false;
intr_pin = 0x0;
intr_line = 0xff;
}
void pci_device::set_ids(uint32_t _main_id, uint8_t _revision, uint32_t _pclass, uint32_t _subsystem_id)
@ -245,6 +249,30 @@ READ8_MEMBER(pci_device::capptr_r)
return 0x00;
}
READ8_MEMBER(pci_device::interrupt_line_r)
{
logerror("interrupt_line_r = %02x\n", intr_line);
return intr_line;
}
WRITE8_MEMBER(pci_device::interrupt_line_w)
{
COMBINE_DATA(&intr_line);
logerror("interrupt_line_w %02x\n", data);
}
READ8_MEMBER(pci_device::interrupt_pin_r)
{
logerror("interrupt_pin_r = %02x\n", intr_pin);
return intr_pin;
}
WRITE8_MEMBER(pci_device::interrupt_pin_w)
{
COMBINE_DATA(&intr_pin);
logerror("interrupt_pin_w = %02x\n", data);
}
void pci_device::set_remap_cb(mapper_cb _remap_cb)
{
remap_cb = _remap_cb;
@ -749,28 +777,6 @@ WRITE16_MEMBER(pci_bridge_device::iolimitu_w)
logerror("iolimitu_w %04x\n", iolimitu);
}
READ8_MEMBER (pci_bridge_device::interrupt_line_r)
{
logerror("interrupt_line_r\n");
return 0xff;
}
WRITE8_MEMBER (pci_bridge_device::interrupt_line_w)
{
logerror("interrupt_line_w %02x\n", data);
}
READ8_MEMBER (pci_bridge_device::interrupt_pin_r)
{
logerror("interrupt_pin_r\n");
return 0xff;
}
WRITE8_MEMBER (pci_bridge_device::interrupt_pin_w)
{
logerror("interrupt_pin_w %02x\n", data);
}
READ16_MEMBER (pci_bridge_device::bridge_control_r)
{
return bridge_control;

9
src/devices/machine/pci.h
View File

@ -80,6 +80,10 @@ public:
DECLARE_READ32_MEMBER (expansion_base_r);
DECLARE_WRITE32_MEMBER(expansion_base_w);
virtual DECLARE_READ8_MEMBER(capptr_r);
DECLARE_READ8_MEMBER(interrupt_line_r);
DECLARE_WRITE8_MEMBER(interrupt_line_w);
DECLARE_READ8_MEMBER(interrupt_pin_r);
DECLARE_WRITE8_MEMBER(interrupt_pin_w);
protected:
optional_memory_region m_region;
@ -118,6 +122,7 @@ protected:
uint32_t expansion_rom_size;
uint32_t expansion_rom_base;
bool is_multifunction_device;
uint8_t intr_line, intr_pin;
virtual void device_start() override;
virtual void device_reset() override;
@ -192,10 +197,6 @@ public:
DECLARE_WRITE16_MEMBER(iobaseu_w);
DECLARE_READ16_MEMBER (iolimitu_r);
DECLARE_WRITE16_MEMBER(iolimitu_w);
DECLARE_READ8_MEMBER (interrupt_line_r);
DECLARE_WRITE8_MEMBER (interrupt_line_w);
DECLARE_READ8_MEMBER (interrupt_pin_r);
DECLARE_WRITE8_MEMBER (interrupt_pin_w);
DECLARE_READ16_MEMBER (bridge_control_r);
DECLARE_WRITE16_MEMBER(bridge_control_w);

2
src/devices/machine/phi.cpp
View File

@ -1037,7 +1037,7 @@ void phi_device::update_fsm(void)
m_int_write_func(m_int_line);
}
// TODO: update DMARQ
(void)m_dmarq_line; // TODO: update DMARQ
m_no_recursion = false;
}

35
src/devices/machine/ra17xx.cpp
View File

@ -11,6 +11,7 @@
There are two basic I/O instructions:
SES = Select Enable Status and SOS = Select Output Status
The lower 4 bits of the I/O address select one of 16 I/O lines.
Actually the lowest 6 bits are used, but bits 4 and 5 must be 0.
There are at most two A17XX per system, one for the lower
ROM and RAM portion and one for the higher.
@ -58,7 +59,8 @@ ra17xx_device::ra17xx_device(const machine_config &mconfig, const char *tag, dev
: device_t(mconfig, RA17XX, "Rockwell A17XX", tag, owner, clock, "ra17xx", __FILE__),
m_enable(false),
m_iord(*this),
m_iowr(*this)
m_iowr(*this),
m_cpu(*this, finder_base::DUMMY_TAG)
{
}
@ -97,26 +99,41 @@ void ra17xx_device::device_reset()
WRITE8_MEMBER( ra17xx_device::io_w )
{
assert(offset < 16);
m_bl = (data >> 4) & 15; // BL on the data bus most significant bits
if (offset & 1) {
m_bl = m_cpu->address_bus_r(space, 0) & 63;
if (offset & 1)
{
// SOS command
if (data & (1 << 3)) {
if (m_bl >= 16)
{
logerror("Attempt to write to nonexistent output %d\n");
}
else if (data & (1 << 3))
{
m_line[m_bl] = 1; // enable output
// if (m_enable)
m_iowr(m_bl, 1, 1);
} else {
}
else
{
m_line[m_bl] = 0; // disable output
// if (m_enable)
m_iowr(m_bl, 0, 1);
}
} else {
}
else
{
// SES command
if (data & (1 << 3)) {
if (data & (1 << 3))
{
// enable all outputs
m_enable = true;
for (int i = 0; i < 16; i++)
m_iowr(i, m_line[i], 1);
} else {
}
else
{
// disable all outputs
m_enable = false;
}
@ -127,5 +144,5 @@ WRITE8_MEMBER( ra17xx_device::io_w )
READ8_MEMBER( ra17xx_device::io_r )
{
assert(offset < 16);
return (m_iord(m_bl) & 1) ? 0x0f : 0x07;
return (m_bl >= 16 || (m_iord(m_bl) & 1)) ? 0x0f : 0x07;
}

8
src/devices/machine/ra17xx.h
View File

@ -16,6 +16,7 @@
#define __RA17XX_H__
#include "device.h"
#include "cpu/pps4/pps4.h"
/*************************************
*
@ -29,6 +30,10 @@
/* Set the write line handler */
#define MCFG_RA17XX_WRITE(_devcb) \
ra17xx_device::set_iowr(*device, DEVCB_##_devcb);
#define MCFG_RA17XX_CPU(_tag) \
ra17xx_device::set_cpu_tag(*device, "^" _tag);
class ra17xx_device : public device_t
{
public:
@ -40,6 +45,8 @@ public:
template<class _Object> static devcb_base &set_iord(device_t &device, _Object object) { return downcast<ra17xx_device &>(device).m_iord.set_callback(object); }
template<class _Object> static devcb_base &set_iowr(device_t &device, _Object object) { return downcast<ra17xx_device &>(device).m_iowr.set_callback(object); }
static void set_cpu_tag(device_t &device, const char *tag) { downcast<ra17xx_device &>(device).m_cpu.set_tag(tag); }
protected:
// device-level overrides
virtual void device_start() override;
@ -51,6 +58,7 @@ private:
bool m_enable; //!< true if outputs are enabled
devcb_read8 m_iord; //!< input line (read, offset = line, data = 0/1)
devcb_write8 m_iowr; //!< output line (write, offset = line, data = 0/1)
required_device<pps4_device> m_cpu;
};
extern const device_type RA17XX;

2
src/devices/machine/upd765.h
View File

@ -130,6 +130,8 @@ public:
void tc_w(bool val) override;
void ready_w(bool val);
DECLARE_WRITE_LINE_MEMBER(tc_line_w) { tc_w(state == ASSERT_LINE); }
void set_rate(int rate); // rate in bps, to be used when the fdc is externally frequency-controlled
void set_mode(int mode);

44
src/devices/machine/z80scc.cpp
View File

@ -75,22 +75,36 @@ DONE (x) (p=partly) NMOS CMOS ESCC EMSCC
//**************************************************************************
// MACROS / CONSTANTS
//**************************************************************************
/* Useful temporary debug printout format */
// printf("TAG %lld %s%s Data:%d\n", machine().firstcpu->total_cycles(), __PRETTY_FUNCTION__, m_owner->tag(), data);
#define VERBOSE 0
#define LOGPRINT(...) do { if (VERBOSE) logerror(__VA_ARGS__); } while (0)
#define LOG(...) {} LOGPRINT(__VA_ARGS__)
#define LOGR(...) {}
#define LOGSETUP(...) {} LOGPRINT(__VA_ARGS__)
#define LOGINT(...) {}
#define LOGCMD(...) {}
#define LOGTX(...) {}
#define LOGRCV(...) {}
#define LOGCTS(...) {}
#define LOGDCD(...) {}
#define LOGSYNC(...) {}
#if VERBOSE == 2
#define LOG_GENERAL 0x001
#define LOG_SETUP 0x002
#define LOG_PRINTF 0x004
#define LOG_READ 0x008
#define LOG_INT 0x010
#define LOG_CMD 0x020
#define LOG_TX 0x040
#define LOG_RCV 0x080
#define LOG_CTS 0x100
#define LOG_DCD 0x200
#define LOG_SYNC 0x400
#define VERBOSE 0 // (LOG_PRINTF | LOG_SETUP | LOG_GENERAL)
#define LOGMASK(mask, ...) do { if (VERBOSE & mask) logerror(__VA_ARGS__); } while (0)
#define LOGLEVEL(mask, level, ...) do { if ((VERBOSE & mask) >= level) logerror(__VA_ARGS__); } while (0)
#define LOG(...) LOGMASK(LOG_GENERAL, __VA_ARGS__)
#define LOGSETUP(...) LOGMASK(LOG_SETUP, __VA_ARGS__)
#define LOGR(...) LOGMASK(LOG_READ, __VA_ARGS__)
#define LOGINT(...) LOGMASK(LOG_INT, __VA_ARGS__)
#define LOGCMD(...) LOGMASK(LOG_CMD, __VA_ARGS__)
#define LOGTX(...) LOGMASK(LOG_TX, __VA_ARGS__)
#define LOGRCV(...) LOGMASK(LOG_RCV, __VA_ARGS__)
#define LOGCTS(...) LOGMASK(LOG_CTS, __VA_ARGS__)
#define LOGDCD(...) LOGMASK(LOG_DCD, __VA_ARGS__)
#define LOGSYNC(...) LOGMASK(LOG_SYNC, __VA_ARGS__)
#if VERBOSE & LOG_PRINTF
#define logerror printf
#endif

142
src/devices/sound/msm5205.cpp
View File

@ -28,6 +28,9 @@
Data is streamed from a CPU by means of a clock generated on the chip.
Holding the rate selector lines (S1 and S2) both high places the MSM5205 in an undocumented
mode which disables the sampling clock generator and makes VCK an input line.
A reset signal is set high or low to determine whether playback (and interrupts) are occurring.
MSM6585: is an upgraded MSM5205 voice synth IC.
@ -38,7 +41,7 @@
Differences between MSM6585 & MSM5205:
MSM6586 MSM5205
MSM6585 MSM5205
Master clock frequency 640kHz 384kHz
Sampling frequency 4k/8k/16k/32kHz 4k/6k/8kHz
ADPCM bit length 4-bit 3-bit/4-bit
@ -46,7 +49,7 @@
Low-pass filter -40dB/oct N/A
Overflow prevent circuit Included N/A
Timer callback at VCLK low edge on MSM5205 (at rising edge on MSM6585)
Data input follows VCK falling edge on MSM5205 (VCK rising edge on MSM6585)
TODO:
- lowpass filter for MSM6585
@ -57,39 +60,50 @@ const device_type MSM5205 = &device_creator<msm5205_device>;
const device_type MSM6585 = &device_creator<msm6585_device>;
msm5205_device::msm5205_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
msm5205_device::msm5205_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, MSM5205, "MSM5205", tag, owner, clock, "msm5205", __FILE__),
device_sound_interface(mconfig, *this),
m_prescaler(0),
m_bitwidth(0),
m_select(0),
m_s1(false),
m_s2(false),
m_bitwidth(4),
m_vclk_cb(*this)
{
}
msm5205_device::msm5205_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
msm5205_device::msm5205_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, u32 clock, const char *shortname, const char *source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
device_sound_interface(mconfig, *this),
m_prescaler(0),
m_bitwidth(0),
m_select(0),
m_s1(false),
m_s2(false),
m_bitwidth(4),
m_vclk_cb(*this)
{
}
msm6585_device::msm6585_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
msm6585_device::msm6585_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: msm5205_device(mconfig, MSM6585, "MSM6585", tag, owner, clock, "msm6585", __FILE__)
{
}
//-------------------------------------------------
// set_prescaler_selector - configuration helper
//-------------------------------------------------
void msm5205_device::set_prescaler_selector(device_t &device, int select)
{
msm5205_device &msm = downcast<msm5205_device &>(device);
msm.m_s1 = BIT(select, 1);
msm.m_s2 = BIT(select, 0);
msm.m_bitwidth = (select & 4) ? 4 : 3;
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void msm5205_device::device_start()
{
m_mod_clock = clock();
m_vclk_cb.resolve();
/* compute the difference tables */
@ -100,11 +114,11 @@ void msm5205_device::device_start()
m_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(msm5205_device::vclk_callback), this));
/* register for save states */
save_item(NAME(m_mod_clock));
save_item(NAME(m_data));
save_item(NAME(m_vclk));
save_item(NAME(m_reset));
save_item(NAME(m_prescaler));
save_item(NAME(m_s1));
save_item(NAME(m_s2));
save_item(NAME(m_bitwidth));
save_item(NAME(m_signal));
save_item(NAME(m_step));
@ -118,13 +132,10 @@ void msm5205_device::device_reset()
{
/* initialize work */
m_data = 0;
m_vclk = 0;
m_vclk = 0;
m_reset = 0;
m_signal = 0;
m_step = 0;
/* timer and bitwidth set */
playmode_w(m_select);
}
@ -170,17 +181,17 @@ void msm5205_device::compute_tables()
}
}
/* timer callback at VCLK low edge on MSM5205 (at rising edge on MSM6585) */
// timer callback at VCK low edge on MSM5205 (at rising edge on MSM6585)
TIMER_CALLBACK_MEMBER( msm5205_device::vclk_callback )
{
int val;
int new_signal;
/* callback user handler and latch next data */
// callback user handler and latch next data
if (!m_vclk_cb.isnull())
m_vclk_cb(1);
/* reset check at last hiedge of VCLK */
// reset check at last hiedge of VCK
if (m_reset)
{
new_signal = 0;
@ -213,19 +224,19 @@ TIMER_CALLBACK_MEMBER( msm5205_device::vclk_callback )
/*
* Handle an update of the vclk status of a chip (1 is reset ON, 0 is reset OFF)
* Handle an update of the VCK status of a chip (1 is reset ON, 0 is reset OFF)
* This function can use selector = MSM5205_SEX only
*/
void msm5205_device::vclk_w(int vclk)
WRITE_LINE_MEMBER(msm5205_device::vclk_w)
{
if (m_prescaler != 0)
logerror("error: msm5205_vclk_w() called with chip = '%s', but VCLK selected master mode\n", this->device().tag());
if (get_prescaler() != 0)
logerror("Error: vclk_w() called but VCK selected master mode\n");
else
{
if (m_vclk != vclk)
if (m_vclk != state)
{
m_vclk = vclk;
if (!vclk)
m_vclk = state;
if (!state)
vclk_callback(this, 0);
}
}
@ -235,9 +246,9 @@ void msm5205_device::vclk_w(int vclk)
* Handle an update of the reset status of a chip (1 is reset ON, 0 is reset OFF)
*/
void msm5205_device::reset_w(int reset)
WRITE_LINE_MEMBER(msm5205_device::reset_w)
{
m_reset = reset;
m_reset = state;
}
/*
@ -257,34 +268,36 @@ WRITE8_MEMBER(msm5205_device::data_w)
data_w(data);
}
int msm5205_device::get_prescaler() const
{
if (m_s1)
return m_s2 ? 0 : 64;
else
return m_s2 ? 48 : 96;
}
int msm6585_device::get_prescaler() const
{
return (m_s1 ? 20 : 40) * (m_s2 ? 1 : 4);
}
/*
* Handle a change of the selector
*/
void msm5205_device::playmode_w(int select)
{
static const int prescaler_table[2][4] =
{
{ 96, 48, 64, 0},
{160, 40, 80, 20}
};
int prescaler = prescaler_table[select >> 3 & 1][select & 3];
int bitwidth = (select & 4) ? 4 : 3;
if (m_prescaler != prescaler)
if ((select & 3) != ((m_s1 << 1) | m_s2))
{
m_stream->update();
m_prescaler = prescaler;
m_s1 = BIT(select, 1);
m_s2 = BIT(select, 0);
/* timer set */
if (prescaler)
{
attotime period = attotime::from_hz(m_mod_clock) * prescaler;
m_timer->adjust(period, 0, period);
}
else
m_timer->adjust(attotime::never);
notify_clock_changed();
}
if (m_bitwidth != bitwidth)
@ -294,15 +307,42 @@ void msm5205_device::playmode_w(int select)
}
}
void msm5205_device::change_clock_w(int32_t clock)
WRITE_LINE_MEMBER(msm5205_device::s1_w)
{
attotime period;
if (m_s1 != bool(state))
{
m_stream->update();
m_s1 = state;
notify_clock_changed();
}
}
m_mod_clock = clock;
WRITE_LINE_MEMBER(msm5205_device::s2_w)
{
if (m_s2 != bool(state))
{
m_stream->update();
m_s2 = state;
notify_clock_changed();
}
}
period = attotime::from_hz(m_mod_clock) * m_prescaler;
m_timer->adjust(period, 0, period);
//-------------------------------------------------
// device_clock_changed - called when the
// device clock is altered in any way
//-------------------------------------------------
void msm5205_device::device_clock_changed()
{
int prescaler = get_prescaler();
if (prescaler != 0)
{
attotime period = attotime::from_hz(clock()) * prescaler;
m_timer->adjust(period, 0, period);
}
else
m_timer->adjust(attotime::never);
}

42
src/devices/sound/msm5205.h
View File

@ -43,15 +43,15 @@ class msm5205_device : public device_t,
public device_sound_interface
{
public:
msm5205_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
msm5205_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
msm5205_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
msm5205_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, u32 clock, const char *shortname, const char *source);
~msm5205_device() {}
static void set_prescaler_selector(device_t &device, int select) { downcast<msm5205_device &>(device).m_select = select; }
static void set_prescaler_selector(device_t &device, int select);
template<class _Object> static devcb_base &set_vclk_callback(device_t &device, _Object object) { return downcast<msm5205_device &>(device).m_vclk_cb.set_callback(object); }
// reset signal should keep for 2cycle of VCLK
void reset_w(int reset);
DECLARE_WRITE_LINE_MEMBER(reset_w);
// adpcmata is latched after vclk_interrupt callback
void data_w(int data);
@ -60,17 +60,18 @@ public:
// VCLK slave mode option
// if VCLK and reset or data is changed at the same time,
// call vclk_w after data_w and reset_w.
void vclk_w(int vclk);
DECLARE_WRITE_LINE_MEMBER(vclk_w);
// option , selected pin selector
void playmode_w(int select);
void change_clock_w(int32_t clock);
DECLARE_WRITE_LINE_MEMBER(s1_w);
DECLARE_WRITE_LINE_MEMBER(s2_w);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_clock_changed() override;
TIMER_CALLBACK_MEMBER(vclk_callback);
@ -78,20 +79,20 @@ protected:
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override;
void compute_tables();
virtual int get_prescaler() const;
// internal state
sound_stream * m_stream; /* number of stream system */
int32_t m_mod_clock; /* clock rate */
emu_timer *m_timer; /* VCLK callback timer */
int32_t m_data; /* next adpcm data */
int32_t m_vclk; /* vclk signal (external mode) */
int32_t m_reset; /* reset pin signal */
int32_t m_prescaler; /* prescaler selector S1 and S2 */
int32_t m_bitwidth; /* bit width selector -3B/4B */
int32_t m_signal; /* current ADPCM signal */
int32_t m_step; /* current ADPCM step */
sound_stream * m_stream; // number of stream system
emu_timer *m_timer; // VCK callback timer
u8 m_data; // next adpcm data
bool m_vclk; // VCK signal (external mode)
bool m_reset; // reset pin signal
bool m_s1; // prescaler selector S1
bool m_s2; // prescaler selector S2
u8 m_bitwidth; // bit width selector -3B/4B
s32 m_signal; // current ADPCM signal
s32 m_step; // current ADPCM step
int m_diff_lookup[49*16];
int m_select;
devcb_write_line m_vclk_cb;
};
@ -100,7 +101,10 @@ extern const device_type MSM5205;
class msm6585_device : public msm5205_device
{
public:
msm6585_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
msm6585_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
virtual int get_prescaler() const override;
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override;

47
src/emu/diimage.cpp
View File

@ -1153,13 +1153,31 @@ image_init_result device_image_interface::load_software(const std::string &softw
bool device_image_interface::open_image_file(emu_options &options)
{
const char* path = options.value(instance_name());
if (*path != 0)
if (*path != 0 && m_software_part_ptr == nullptr)
{
set_init_phase();
if (load_internal(path, false, 0, nullptr, true) == image_init_result::PASS)
{
if (software_entry()==nullptr) return true;
}
else
m_software_part_ptr = find_software_item(path, true);
// if we're loading from a software list, check requirements
if (m_software_part_ptr != nullptr)
{
const char *requirement = m_software_part_ptr->feature("requirement");
if (requirement != nullptr)
{
const software_part *req_swpart = find_software_item(requirement, false);
if (req_swpart != nullptr)
{
device_image_interface *req_image = software_list_device::find_mountable_image(device().mconfig(), *req_swpart);
if (req_image != nullptr)
req_image->m_software_part_ptr = req_swpart;
}
}
}
}
return false;
}
@ -1429,7 +1447,7 @@ bool device_image_interface::load_software_part(const std::string &identifier, c
#ifdef UNUSED_VARIABLE
// Tell the world which part we actually loaded
std::string full_sw_name = string_format("%s:%s:%s", swlist.list_name(), swpart->info().shortname(), swpart->name());
std::string full_sw_name = string_format("%s:%s:%s", swlist->list_name(), swpart->info().shortname(), swpart->name());
#endif
// check compatibility
@ -1458,7 +1476,8 @@ bool device_image_interface::load_software_part(const std::string &identifier, c
if (req_image != nullptr)
{
req_image->set_init_phase();
req_image->load(requirement);
if (req_image->load_software(requirement) != image_init_result::PASS)
result = false;
}
}
}
@ -1473,20 +1492,18 @@ bool device_image_interface::load_software_part(const std::string &identifier, c
std::string device_image_interface::software_get_default_slot(const char *default_card_slot) const
{
const char *path = device().mconfig().options().value(instance_name());
std::string result;
if (*path != '\0')
if (m_software_part_ptr != nullptr)
{
result.assign(default_card_slot);
const software_part *swpart = find_software_item(path, true);
if (swpart != nullptr)
{
const char *slot = swpart->feature("slot");
if (slot != nullptr)
result.assign(slot);
}
// use slot value if available
const char *slot = m_software_part_ptr->feature("slot");
return (slot != nullptr) ? slot : default_card_slot;
}
return result;
// necessary for image file creation???
if (*device().mconfig().options().value(instance_name()) != '\0')
return default_card_slot;
return std::string();
}
//----------------------------------------------------------------------------

2
src/emu/softlist_dev.cpp
View File

@ -377,7 +377,7 @@ device_image_interface *software_list_device::find_mountable_image(const machine
{
// mount only if not already mounted
const char *option = mconfig.options().value(image.brief_instance_name());
if (*option == '\0' && !image.filename())
if (*option == '\0' && !image.filename() && image.part_entry() == nullptr)
return &image;
}
}

4
src/frontend/mame/mameopts.cpp
View File

@ -83,6 +83,10 @@ void mame_options::update_slot_options(emu_options &options, const software_part
return;
machine_config config(*cursystem, options);
// preopen all images (this allows slots to be assigned for all required software)
for (device_image_interface &image : image_interface_iterator(config.root_device()))
image.open_image_file(options);
// iterate through all slot devices
for (device_slot_interface &slot : slot_interface_iterator(config.root_device()))
{

11
src/lib/formats/imd_dsk.cpp
View File

@ -492,10 +492,13 @@ bool imd_format::load(io_generic *io, uint32_t form_factor, floppy_image *image)
}
}
if(fm)
build_pc_track_fm(track, head, image, cell_count, sector_count, sects, gap_3);
else
build_pc_track_mfm(track, head, image, cell_count, sector_count, sects, gap_3);
if(sector_count) {
if(fm) {
build_pc_track_fm(track, head, image, cell_count, sector_count, sects, gap_3);
} else {
build_pc_track_mfm(track, head, image, cell_count, sector_count, sects, gap_3);
}
}
for(int i=0; i<sector_count; i++)
if(sects[i].data && (sects[i].data < &img[0] || sects[i].data >= (&img[0] + size)))

7
src/lib/formats/pc_dsk.cpp
View File

@ -168,6 +168,11 @@ int pc_format::identify(io_generic *io, uint32_t form_factor)
file_header_skip_bytes = 0x200;
}
/* some 1.44MB images have a 1024-byte footer */
if (size == 1474560 + 0x400) {
file_footer_skip_bytes = 0x400;
}
return upd765_format::identify(io, form_factor);
}
@ -190,7 +195,7 @@ const pc_format::format pc_format::formats[] = {
},
{ /* 400K 5 1/4 inch double density - gaps unverified */
floppy_image::FF_525, floppy_image::DSDD, floppy_image::MFM,
2000, 10, 40, 2, 512, {}, 1, {}, 80, 50, 22, 80
2000, 10, 40, 2, 512, {}, 1, {}, 80, 50, 22, 36
},
{ /* 720K 5 1/4 inch quad density - gaps unverified */
floppy_image::FF_525, floppy_image::DSQD, floppy_image::MFM,

4
src/lib/formats/td0_dsk.cpp
View File

@ -889,7 +889,9 @@ bool td0_format::load(io_generic *io, uint32_t form_factor, floppy_image *image)
else
return false; // single side 3.5?
break;
}
} else
image->set_variant(floppy_image::SSDD);
break;
/* no break */
case 3:
if(head_count == 2)

4
src/lib/formats/upd765_dsk.cpp
View File

@ -11,7 +11,7 @@
#include "emu.h" // emu_fatalerror
#include "formats/upd765_dsk.h"
upd765_format::upd765_format(const format *_formats) : file_header_skip_bytes(0)
upd765_format::upd765_format(const format *_formats) : file_header_skip_bytes(0), file_footer_skip_bytes(0)
{
formats = _formats;
}
@ -24,7 +24,7 @@ int upd765_format::find_size(io_generic *io, uint32_t form_factor) const
if(form_factor != floppy_image::FF_UNKNOWN && form_factor != f.form_factor)
continue;
if(size == file_header_skip_bytes + (uint64_t) compute_track_size(f) * f.track_count * f.head_count)
if(size == file_header_skip_bytes + (uint64_t) compute_track_size(f) * f.track_count * f.head_count + file_footer_skip_bytes)
return i;
}
return -1;

1
src/lib/formats/upd765_dsk.h
View File

@ -45,6 +45,7 @@ public:
protected:
uint64_t file_header_skip_bytes;
uint64_t file_footer_skip_bytes;
floppy_image_format_t::desc_e* get_desc_fm(const format &f, int &current_size, int &end_gap_index);
floppy_image_format_t::desc_e* get_desc_mfm(const format &f, int &current_size, int &end_gap_index);

9
src/lib/netlist/analog/nld_bjt.cpp
View File

@ -165,9 +165,12 @@ NETLIB_UPDATE_TERMINALS(QBJT_EB)
const nl_double Ie = (sIe + gee * m_gD_BE.Vd() - gec * m_gD_BC.Vd()) * polarity;
const nl_double Ic = (sIc - gce * m_gD_BE.Vd() + gcc * m_gD_BC.Vd()) * polarity;
m_D_EB.set_mat(gee, gec - gee, gce - gee, gee - gec, Ie, -Ie);
m_D_CB.set_mat(gcc, gce - gcc, gec - gcc, gcc - gce, Ic, -Ic);
m_D_EC.set_mat( 0, -gec, -gce, 0, 0, 0);
m_D_EB.set_mat( gee, gec - gee, -Ie,
gce - gee, gee - gec, Ie);
m_D_CB.set_mat( gcc, gce - gcc, -Ic,
gec - gcc, gcc - gce, Ic);
m_D_EC.set_mat( 0, -gec, 0,
-gce, 0, 0);
}

2
src/lib/netlist/analog/nld_opamps.cpp
View File

@ -74,8 +74,6 @@ NETLIB_RESET(OPAMP)
m_EBUF->m_G.setTo(1.0);
m_EBUF->m_RO.setTo(m_model.model_value("RO"));
m_DP->m_model.setTo("D(IS=1e-15 N=1)");
m_DN->m_model.setTo("D(IS=1e-15 N=1)");
double CP = m_model.model_value("DAB") / m_model.model_value("SLEW");
double RP = 0.5 / 3.1459 / CP / m_model.model_value("FPF");

3
src/lib/netlist/analog/nld_opamps.h
View File

@ -63,6 +63,9 @@ NETLIB_OBJECT(OPAMP)
register_sub("DN", m_DN);
register_sub("DP", m_DP);
m_DP->m_model.setTo("D(IS=1e-15 N=1)");
m_DN->m_model.setTo("D(IS=1e-15 N=1)");
register_subalias("PLUS", "G1.IP");
register_subalias("MINUS", "G1.IN");
register_subalias("OUT", "EBUF.OP");

72
src/lib/netlist/analog/nld_twoterm.cpp
View File

@ -119,25 +119,38 @@ NETLIB_UPDATE(R_base)
NETLIB_UPDATE_PARAM(R)
{
update_dev();
if (m_R() > 1e-9)
set_R(m_R());
else
set_R(1e-9);
set_R(std::max(m_R(), netlist().gmin()));
}
NETLIB_RESET(R)
{
NETLIB_NAME(twoterm)::reset();
set_R(std::max(m_R(), netlist().gmin()));
}
// ----------------------------------------------------------------------------------------
// nld_POT
// ----------------------------------------------------------------------------------------
NETLIB_UPDATE_PARAM(POT)
NETLIB_RESET(POT)
{
nl_double v = m_Dial();
if (m_DialIsLog())
v = (std::exp(v) - 1.0) / (std::exp(1.0) - 1.0);
m_R1.set_R(std::max(m_R() * v, netlist().gmin()));
m_R2.set_R(std::max(m_R() * (NL_FCONST(1.0) - v), netlist().gmin()));
}
NETLIB_UPDATE_PARAM(POT)
{
m_R1.update_dev();
m_R2.update_dev();
nl_double v = m_Dial();
if (m_DialIsLog())
v = (std::exp(v) - 1.0) / (std::exp(1.0) - 1.0);
m_R1.set_R(std::max(m_R() * v, netlist().gmin()));
m_R2.set_R(std::max(m_R() * (NL_FCONST(1.0) - v), netlist().gmin()));
@ -147,7 +160,7 @@ NETLIB_UPDATE_PARAM(POT)
// nld_POT2
// ----------------------------------------------------------------------------------------
NETLIB_UPDATE_PARAM(POT2)
NETLIB_RESET(POT2)
{
nl_double v = m_Dial();
@ -155,9 +168,20 @@ NETLIB_UPDATE_PARAM(POT2)
v = (std::exp(v) - 1.0) / (std::exp(1.0) - 1.0);
if (m_Reverse())
v = 1.0 - v;
m_R1.set_R(std::max(m_R() * v, netlist().gmin()));
}
NETLIB_UPDATE_PARAM(POT2)
{
m_R1.update_dev();
nl_double v = m_Dial();
if (m_DialIsLog())
v = (std::exp(v) - 1.0) / (std::exp(1.0) - 1.0);
if (m_Reverse())
v = 1.0 - v;
m_R1.set_R(std::max(m_R() * v, netlist().gmin()));
}
@ -187,7 +211,9 @@ NETLIB_TIMESTEP(C)
/* Gpar should support convergence */
const nl_double G = m_C() / step + m_GParallel;
const nl_double I = -G * deltaV();
set(G, 0.0, I);
set_mat( G, -G, -I,
-G, G, I);
//set(G, 0.0, I);
}
// ----------------------------------------------------------------------------------------
@ -196,13 +222,16 @@ NETLIB_TIMESTEP(C)
NETLIB_RESET(L)
{
set(netlist().gmin(), 0.0, 5.0 / netlist().gmin());
m_GParallel = netlist().gmin();
m_I = 0.0;
m_G = m_GParallel;
set_mat( m_G, -m_G, -m_I,
-m_G, m_G, m_I);
//set(1.0/NETLIST_GMIN, 0.0, -5.0 * NETLIST_GMIN);
}
NETLIB_UPDATE_PARAM(L)
{
m_GParallel = netlist().gmin();
}
NETLIB_UPDATE(L)
@ -215,13 +244,24 @@ NETLIB_TIMESTEP(L)
/* Gpar should support convergence */
m_I += m_I + m_G * deltaV();
m_G = step / m_L() + m_GParallel;
set(m_G, 0.0, m_I);
set_mat( m_G, -m_G, -m_I,
-m_G, m_G, m_I);
//set(m_G, 0.0, m_I);
}
// ----------------------------------------------------------------------------------------
// nld_D
// ----------------------------------------------------------------------------------------
NETLIB_RESET(D)
{
nl_double Is = m_model.model_value("IS");
nl_double n = m_model.model_value("N");
m_D.set_param(Is, n, netlist().gmin());
set(m_D.G(), 0.0, m_D.Ieq());
}
NETLIB_UPDATE_PARAM(D)
{
nl_double Is = m_model.model_value("IS");
@ -238,7 +278,11 @@ NETLIB_UPDATE(D)
NETLIB_UPDATE_TERMINALS(D)
{
m_D.update_diode(deltaV());
set(m_D.G(), 0.0, m_D.Ieq());
const nl_double G = m_D.G();
const nl_double I = m_D.Ieq();
set_mat( G, -G, -I,
-G, G, I);
//set(m_D.G(), 0.0, m_D.Ieq());
}
// ----------------------------------------------------------------------------------------
@ -263,7 +307,11 @@ NETLIB_UPDATE(VS)
NETLIB_RESET(CS)
{
NETLIB_NAME(twoterm)::reset();
this->set(0.0, 0.0, m_I());
const nl_double I = m_I();
set_mat(0.0, 0.0, -I,
0.0, 0.0, I);
//this->set(0.0, 0.0, m_I());
}
NETLIB_UPDATE(CS)

21
src/lib/netlist/analog/nld_twoterm.h
View File

@ -137,13 +137,12 @@ public:
return m_P.net().Q_Analog() - m_N.net().Q_Analog();
}
void set_mat(const nl_double a11, const nl_double a12,
const nl_double a21, const nl_double a22,
const nl_double r1, const nl_double r2)
void set_mat(const nl_double a11, const nl_double a12, const nl_double r1,
const nl_double a21, const nl_double a22, const nl_double r2)
{
/* GO, GT, I */
m_P.set(-a12, a11, -r1);
m_N.set(-a21, a22, -r2);
m_P.set(-a12, a11, r1);
m_N.set(-a21, a22, r2);
}
private:
@ -169,7 +168,9 @@ NETLIB_OBJECT_DERIVED(R_base, twoterm)
public:
inline void set_R(const nl_double R)
{
set(NL_FCONST(1.0) / R, 0.0, 0.0);
const nl_double G = NL_FCONST(1.0) / R;
set_mat( G, -G, 0.0,
-G, G, 0.0);
}
protected:
@ -189,7 +190,7 @@ NETLIB_OBJECT_DERIVED(R, R_base)
protected:
//NETLIB_RESETI() { }
NETLIB_RESETI();
//NETLIB_UPDATEI() { }
NETLIB_UPDATE_PARAMI();
};
@ -216,7 +217,7 @@ NETLIB_OBJECT(POT)
}
//NETLIB_UPDATEI();
//NETLIB_RESETI();
NETLIB_RESETI();
NETLIB_UPDATE_PARAMI();
private:
@ -243,7 +244,7 @@ NETLIB_OBJECT(POT2)
}
//NETLIB_UPDATEI();
//NETLIB_RESETI();
NETLIB_RESETI();
NETLIB_UPDATE_PARAMI();
private:
@ -375,7 +376,7 @@ public:
param_model_t m_model;
protected:
//NETLIB_RESETI();
NETLIB_RESETI();
NETLIB_UPDATEI();
NETLIB_UPDATE_PARAMI();

3
src/lib/netlist/build/makefile
View File

@ -115,6 +115,7 @@ NLOBJS := \
$(NLOBJ)/devices/nlid_proxy.o \
$(NLOBJ)/devices/nld_system.o \
$(NLOBJ)/devices/nld_truthtable.o \
$(NLOBJ)/macro/nlm_base.o \
$(NLOBJ)/macro/nlm_cd4xxx.o \
$(NLOBJ)/macro/nlm_opamp.o \
$(NLOBJ)/macro/nlm_other.o \
@ -168,7 +169,7 @@ maketree: $(sort $(OBJDIRS))
.PHONY: clang mingw doc
clang:
$(MAKE) CC=clang++ LD=clang++ CEXTRAFLAGS="-Weverything -Werror -Wno-padded -Wno-weak-vtables -Wno-missing-variable-declarations -Wconversion -Wno-c++98-compat -Wno-float-equal -Wno-global-constructors -Wno-c++98-compat-pedantic -Wno-format-nonliteral -Wno-weak-template-vtables -Wno-exit-time-destructors"
$(MAKE) CC=clang++ LD=clang++ CEXTRAFLAGS="-march=native -Weverything -Werror -Wno-padded -Wno-weak-vtables -Wno-missing-variable-declarations -Wconversion -Wno-c++98-compat -Wno-float-equal -Wno-global-constructors -Wno-c++98-compat-pedantic -Wno-format-nonliteral -Wno-weak-template-vtables -Wno-exit-time-destructors"
#
# Mostly done: -Wno-weak-vtables -Wno-cast-align

46
src/lib/netlist/devices/net_lib.cpp
View File

@ -13,52 +13,6 @@
#include "nl_factory.h"
#include "solver/nld_solver.h"
NETLIST_START(diode_models)
NET_MODEL("D _(IS=1e-15 N=1)")
NET_MODEL("1N914 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)")
NET_MODEL("1N4001 D(Is=14.11n N=1.984 Rs=33.89m Ikf=94.81 Xti=3 Eg=1.11 Cjo=25.89p M=.44 Vj=.3245 Fc=.5 Bv=75 Ibv=10u Tt=5.7u Iave=1 Vpk=50 mfg=GI type=silicon)")
NET_MODEL("1N4148 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)")
NET_MODEL("1S1588 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75)")
NET_MODEL("LedRed D(IS=93.2p RS=42M N=3.73 BV=4 IBV=10U CJO=2.97P VJ=.75 M=.333 TT=4.32U Iave=40m Vpk=4 type=LED)")
NET_MODEL("LedGreen D(IS=93.2p RS=42M N=4.61 BV=4 IBV=10U CJO=2.97P VJ=.75 M=.333 TT=4.32U Iave=40m Vpk=4 type=LED)")
NET_MODEL("LedBlue D(IS=93.2p RS=42M N=7.47 BV=5 IBV=10U CJO=2.97P VJ=.75 M=.333 TT=4.32U Iave=40m Vpk=5 type=LED)")
NET_MODEL("LedWhite D(Is=0.27n Rs=5.65 N=6.79 Cjo=42p Iave=30m Vpk=5 type=LED)")
NETLIST_END()
NETLIST_START(bjt_models)
NET_MODEL("NPN _(IS=1e-15 BF=100 NF=1 BR=1 NR=1)")
NET_MODEL("PNP _(IS=1e-15 BF=100 NF=1 BR=1 NR=1)")
NET_MODEL("2SA1015 PNP(Is=295.1E-18 Xti=3 Eg=1.11 Vaf=100 Bf=110 Xtb=1.5 Br=10.45 Rc=15 Cjc=66.2p Mjc=1.054 Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n Tf=1.661n VCEO=45V ICrating=150M MFG=Toshiba)")
NET_MODEL("2SC1815 NPN(Is=2.04f Xti=3 Eg=1.11 Vaf=6 Bf=400 Ikf=20m Xtb=1.5 Br=3.377 Rc=1 Cjc=1p Mjc=.3333 Vjc=.75 Fc=.5 Cje=25p Mje=.3333 Vje=.75 Tr=450n Tf=20n Itf=0 Vtf=0 Xtf=0 VCEO=45V ICrating=150M MFG=Toshiba)")
NET_MODEL("2N3565 NPN(IS=5.911E-15 ISE=5.911E-15 ISC=0 XTI=3 BF=697.1 BR=1.297 IKF=0.01393 IKR=0 XTB=1.5 VAF=62.37 VAR=21.5 VJE=0.65 VJC=0.65 RE=0.15 RC=1.61 RB=10 CJE=4.973E-12 CJC=4.017E-12 XCJC=0.75 FC=0.5 NF=1 NR=1 NE=1.342 NC=2 MJE=0.4146 MJC=0.3174 TF=820.4E-12 TR=4.687E-9 ITF=0.35 VTF=4 XTF=7 EG=1.11 KF=1E-9 AF=1 VCEO=25 ICRATING=500m MFG=NSC)")
NET_MODEL("2N3643 NPN(IS=14.34E-15 ISE=14.34E-15 ISC=0 XTI=3 BF=255.9 BR=6.092 IKF=0.2847 IKR=0 XTB=1.5 VAF=74.03 VAR=28 VJE=0.65 VJC=0.65 RE=0.1 RC=1 RB=10 CJE=22.01E-12 CJC=7.306E-12 XCJC=0.75 FC=0.5 NF=1 NR=1 NE=1.307 NC=2 MJE=0.377 MJC=0.3416 TF=411.1E-12 TR=46.91E-9 ITF=0.6 VTF=1.7 XTF=3 EG=1.11 KF=0 AF=1 VCEO=30 ICRATING=500m MFG=NSC)")
NET_MODEL("2N3645 PNP(IS=650.6E-18 ISE=54.81E-15 ISC=0 XTI=3 BF=231.7 BR=3.563 IKF=1.079 IKR=0 XTB=1.5 VAF=115.7 VAR=35 VJE=0.65 VJC=0.65 RE=0.15 RC=0.715 RB=10 CJE=19.82E-12 CJC=14.76E-12 XCJC=0.75 FC=0.5 NF=1 NR=1 NE=1.829 NC=2 MJE=0.3357 MJC=0.5383 TF=603.7E-12 TR=111.3E-9 ITF=0.65 VTF=5 XTF=1.7 EG=1.11 KF=0 AF=1 VCEO=60 ICRATING=500m MFG=NSC)")
// 3644 = 3645 Difference between 3644 and 3645 is voltage rating. 3644: VCBO=45, 3645: VCBO=60
NET_MODEL("2N3644 PNP(IS=650.6E-18 ISE=54.81E-15 ISC=0 XTI=3 BF=231.7 BR=3.563 IKF=1.079 IKR=0 XTB=1.5 VAF=115.7 VAR=35 VJE=0.65 VJC=0.65 RE=0.15 RC=0.715 RB=10 CJE=19.82E-12 CJC=14.76E-12 XCJC=0.75 FC=0.5 NF=1 NR=1 NE=1.829 NC=2 MJE=0.3357 MJC=0.5383 TF=603.7E-12 TR=111.3E-9 ITF=0.65 VTF=5 XTF=1.7 EG=1.11 KF=0 AF=1 VCEO=60 ICRATING=500m MFG=NSC)")
// 2N5190 = BC817-25
NET_MODEL("2N5190 NPN(IS=9.198E-14 NF=1.003 ISE=4.468E-16 NE=1.65 BF=338.8 IKF=0.4913 VAF=107.9 NR=1.002 ISC=5.109E-15 NC=1.071 BR=29.48 IKR=0.193 VAR=25 RB=1 IRB=1000 RBM=1 RE=0.2126 RC=0.143 XTB=0 EG=1.11 XTI=3 CJE=3.825E-11 VJE=0.7004 MJE=0.364 TF=5.229E-10 XTF=219.7 VTF=3.502 ITF=7.257 PTF=0 CJC=1.27E-11 VJC=0.4431 MJC=0.3983 XCJC=0.4555 TR=7E-11 CJS=0 VJS=0.75 MJS=0.333 FC=0.905 Vceo=45 Icrating=500m mfg=Philips)")
NET_MODEL("2SC945 NPN(IS=3.577E-14 BF=2.382E+02 NF=1.01 VAF=1.206E+02 IKF=3.332E-01 ISE=3.038E-16 NE=1.205 BR=1.289E+01 NR=1.015 VAR=1.533E+01 IKR=2.037E-01 ISC=3.972E-14 NC=1.115 RB=3.680E+01 IRB=1.004E-04 RBM=1 RE=8.338E-01 RC=1.557E+00 CJE=1.877E-11 VJE=7.211E-01 MJE=3.486E-01 TF=4.149E-10 XTF=1.000E+02 VTF=9.956 ITF=5.118E-01 PTF=0 CJC=6.876p VJC=3.645E-01 MJC=3.074E-01 TR=5.145E-08 XTB=1.5 EG=1.11 XTI=3 FC=0.5 Vceo=50 Icrating=100m MFG=NEC)")
NET_MODEL("BC237B NPN(IS=1.8E-14 ISE=5.0E-14 ISC=1.72E-13 XTI=3 BF=400 BR=35.5 IKF=0.14 IKR=0.03 XTB=1.5 VAF=80 VAR=12.5 VJE=0.58 VJC=0.54 RE=0.6 RC=0.25 RB=0.56 CJE=13E-12 CJC=4E-12 XCJC=0.75 FC=0.5 NF=0.9955 NR=1.005 NE=1.46 NC=1.27 MJE=0.33 MJC=0.33 TF=0.64E-9 TR=50.72E-9 EG=1.11 KF=0 AF=1 VCEO=45 ICRATING=100M MFG=ZETEX)")
NET_MODEL("BC556B PNP(IS=3.83E-14 NF=1.008 ISE=1.22E-14 NE=1.528 BF=344.4 IKF=0.08039 VAF=21.11 NR=1.005 ISC=2.85E-13 NC=1.28 BR=14.84 IKR=0.047 VAR=32.02 RB=1 IRB=1.00E-06 RBM=1 RE=0.6202 RC=0.5713 XTB=0 EG=1.11 XTI=3 CJE=1.23E-11 VJE=0.6106 MJE=0.378 TF=5.60E-10 XTF=3.414 VTF=5.23 ITF=0.1483 PTF=0 CJC=1.08E-11 VJC=0.1022 MJC=0.3563 XCJC=0.6288 TR=1.00E-32 CJS=0 VJS=0.75 MJS=0.333 FC=0.8027 Vceo=65 Icrating=100m mfg=Philips)")
NET_MODEL("BC548C NPN(IS=1.95E-14 ISE=1.31E-15 ISC=1.0E-13 XTI=3 BF=466 BR=2.42 IKF=0.18 IKR=1 XTB=1.5 VAF=91.7 VAR=24.7 VJE=0.632 VJC=0.339 RE=1 RC=1.73 RB=26.5 RBM=10 IRB=10 CJE=1.33E-11 CJC=5.17E-12 XCJC=1 FC=0.9 NF=0.993 NR=1.2 NE=1.32 NC=2.00 MJE=0.326 MJC=0.319 TF=6.52E-10 TR=0 PTF=0 ITF=1.03 VTF=1.65 XTF=100 EG=1.11 KF=1E-9 AF=1 VCEO=40 ICrating=800M MFG=Siemens)")
NET_MODEL("BC817-25 NPN(IS=9.198E-14 NF=1.003 ISE=4.468E-16 NE=1.65 BF=338.8 IKF=0.4913 VAF=107.9 NR=1.002 ISC=5.109E-15 NC=1.071 BR=29.48 IKR=0.193 VAR=25 RB=1 IRB=1000 RBM=1 RE=0.2126 RC=0.143 XTB=0 EG=1.11 XTI=3 CJE=3.825E-11 VJE=0.7004 MJE=0.364 TF=5.229E-10 XTF=219.7 VTF=3.502 ITF=7.257 PTF=0 CJC=1.27E-11 VJC=0.4431 MJC=0.3983 XCJC=0.4555 TR=7E-11 CJS=0 VJS=0.75 MJS=0.333 FC=0.905 Vceo=45 Icrating=500m mfg=Philips)")
NETLIST_END()
NETLIST_START(family_models)
NET_MODEL("FAMILY _(TYPE=CUSTOM FV=5 IVL=0.16 IVH=0.4 OVL=0.1 OVH=1.0 ORL=1.0 ORH=130.0)")
NET_MODEL("OPAMP _()")
NET_MODEL("74XXOC FAMILY(FV=5 IVL=0.16 IVH=0.4 OVL=0.1 OVH=0.05 ORL=10.0 ORH=1.0e8)")
NET_MODEL("74XX FAMILY(TYPE=TTL)")
NET_MODEL("CD4XXX FAMILY(TYPE=CD4XXX)")
NETLIST_END()
#define xstr(s) # s
#define ENTRY1(nic, name, defparam) factory.register_device<nic>( # name, xstr(nic), defparam );
#define ENTRY(nic, name, defparam) ENTRY1(NETLIB_NAME(nic), name, defparam)

4
src/lib/netlist/devices/net_lib.h
View File

@ -76,10 +76,6 @@
#include "nld_legacy.h"
NETLIST_EXTERNAL(diode_models)
NETLIST_EXTERNAL(bjt_models)
NETLIST_EXTERNAL(family_models)
namespace netlist {
void initialize_factory(factory::list_t &factory);
}

4
src/lib/netlist/devices/nld_am2847.cpp
View File

@ -110,11 +110,11 @@ namespace netlist
inline NETLIB_FUNC_VOID(Am2847_shifter, shift, (void))
{
unsigned out = m_buffer[0] & 1;
uint32_t out = m_buffer[0] & 1;
uint32_t in = (m_RC() ? out : m_IN());
for (std::size_t i=0; i < 5; i++)
{
uint16_t shift_in = (i == 4) ? in : m_buffer[i + 1];
uint32_t shift_in = (i == 4) ? in : m_buffer[i + 1];
m_buffer[i] >>= 1;
m_buffer[i] |= shift_in << 15;
}

91
src/lib/netlist/macro/nlm_base.cpp Normal file
View File

@ -0,0 +1,91 @@
// license:GPL-2.0+
// copyright-holders:Couriersud
#include "nl_setup.h"
#include "devices/net_lib.h"
#include "nlm_base.h"
/* ----------------------------------------------------------------------------
* Diode Models
* ---------------------------------------------------------------------------*/
static NETLIST_START(diode_models)
NET_MODEL("D _(IS=1e-15 N=1)")
NET_MODEL("1N914 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)")
NET_MODEL("1N4001 D(Is=14.11n N=1.984 Rs=33.89m Ikf=94.81 Xti=3 Eg=1.11 Cjo=25.89p M=.44 Vj=.3245 Fc=.5 Bv=75 Ibv=10u Tt=5.7u Iave=1 Vpk=50 mfg=GI type=silicon)")
NET_MODEL("1N4148 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)")
NET_MODEL("1S1588 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75)")
NET_MODEL("LedRed D(IS=93.2p RS=42M N=3.73 BV=4 IBV=10U CJO=2.97P VJ=.75 M=.333 TT=4.32U Iave=40m Vpk=4 type=LED)")
NET_MODEL("LedGreen D(IS=93.2p RS=42M N=4.61 BV=4 IBV=10U CJO=2.97P VJ=.75 M=.333 TT=4.32U Iave=40m Vpk=4 type=LED)")
NET_MODEL("LedBlue D(IS=93.2p RS=42M N=7.47 BV=5 IBV=10U CJO=2.97P VJ=.75 M=.333 TT=4.32U Iave=40m Vpk=5 type=LED)")
NET_MODEL("LedWhite D(Is=0.27n Rs=5.65 N=6.79 Cjo=42p Iave=30m Vpk=5 type=LED)")
NETLIST_END()
/* ----------------------------------------------------------------------------
* BJT Models
* ---------------------------------------------------------------------------*/
static NETLIST_START(bjt_models)
NET_MODEL("NPN _(IS=1e-15 BF=100 NF=1 BR=1 NR=1)")
NET_MODEL("PNP _(IS=1e-15 BF=100 NF=1 BR=1 NR=1)")
NET_MODEL("2SA1015 PNP(Is=295.1E-18 Xti=3 Eg=1.11 Vaf=100 Bf=110 Xtb=1.5 Br=10.45 Rc=15 Cjc=66.2p Mjc=1.054 Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n Tf=1.661n VCEO=45V ICrating=150M MFG=Toshiba)")
NET_MODEL("2SC1815 NPN(Is=2.04f Xti=3 Eg=1.11 Vaf=6 Bf=400 Ikf=20m Xtb=1.5 Br=3.377 Rc=1 Cjc=1p Mjc=.3333 Vjc=.75 Fc=.5 Cje=25p Mje=.3333 Vje=.75 Tr=450n Tf=20n Itf=0 Vtf=0 Xtf=0 VCEO=45V ICrating=150M MFG=Toshiba)")
NET_MODEL("2N3565 NPN(IS=5.911E-15 ISE=5.911E-15 ISC=0 XTI=3 BF=697.1 BR=1.297 IKF=0.01393 IKR=0 XTB=1.5 VAF=62.37 VAR=21.5 VJE=0.65 VJC=0.65 RE=0.15 RC=1.61 RB=10 CJE=4.973E-12 CJC=4.017E-12 XCJC=0.75 FC=0.5 NF=1 NR=1 NE=1.342 NC=2 MJE=0.4146 MJC=0.3174 TF=820.4E-12 TR=4.687E-9 ITF=0.35 VTF=4 XTF=7 EG=1.11 KF=1E-9 AF=1 VCEO=25 ICRATING=500m MFG=NSC)")
NET_MODEL("2N3643 NPN(IS=14.34E-15 ISE=14.34E-15 ISC=0 XTI=3 BF=255.9 BR=6.092 IKF=0.2847 IKR=0 XTB=1.5 VAF=74.03 VAR=28 VJE=0.65 VJC=0.65 RE=0.1 RC=1 RB=10 CJE=22.01E-12 CJC=7.306E-12 XCJC=0.75 FC=0.5 NF=1 NR=1 NE=1.307 NC=2 MJE=0.377 MJC=0.3416 TF=411.1E-12 TR=46.91E-9 ITF=0.6 VTF=1.7 XTF=3 EG=1.11 KF=0 AF=1 VCEO=30 ICRATING=500m MFG=NSC)")
NET_MODEL("2N3645 PNP(IS=650.6E-18 ISE=54.81E-15 ISC=0 XTI=3 BF=231.7 BR=3.563 IKF=1.079 IKR=0 XTB=1.5 VAF=115.7 VAR=35 VJE=0.65 VJC=0.65 RE=0.15 RC=0.715 RB=10 CJE=19.82E-12 CJC=14.76E-12 XCJC=0.75 FC=0.5 NF=1 NR=1 NE=1.829 NC=2 MJE=0.3357 MJC=0.5383 TF=603.7E-12 TR=111.3E-9 ITF=0.65 VTF=5 XTF=1.7 EG=1.11 KF=0 AF=1 VCEO=60 ICRATING=500m MFG=NSC)")
// 3644 = 3645 Difference between 3644 and 3645 is voltage rating. 3644: VCBO=45, 3645: VCBO=60
NET_MODEL("2N3644 PNP(IS=650.6E-18 ISE=54.81E-15 ISC=0 XTI=3 BF=231.7 BR=3.563 IKF=1.079 IKR=0 XTB=1.5 VAF=115.7 VAR=35 VJE=0.65 VJC=0.65 RE=0.15 RC=0.715 RB=10 CJE=19.82E-12 CJC=14.76E-12 XCJC=0.75 FC=0.5 NF=1 NR=1 NE=1.829 NC=2 MJE=0.3357 MJC=0.5383 TF=603.7E-12 TR=111.3E-9 ITF=0.65 VTF=5 XTF=1.7 EG=1.11 KF=0 AF=1 VCEO=60 ICRATING=500m MFG=NSC)")
// 2N5190 = BC817-25
NET_MODEL("2N5190 NPN(IS=9.198E-14 NF=1.003 ISE=4.468E-16 NE=1.65 BF=338.8 IKF=0.4913 VAF=107.9 NR=1.002 ISC=5.109E-15 NC=1.071 BR=29.48 IKR=0.193 VAR=25 RB=1 IRB=1000 RBM=1 RE=0.2126 RC=0.143 XTB=0 EG=1.11 XTI=3 CJE=3.825E-11 VJE=0.7004 MJE=0.364 TF=5.229E-10 XTF=219.7 VTF=3.502 ITF=7.257 PTF=0 CJC=1.27E-11 VJC=0.4431 MJC=0.3983 XCJC=0.4555 TR=7E-11 CJS=0 VJS=0.75 MJS=0.333 FC=0.905 Vceo=45 Icrating=500m mfg=Philips)")
NET_MODEL("2SC945 NPN(IS=3.577E-14 BF=2.382E+02 NF=1.01 VAF=1.206E+02 IKF=3.332E-01 ISE=3.038E-16 NE=1.205 BR=1.289E+01 NR=1.015 VAR=1.533E+01 IKR=2.037E-01 ISC=3.972E-14 NC=1.115 RB=3.680E+01 IRB=1.004E-04 RBM=1 RE=8.338E-01 RC=1.557E+00 CJE=1.877E-11 VJE=7.211E-01 MJE=3.486E-01 TF=4.149E-10 XTF=1.000E+02 VTF=9.956 ITF=5.118E-01 PTF=0 CJC=6.876p VJC=3.645E-01 MJC=3.074E-01 TR=5.145E-08 XTB=1.5 EG=1.11 XTI=3 FC=0.5 Vceo=50 Icrating=100m MFG=NEC)")
NET_MODEL("BC237B NPN(IS=1.8E-14 ISE=5.0E-14 ISC=1.72E-13 XTI=3 BF=400 BR=35.5 IKF=0.14 IKR=0.03 XTB=1.5 VAF=80 VAR=12.5 VJE=0.58 VJC=0.54 RE=0.6 RC=0.25 RB=0.56 CJE=13E-12 CJC=4E-12 XCJC=0.75 FC=0.5 NF=0.9955 NR=1.005 NE=1.46 NC=1.27 MJE=0.33 MJC=0.33 TF=0.64E-9 TR=50.72E-9 EG=1.11 KF=0 AF=1 VCEO=45 ICRATING=100M MFG=ZETEX)")
NET_MODEL("BC556B PNP(IS=3.83E-14 NF=1.008 ISE=1.22E-14 NE=1.528 BF=344.4 IKF=0.08039 VAF=21.11 NR=1.005 ISC=2.85E-13 NC=1.28 BR=14.84 IKR=0.047 VAR=32.02 RB=1 IRB=1.00E-06 RBM=1 RE=0.6202 RC=0.5713 XTB=0 EG=1.11 XTI=3 CJE=1.23E-11 VJE=0.6106 MJE=0.378 TF=5.60E-10 XTF=3.414 VTF=5.23 ITF=0.1483 PTF=0 CJC=1.08E-11 VJC=0.1022 MJC=0.3563 XCJC=0.6288 TR=1.00E-32 CJS=0 VJS=0.75 MJS=0.333 FC=0.8027 Vceo=65 Icrating=100m mfg=Philips)")
NET_MODEL("BC548C NPN(IS=1.95E-14 ISE=1.31E-15 ISC=1.0E-13 XTI=3 BF=466 BR=2.42 IKF=0.18 IKR=1 XTB=1.5 VAF=91.7 VAR=24.7 VJE=0.632 VJC=0.339 RE=1 RC=1.73 RB=26.5 RBM=10 IRB=10 CJE=1.33E-11 CJC=5.17E-12 XCJC=1 FC=0.9 NF=0.993 NR=1.2 NE=1.32 NC=2.00 MJE=0.326 MJC=0.319 TF=6.52E-10 TR=0 PTF=0 ITF=1.03 VTF=1.65 XTF=100 EG=1.11 KF=1E-9 AF=1 VCEO=40 ICrating=800M MFG=Siemens)")
NET_MODEL("BC817-25 NPN(IS=9.198E-14 NF=1.003 ISE=4.468E-16 NE=1.65 BF=338.8 IKF=0.4913 VAF=107.9 NR=1.002 ISC=5.109E-15 NC=1.071 BR=29.48 IKR=0.193 VAR=25 RB=1 IRB=1000 RBM=1 RE=0.2126 RC=0.143 XTB=0 EG=1.11 XTI=3 CJE=3.825E-11 VJE=0.7004 MJE=0.364 TF=5.229E-10 XTF=219.7 VTF=3.502 ITF=7.257 PTF=0 CJC=1.27E-11 VJC=0.4431 MJC=0.3983 XCJC=0.4555 TR=7E-11 CJS=0 VJS=0.75 MJS=0.333 FC=0.905 Vceo=45 Icrating=500m mfg=Philips)")
NETLIST_END()
/* ----------------------------------------------------------------------------
* Family models
* ---------------------------------------------------------------------------*/
static NETLIST_START(family_models)
NET_MODEL("FAMILY _(TYPE=CUSTOM FV=5 IVL=0.16 IVH=0.4 OVL=0.1 OVH=1.0 ORL=1.0 ORH=130.0)")
NET_MODEL("OPAMP _()")
NET_MODEL("74XXOC FAMILY(FV=5 IVL=0.16 IVH=0.4 OVL=0.1 OVH=0.05 ORL=10.0 ORH=1.0e8)")
NET_MODEL("74XX FAMILY(TYPE=TTL)")
NET_MODEL("CD4XXX FAMILY(TYPE=CD4XXX)")
NETLIST_END()
/* ----------------------------------------------------------------------------
* Always included
* ---------------------------------------------------------------------------*/
NETLIST_START(base)
TTL_INPUT(ttlhigh, 1)
TTL_INPUT(ttllow, 0)
NET_REGISTER_DEV(GND, GND)
NET_REGISTER_DEV(PARAMETER, NETLIST)
LOCAL_SOURCE(diode_models)
LOCAL_SOURCE(bjt_models)
LOCAL_SOURCE(family_models)
LOCAL_SOURCE(TTL74XX_lib)
LOCAL_SOURCE(CD4XXX_lib)
LOCAL_SOURCE(OPAMP_lib)
LOCAL_SOURCE(otheric_lib)
INCLUDE(diode_models);
INCLUDE(bjt_models);
INCLUDE(family_models);
INCLUDE(TTL74XX_lib);
INCLUDE(CD4XXX_lib);
INCLUDE(OPAMP_lib);
INCLUDE(otheric_lib);
NETLIST_END()

31
src/lib/netlist/macro/nlm_base.h Normal file
View File

@ -0,0 +1,31 @@
// license:GPL-2.0+
// copyright-holders:Couriersud
#ifndef NLM_BASE_H_
#define NLM_BASE_H_
/*
* Provide base environment for netlist
*
*/
#ifndef __PLIB_PREPROCESSOR__
#include "nl_setup.h"
/* ----------------------------------------------------------------------------
* Netlist Macros
* ---------------------------------------------------------------------------*/
/* ----------------------------------------------------------------------------
* DIP only macros
* ---------------------------------------------------------------------------*/
/* ----------------------------------------------------------------------------
* External declarations
* ---------------------------------------------------------------------------*/
NETLIST_EXTERNAL(base)
#endif
#endif

91
src/lib/netlist/nl_base.cpp
View File

@ -138,7 +138,6 @@ const logic_family_desc_t *family_CD4XXX()
detail::queue_t::queue_t(netlist_t &nl)
: timed_queue<net_t *, netlist_time>(512)
, object_t("QUEUE")
, netlist_ref(nl)
, plib::state_manager_t::callback_t()
, m_qsize(0)
@ -207,13 +206,32 @@ const pstring &detail::object_t::name() const
// device_object_t
// ----------------------------------------------------------------------------------------
detail::device_object_t::device_object_t(core_device_t &dev, const pstring &aname, const type_t atype)
detail::device_object_t::device_object_t(core_device_t &dev, const pstring &aname)
: object_t(aname)
, m_device(dev)
, m_type(atype)
{
}
detail::device_object_t::type_t detail::device_object_t::type() const
{
if (dynamic_cast<const terminal_t *>(this) != nullptr)
return type_t::TERMINAL;
else if (dynamic_cast<const param_t *>(this) != nullptr)
return param_t::PARAM;
else if (dynamic_cast<const logic_input_t *>(this) != nullptr)
return param_t::INPUT;
else if (dynamic_cast<const logic_output_t *>(this) != nullptr)
return param_t::OUTPUT;
else if (dynamic_cast<const analog_input_t *>(this) != nullptr)
return param_t::INPUT;
else if (dynamic_cast<const analog_output_t *>(this) != nullptr)
return param_t::OUTPUT;
else
{
netlist().log().fatal("Unknown type for object {1} ", name());
return type_t::TERMINAL; // please compiler
}
}
// ----------------------------------------------------------------------------------------
// netlist_t
@ -325,11 +343,8 @@ void netlist_t::start()
void netlist_t::stop()
{
/* find the main clock and solver ... */
log().debug("Stopping all devices ...\n");
for (auto & dev : m_devices)
dev->stop_dev();
log().debug("Stopping solver device ...\n");
m_solver->stop();
}
detail::net_t *netlist_t::find_net(const pstring &name)
@ -546,14 +561,6 @@ void core_device_t::set_delegate_pointer()
#endif
}
void core_device_t::stop_dev()
{
//NOTE: stop_dev is not removed. It remains so it can be reactivated in case
// we run into a situation were RAII and noexcept dtors force us to
// to have a device stop() routine which may throw.
//stop();
}
// ----------------------------------------------------------------------------------------
// device_t
// ----------------------------------------------------------------------------------------
@ -690,7 +697,7 @@ void detail::net_t::rebuild_list()
{
/* rebuild m_list */
unsigned cnt = 0;
int cnt = 0;
m_list_active.clear();
for (auto & term : m_core_terms)
if (term->state() != logic_t::STATE_INP_PASSIVE)
@ -803,9 +810,8 @@ analog_net_t::~analog_net_t()
// core_terminal_t
// ----------------------------------------------------------------------------------------
detail::core_terminal_t::core_terminal_t(core_device_t &dev, const pstring &aname,
const type_t type, const state_e state)
: device_object_t(dev, dev.name() + "." + aname, type)
detail::core_terminal_t::core_terminal_t(core_device_t &dev, const pstring &aname, const state_e state)
: device_object_t(dev, dev.name() + "." + aname)
, plib::linkedlist_t<core_terminal_t>::element_t()
, m_net(nullptr)
, m_state(*this, "m_state", state)
@ -847,7 +853,7 @@ logic_t::~logic_t()
// ----------------------------------------------------------------------------------------
terminal_t::terminal_t(core_device_t &dev, const pstring &aname)
: analog_t(dev, aname, TERMINAL, STATE_BIDIR)
: analog_t(dev, aname, STATE_BIDIR)
, m_otherterm(nullptr)
, m_Idr1(*this, "m_Idr1", nullptr)
, m_go1(*this, "m_go1", nullptr)
@ -887,7 +893,7 @@ void terminal_t::schedule_after(const netlist_time &after)
// ----------------------------------------------------------------------------------------
logic_output_t::logic_output_t(core_device_t &dev, const pstring &aname)
: logic_t(dev, aname, OUTPUT, STATE_OUT)
: logic_t(dev, aname, STATE_OUT)
, m_my_net(dev.netlist(), name() + ".net", this)
{
this->set_net(&m_my_net);
@ -909,7 +915,7 @@ void logic_output_t::initial(const netlist_sig_t val)
// ----------------------------------------------------------------------------------------
analog_input_t::analog_input_t(core_device_t &dev, const pstring &aname)
: analog_t(dev, aname, INPUT, STATE_INP_ACTIVE)
: analog_t(dev, aname, STATE_INP_ACTIVE)
{
netlist().setup().register_term(*this);
}
@ -923,7 +929,7 @@ analog_input_t::~analog_input_t()
// ----------------------------------------------------------------------------------------
analog_output_t::analog_output_t(core_device_t &dev, const pstring &aname)
: analog_t(dev, aname, OUTPUT, STATE_OUT)
: analog_t(dev, aname, STATE_OUT)
, m_my_net(dev.netlist(), name() + ".net", this)
{
this->set_net(&m_my_net);
@ -946,7 +952,7 @@ void analog_output_t::initial(const nl_double val)
// -----------------------------------------------------------------------------
logic_input_t::logic_input_t(core_device_t &dev, const pstring &aname)
: logic_t(dev, aname, INPUT, STATE_INP_ACTIVE)
: logic_t(dev, aname, STATE_INP_ACTIVE)
{
set_logic_family(dev.logic_family());
netlist().setup().register_term(*this);
@ -960,9 +966,8 @@ logic_input_t::~logic_input_t()
// Parameters ...
// ----------------------------------------------------------------------------------------
param_t::param_t(const param_type_t atype, device_t &device, const pstring &name)
: device_object_t(device, device.name() + "." + name, PARAM)
, m_param_type(atype)
param_t::param_t(device_t &device, const pstring &name)
: device_object_t(device, device.name() + "." + name)
{
device.setup().register_param(this->name(), *this);
}
@ -971,6 +976,26 @@ param_t::~param_t()
{
}
param_t::param_type_t param_t::param_type() const
{
if (dynamic_cast<const param_str_t *>(this) != nullptr)
return STRING;
else if (dynamic_cast<const param_double_t *>(this) != nullptr)
return DOUBLE;
else if (dynamic_cast<const param_int_t *>(this) != nullptr)
return INTEGER;
else if (dynamic_cast<const param_logic_t *>(this) != nullptr)
return LOGIC;
else if (dynamic_cast<const param_ptr_t *>(this) != nullptr)
return POINTER;
else
{
netlist().log().fatal("Can not determine param_type for {1}", name());
return POINTER; /* Please compiler */
}
}
void param_t::update_param()
{
device().update_param();
@ -986,7 +1011,7 @@ const pstring param_model_t::model_type()
}
param_str_t::param_str_t(device_t &device, const pstring name, const pstring val)
: param_t(param_t::STRING, device, name)
: param_t(device, name)
{
m_param = device.setup().get_initial_param_val(this->name(),val);
}
@ -1000,7 +1025,7 @@ void param_str_t::changed()
}
param_double_t::param_double_t(device_t &device, const pstring name, const double val)
: param_t(param_t::DOUBLE, device, name)
: param_t(device, name)
{
m_param = device.setup().get_initial_param_val(this->name(),val);
netlist().save(*this, m_param, "m_param");
@ -1011,7 +1036,7 @@ param_double_t::~param_double_t()
}
param_int_t::param_int_t(device_t &device, const pstring name, const int val)
: param_t(param_t::INTEGER, device, name)
: param_t(device, name)
{
m_param = device.setup().get_initial_param_val(this->name(),val);
netlist().save(*this, m_param, "m_param");
@ -1022,7 +1047,7 @@ param_int_t::~param_int_t()
}
param_logic_t::param_logic_t(device_t &device, const pstring name, const bool val)
: param_t(param_t::LOGIC, device, name)
: param_t(device, name)
{
m_param = device.setup().get_initial_param_val(this->name(),val);
netlist().save(*this, m_param, "m_param");
@ -1033,7 +1058,7 @@ param_logic_t::~param_logic_t()
}
param_ptr_t::param_ptr_t(device_t &device, const pstring name, uint8_t * val)
: param_t(param_t::POINTER, device, name)
: param_t(device, name)
{
m_param = val; //device.setup().get_initial_param_val(this->name(),val);
//netlist().save(*this, m_param, "m_param");

44
src/lib/netlist/nl_base.h
View File

@ -139,8 +139,6 @@ class NETLIB_NAME(name) : public device_t
#define NETLIB_RESET(chip) void NETLIB_NAME(chip) :: reset(void)
#define NETLIB_STOP(chip) void NETLIB_NAME(chip) :: stop(void)
#define NETLIB_UPDATE_PARAM(chip) void NETLIB_NAME(chip) :: update_param(void)
#define NETLIB_FUNC_VOID(chip, name, params) void NETLIB_NAME(chip) :: name params
@ -235,7 +233,7 @@ namespace netlist
{
public:
logic_family_desc_t();
~logic_family_desc_t();
virtual ~logic_family_desc_t();
virtual plib::owned_ptr<devices::nld_base_d_to_a_proxy> create_d_a_proxy(netlist_t &anetlist, const pstring &name,
logic_output_t *proxied) const = 0;
@ -372,7 +370,7 @@ namespace netlist
/*! The base class for netlist devices, terminals and parameters.
*
* This class serves as the base class for all device, terminal and
* objects. It provides new and delete operators to supported e.g. pooled
* objects. It provides new and delete operators to support e.g. pooled
* memory allocation to enhance locality. Please refer to \ref USE_MEMPOOL as
* well.
*/
@ -441,9 +439,8 @@ namespace netlist
*
* \param dev device owning the object.
* \param name string holding the name of the device
* \param type type of this object.
*/
device_object_t(core_device_t &dev, const pstring &name, const type_t type);
device_object_t(core_device_t &dev, const pstring &name);
/*! returns reference to owning device.
* \returns reference to owning device.
*/
@ -452,21 +449,21 @@ namespace netlist
/*! The object type.
* \returns type of the object
*/
type_t type() const { return m_type; }
type_t type() const;
/*! Checks if object is of specified type.
* \param type type to check object against.
* \param atype type to check object against.
* \returns true if object is of specified type else false.
*/
bool is_type(const type_t type) const { return (m_type == type); }
bool is_type(const type_t atype) const { return (type() == atype); }
/*! The netlist owning the owner of this object.
* \returns reference to netlist object.
*/
netlist_t &netlist();
const netlist_t &netlist() const;
private:
core_device_t & m_device;
const type_t m_type;
};
@ -495,8 +492,7 @@ namespace netlist
STATE_BIDIR = 256
};
core_terminal_t(core_device_t &dev, const pstring &aname,
const type_t type, const state_e state);
core_terminal_t(core_device_t &dev, const pstring &aname, const state_e state);
virtual ~core_terminal_t();
void set_net(net_t *anet);
@ -528,9 +524,8 @@ namespace netlist
{
public:
analog_t(core_device_t &dev, const pstring &aname, const type_t type,
const state_e state)
: core_terminal_t(dev, aname, type, state)
analog_t(core_device_t &dev, const pstring &aname, const state_e state)
: core_terminal_t(dev, aname, state)
{
}
virtual ~analog_t();
@ -609,9 +604,8 @@ namespace netlist
class logic_t : public detail::core_terminal_t, public logic_family_t
{
public:
logic_t(core_device_t &dev, const pstring &aname, const type_t type,
const state_e state)
: core_terminal_t(dev, aname, type, state)
logic_t(core_device_t &dev, const pstring &aname, const state_e state)
: core_terminal_t(dev, aname, state)
, logic_family_t()
, m_proxy(nullptr)
{
@ -870,10 +864,10 @@ namespace netlist
POINTER // Special-case which is always initialized at MAME startup time
};
param_t(const param_type_t atype, device_t &device, const pstring &name);
param_t(device_t &device, const pstring &name);
virtual ~param_t();
param_type_t param_type() const { return m_param_type; }
param_type_t param_type() const;
protected:
void update_param();
@ -888,8 +882,6 @@ namespace netlist
}
}
private:
const param_type_t m_param_type;
};
class param_ptr_t final: public param_t
@ -1019,7 +1011,6 @@ namespace netlist
}
void set_delegate_pointer();
void stop_dev();
void do_inc_active() NL_NOEXCEPT
{
@ -1048,7 +1039,6 @@ namespace netlist
virtual void update() NL_NOEXCEPT { }
virtual void inc_active() NL_NOEXCEPT { }
virtual void dec_active() NL_NOEXCEPT { }
virtual void stop() { }
virtual void reset() { }
public:
@ -1139,7 +1129,6 @@ namespace netlist
class detail::queue_t :
public timed_queue<net_t *, netlist_time>,
public detail::object_t,
public detail::netlist_ref,
public plib::state_manager_t::callback_t
{
@ -1489,6 +1478,11 @@ namespace netlist
return m_device.netlist();
}
inline const netlist_t &detail::device_object_t::netlist() const
{
return m_device.netlist();
}
}

26
src/lib/netlist/nl_setup.cpp
View File

@ -21,31 +21,7 @@
#include "devices/nlid_proxy.h"
#include "analog/nld_twoterm.h"
#include "solver/nld_solver.h"
static NETLIST_START(base)
TTL_INPUT(ttlhigh, 1)
TTL_INPUT(ttllow, 0)
NET_REGISTER_DEV(GND, GND)
NET_REGISTER_DEV(PARAMETER, NETLIST)
LOCAL_SOURCE(diode_models)
LOCAL_SOURCE(bjt_models)
LOCAL_SOURCE(family_models)
LOCAL_SOURCE(TTL74XX_lib)
LOCAL_SOURCE(CD4XXX_lib)
LOCAL_SOURCE(OPAMP_lib)
LOCAL_SOURCE(otheric_lib)
INCLUDE(diode_models);
INCLUDE(bjt_models);
INCLUDE(family_models);
INCLUDE(TTL74XX_lib);
INCLUDE(CD4XXX_lib);
INCLUDE(OPAMP_lib);
INCLUDE(otheric_lib);
NETLIST_END()
#include "macro/nlm_base.h"
// ----------------------------------------------------------------------------------------
// setup_t

116
src/lib/netlist/prg/nlwav.cpp
View File

@ -7,14 +7,15 @@
#include "plib/plists.h"
#include "plib/pstream.h"
#include "nl_setup.h"
#include <memory>
class nlwav_options_t : public plib::options
{
public:
nlwav_options_t() :
plib::options(),
opt_inp(*this, "i", "input", "", "input file"),
opt_out(*this, "o", "output", "", "output file"),
opt_inp(*this, "i", "input", "-", "input file"),
opt_out(*this, "o", "output", "-", "output file"),
opt_amp(*this, "a", "amp", 10000.0, "amplification after mean correction"),
opt_verb(*this, "v", "verbose", "be verbose - this produces lots of output"),
opt_quiet(*this,"q", "quiet", "be quiet - no warnings"),
@ -30,12 +31,24 @@ public:
plib::option_bool opt_help;
};
plib::pstdin pin_strm;
plib::pstdout pout_strm;
plib::pstderr perr_strm;
plib::pstream_fmt_writer_t pout(pout_strm);
plib::pstream_fmt_writer_t perr(perr_strm);
nlwav_options_t opts;
/* From: https://ffmpeg.org/pipermail/ffmpeg-devel/2007-October/038122.html
* The most compatible way to make a wav header for unknown length is to put
* 0xffffffff in the header. 0 as the RIFF length and 0 as the data chunk length
* is a common agreement in serious recording applications while
* still recording the file. So a playback application can determine that the
* given file is still being recorded. As soon as the recording application
* finishes the ongoing recording, it writes the correct values for RIFF lenth
* and data chunk length to the file.
*/
/* http://de.wikipedia.org/wiki/RIFF_WAVE */
class wav_t
{
@ -49,12 +62,16 @@ public:
}
~wav_t()
{
m_f.seek(0);
m_f.write(&m_fh, sizeof(m_fh));
m_f.write(&m_fmt, sizeof(m_fmt));
if (m_f.seekable())
{
m_fh.filelen = m_data.len + sizeof(m_data) + sizeof(m_fh) + sizeof(m_fmt) - 8;
m_f.seek(0);
m_f.write(&m_fh, sizeof(m_fh));
m_f.write(&m_fmt, sizeof(m_fmt));
//data.len = fmt.block_align * n;
m_f.write(&m_data, sizeof(m_data));
//data.len = fmt.block_align * n;
m_f.write(&m_data, sizeof(m_data));
}
}
unsigned channels() { return m_fmt.channels; }
@ -63,44 +80,44 @@ public:
void write_sample(int sample)
{
m_data.len += m_fmt.block_align;
short ps = static_cast<short>(sample); /* 16 bit sample, FIXME: Endianess? */
int16_t ps = static_cast<int16_t>(sample); /* 16 bit sample, FIXME: Endianess? */
m_f.write(&ps, sizeof(ps));
}
private:
struct riff_chunk_t
{
char group_id[4];
unsigned filelen;
char rifftype[4];
uint8_t group_id[4];
uint32_t filelen;
uint8_t rifftype[4];
};
struct riff_format_t
{
char signature[4];
unsigned fmt_length;
short format_tag;
unsigned short channels;
unsigned sample_rate;
unsigned bytes_per_second;
unsigned short block_align;
unsigned short bits_sample;
uint8_t signature[4];
uint32_t fmt_length;
uint16_t format_tag;
uint16_t channels;
uint32_t sample_rate;
uint32_t bytes_per_second;
uint16_t block_align;
uint16_t bits_sample;
};
struct riff_data_t
{
char signature[4];
unsigned len;
uint8_t signature[4];
uint32_t len;
// data follows
};
void initialize(unsigned sr)
{
std::strncpy(m_fh.group_id, "RIFF", 4);
m_fh.filelen = 0; // Fixme
std::strncpy(m_fh.rifftype, "WAVE", 4);
std::memcpy(m_fh.group_id, "RIFF", 4);
m_fh.filelen = 0x0; // Fixme
std::memcpy(m_fh.rifftype, "WAVE", 4);
std::strncpy(m_fmt.signature, "fmt ", 4);
std::memcpy(m_fmt.signature, "fmt ", 4);
m_fmt.fmt_length = 16;
m_fmt.format_tag = 0x0001; //PCM
m_fmt.channels = 1;
@ -109,8 +126,10 @@ private:
m_fmt.block_align = m_fmt.channels * ((m_fmt.bits_sample + 7) / 8);
m_fmt.bytes_per_second = m_fmt.sample_rate * m_fmt.block_align;
std::strncpy(m_data.signature, "data", 4);
m_data.len = m_fmt.bytes_per_second * 2 * 0;
std::memcpy(m_data.signature, "data", 4);
//m_data.len = m_fmt.bytes_per_second * 2 * 0;
/* force "play" to play and warn about eof instead of being silent */
m_data.len = (m_f.seekable() ? 0 : 0xffffffff);
}
@ -122,14 +141,13 @@ private:
};
static void convert(nlwav_options_t &opts)
static void convert()
{
plib::pofilestream fo(opts.opt_out());
wav_t wo(fo, 48000);
plib::postream *fo = (opts.opt_out() == "-" ? &pout_strm : new plib::pofilestream(opts.opt_out()));
plib::pistream *fin = (opts.opt_inp() == "-" ? &pin_strm : new plib::pifilestream(opts.opt_inp()));
wav_t *wo = new wav_t(*fo, 48000);
plib::pifilestream fin(opts.opt_inp());
double dt = 1.0 / static_cast<double>(wo.sample_rate());
double dt = 1.0 / static_cast<double>(wo->sample_rate());
double ct = dt;
//double mean = 2.4;
double amp = opts.opt_amp();
@ -144,7 +162,7 @@ static void convert(nlwav_options_t &opts)
//short sample = 0;
pstring line;
while(fin.readline(line))
while(fin->readline(line))
{
#if 1
double t = 0.0; double v = 0.0;
@ -160,12 +178,12 @@ static void convert(nlwav_options_t &opts)
minsam = std::min(minsam, outsam);
n++;
//mean = means / (double) n;
mean += 5.0 / static_cast<double>(wo.sample_rate()) * (outsam - mean);
mean += 5.0 / static_cast<double>(wo->sample_rate()) * (outsam - mean);
}
outsam = (outsam - mean) * amp;
outsam = std::max(-32000.0, outsam);
outsam = std::min(32000.0, outsam);
wo.write_sample(static_cast<int>(outsam));
wo->write_sample(static_cast<int>(outsam));
outsam = 0.0;
lt = ct;
ct += dt;
@ -194,13 +212,22 @@ static void convert(nlwav_options_t &opts)
//printf("%f %f\n", t, v);
#endif
}
pout("Mean (low freq filter): {}\n", mean);
pout("Mean (static): {}\n", means / static_cast<double>(n));
pout("Amp + {}\n", 32000.0 / (maxsam- mean));
pout("Amp - {}\n", -32000.0 / (minsam- mean));
delete wo;
if (opts.opt_inp() != "-")
delete fin;
if (opts.opt_out() != "-")
delete fo;
if (!opts.opt_quiet())
{
perr("Mean (low freq filter): {}\n", mean);
perr("Mean (static): {}\n", means / static_cast<double>(n));
perr("Amp + {}\n", 32000.0 / (maxsam- mean));
perr("Amp - {}\n", -32000.0 / (minsam- mean));
}
}
static void usage(plib::pstream_fmt_writer_t &fw, nlwav_options_t &opts)
static void usage(plib::pstream_fmt_writer_t &fw)
{
fw("{}\n", opts.help("Convert netlist log files into wav files.\n",
"nltool [options]").c_str());
@ -209,19 +236,18 @@ static void usage(plib::pstream_fmt_writer_t &fw, nlwav_options_t &opts)
int main(int argc, char *argv[])
{
nlwav_options_t opts;
int ret;
if ((ret = opts.parse(argc, argv)) != argc)
{
perr("Error parsing {}\n", argv[ret]);
usage(perr, opts);
usage(perr);
return 1;
}
if (opts.opt_help())
{
usage(pout, opts);
usage(pout);
return 0;
}
@ -237,7 +263,7 @@ int main(int argc, char *argv[])
return 0;
}
convert(opts);
convert();
return 0;
}

55
src/lib/netlist/solver/nld_matrix_solver.cpp
View File

@ -17,7 +17,7 @@ proxied_analog_output_t::~proxied_analog_output_t()
{
}
terms_t::terms_t()
terms_for_net_t::terms_for_net_t()
: m_railstart(0)
, m_last_V(0.0)
, m_DD_n_m_1(0.0)
@ -25,46 +25,46 @@ terms_t::terms_t()
{
}
void terms_t::clear()
void terms_for_net_t::clear()
{
m_term.clear();
m_net_other.clear();
m_terms.clear();
m_connected_net_idx.clear();
m_gt.clear();
m_go.clear();
m_Idr.clear();
m_other_curanalog.clear();
m_connected_net_V.clear();
}
void terms_t::add(terminal_t *term, int net_other, bool sorted)
void terms_for_net_t::add(terminal_t *term, int net_other, bool sorted)
{
if (sorted)
for (unsigned i=0; i < m_net_other.size(); i++)
for (unsigned i=0; i < m_connected_net_idx.size(); i++)
{
if (m_net_other[i] > net_other)
if (m_connected_net_idx[i] > net_other)
{
plib::container::insert_at(m_term, i, term);
plib::container::insert_at(m_net_other, i, net_other);
plib::container::insert_at(m_terms, i, term);
plib::container::insert_at(m_connected_net_idx, i, net_other);
plib::container::insert_at(m_gt, i, 0.0);
plib::container::insert_at(m_go, i, 0.0);
plib::container::insert_at(m_Idr, i, 0.0);
plib::container::insert_at(m_other_curanalog, i, nullptr);
plib::container::insert_at(m_connected_net_V, i, nullptr);
return;
}
}
m_term.push_back(term);
m_net_other.push_back(net_other);
m_terms.push_back(term);
m_connected_net_idx.push_back(net_other);
m_gt.push_back(0.0);
m_go.push_back(0.0);
m_Idr.push_back(0.0);
m_other_curanalog.push_back(nullptr);
m_connected_net_V.push_back(nullptr);
}
void terms_t::set_pointers()
void terms_for_net_t::set_pointers()
{
for (unsigned i = 0; i < count(); i++)
{
m_term[i]->set_ptrs(&m_gt[i], &m_go[i], &m_Idr[i]);
m_other_curanalog[i] = m_term[i]->m_otherterm->net().m_cur_Analog.ptr();
m_terms[i]->set_ptrs(&m_gt[i], &m_go[i], &m_Idr[i]);
m_connected_net_V[i] = m_terms[i]->m_otherterm->net().m_cur_Analog.ptr();
}
}
@ -108,8 +108,8 @@ void matrix_solver_t::setup_base(analog_net_t::list_t &nets)
for (auto & net : nets)
{
m_nets.push_back(net);
m_terms.push_back(plib::palloc<terms_t>());
m_rails_temp.push_back(plib::palloc<terms_t>());
m_terms.push_back(plib::palloc<terms_for_net_t>());
m_rails_temp.push_back(plib::palloc<terms_for_net_t>());
}
for (std::size_t k = 0; k < nets.size(); k++)
@ -183,7 +183,7 @@ void matrix_solver_t::setup_matrix()
{
m_terms[k]->m_railstart = m_terms[k]->count();
for (std::size_t i = 0; i < m_rails_temp[k]->count(); i++)
this->m_terms[k]->add(m_rails_temp[k]->terms()[i], m_rails_temp[k]->net_other()[i], false);
this->m_terms[k]->add(m_rails_temp[k]->terms()[i], m_rails_temp[k]->connected_net_idx()[i], false);
m_rails_temp[k]->clear(); // no longer needed
m_terms[k]->set_pointers();
@ -230,7 +230,7 @@ void matrix_solver_t::setup_matrix()
for (unsigned k = 0; k < iN; k++)
{
int *other = m_terms[k]->net_other();
int *other = m_terms[k]->connected_net_idx();
for (unsigned i = 0; i < m_terms[k]->count(); i++)
if (other[i] != -1)
other[i] = get_net_idx(&m_terms[k]->terms()[i]->m_otherterm->net());
@ -240,9 +240,9 @@ void matrix_solver_t::setup_matrix()
/* create a list of non zero elements. */
for (unsigned k = 0; k < iN; k++)
{
terms_t * t = m_terms[k];
terms_for_net_t * t = m_terms[k];
/* pretty brutal */
int *other = t->net_other();
int *other = t->connected_net_idx();
t->m_nz.clear();
@ -262,9 +262,9 @@ void matrix_solver_t::setup_matrix()
*/
for (unsigned k = 0; k < iN; k++)
{
terms_t * t = m_terms[k];
terms_for_net_t * t = m_terms[k];
/* pretty brutal */
int *other = t->net_other();
int *other = t->connected_net_idx();
if (k==0)
t->m_nzrd.clear();
@ -425,7 +425,7 @@ void matrix_solver_t::solve_base()
{
log().warning("NEWTON_LOOPS exceeded on net {1}... reschedule", this->name());
m_Q_sync.net().toggle_new_Q();
m_Q_sync.net().reschedule_in_queue(m_params.m_nt_sync_delay);
m_Q_sync.net().reschedule_in_queue(m_params.m_nr_recalc_delay);
}
}
else
@ -449,7 +449,6 @@ const netlist_time matrix_solver_t::solve()
step(delta);
solve_base();
const netlist_time next_time_step = compute_next_timestep(delta.as_double());
update_inputs();
return next_time_step;
@ -498,7 +497,7 @@ netlist_time matrix_solver_t::compute_next_timestep(const double cur_ts)
for (std::size_t k = 0, iN=m_terms.size(); k < iN; k++)
{
analog_net_t *n = m_nets[k];
terms_t *t = m_terms[k];
terms_for_net_t *t = m_terms[k];
const nl_double DD_n = (n->Q_Analog() - t->m_last_V);
const nl_double hn = cur_ts;

30
src/lib/netlist/solver/nld_matrix_solver.h
View File

@ -31,30 +31,30 @@ namespace netlist
bool m_dynamic;
unsigned m_gs_loops;
unsigned m_nr_loops;
netlist_time m_nt_sync_delay;
netlist_time m_nr_recalc_delay;
bool m_log_stats;
};
class terms_t
class terms_for_net_t
{
P_PREVENT_COPYING(terms_t)
P_PREVENT_COPYING(terms_for_net_t)
public:
terms_t();
terms_for_net_t();
void clear();
void add(terminal_t *term, int net_other, bool sorted);
inline std::size_t count() { return m_term.size(); }
inline std::size_t count() { return m_terms.size(); }
inline terminal_t **terms() { return m_term.data(); }
inline int *net_other() { return m_net_other.data(); }
inline terminal_t **terms() { return m_terms.data(); }
inline int *connected_net_idx() { return m_connected_net_idx.data(); }
inline nl_double *gt() { return m_gt.data(); }
inline nl_double *go() { return m_go.data(); }
inline nl_double *Idr() { return m_Idr.data(); }
inline nl_double **other_curanalog() { return m_other_curanalog.data(); }
inline nl_double **connected_net_V() { return m_connected_net_V.data(); }
void set_pointers();
@ -70,12 +70,12 @@ public:
nl_double m_h_n_m_1;
private:
std::vector<int> m_net_other;
std::vector<int> m_connected_net_idx;
std::vector<nl_double> m_go;
std::vector<nl_double> m_gt;
std::vector<nl_double> m_Idr;
std::vector<nl_double *> m_other_curanalog;
std::vector<terminal_t *> m_term;
std::vector<nl_double *> m_connected_net_V;
std::vector<terminal_t *> m_terms;
};
@ -163,11 +163,11 @@ protected:
template <typename T>
void build_LE_RHS();
std::vector<terms_t *> m_terms;
std::vector<terms_for_net_t *> m_terms;
std::vector<analog_net_t *> m_nets;
std::vector<std::unique_ptr<proxied_analog_output_t>> m_inps;
std::vector<terms_t *> m_rails_temp;
std::vector<terms_for_net_t *> m_rails_temp;
const solver_parameters_t &m_params;
@ -244,7 +244,7 @@ void matrix_solver_t::build_LE_A()
}
const nl_double * RESTRICT go = m_terms[k]->go();
const int * RESTRICT net_other = m_terms[k]->net_other();
const int * RESTRICT net_other = m_terms[k]->connected_net_idx();
for (std::size_t i = 0; i < railstart; i++)
child.A(k,net_other[i]) -= go[i];
@ -266,7 +266,7 @@ void matrix_solver_t::build_LE_RHS()
const std::size_t terms_count = m_terms[k]->count();
const nl_double * RESTRICT go = m_terms[k]->go();
const nl_double * RESTRICT Idr = m_terms[k]->Idr();
const nl_double * const * RESTRICT other_cur_analog = m_terms[k]->other_curanalog();
const nl_double * const * RESTRICT other_cur_analog = m_terms[k]->connected_net_V();
for (std::size_t i = 0; i < terms_count; i++)
rhsk_a = rhsk_a + Idr[i];

2
src/lib/netlist/solver/nld_ms_direct.h
View File

@ -203,7 +203,7 @@ void matrix_solver_direct_t<m_N, storage_N>::vsetup(analog_net_t::list_t &nets)
/* add RHS element */
for (unsigned k = 0; k < N(); k++)
{
terms_t * t = m_terms[k];
terms_for_net_t * t = m_terms[k];
if (!plib::container::contains(t->m_nzrd, N()))
t->m_nzrd.push_back(N());

20
src/lib/netlist/solver/nld_ms_direct_lu.h
View File

@ -146,7 +146,7 @@ protected:
nl_double m_last_RHS[storage_N]; // right hand side - contains currents
nl_double m_last_V[storage_N];
terms_t *m_rails_temp;
terms_for_net_t *m_rails_temp;
private:
nl_ext_double m_A[storage_N][((storage_N + 7) / 8) * 8];
@ -248,7 +248,7 @@ void matrix_solver_direct_t<m_N, storage_N>::vsetup(analog_net_t::list_t &nets)
{
m_terms[k]->m_railstart = m_terms[k]->count();
for (unsigned i = 0; i < m_rails_temp[k].count(); i++)
this->m_terms[k]->add(m_rails_temp[k].terms()[i], m_rails_temp[k].net_other()[i], false);
this->m_terms[k]->add(m_rails_temp[k].terms()[i], m_rails_temp[k].connected_net_idx()[i], false);
m_rails_temp[k].clear(); // no longer needed
m_terms[k]->set_pointers();
@ -290,7 +290,7 @@ void matrix_solver_direct_t<m_N, storage_N>::vsetup(analog_net_t::list_t &nets)
for (unsigned k = 0; k < N(); k++)
{
int *other = m_terms[k]->net_other();
int *other = m_terms[k]->connected_net_idx();
for (unsigned i = 0; i < m_terms[k]->count(); i++)
if (other[i] != -1)
other[i] = get_net_idx(&m_terms[k]->terms()[i]->m_otherterm->net());
@ -304,9 +304,9 @@ void matrix_solver_direct_t<m_N, storage_N>::vsetup(analog_net_t::list_t &nets)
*/
for (unsigned k = 0; k < N(); k++)
{
terms_t * t = m_terms[k];
terms_for_net_t * t = m_terms[k];
/* pretty brutal */
int *other = t->net_other();
int *other = t->connected_net_idx();
t->m_nz.clear();
@ -384,7 +384,7 @@ void matrix_solver_direct_t<m_N, storage_N>::build_LE_A()
const unsigned railstart = m_terms[k]->m_railstart;
const nl_double * RESTRICT gt = m_terms[k]->gt();
const nl_double * RESTRICT go = m_terms[k]->go();
const int * RESTRICT net_other = m_terms[k]->net_other();
const int * RESTRICT net_other = m_terms[k]->connected_net_idx();
for (unsigned i = 0; i < terms_count; i++)
akk = akk + gt[i];
@ -408,7 +408,7 @@ void matrix_solver_direct_t<m_N, storage_N>::build_LE_RHS(nl_double * RESTRICT r
const int terms_count = m_terms[k]->count();
const nl_double * RESTRICT go = m_terms[k]->go();
const nl_double * RESTRICT Idr = m_terms[k]->Idr();
const nl_double * const * RESTRICT other_cur_analog = m_terms[k]->other_curanalog();
const nl_double * const * RESTRICT other_cur_analog = m_terms[k]->connected_net_V();
for (int i = 0; i < terms_count; i++)
rhsk_a = rhsk_a + Idr[i];
@ -607,7 +607,7 @@ matrix_solver_direct_t<m_N, storage_N>::matrix_solver_direct_t(const solver_para
, m_dim(size)
, m_lp_fact(0)
{
m_rails_temp = palloc_array(terms_t, N());
m_rails_temp = palloc_array(terms_for_net_t, N());
for (unsigned k = 0; k < N(); k++)
{
@ -621,11 +621,11 @@ matrix_solver_direct_t<m_N, storage_N>::matrix_solver_direct_t(const eSolverType
, m_dim(size)
, m_lp_fact(0)
{
m_rails_temp = palloc_array(terms_t, N());
m_rails_temp = palloc_array(terms_for_net_t, N());
for (unsigned k = 0; k < N(); k++)
{
m_terms[k] = palloc(terms_t);
m_terms[k] = palloc(terms_for_net_t);
m_last_RHS[k] = 0.0;
}
}

6
src/lib/netlist/solver/nld_ms_gcr.h
View File

@ -150,7 +150,7 @@ void matrix_solver_GCR_t<m_N, storage_N>::vsetup(analog_net_t::list_t &nets)
/* build pointers into the compressed row format matrix for each terminal */
for (unsigned j=0; j< this->m_terms[k]->m_railstart;j++)
{
int other = this->m_terms[k]->net_other()[j];
int other = this->m_terms[k]->connected_net_idx()[j];
for (unsigned i = mat.ia[k]; i < nz; i++)
if (other == static_cast<int>(mat.ja[i]))
{
@ -251,7 +251,7 @@ unsigned matrix_solver_GCR_t<m_N, storage_N>::vsolve_non_dynamic(const bool newt
for (unsigned k = 0; k < iN; k++)
{
terms_t *t = this->m_terms[k];
terms_for_net_t *t = this->m_terms[k];
nl_double gtot_t = 0.0;
nl_double RHS_t = 0.0;
@ -260,7 +260,7 @@ unsigned matrix_solver_GCR_t<m_N, storage_N>::vsolve_non_dynamic(const bool newt
const nl_double * const RESTRICT gt = t->gt();
const nl_double * const RESTRICT go = t->go();
const nl_double * const RESTRICT Idr = t->Idr();
const nl_double * const * RESTRICT other_cur_analog = t->other_curanalog();
const nl_double * const * RESTRICT other_cur_analog = t->connected_net_V();
#if (0 ||NL_USE_SSE)
__m128d mg = mm_set_pd(0.0, 0.0);

6
src/lib/netlist/solver/nld_ms_gmres.h
View File

@ -81,7 +81,7 @@ void matrix_solver_GMRES_t<m_N, storage_N>::vsetup(analog_net_t::list_t &nets)
for (unsigned k=0; k<iN; k++)
{
terms_t * RESTRICT row = this->m_terms[k];
terms_for_net_t * RESTRICT row = this->m_terms[k];
mat.ia[k] = nz;
for (unsigned j=0; j<row->m_nz.size(); j++)
@ -97,7 +97,7 @@ void matrix_solver_GMRES_t<m_N, storage_N>::vsetup(analog_net_t::list_t &nets)
for (unsigned j=0; j< this->m_terms[k]->m_railstart;j++)
{
for (unsigned i = mat.ia[k]; i<nz; i++)
if (this->m_terms[k]->net_other()[j] == static_cast<int>(mat.ja[i]))
if (this->m_terms[k]->connected_net_idx()[j] == static_cast<int>(mat.ja[i]))
{
m_term_cr[k].push_back(i);
break;
@ -140,7 +140,7 @@ unsigned matrix_solver_GMRES_t<m_N, storage_N>::vsolve_non_dynamic(const bool ne
const nl_double * const RESTRICT gt = this->m_terms[k]->gt();
const nl_double * const RESTRICT go = this->m_terms[k]->go();
const nl_double * const RESTRICT Idr = this->m_terms[k]->Idr();
const nl_double * const * RESTRICT other_cur_analog = this->m_terms[k]->other_curanalog();
const nl_double * const * RESTRICT other_cur_analog = this->m_terms[k]->connected_net_V();
new_V[k] = this->m_nets[k]->m_cur_Analog;

4
src/lib/netlist/solver/nld_ms_sor.h
View File

@ -84,7 +84,7 @@ unsigned matrix_solver_SOR_t<m_N, storage_N>::vsolve_non_dynamic(const bool newt
const nl_double * const RESTRICT gt = this->m_terms[k]->gt();
const nl_double * const RESTRICT go = this->m_terms[k]->go();
const nl_double * const RESTRICT Idr = this->m_terms[k]->Idr();
const nl_double * const *other_cur_analog = this->m_terms[k]->other_curanalog();
const nl_double * const *other_cur_analog = this->m_terms[k]->connected_net_V();
new_V[k] = this->m_nets[k]->m_cur_Analog;
@ -137,7 +137,7 @@ unsigned matrix_solver_SOR_t<m_N, storage_N>::vsolve_non_dynamic(const bool newt
nl_double err = 0;
for (unsigned k = 0; k < iN; k++)
{
const int * RESTRICT net_other = this->m_terms[k]->net_other();
const int * RESTRICT net_other = this->m_terms[k]->connected_net_idx();
const std::size_t railstart = this->m_terms[k]->m_railstart;
const nl_double * RESTRICT go = this->m_terms[k]->go();

112
src/lib/netlist/solver/nld_solver.cpp
View File

@ -72,7 +72,7 @@ NETLIB_RESET(solver)
m_mat_solvers[i]->do_reset();
}
NETLIB_STOP(solver)
void NETLIB_NAME(solver)::stop()
{
for (std::size_t i = 0; i < m_mat_solvers.size(); i++)
m_mat_solvers[i]->log_stats();
@ -87,6 +87,9 @@ NETLIB_UPDATE(solver)
if (m_params.m_dynamic)
return;
/* force solving during start up if there are no time-step devices */
/* FIXME: Needs a more elegant solution */
bool force_solve = (netlist().time() < netlist_time::from_double(2 * m_params.m_max_timestep));
#if HAS_OPENMP && USE_OPENMP
const std::size_t t_cnt = m_mat_solvers.size();
@ -114,7 +117,7 @@ NETLIB_UPDATE(solver)
}
#else
for (auto & solver : m_mat_solvers)
if (solver->has_timestep_devices())
if (solver->has_timestep_devices() || force_solve)
// Ignore return value
ATTR_UNUSED const netlist_time ts = solver->solve();
#endif
@ -127,6 +130,13 @@ NETLIB_UPDATE(solver)
}
}
template <class C>
std::unique_ptr<matrix_solver_t> create_it(netlist_t &nl, pstring name, solver_parameters_t &params, unsigned size)
{
typedef C solver;
return plib::make_unique<solver>(nl, name, &params, size);
}
template <int m_N, int storage_N>
std::unique_ptr<matrix_solver_t> NETLIB_NAME(solver)::create_solver(unsigned size, const bool use_specific)
{
@ -137,55 +147,48 @@ std::unique_ptr<matrix_solver_t> NETLIB_NAME(solver)::create_solver(unsigned siz
return plib::make_unique<matrix_solver_direct2_t>(netlist(), solvername, &m_params);
else
{
if (static_cast<int>(size) >= m_gs_threshold())
if (pstring("SOR_MAT").equals(m_method()))
{
if (pstring("SOR_MAT").equals(m_iterative_solver()))
{
typedef matrix_solver_SOR_mat_t<m_N,storage_N> solver_sor_mat;
return plib::make_unique<solver_sor_mat>(netlist(), solvername, &m_params, size);
}
else if (pstring("MAT_CR").equals(m_iterative_solver()))
{
typedef matrix_solver_GCR_t<m_N,storage_N> solver_mat;
return plib::make_unique<solver_mat>(netlist(), solvername, &m_params, size);
}
else if (pstring("MAT").equals(m_iterative_solver()))
{
typedef matrix_solver_direct_t<m_N,storage_N> solver_mat;
return plib::make_unique<solver_mat>(netlist(), solvername, &m_params, size);
}
else if (pstring("SM").equals(m_iterative_solver()))
{
/* Sherman-Morrison Formula */
typedef matrix_solver_sm_t<m_N,storage_N> solver_mat;
return plib::make_unique<solver_mat>(netlist(), solvername, &m_params, size);
}
else if (pstring("W").equals(m_iterative_solver()))
{
/* Woodbury Formula */
typedef matrix_solver_w_t<m_N,storage_N> solver_mat;
return plib::make_unique<solver_mat>(netlist(), solvername, &m_params, size);
}
else if (pstring("SOR").equals(m_iterative_solver()))
{
typedef matrix_solver_SOR_t<m_N,storage_N> solver_GS;
return plib::make_unique<solver_GS>(netlist(), solvername, &m_params, size);
}
else if (pstring("GMRES").equals(m_iterative_solver()))
{
typedef matrix_solver_GMRES_t<m_N,storage_N> solver_GMRES;
return plib::make_unique<solver_GMRES>(netlist(), solvername, &m_params, size);
}
else
{
netlist().log().fatal("Unknown solver type: {1}\n", m_iterative_solver());
return nullptr;
}
return create_it<matrix_solver_SOR_mat_t<m_N, storage_N>>(netlist(), solvername, m_params, size);
//typedef matrix_solver_SOR_mat_t<m_N,storage_N> solver_sor_mat;
//return plib::make_unique<solver_sor_mat>(netlist(), solvername, &m_params, size);
}
else if (pstring("MAT_CR").equals(m_method()))
{
typedef matrix_solver_GCR_t<m_N,storage_N> solver_mat;
return plib::make_unique<solver_mat>(netlist(), solvername, &m_params, size);
}
else if (pstring("MAT").equals(m_method()))
{
typedef matrix_solver_direct_t<m_N,storage_N> solver_mat;
return plib::make_unique<solver_mat>(netlist(), solvername, &m_params, size);
}
else if (pstring("SM").equals(m_method()))
{
/* Sherman-Morrison Formula */
typedef matrix_solver_sm_t<m_N,storage_N> solver_mat;
return plib::make_unique<solver_mat>(netlist(), solvername, &m_params, size);
}
else if (pstring("W").equals(m_method()))
{
/* Woodbury Formula */
typedef matrix_solver_w_t<m_N,storage_N> solver_mat;
return plib::make_unique<solver_mat>(netlist(), solvername, &m_params, size);
}
else if (pstring("SOR").equals(m_method()))
{
typedef matrix_solver_SOR_t<m_N,storage_N> solver_GS;
return plib::make_unique<solver_GS>(netlist(), solvername, &m_params, size);
}
else if (pstring("GMRES").equals(m_method()))
{
typedef matrix_solver_GMRES_t<m_N,storage_N> solver_GMRES;
return plib::make_unique<solver_GMRES>(netlist(), solvername, &m_params, size);
}
else
{
typedef matrix_solver_direct_t<m_N,storage_N> solver_D;
return plib::make_unique<solver_D>(netlist(), solvername, &m_params, size);
netlist().log().fatal("Unknown solver type: {1}\n", m_method());
return nullptr;
}
}
}
@ -252,12 +255,12 @@ void NETLIB_NAME(solver)::post_start()
/* FIXME: Throw when negative */
m_params.m_gs_loops = static_cast<unsigned>(m_gs_loops());
m_params.m_nr_loops = static_cast<unsigned>(m_nr_loops());
m_params.m_nt_sync_delay = netlist_time::from_double(m_sync_delay());
m_params.m_lte = m_lte();
m_params.m_sor = m_sor();
m_params.m_nr_recalc_delay = netlist_time::from_double(m_nr_recalc_delay());
m_params.m_lte = m_dynamic_lte();
m_params.m_sor = m_gs_sor();
m_params.m_min_timestep = m_min_timestep();
m_params.m_dynamic = (m_dynamic() == 1 ? true : false);
m_params.m_min_timestep = m_dynamic_min_ts();
m_params.m_dynamic = (m_dynamic_ts() == 1 ? true : false);
m_params.m_max_timestep = netlist_time::from_double(1.0 / m_freq()).as_double();
if (m_params.m_dynamic)
@ -294,6 +297,7 @@ void NETLIB_NAME(solver)::post_start()
switch (net_count)
{
#if 1
case 1:
ms = create_solver<1,1>(1, use_specific);
break;
@ -340,6 +344,7 @@ void NETLIB_NAME(solver)::post_start()
case 87:
ms = create_solver<87,87>(87, use_specific);
break;
#endif
#endif
default:
netlist().log().warning("No specific solver found for netlist of size {1}", net_count);
@ -351,7 +356,8 @@ void NETLIB_NAME(solver)::post_start()
{
ms = create_solver<0,32>(net_count, use_specific);
}
else if (net_count <= 64)
else
if (net_count <= 64)
{
ms = create_solver<0,64>(net_count, use_specific);
}

29
src/lib/netlist/solver/nld_solver.h
View File

@ -42,26 +42,25 @@ NETLIB_OBJECT(solver)
NETLIB_CONSTRUCTOR(solver)
, m_fb_step(*this, "FB_step")
, m_Q_step(*this, "Q_step")
, m_sync_delay(*this, "SYNC_DELAY", NLTIME_FROM_NS(10).as_double())
, m_freq(*this, "FREQ", 48000.0)
/* iteration parameters */
, m_sor(*this, "SOR_FACTOR", 1.059)
, m_iterative_solver(*this, "ITERATIVE", "SOR")
, m_gs_sor(*this, "SOR_FACTOR", 1.059)
, m_method(*this, "METHOD", "MAT_CR")
, m_accuracy(*this, "ACCURACY", 1e-7)
, m_gs_threshold(*this, "GS_THRESHOLD", 6) // below this value, gaussian elimination is used
, m_gs_loops(*this, "GS_LOOPS",9) // Gauss-Seidel loops
/* general parameters */
, m_gmin(*this, "GMIN", NETLIST_GMIN_DEFAULT)
, m_pivot(*this, "PIVOT", 0) // use pivoting - on supported solvers
, m_nr_loops(*this, "NR_LOOPS", 250) // Newton-Raphson loops
, m_nr_recalc_delay(*this, "NR_RECALC_DELAY", NLTIME_FROM_NS(10).as_double()) // Delay to next solve attempt if nr loops exceeded
, m_parallel(*this, "PARALLEL", 0)
/* automatic time step */
, m_dynamic(*this, "DYNAMIC_TS", 0)
, m_lte(*this, "DYNAMIC_LTE", 5e-5) // diff/timestep
, m_min_timestep(*this, "MIN_TIMESTEP", 1e-6) // nl_double timestep resolution
, m_dynamic_ts(*this, "DYNAMIC_TS", 0)
, m_dynamic_lte(*this, "DYNAMIC_LTE", 5e-5) // diff/timestep
, m_dynamic_min_ts(*this, "DYNAMIC_MIN_TIMESTEP", 1e-6) // nl_double timestep resolution
, m_log_stats(*this, "LOG_STATS", 1) // nl_double timestep resolution
{
@ -73,7 +72,7 @@ NETLIB_OBJECT(solver)
virtual ~NETLIB_NAME(solver)();
void post_start();
void stop() override;
void stop();
inline nl_double gmin() { return m_gmin(); }
@ -87,21 +86,19 @@ protected:
logic_input_t m_fb_step;
logic_output_t m_Q_step;
param_double_t m_sync_delay;
param_double_t m_freq;
param_double_t m_sor;
param_str_t m_iterative_solver;
param_double_t m_gs_sor;
param_str_t m_method;
param_double_t m_accuracy;
param_int_t m_gs_threshold;
param_int_t m_gs_loops;
param_double_t m_gmin;
param_logic_t m_pivot;
param_int_t m_nr_loops;
param_double_t m_nr_recalc_delay;
param_int_t m_parallel;
param_logic_t m_dynamic;
param_double_t m_lte;
param_double_t m_min_timestep;
param_logic_t m_dynamic_ts;
param_double_t m_dynamic_lte;
param_double_t m_dynamic_min_ts;
param_logic_t m_log_stats;

11
src/mame/audio/nl_kidniki.cpp
View File

@ -313,21 +313,20 @@ NETLIST_START(kidniki)
PARAM(Solver.ACCURACY, 1e-8)
PARAM(Solver.NR_LOOPS, 300)
PARAM(Solver.GS_LOOPS, 1)
PARAM(Solver.GS_THRESHOLD, 6)
//PARAM(Solver.ITERATIVE, "SOR")
PARAM(Solver.ITERATIVE, "MAT_CR")
//PARAM(Solver.ITERATIVE, "GMRES")
//PARAM(Solver.METHOD, "SOR")
PARAM(Solver.METHOD, "MAT_CR")
//PARAM(Solver.METHOD, "GMRES")
PARAM(Solver.PARALLEL, 0)
PARAM(Solver.SOR_FACTOR, 1.00)
PARAM(Solver.DYNAMIC_TS, 0)
PARAM(Solver.DYNAMIC_LTE, 5e-4)
PARAM(Solver.MIN_TIMESTEP, 20e-6)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 20e-6)
#else
SOLVER(Solver, 12000)
PARAM(Solver.ACCURACY, 1e-8)
PARAM(Solver.NR_LOOPS, 300)
PARAM(Solver.GS_LOOPS, 20)
PARAM(Solver.ITERATIVE, "GMRES")
PARAM(Solver.METHOD, "GMRES")
PARAM(Solver.PARALLEL, 0)
#endif

1
src/mame/audio/nl_mario.cpp
View File

@ -220,7 +220,6 @@ NETLIST_START(mario)
SOLVER(Solver, 48000)
PARAM(Solver.ACCURACY, 1e-6)
PARAM(Solver.SOR_FACTOR, 1.0)
PARAM(Solver.GS_THRESHOLD, 5)
PARAM(Solver.GS_LOOPS, 1)
/* Dynamic timestepping avoids excessive newton loops on startup */
PARAM(Solver.DYNAMIC_LTE, 5e-2)

3
src/mame/drivers/advision.cpp
View File

@ -12,7 +12,6 @@
TODO:
- Turtles music is monotonous
- convert to discrete sound
- screen pincushion distortion
@ -67,7 +66,7 @@ static MACHINE_CONFIG_START( advision, advision_state )
MCFG_CPU_PROGRAM_MAP(program_map)
MCFG_CPU_IO_MAP(io_map)
MCFG_CPU_ADD(COP411_TAG, COP411, 52631*16) // COP411L-KCN/N
MCFG_CPU_ADD(COP411_TAG, COP411, 52631*4) // COP411L-KCN/N, R11=82k, C8=56pF
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_RAM_POWER_SUPPLY, false)
MCFG_COP400_READ_L_CB(READ8(advision_state, sound_cmd_r))
MCFG_COP400_WRITE_G_CB(WRITE8(advision_state, sound_g_w))

17
src/mame/drivers/argo.cpp
View File

@ -36,14 +36,19 @@ public:
};
argo_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_p_videoram(*this, "p_videoram"){ }
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
, m_p_videoram(*this, "videoram")
{ }
required_device<cpu_device> m_maincpu;
DECLARE_WRITE8_MEMBER(argo_videoram_w);
DECLARE_READ8_MEMBER(argo_io_r);
DECLARE_WRITE8_MEMBER(argo_io_w);
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_DRIVER_INIT(argo);
private:
required_device<cpu_device> m_maincpu;
required_shared_ptr<uint8_t> m_p_videoram;
const uint8_t *m_p_chargen;
uint8_t m_framecnt;
@ -53,8 +58,6 @@ public:
uint8_t m_scroll_ctrl;
virtual void machine_reset() override;
virtual void video_start() override;
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_DRIVER_INIT(argo);
protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
@ -143,7 +146,7 @@ static ADDRESS_MAP_START(argo_mem, AS_PROGRAM, 8, argo_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x07ff) AM_RAMBANK("boot")
AM_RANGE(0x0800, 0xf7af) AM_RAM
AM_RANGE(0xf7b0, 0xf7ff) AM_RAM AM_SHARE("p_videoram")
AM_RANGE(0xf7b0, 0xf7ff) AM_RAM AM_SHARE("videoram")
AM_RANGE(0xf800, 0xffff) AM_ROM AM_WRITE(argo_videoram_w)
ADDRESS_MAP_END

3
src/mame/drivers/arkanoid.cpp
View File

@ -787,7 +787,6 @@ DIP locations verified for:
#include "cpu/z80/z80.h"
#include "includes/arkanoid.h"
#include "sound/ay8910.h"
#include "cpu/m6805/m6805.h"
#include "machine/watchdog.h"
/***************************************************************************/
@ -1322,7 +1321,7 @@ static MACHINE_CONFIG_START( arkanoid, arkanoid_state )
MCFG_WATCHDOG_ADD("watchdog")
MCFG_CPU_ADD("mcu", M68705_NEW, XTAL_12MHz/4) /* verified on pcb */
MCFG_CPU_ADD("mcu", M68705P5, XTAL_12MHz/4) /* verified on pcb */
MCFG_M68705_PORTA_R_CB(READ8(arkanoid_state, mcu_porta_r))
MCFG_M68705_PORTA_W_CB(WRITE8(arkanoid_state, mcu_porta_w))
MCFG_M68705_PORTB_R_CB(READ8(arkanoid_state, mcu_portb_r))

270
src/mame/drivers/armedf.cpp
View File

@ -17,6 +17,9 @@ Crazy Climber 2
Armed Formation
(c)1988 Nichibutsu
Sky Robo / Tatakae! Big Fighter
(c)1989 Nichibutsu
Based on the notes below I suspect several of the supported sets are
actually bootlegs.
@ -207,85 +210,104 @@ Tatakae! Big Fighter (c)1989 Nichibutsu
------------------------------------------------------------------------
Tatakae! Big Fighter
Guru Readme for Tatakae! Big Fighter
Nichibutsu, 1989
This is a horizontal shoot'em-up similar to R-Type.
It appears this PCB is re-used? Sticker says PCB number is 1706 and (C) 1989
It appears this PCB is re-used from an older Nichibutsu game.
A sticker on the main board says the PCB number is 1706 and (C) 1989
On the PCB under the sticker is written 1605 and (C) 1988
There is an extra sub-board with PCB number '1706-3' that plugs
into the 68000 socket and the 68000 CPU, program ROMs and an i8751
MCU are located on the sub-board. There are 4 unused sockets
on the main board where the program ROMs would be located for a
different game when the sub-board is not be present.
No good reference pics are available for Armed Formation but the
original game on this hardware is probably Armed Formation as
the top PCB looks identical. The bottom PCB is identified as
matching Terra Force and possibly also used with Armed Formation.
PCB Layout
----------
1605A-1 (1706-1)
-------------------------------------------------------------------
| 2018 |
| 6.15F 2018 |
| PROM.13H 5.13F |
|-----------------------------------------------------------------|
| J H F E D C B A|
| 2018 17|
| 2018 16|
| |
| 6.15F 15|
| |
| 5814 |
| 5814 |
| |
| 5814 |
| 5814 |
| 7.11C |
| |
| 6264 6264 |
| 6264 6264 |
| ---------------- |
| |1706-3 | |
| | | PAL |
| | PAL 8751 | |
| | PAL | |
| | | |
| | | PAL |
| | 2.IC4 4.IC5 | |
| | 1.IC2 3.IC3 | |
| DSW2 | | |
| DSW1 | 68000 | 16MHz PAL |
| ---------------- |
-------------------------------------------------------------------
| 5814 14|
| PROM.13H 5.13F 5814 13|
|VOLUME |
| 5814 12|
| 5814 7.11C 11|
| |--------------------| |
| |1706-3 | 10|
| | | 9|
| | PAL 8751.IC13| 8|
| | PAL | |
| | 6264 6264 | 7|
| | | |
| | 6264 6264 | PAL.6B 6|
| | DIP32.5E DIP32.5D 5|
| | 2.IC4 4.IC5 | |
| | 1.IC2 3.IC3 | 4|
| | | |
| | DIP32.3E DIP32.3D PAL.3B 3|
| DSW2 | | 2|
| | 68000 16MHz |
| DSW1 |--------------------| PAL.1B 1|
|-----------------------------------------------------------------|
Notes:
68000 - Clock 8.000MHz [16/2], located at IC1 on the sub-board
8751 - Clock 8.000MHz [16/2], located at IC13 on the sub-board
HSync - 15.0735kHz
VSync - 59.1358Hz
2018/5814 - 2kx8 SRAM
6264 - 8kx8 SRAM (all located on main board underneath the sub-board)
DIP32 - Empty DIP32 sockets (all located on main board underneath the sub-board)
PROM - 82S129 Bipolar PROM
1605B (1706-2)
-------------------------------------------------------------------
|-----------------------------------------------------------------|
|K J H F E D C B A |
| 8.17K Z80A 2018 17|
| 2018 16|
| YM3812 2018 2018 15|
| YM3014B |
| 14|
| |
| 8.17K Z80A 2018 |
| 2018 |
| YM3812 2018 2018 |
| Y3014B |
| LM324 13|
| 12|
| |
| LM324 11|
| 2018 10|
| |
| MB3730 10.9ED 2018 9|
| 9.8ED 12.8A 8|
| PAL 7|
| 2018 2018 11.6A 6|
| 2018 2018 5|
| |
| 4|
| |
| 3|
| |
| |
| |
| 2018 |
| 10.9D 2018 |
| 9.8D 12.8A |
| PAL 11.6A |
| |
| |
| |
| |
| 2018 2018 |
| 2018 2018 |
| |
| 24MHz |
| |
-------------------------------------------------------------------
| 24MHz 2|
| 1|
|-----------------------------------------------------------------|
Notes:
Horizontal Sync: 15.08kHz
Vertical Sync: 60Hz
68K Clock: 7.998MHz
Z80 Clock: ? (unstable, probably 6MHz or less)
Z80A - Clock 4.000MHz [24/6]
YM3812 - Yamaha YM3812 FM Operator TYPE L2 (OPL2) sound chip. Clock 4.000MHz [24/6]
YM3014B - Yamaha YM3014B Serial Input Floating D/A Converter
2018 - 2kx8 SRAM
LM324 - Texas Instruments LM324 Quad Operational Amplifier with True Differential Inputs
MB3730 - Fujitsi MB3730 12W BTL Single Channel Amplifier
***********************************************************************/
@ -295,6 +317,7 @@ Notes:
#include "cpu/m68000/m68000.h"
#include "cpu/z80/z80.h"
#include "cpu/mcs51/mcs51.h"
#include "sound/3526intf.h"
#include "sound/3812intf.h"
#include "sound/dac.h"
#include "sound/volt_reg.h"
@ -788,6 +811,15 @@ static ADDRESS_MAP_START( sound_portmap, AS_IO, 8, armedf_state )
AM_RANGE(0x6, 0x6) AM_DEVREAD("soundlatch", generic_latch_8_device, read)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_3526_portmap, AS_IO, 8, armedf_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x0, 0x1) AM_DEVWRITE("ymsnd", ym3526_device, write)
AM_RANGE(0x2, 0x2) AM_DEVWRITE("dac1", dac_byte_interface, write)
AM_RANGE(0x3, 0x3) AM_DEVWRITE("dac2", dac_byte_interface, write)
AM_RANGE(0x4, 0x4) AM_READ(soundlatch_clear_r)
AM_RANGE(0x6, 0x6) AM_DEVREAD("soundlatch", generic_latch_8_device, read)
ADDRESS_MAP_END
/*************************************
*
@ -1202,6 +1234,26 @@ MACHINE_RESET_MEMBER(armedf_state,armedf)
}
static MACHINE_CONFIG_FRAGMENT( terraf_sound )
MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/6) // 4mhz
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
MCFG_SPEAKER_STANDARD_MONO("speaker")
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_24MHz/6) // 4mhz
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5)
MCFG_SOUND_ADD("dac1", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.8) // 10-pin SIP with 74HC374P latch
MCFG_SOUND_ADD("dac2", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.8) // 10-pin SIP with 74HC374P latch
MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
MCFG_SOUND_ROUTE_EX(0, "dac1", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac1", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE_EX(0, "dac2", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac2", -1.0, DAC_VREF_NEG_INPUT)
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( terraf, armedf_state )
/* basic machine hardware */
@ -1209,11 +1261,6 @@ static MACHINE_CONFIG_START( terraf, armedf_state )
MCFG_CPU_PROGRAM_MAP(terraf_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
MCFG_MACHINE_START_OVERRIDE(armedf_state,armedf)
MCFG_MACHINE_RESET_OVERRIDE(armedf_state,armedf)
@ -1239,33 +1286,22 @@ static MACHINE_CONFIG_START( terraf, armedf_state )
MCFG_BUFFERED_SPRITERAM16_ADD("spriteram")
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("speaker")
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_8MHz/2)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5)
MCFG_SOUND_ADD("dac1", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.8) // unknown DAC
MCFG_SOUND_ADD("dac2", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.8) // unknown DAC
MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
MCFG_SOUND_ROUTE_EX(0, "dac1", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac1", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE_EX(0, "dac2", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac2", -1.0, DAC_VREF_NEG_INPUT)
MCFG_FRAGMENT_ADD(terraf_sound)
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( terrafjb, armedf_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz
MCFG_CPU_PROGRAM_MAP(terraf_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/6) // 4mhz
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
MCFG_CPU_ADD("extra", Z80, XTAL_8MHz/2) // 4mhz?
MCFG_CPU_ADD("extra", Z80, XTAL_16MHz/4) // 4mhz?
MCFG_CPU_PROGRAM_MAP(terrafjb_extraz80_map)
MCFG_CPU_IO_MAP(terrafjb_extraz80_portmap)
@ -1295,7 +1331,7 @@ static MACHINE_CONFIG_START( terrafjb, armedf_state )
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_8MHz/2)
MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_24MHz/6) // 4mhz
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5)
MCFG_SOUND_ADD("dac1", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.8) // unknown DAC
@ -1312,15 +1348,10 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( kozure, armedf_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz
MCFG_CPU_PROGRAM_MAP(kozure_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
MCFG_MACHINE_START_OVERRIDE(armedf_state,armedf)
MCFG_MACHINE_RESET_OVERRIDE(armedf_state,armedf)
@ -1345,28 +1376,17 @@ static MACHINE_CONFIG_START( kozure, armedf_state )
MCFG_BUFFERED_SPRITERAM16_ADD("spriteram")
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("speaker")
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_8MHz/2)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5)
MCFG_SOUND_ADD("dac1", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.4) // unknown DAC
MCFG_SOUND_ADD("dac2", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.4) // unknown DAC
MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
MCFG_SOUND_ROUTE_EX(0, "dac1", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac1", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE_EX(0, "dac2", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac2", -1.0, DAC_VREF_NEG_INPUT)
MCFG_FRAGMENT_ADD(terraf_sound)
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( armedf, armedf_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz
MCFG_CPU_PROGRAM_MAP(armedf_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/6) // 4mhz
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
@ -1397,7 +1417,7 @@ static MACHINE_CONFIG_START( armedf, armedf_state )
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_8MHz/2)
MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_24MHz/6) // 4mhz
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5)
MCFG_SOUND_ADD("dac1", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5) // unknown DAC
@ -1410,11 +1430,11 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( cclimbr2, armedf_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz
MCFG_CPU_PROGRAM_MAP(cclimbr2_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq2_line_assert)
MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/6) // 4mhz
MCFG_CPU_PROGRAM_MAP(cclimbr2_soundmap)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
@ -1447,7 +1467,7 @@ static MACHINE_CONFIG_START( cclimbr2, armedf_state )
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_8MHz/2)
MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_24MHz/6) // or YM3526?
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5)
MCFG_SOUND_ADD("dac1", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.4) // unknown DAC
@ -1460,13 +1480,13 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( legion, armedf_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz
MCFG_CPU_PROGRAM_MAP(legion_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq2_line_assert)
MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/6) // 4mhz
MCFG_CPU_PROGRAM_MAP(cclimbr2_soundmap)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_IO_MAP(sound_3526_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
MCFG_MACHINE_START_OVERRIDE(armedf_state,armedf)
@ -1497,11 +1517,11 @@ static MACHINE_CONFIG_START( legion, armedf_state )
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_8MHz/2)
MCFG_SOUND_ADD("ymsnd", YM3526, XTAL_24MHz/6) // 4mhz
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5)
MCFG_SOUND_ADD("dac1", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.4) // unknown DAC
MCFG_SOUND_ADD("dac2", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.4) // unknown DAC
MCFG_SOUND_ADD("dac1", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.4) // 10-pin SIP with 74HC374P latch
MCFG_SOUND_ADD("dac2", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.4) // 10-pin SIP with 74HC374P latch
MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
MCFG_SOUND_ROUTE_EX(0, "dac1", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac1", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE_EX(0, "dac2", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac2", -1.0, DAC_VREF_NEG_INPUT)
@ -1510,11 +1530,11 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( legionjb, armedf_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz
MCFG_CPU_PROGRAM_MAP(legionjb_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq2_line_assert)
MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/6) // 4mhz
MCFG_CPU_PROGRAM_MAP(cclimbr2_soundmap)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
@ -1522,7 +1542,6 @@ static MACHINE_CONFIG_START( legionjb, armedf_state )
MCFG_MACHINE_START_OVERRIDE(armedf_state,armedf)
MCFG_MACHINE_RESET_OVERRIDE(armedf_state,armedf)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -1546,7 +1565,7 @@ static MACHINE_CONFIG_START( legionjb, armedf_state )
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_8MHz/2)
MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_24MHz/6) // or YM3526?
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5)
MCFG_SOUND_ADD("dac1", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.4) // unknown DAC
@ -1556,19 +1575,13 @@ static MACHINE_CONFIG_START( legionjb, armedf_state )
MCFG_SOUND_ROUTE_EX(0, "dac2", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac2", -1.0, DAC_VREF_NEG_INPUT)
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( bigfghtr, bigfghtr_state )
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // verified
MCFG_CPU_PROGRAM_MAP(bigfghtr_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/4) // 6mhz?
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
MCFG_CPU_ADD("mcu", I8751, XTAL_16MHz/4)
MCFG_CPU_ADD("mcu", I8751, XTAL_16MHz/2) // verified
MCFG_CPU_PROGRAM_MAP(bigfghtr_mcu_map)
MCFG_CPU_IO_MAP(bigfghtr_mcu_io_map)
@ -1577,7 +1590,7 @@ static MACHINE_CONFIG_START( bigfghtr, bigfghtr_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(XTAL_16MHz/2,531,12*8,(64-12)*8, 254, 1*8, 31*8) // guess, matches 59.3 Hz from reference
MCFG_SCREEN_RAW_PARAMS(XTAL_16MHz/2,531,12*8,(64-12)*8, 254, 1*8, 31*8) // guess, matches 59.3 Hz from reference - measured at 59.1358Hz
MCFG_SCREEN_PALETTE("palette")
MCFG_VIDEO_START_OVERRIDE(armedf_state,armedf)
@ -1591,18 +1604,7 @@ static MACHINE_CONFIG_START( bigfghtr, bigfghtr_state )
MCFG_BUFFERED_SPRITERAM16_ADD("spriteram")
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("speaker")
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_SOUND_ADD("ymsnd", YM3812, XTAL_8MHz/2)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5)
MCFG_SOUND_ADD("dac1", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.0) // unknown DAC
MCFG_SOUND_ADD("dac2", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 1.0) // unknown DAC
MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
MCFG_SOUND_ROUTE_EX(0, "dac1", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac1", -1.0, DAC_VREF_NEG_INPUT)
MCFG_SOUND_ROUTE_EX(0, "dac2", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac2", -1.0, DAC_VREF_NEG_INPUT)
MCFG_FRAGMENT_ADD(terraf_sound)
MACHINE_CONFIG_END
/*************************************
@ -2242,5 +2244,5 @@ GAME( 1988, cclimbr2a,cclimbr2, cclimbr2, cclimbr2, armedf_state, cclimbr2, RO
GAME( 1988, armedf, 0, armedf, armedf, armedf_state, armedf, ROT270, "Nichibutsu", "Armed Formation", MACHINE_SUPPORTS_SAVE )
GAME( 1988, armedff, armedf, armedf, armedf, armedf_state, armedf, ROT270, "Nichibutsu (Fillmore license)", "Armed Formation (Fillmore license)", MACHINE_SUPPORTS_SAVE )
GAME( 1989, skyrobo, 0, bigfghtr, bigfghtr, armedf_state, armedf, ROT0, "Nichibutsu", "Sky Robo", MACHINE_SUPPORTS_SAVE )
GAME( 1989, bigfghtr, skyrobo, bigfghtr, bigfghtr, armedf_state, armedf, ROT0, "Nichibutsu", "Tatakae! Big Fighter (Japan)", MACHINE_SUPPORTS_SAVE )
GAME( 1989, skyrobo, 0, bigfghtr, bigfghtr, armedf_state, armedf, ROT0, "Nichibutsu", "Sky Robo", MACHINE_SUPPORTS_SAVE )
GAME( 1989, bigfghtr, skyrobo, bigfghtr, bigfghtr, armedf_state, armedf, ROT0, "Nichibutsu", "Tatakae! Big Fighter (Japan)", MACHINE_SUPPORTS_SAVE )

37
src/mame/drivers/astrof.cpp
View File

@ -1194,6 +1194,42 @@ ROM_START( acombat4 )
ROM_LOAD( "74471.cpu", 0x0000, 0x0100, CRC(a6bdd18c) SHA1(438bfc543730afdb531204585f17a68ddc03ded0) )
ROM_END
/* Star Fighter (VGG)
CPUs
QTY Type clock position function
1x R6502-13 2a 8-bit Microprocessor - main
1x TBA810 2f Audio Amplifier - sound
1x oscillator 10595 9c
ROMs
QTY Type position status
6x TMS2716 0-5 dumped
1x MMI6341-1J 12c dumped
RAMs
QTY Type position
19x ITT4027 1-19
2x 2114L3PC 5b,6b
Others
1x 22x2 edge connector
1x trimmer (volume)(1f)
1x 8 DIP switches bank (1e)
1x 4 DIP switches bank (6e)*/
ROM_START( strfight )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "sf00.bin", 0xd000, 0x0800, CRC(35662bf6) SHA1(f8e4a116c6eedc25949dd4c2744e83a3cc6a4a41) )
ROM_LOAD( "sf01.bin", 0xd800, 0x0800, CRC(535f97bd) SHA1(7ea3e02627364db0ae6cbbfc5452a85624540c12) )
ROM_LOAD( "sf02.bin", 0xe000, 0x0800, CRC(2146c290) SHA1(82a7334fbe1a05fc3a58db881c46be6368cab4fd) )
ROM_LOAD( "sf03.bin", 0xe800, 0x0800, CRC(53e7ac18) SHA1(131016eac8785141bccc446b024d556f12f7484d) )
ROM_LOAD( "sf04.bin", 0xf000, 0x0800, CRC(059dd113) SHA1(23f908e8f456843a3360ece713dba8d2b4d16a63) )
ROM_LOAD( "sf05.bin", 0xf800, 0x0800, CRC(f4669140) SHA1(45b53ed9e65d16fd463df812cbf3d796bd30424f) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "mmi6341-1j.12c", 0x0000, 0x0200, CRC(528034d3) SHA1(29ef9cfe2540f9a1fb9d0184a4c8fd74a4d6e6ba) )
ROM_END
ROM_START( sstarbtl )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "b.bin", 0xd000, 0x0400, CRC(16ad2bcc) SHA1(e7f55d17ee18afbb045cd0fd8d3ffc0c8300130a) )
@ -1357,6 +1393,7 @@ GAME( 1979, acombat, astrof, abattle, abattle, astrof_state, afire, ROT90
GAME( 1979, acombato, astrof, abattle, abattle, astrof_state, afire, ROT90, "bootleg", "Astro Combat (older, PZ)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
GAME( 1979, acombat3, astrof, abattle, abattle, astrof_state, acombat3,ROT90, "bootleg (Proel)", "Astro Combat (unencrypted)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
GAME( 1979, acombat4, astrof, abattle, abattle, astrof_state, abattle, ROT90, "bootleg (Proel)", "Astro Combat (encrypted)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
GAME( 1979, strfight, astrof, abattle, abattle, astrof_state, acombat3,ROT90, "bootleg (VGG)", "Star Fighter (bootleg of Astro Fighter)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
GAME( 1979, sstarbtl, astrof, abattle, abattle, astrof_state, sstarbtl,ROT90, "bootleg", "Super Star Battle", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
GAME( 1979, spfghmk2, 0, spfghmk2, spfghmk2, driver_device,0, ROT90, "Data East", "Space Fighter Mark II (set 1)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )

306
src/mame/drivers/atlantis.cpp
View File

@ -50,29 +50,42 @@
#include "coreutil.h"
// Board Ctrl Reg Offsets
#define CTRL_POWER0 0
#define CTRL_POWER1 1
#define CTRL_IRQ1_EN 2
#define CTRL_IRQ2_EN 3
#define CTRL_IRQ3_EN 4
#define CTRL_IRQ4_EN 5
#define CTRL_GLOBAL_EN 6
#define CTRL_CAUSE 7
#define CTRL_STATUS 8
#define CTRL_SIZE 9
#define CTRL_PLD_REV 0
#define CTRL_RESET 1
#define CTRL_VSYNC_CLEAR 2
#define CTRL_IRQ_MAP1 3
#define CTRL_IRQ_MAP2 4
#define CTRL_IRQ_MAP3 5
// Empty?? 6
#define CTRL_IRQ_EN 7
#define CTRL_CAUSE 8
#define CTRL_STATUS 9
#define CTRL_SIZE 10
// These need more verification
// Reset bits
#define RESET_IOASIC 0x01
#define RESET_ROMBUS 0x02
#define RESET_ZEUS 0x04
#define RESET_ROMBUS_IN 0x08
#define RESET_IDE 0x10
#define RESET_DUART 0x20
// IRQ Bits
#define IOASIC_IRQ_SHIFT 0
#define GALILEO_IRQ_SHIFT 1
#define ZEUS_IRQ_SHIFT 2
#define PARALLEL_IRQ_SHIFT 3
#define UART1_SHIFT 4
#define UART2_SHIFT 5
#define ROMBUS_IRQ_SHIFT 1
#define ZEUS0_IRQ_SHIFT 2
#define ZEUS1_IRQ_SHIFT 3
#define ZEUS2_IRQ_SHIFT 4
#define WDOG_IRQ_SHIFT 5
#define A2D_IRQ_SHIFT 6
#define VBLANK_IRQ_SHIFT 7
// Not sure how duart interrupts are mapped
#define UART1_IRQ_SHIFT ZEUS2_IRQ_SHIFT
#define UART2_IRQ_SHIFT ZEUS2_IRQ_SHIFT
/* static interrupts */
#define GALILEO_IRQ_NUM MIPS3_IRQ0
#define VBLANK_IRQ_NUM MIPS3_IRQ3
#define IDE_IRQ_NUM MIPS3_IRQ4
#define DEBUG_CONSOLE (0)
@ -127,10 +140,8 @@ public:
DECLARE_WRITE32_MEMBER(asic_fifo_w);
DECLARE_WRITE32_MEMBER(dcs3_fifo_full_w);
READ32_MEMBER (green_r);
WRITE32_MEMBER(green_w);
READ8_MEMBER (blue_r);
WRITE8_MEMBER(blue_w);
READ8_MEMBER (exprom_r);
WRITE8_MEMBER(exprom_w);
WRITE32_MEMBER(user_io_output);
READ32_MEMBER(user_io_input);
@ -151,37 +162,28 @@ public:
DECLARE_WRITE_LINE_MEMBER(uart2_irq_callback);
DECLARE_CUSTOM_INPUT_MEMBER(port_mod_r);
DECLARE_READ32_MEMBER(port_ctrl_r);
DECLARE_WRITE32_MEMBER(port_ctrl_w);
uint32_t m_port_ctrl_reg[0x8];
DECLARE_READ16_MEMBER(port_ctrl_r);
DECLARE_WRITE16_MEMBER(port_ctrl_w);
uint16_t m_port_data;
uint16_t m_a2d_data;
DECLARE_READ16_MEMBER(a2d_ctrl_r);
DECLARE_WRITE16_MEMBER(a2d_ctrl_w);
DECLARE_READ16_MEMBER(a2d_data_r);
DECLARE_WRITE16_MEMBER(a2d_data_w);
};
READ32_MEMBER(atlantis_state::green_r)
READ8_MEMBER (atlantis_state::exprom_r)
{
// If not 0x80 cpu writes to 00e80000 = 0
if ((offset | 0x20000) != m_last_offset)
logerror("%06X: green_r %08x = %02x\n", machine().device("maincpu")->safe_pc(), offset, 0x80);
m_last_offset = offset | 0x20000;
return 0x80;
}
WRITE32_MEMBER(atlantis_state::green_w)
{
logerror("%06X: green_w %08x = %02x\n", machine().device("maincpu")->safe_pc(), offset, data);
m_last_offset = offset | 0x20000;
}
READ8_MEMBER (atlantis_state::blue_r)
{
//uint8_t data = m_red_data[offset];
logerror("%06X: blue_r %08x = %02x\n", machine().device("maincpu")->safe_pc(), offset, 0);
logerror("%06X: exprom_r %08x = %02x\n", machine().device("maincpu")->safe_pc(), offset, 0);
//return data;
return 0;
}
WRITE8_MEMBER(atlantis_state::blue_w)
WRITE8_MEMBER(atlantis_state::exprom_w)
{
logerror("%06X: blue_w %08x = %02x\n", machine().device("maincpu")->safe_pc(), offset, data);
logerror("%06X: exprom_w %08x = %02x\n", machine().device("maincpu")->safe_pc(), offset, data);
}
READ32_MEMBER(atlantis_state::board_ctrl_r)
@ -189,9 +191,10 @@ READ32_MEMBER(atlantis_state::board_ctrl_r)
uint32_t newOffset = offset >> 17;
uint32_t data = board_ctrl[newOffset];
switch (newOffset) {
case CTRL_PLD_REV:
// ???
data = 0x1;
case CTRL_STATUS:
if (1 && m_screen->vblank())
data |= 1 << VBLANK_IRQ_SHIFT;
if (m_last_offset != (newOffset | 0x40000))
if (LOG_IRQ)
logerror("%s:board_ctrl_r read from CTRL_STATUS offset %04X = %08X & %08X bus offset = %08X\n", machine().describe_context(), newOffset, data, mem_mask, offset);
@ -211,12 +214,12 @@ WRITE32_MEMBER(atlantis_state::board_ctrl_w)
uint32_t changeData = board_ctrl[newOffset] ^ data;
COMBINE_DATA(&board_ctrl[newOffset]);
switch (newOffset) {
case CTRL_POWER0:
case CTRL_RESET:
// 0x1 IOASIC Reset
// 0x4 Zeus2 Reset
// 0x10 IDE Reset
if (changeData & 0x1) {
if ((data & 0x0001) == 0) {
if (changeData & RESET_IOASIC) {
if ((data & RESET_IOASIC) == 0) {
m_ioasic->ioasic_reset();
m_dcs->reset_w(ASSERT_LINE);
}
@ -225,14 +228,15 @@ WRITE32_MEMBER(atlantis_state::board_ctrl_w)
}
}
if (LOG_IRQ)
logerror("%s:board_ctrl_w write to CTRL_POWER0 offset %04X = %08X & %08X bus offset = %08X\n", machine().describe_context(), newOffset, data, mem_mask, offset);
logerror("%s:board_ctrl_w write to CTRL_RESET offset %04X = %08X & %08X bus offset = %08X\n", machine().describe_context(), newOffset, data, mem_mask, offset);
break;
case CTRL_POWER1:
case CTRL_VSYNC_CLEAR:
//VSYNC_IE (0x1)
//VSYNC_POL (0x2) off=negative true, on=positive true
// 0x1 VBlank clear?
if (changeData & 0x1) {
if ((data & 0x0001) == 0) {
//uint32_t status_bit = (1 << VBLANK_IRQ_SHIFT);
uint32_t status_bit = (1 << 7);
uint32_t status_bit = (1 << VBLANK_IRQ_SHIFT);
board_ctrl[CTRL_CAUSE] &= ~status_bit;
board_ctrl[CTRL_STATUS] &= ~status_bit;
update_asic_irq();
@ -240,15 +244,15 @@ WRITE32_MEMBER(atlantis_state::board_ctrl_w)
else {
}
}
if (LOG_IRQ)
logerror("%s:board_ctrl_w write to CTRL_POWER1 offset %04X = %08X & %08X bus offset = %08X\n", machine().describe_context(), newOffset, data, mem_mask, offset);
if (0 && LOG_IRQ)
logerror("%s:board_ctrl_w write to CTRL_VSYNC_CLEAR offset %04X = %08X & %08X bus offset = %08X\n", machine().describe_context(), newOffset, data, mem_mask, offset);
break;
case CTRL_GLOBAL_EN:
case CTRL_IRQ_EN:
// Zero bit will clear cause
board_ctrl[CTRL_CAUSE] &= data;
update_asic_irq();
if (LOG_IRQ)
logerror("%s:board_ctrl_w write to CTRL_GLOBAL_EN offset %04X = %08X & %08X bus offset = %08X\n", machine().describe_context(), newOffset, data, mem_mask, offset);
logerror("%s:board_ctrl_w write to CTRL_IRQ_EN offset %04X = %08X & %08X bus offset = %08X\n", machine().describe_context(), newOffset, data, mem_mask, offset);
break;
default:
if (LOG_IRQ)
@ -423,7 +427,7 @@ READ32_MEMBER(atlantis_state::user_io_input)
*************************************/
WRITE_LINE_MEMBER(atlantis_state::uart1_irq_callback)
{
uint32_t status_bit = (1 << UART1_SHIFT);
uint32_t status_bit = UART1_IRQ_SHIFT;
if (state && !(board_ctrl[CTRL_STATUS] & status_bit)) {
board_ctrl[CTRL_STATUS] |= status_bit;
update_asic_irq();
@ -441,7 +445,7 @@ WRITE_LINE_MEMBER(atlantis_state::uart1_irq_callback)
*************************************/
WRITE_LINE_MEMBER(atlantis_state::uart2_irq_callback)
{
uint32_t status_bit = (1 << UART2_SHIFT);
uint32_t status_bit = UART2_IRQ_SHIFT;
if (state && !(board_ctrl[CTRL_STATUS] & status_bit)) {
board_ctrl[CTRL_STATUS] |= status_bit;
update_asic_irq();
@ -460,18 +464,14 @@ WRITE_LINE_MEMBER(atlantis_state::uart2_irq_callback)
WRITE_LINE_MEMBER(atlantis_state::vblank_irq)
{
//logerror("%s: atlantis_state::vblank state = %i\n", machine().describe_context(), state);
if (1) {
if (state) {
board_ctrl[CTRL_STATUS] |= (1 << VBLANK_IRQ_SHIFT);
update_asic_irq();
}
else {
board_ctrl[CTRL_STATUS] &= ~(1 << VBLANK_IRQ_SHIFT);
board_ctrl[CTRL_CAUSE] &= ~(1 << VBLANK_IRQ_SHIFT);
update_asic_irq();
}
} else {
m_maincpu->set_input_line(VBLANK_IRQ_NUM, state);
if (state) {
board_ctrl[CTRL_STATUS] |= (1 << VBLANK_IRQ_SHIFT);
update_asic_irq();
}
else {
board_ctrl[CTRL_STATUS] &= ~(1 << VBLANK_IRQ_SHIFT);
board_ctrl[CTRL_CAUSE] &= ~(1 << VBLANK_IRQ_SHIFT);
update_asic_irq();
}
}
@ -479,12 +479,12 @@ WRITE_LINE_MEMBER(atlantis_state::zeus_irq)
{
//logerror("%s: atlantis_state::zeus_irq state = %i\n", machine().describe_context(), state);
if (state) {
board_ctrl[CTRL_STATUS] |= (1 << ZEUS_IRQ_SHIFT);
board_ctrl[CTRL_STATUS] |= (1 << ZEUS0_IRQ_SHIFT);
update_asic_irq();
}
else {
board_ctrl[CTRL_STATUS] &= ~(1 << ZEUS_IRQ_SHIFT);
board_ctrl[CTRL_CAUSE] &= ~(1 << ZEUS_IRQ_SHIFT);
board_ctrl[CTRL_STATUS] &= ~(1 << ZEUS0_IRQ_SHIFT);
board_ctrl[CTRL_CAUSE] &= ~(1 << ZEUS0_IRQ_SHIFT);
update_asic_irq();
}
}
@ -522,21 +522,20 @@ WRITE_LINE_MEMBER(atlantis_state::ioasic_irq)
*************************************/
void atlantis_state::update_asic_irq()
{
// Uknown if CTRL_POWER1 is actually a separate power register. Skip it for now.
for (int irqIndex = 1; irqIndex <= 4; irqIndex++) {
uint32_t irqBits = (board_ctrl[CTRL_GLOBAL_EN] & board_ctrl[CTRL_POWER1 + irqIndex] & board_ctrl[CTRL_STATUS]);
uint32_t causeBits = (board_ctrl[CTRL_GLOBAL_EN] & board_ctrl[CTRL_POWER1 + irqIndex] & board_ctrl[CTRL_CAUSE]);
uint32_t currState = m_irq_state & (1 << irqIndex);
for (int irqIndex = 0; irqIndex < 3; irqIndex++) {
uint32_t irqBits = (board_ctrl[CTRL_IRQ_EN] & board_ctrl[CTRL_IRQ_MAP1 + irqIndex] & board_ctrl[CTRL_STATUS]);
uint32_t causeBits = (board_ctrl[CTRL_IRQ_EN] & board_ctrl[CTRL_IRQ_MAP1 + irqIndex] & board_ctrl[CTRL_CAUSE]);
uint32_t currState = m_irq_state & (2 << irqIndex);
board_ctrl[CTRL_CAUSE] |= irqBits;
if (irqBits && !currState) {
m_maincpu->set_input_line(MIPS3_IRQ0 + irqIndex, ASSERT_LINE);
m_irq_state |= (1 << irqIndex);
m_maincpu->set_input_line(MIPS3_IRQ1 + irqIndex, ASSERT_LINE);
m_irq_state |= (2 << irqIndex);
if (LOG_IRQ)
logerror("atlantis_state::update_asic_irq Asserting IRQ(%d) CAUSE = %02X\n", irqIndex, board_ctrl[CTRL_CAUSE]);
}
else if (!(causeBits) && currState) {
m_maincpu->set_input_line(MIPS3_IRQ0 + irqIndex, CLEAR_LINE);
m_irq_state &= ~(1 << irqIndex);
m_maincpu->set_input_line(MIPS3_IRQ1 + irqIndex, CLEAR_LINE);
m_irq_state &= ~(2 << irqIndex);
if (LOG_IRQ)
logerror("atlantis_state::update_asic_irq Clearing IRQ(%d) CAUSE = %02X\n", irqIndex, board_ctrl[CTRL_CAUSE]);
}
@ -545,43 +544,36 @@ void atlantis_state::update_asic_irq()
/*************************************
* I/O Port control
*************************************/
READ32_MEMBER(atlantis_state::port_ctrl_r)
READ16_MEMBER(atlantis_state::port_ctrl_r)
{
uint32_t newOffset = offset >> 17;
uint32_t result = m_port_ctrl_reg[newOffset];
uint32_t result = m_port_data;
if (LOG_PORT)
logerror("%s: port_ctrl_r newOffset = %02X data = %08X\n", machine().describe_context(), newOffset, result);
return result;
}
WRITE32_MEMBER(atlantis_state::port_ctrl_w)
WRITE16_MEMBER(atlantis_state::port_ctrl_w)
{
uint32_t newOffset = offset >> 17;
COMBINE_DATA(&m_port_ctrl_reg[newOffset]);
switch (newOffset) {
case 1:
{
uint32_t bits = ioport("KEYPAD")->read();
m_port_ctrl_reg[2] = 0;
m_port_data = 0;
if (!(data & 0x8))
m_port_ctrl_reg[2] = bits & 7; // Row 0
m_port_data = bits & 7; // Row 0
else if (!(data & 0x10))
m_port_ctrl_reg[2] = (bits >> 4) & 7; // Row 1
m_port_data = (bits >> 4) & 7; // Row 1
else if (!(data & 0x20))
m_port_ctrl_reg[2] = (bits >> 8) & 7; // Row 2
m_port_data = (bits >> 8) & 7; // Row 2
else if (!(data & 0x40))
m_port_ctrl_reg[2] = (bits >> 12) & 7; // Row 3
m_port_data = (bits >> 12) & 7; // Row 3
if (LOG_PORT)
logerror("%s: port_ctrl_w Keypad Row Sel = %04X bits = %08X\n", machine().describe_context(), data, bits);
break;
}
case 3:
if (data==0x8f)
m_port_ctrl_reg[4] = ioport("AN.1")->read();
else
m_port_ctrl_reg[4] = ioport("AN.0")->read();
break;
default:
if (LOG_PORT)
logerror("%s: port_ctrl_w write to offset %04X = %08X & %08X bus offset = %08X\n", machine().describe_context(), newOffset, data, mem_mask, offset);
@ -589,13 +581,38 @@ WRITE32_MEMBER(atlantis_state::port_ctrl_w)
}
}
CUSTOM_INPUT_MEMBER(atlantis_state::port_mod_r)
/*************************************
* A2D
*************************************/
#define A2D_CTRL_COMPLETE 0x1
#define A2D_CTRL_ENABLE 0x2
#define A2D_CTRL_SINGLEND 0x4
#define A2D_CTRL_UNIPOLAR 0x8
#define A2D_CTRL_CHAN_SHIFT 4
#define A2D_CTRL_CHAN_MASK 0x70
#define A2D_CTRL_START 0x80
READ16_MEMBER(atlantis_state::a2d_ctrl_r)
{
uint32_t bits = ioport((const char *)param)->read();
//bits &= m_port_ctrl_reg[1];
//bits >>= m_port_ctrl_reg[1];
logerror("%s: port_mod_r read data %s = %08X m_port_ctrl_reg[1] = %08X\n", machine().describe_context(), (const char *)param, bits, m_port_ctrl_reg[1]);
return bits;
return A2D_CTRL_COMPLETE;
}
WRITE16_MEMBER(atlantis_state::a2d_ctrl_w)
{
if (data == 0x8f)
m_a2d_data = ioport("AN.1")->read();
else
m_a2d_data = ioport("AN.0")->read();
}
READ16_MEMBER(atlantis_state::a2d_data_r)
{
return m_a2d_data;
}
WRITE16_MEMBER(atlantis_state::a2d_data_w)
{
}
/*************************************
@ -619,7 +636,6 @@ void atlantis_state::machine_start()
// Save states
save_item(NAME(m_irq_state));
save_item(NAME(board_ctrl));
save_item(NAME(m_port_ctrl_reg));
}
@ -636,7 +652,6 @@ void atlantis_state::machine_reset()
m_serial_count = 0;
m_irq_state = 0;
memset(board_ctrl, 0, sizeof(board_ctrl));
memset(m_port_ctrl_reg, 0, sizeof(m_port_ctrl_reg));
}
/*************************************
@ -644,39 +659,32 @@ void atlantis_state::machine_reset()
*************************************/
static ADDRESS_MAP_START( map0, AS_PROGRAM, 32, atlantis_state )
AM_RANGE(0x00000000, 0x0001ffff) AM_READWRITE8(cmos_r, cmos_w, 0xff)
//AM_RANGE(0x00080000, 0x000?0000) AM_READWRITE8(zeus debug)
AM_RANGE(0x00100000, 0x0010001f) AM_DEVREADWRITE8("uart1", ns16550_device, ins8250_r, ins8250_w, 0xff) // Serial UART1 (TL16C552 CS0)
AM_RANGE(0x00180000, 0x0018001f) AM_DEVREADWRITE8("uart2", ns16550_device, ins8250_r, ins8250_w, 0xff) // Serial UART2 (TL16C552 CS1)
//AM_RANGE(0x00200000, 0x0020001f) // Parallel UART (TL16C552 CS2)
AM_RANGE(0x00400000, 0x004000bf) AM_READWRITE8(blue_r, blue_w, 0xff)
AM_RANGE(0x00880000, 0x00c80003) AM_READWRITE(board_ctrl_r, board_ctrl_w)
//AM_RANGE(0x00880000, 0x00880003) // Sub-module Power0
//AM_RANGE(0x00900000, 0x00900003) // Sub_module Power1 (Zeus or vblank?)
//AM_RANGE(0x00980000, 0x00980003) // IRQ1 Enable
//AM_RANGE(0x00a00000, 0x00a00003) // IRQ2 Enable
//AM_RANGE(0x00a80000, 0x00a80003) // IRQ3 Enable
//AM_RANGE(0x00b00000, 0x00b00003) // IRQ4 Enable Not Seen (Hardcoded to IDE?)
//AM_RANGE(0x00b80000, 0x00b80003) // IRQ Global Enable
//AM_RANGE(0x00c00000, 0x00c00003) // IRQ Cause
//AM_RANGE(0x00c80000, 0x00c80003) // IRQ Status
AM_RANGE(0x00400000, 0x007fffff) AM_READWRITE8(exprom_r, exprom_w, 0xff) // EXPROM
AM_RANGE(0x00800000, 0x00c80003) AM_READWRITE(board_ctrl_r, board_ctrl_w)
AM_RANGE(0x00d80000, 0x00d80003) AM_READWRITE(status_leds_r, status_leds_w)
AM_RANGE(0x00e00000, 0x00e00003) AM_READWRITE(cmos_protect_r, cmos_protect_w)
AM_RANGE(0x00e80000, 0x00e80003) AM_NOP // Watchdog?
ADDRESS_MAP_END
AM_RANGE(0x00e80000, 0x00e80003) AM_NOP // Watchdog
//AM_RANGE(0x00f00000, 0x00f00003) AM_NOP // Trackball ctrl
ADDRESS_MAP_END
static ADDRESS_MAP_START( map1, AS_PROGRAM, 32, atlantis_state )
AM_RANGE(0x00000000, 0x0000003f) AM_DEVREADWRITE("ioasic", midway_ioasic_device, read, write)
// asic_fifo_w
// dcs3_fifo_full_w
AM_RANGE(0x00200000, 0x00200003) AM_WRITE(dcs3_fifo_full_w)
AM_RANGE(0x00400000, 0x00400003) AM_DEVWRITE("dcs", dcs_audio_device, dsio_idma_addr_w)
AM_RANGE(0x00600000, 0x00600003) AM_DEVREADWRITE("dcs", dcs_audio_device, dsio_idma_data_r, dsio_idma_data_w)
AM_RANGE(0x00800000, 0x00a00003) AM_READWRITE(port_ctrl_r, port_ctrl_w)
//AM_RANGE(0x00800000, 0x00800003) // Written once = 0000fff8
//AM_RANGE(0x00880000, 0x00880003) // Initial write 0000fff0, follow by sequence ffef, ffdf, ffbf, fff7. Row Select?
//AM_RANGE(0x00900000, 0x00900003) // Read once before each sequence write to 0x00880000. Code checks bits 0,1,2. Keypad?
//AM_RANGE(0x00980000, 0x00980003) // Read / Write. Bytes written 0x8f, 0xcf. Code if read 0x1 then read 00a00000. POTs?
//AM_RANGE(0x00a00000, 0x00a00003)
//AM_RANGE(0x00980000, 0x00980003) AM_NOP // AM_WRITE(asic_fifo_w)
AM_RANGE(0x00800000, 0x00900003) AM_READWRITE16(port_ctrl_r, port_ctrl_w, 0xffff)
//AM_RANGE(0x00880000, 0x00880003) // AUX Output Initial write 0000fff0, follow by sequence ffef, ffdf, ffbf, fff7. Row Select?
//AM_RANGE(0x00900000, 0x00900003) // AUX Input Read once before each sequence write to 0x00880000. Code checks bits 0,1,2. Keypad?
AM_RANGE(0x00980000, 0x00980003) AM_READWRITE16(a2d_ctrl_r, a2d_ctrl_w, 0xffff) // A2D Control Read / Write. Bytes written 0x8f, 0xcf. Code if read 0x1 then read 00a00000.
AM_RANGE(0x00a00000, 0x00a00003) AM_READWRITE16(a2d_data_r, a2d_data_w, 0xffff) // A2D Data
//AM_RANGE(0x00a80000, 0x00a80003) // Trackball Chan 0 16 bits
//AM_RANGE(0x00b00000, 0x00b00003) // Trackball Chan 1 16 bits
//AM_RANGE(0x00b80000, 0x00b80003) // Trackball Error 16 bits
//AM_RANGE(0x00c00000, 0x00c00003) // Trackball Pins 16 bits
ADDRESS_MAP_END
static ADDRESS_MAP_START(map2, AS_PROGRAM, 32, atlantis_state)
@ -684,7 +692,7 @@ static ADDRESS_MAP_START(map2, AS_PROGRAM, 32, atlantis_state)
ADDRESS_MAP_END
static ADDRESS_MAP_START( map3, AS_PROGRAM, 32, atlantis_state )
//AM_RANGE(0x000000, 0xffffff) AM_READWRITE(blue_r, blue_w)
//AM_RANGE(0x000000, 0xffffff) ROMBUS
ADDRESS_MAP_END
/*************************************
@ -876,31 +884,31 @@ static MACHINE_CONFIG_START( mwskins, atlantis_state )
// TL16C552 UART
MCFG_DEVICE_ADD("uart1", NS16550, XTAL_24MHz)
//MCFG_INS8250_OUT_TX_CB(DEVWRITELINE("com1", rs232_port_device, write_txd))
//MCFG_INS8250_OUT_DTR_CB(DEVWRITELINE("com1", rs232_port_device, write_dtr))
//MCFG_INS8250_OUT_RTS_CB(DEVWRITELINE("com1", rs232_port_device, write_rts))
//MCFG_INS8250_OUT_INT_CB(DEVWRITELINE(":", atlantis_state, uart1_irq_callback))
MCFG_INS8250_OUT_TX_CB(DEVWRITELINE("com1", rs232_port_device, write_txd))
MCFG_INS8250_OUT_DTR_CB(DEVWRITELINE("com1", rs232_port_device, write_dtr))
MCFG_INS8250_OUT_RTS_CB(DEVWRITELINE("com1", rs232_port_device, write_rts))
MCFG_INS8250_OUT_INT_CB(DEVWRITELINE(":", atlantis_state, uart1_irq_callback))
MCFG_DEVICE_ADD("uart2", NS16550, XTAL_24MHz)
//MCFG_INS8250_OUT_TX_CB(DEVWRITELINE("com2", rs232_port_device, write_txd))
//MCFG_INS8250_OUT_DTR_CB(DEVWRITELINE("com2", rs232_port_device, write_dtr))
//MCFG_INS8250_OUT_RTS_CB(DEVWRITELINE("com2", rs232_port_device, write_rts))
//MCFG_INS8250_OUT_INT_CB(DEVWRITELINE(":", atlantis_state, uart2_irq_callback))
MCFG_INS8250_OUT_TX_CB(DEVWRITELINE("com2", rs232_port_device, write_txd))
MCFG_INS8250_OUT_DTR_CB(DEVWRITELINE("com2", rs232_port_device, write_dtr))
MCFG_INS8250_OUT_RTS_CB(DEVWRITELINE("com2", rs232_port_device, write_rts))
MCFG_INS8250_OUT_INT_CB(DEVWRITELINE(":", atlantis_state, uart2_irq_callback))
//MCFG_RS232_PORT_ADD("com1", default_rs232_devices, nullptr)
//MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, rx_w))
//MCFG_RS232_DCD_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, dcd_w))
//MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, dsr_w))
//MCFG_RS232_RI_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, ri_w))
//MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, cts_w))
MCFG_RS232_PORT_ADD("com1", default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, rx_w))
MCFG_RS232_DCD_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, dcd_w))
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, dsr_w))
MCFG_RS232_RI_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, ri_w))
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart1", ins8250_uart_device, cts_w))
//MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("com1", mwskins_comm)
//MCFG_RS232_PORT_ADD("com2", default_rs232_devices, nullptr)
//MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, rx_w))
//MCFG_RS232_DCD_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, dcd_w))
//MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, dsr_w))
//MCFG_RS232_RI_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, ri_w))
//MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, cts_w))
MCFG_RS232_PORT_ADD("com2", default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, rx_w))
MCFG_RS232_DCD_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, dcd_w))
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, dsr_w))
MCFG_RS232_RI_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, ri_w))
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart2", ins8250_uart_device, cts_w))
MACHINE_CONFIG_END

13
src/mame/drivers/beehive.cpp
View File

@ -28,19 +28,22 @@ class beehive_state : public driver_device
{
public:
beehive_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_p_videoram(*this, "videoram"){ }
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
, m_p_videoram(*this, "videoram")
{ }
required_device<cpu_device> m_maincpu;
DECLARE_READ8_MEMBER(beehive_60_r);
DECLARE_WRITE8_MEMBER(beehive_62_w);
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
private:
required_device<cpu_device> m_maincpu;
const uint8_t *m_p_chargen;
required_shared_ptr<uint8_t> m_p_videoram;
uint8_t m_keyline;
virtual void machine_reset() override;
virtual void video_start() override;
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
};
READ8_MEMBER(beehive_state::beehive_60_r)

6
src/mame/drivers/binbug.cpp
View File

@ -56,14 +56,12 @@
#include "sound/wave.h"
#include "imagedev/snapquik.h"
#define KEYBOARD_TAG "keyboard"
class binbug_state : public driver_device
{
public:
binbug_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_rs232(*this, KEYBOARD_TAG),
m_rs232(*this, "keyboard"),
m_cass(*this, "cassette"),
m_p_videoram(*this, "videoram"),
m_p_attribram(*this, "attribram"),
@ -309,7 +307,7 @@ static MACHINE_CONFIG_START( binbug, binbug_state )
MCFG_PALETTE_ADD_MONOCHROME("palette")
/* Keyboard */
MCFG_RS232_PORT_ADD(KEYBOARD_TAG, default_rs232_devices, "keyboard")
MCFG_RS232_PORT_ADD("keyboard", default_rs232_devices, "keyboard")
MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("keyboard", keyboard)
/* Cassette */

2
src/mame/drivers/bublbobl.cpp
View File

@ -279,7 +279,7 @@ TODO:
#include "machine/watchdog.h"
#include "sound/2203intf.h"
#include "sound/3526intf.h"
#include "cpu/m6805/m6805.h"
#include "cpu/m6805/m68705.h"
#include "includes/bublbobl.h"

14
src/mame/drivers/c10.cpp
View File

@ -25,17 +25,19 @@ public:
};
c10_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_p_videoram(*this, "p_videoram"){ }
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
, m_p_videoram(*this, "videoram")
{ }
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_DRIVER_INIT(c10);
private:
required_device<cpu_device> m_maincpu;
const uint8_t *m_p_chargen;
required_shared_ptr<uint8_t> m_p_videoram;
virtual void machine_reset() override;
virtual void video_start() override;
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_DRIVER_INIT(c10);
protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
@ -49,7 +51,7 @@ static ADDRESS_MAP_START(c10_mem, AS_PROGRAM, 8, c10_state)
AM_RANGE(0x1000, 0x7fff) AM_RAM
AM_RANGE(0x8000, 0xbfff) AM_ROM
AM_RANGE(0xc000, 0xf0a1) AM_RAM
AM_RANGE(0xf0a2, 0xffff) AM_RAM AM_SHARE("p_videoram")
AM_RANGE(0xf0a2, 0xffff) AM_RAM AM_SHARE("videoram")
ADDRESS_MAP_END
static ADDRESS_MAP_START( c10_io, AS_IO, 8, c10_state)

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