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tms34010: Removed MCFG. [Ryan Holtz]

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This commit is contained in:
mooglyguy 2018-12-05 18:36:28 +01:00
parent 0cb7e425f1
commit 9a81ec7eaf
19 changed files with 208 additions and 245 deletions
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31
src/devices/cpu/tms34010/tms34010.h
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@ -103,42 +103,11 @@ enum
#define TMS34010_WV 0x0800 /* Window Violation Interrupt */ #define TMS34010_WV 0x0800 /* Window Violation Interrupt */
#define MCFG_TMS340X0_HALT_ON_RESET(_value) \
downcast<tms340x0_device &>(*device).set_halt_on_reset(_value);
#define MCFG_TMS340X0_PIXEL_CLOCK(_value) \
downcast<tms340x0_device &>(*device).set_pixel_clock(_value);
#define MCFG_TMS340X0_PIXELS_PER_CLOCK(_value) \
downcast<tms340x0_device &>(*device).set_pixels_per_clock(_value);
#define TMS340X0_SCANLINE_IND16_CB_MEMBER(_name) void _name(screen_device &screen, bitmap_ind16 &bitmap, int scanline, const tms340x0_device::display_params *params) #define TMS340X0_SCANLINE_IND16_CB_MEMBER(_name) void _name(screen_device &screen, bitmap_ind16 &bitmap, int scanline, const tms340x0_device::display_params *params)
#define MCFG_TMS340X0_SCANLINE_IND16_CB(_class, _method) \
downcast<tms340x0_device &>(*device).set_scanline_ind16_callback(tms340x0_device::scanline_ind16_cb_delegate(&_class::_method, #_class "::" #_method, this));
#define TMS340X0_SCANLINE_RGB32_CB_MEMBER(_name) void _name(screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms340x0_device::display_params *params) #define TMS340X0_SCANLINE_RGB32_CB_MEMBER(_name) void _name(screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms340x0_device::display_params *params)
#define MCFG_TMS340X0_SCANLINE_RGB32_CB(_class, _method) \
downcast<tms340x0_device &>(*device).set_scanline_rgb32_callback(tms340x0_device::scanline_rgb32_cb_delegate(&_class::_method, #_class "::" #_method, this));
#define MCFG_TMS340X0_OUTPUT_INT_CB(_devcb)
#define TMS340X0_TO_SHIFTREG_CB_MEMBER(_name) void _name(address_space &space, offs_t address, uint16_t *shiftreg) #define TMS340X0_TO_SHIFTREG_CB_MEMBER(_name) void _name(address_space &space, offs_t address, uint16_t *shiftreg)
#define MCFG_TMS340X0_TO_SHIFTREG_CB(_class, _method) \
downcast<tms340x0_device &>(*device).set_to_shiftreg_callback(tms340x0_device::to_shiftreg_cb_delegate(&_class::_method, #_class "::" #_method, this));
#define TMS340X0_FROM_SHIFTREG_CB_MEMBER(_name) void _name(address_space &space, offs_t address, uint16_t *shiftreg) #define TMS340X0_FROM_SHIFTREG_CB_MEMBER(_name) void _name(address_space &space, offs_t address, uint16_t *shiftreg)
#define MCFG_TMS340X0_FROM_SHIFTREG_CB(_class, _method) \
downcast<tms340x0_device &>(*device).set_from_shiftreg_callback(tms340x0_device::from_shiftreg_cb_delegate(&_class::_method, #_class "::" #_method, this));
class tms340x0_device : public cpu_device, class tms340x0_device : public cpu_device,
public device_video_interface public device_video_interface

18
src/mame/drivers/artmagic.cpp
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@ -812,15 +812,15 @@ MACHINE_CONFIG_START(artmagic_state::artmagic)
MCFG_DEVICE_ADD("maincpu", M68000, MASTER_CLOCK_25MHz/2) MCFG_DEVICE_ADD("maincpu", M68000, MASTER_CLOCK_25MHz/2)
MCFG_DEVICE_PROGRAM_MAP(main_map) MCFG_DEVICE_PROGRAM_MAP(main_map)
MCFG_DEVICE_ADD("tms", TMS34010, MASTER_CLOCK_40MHz) TMS34010(config, m_tms, MASTER_CLOCK_40MHz);
MCFG_DEVICE_PROGRAM_MAP(tms_map) m_tms->set_addrmap(AS_PROGRAM, &artmagic_state::tms_map);
MCFG_TMS340X0_HALT_ON_RESET(true) /* halt on reset */ m_tms->set_halt_on_reset(true);
MCFG_TMS340X0_PIXEL_CLOCK(MASTER_CLOCK_40MHz/6) /* pixel clock */ m_tms->set_pixel_clock(MASTER_CLOCK_40MHz/6);
MCFG_TMS340X0_PIXELS_PER_CLOCK(1) /* pixels per clock */ m_tms->set_pixels_per_clock(1);
MCFG_TMS340X0_SCANLINE_RGB32_CB(artmagic_state, scanline) /* scanline update (rgb32) */ m_tms->set_scanline_rgb32_callback(FUNC(artmagic_state::scanline));
MCFG_TMS340X0_OUTPUT_INT_CB(WRITELINE(*this, artmagic_state, m68k_gen_int)) m_tms->output_int().set(FUNC(artmagic_state::m68k_gen_int));
MCFG_TMS340X0_TO_SHIFTREG_CB(artmagic_state, to_shiftreg) /* write to shiftreg function */ m_tms->set_shiftreg_in_callback(FUNC(artmagic_state::to_shiftreg));
MCFG_TMS340X0_FROM_SHIFTREG_CB(artmagic_state, from_shiftreg) /* read from shiftreg function */ m_tms->set_shiftreg_out_callback(FUNC(artmagic_state::from_shiftreg));
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) MCFG_QUANTUM_TIME(attotime::from_hz(6000))

16
src/mame/drivers/btoads.cpp
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@ -305,14 +305,14 @@ INPUT_PORTS_END
MACHINE_CONFIG_START(btoads_state::btoads) MACHINE_CONFIG_START(btoads_state::btoads)
MCFG_DEVICE_ADD("maincpu", TMS34020, CPU_CLOCK/2) TMS34020(config, m_maincpu, CPU_CLOCK/2);
MCFG_DEVICE_PROGRAM_MAP(main_map) m_maincpu->set_addrmap(AS_PROGRAM, &btoads_state::main_map);
MCFG_TMS340X0_HALT_ON_RESET(false) /* halt on reset */ m_maincpu->set_halt_on_reset(false);
MCFG_TMS340X0_PIXEL_CLOCK(VIDEO_CLOCK/2) /* pixel clock */ m_maincpu->set_pixel_clock(VIDEO_CLOCK/2);
MCFG_TMS340X0_PIXELS_PER_CLOCK(1) /* pixels per clock */ m_maincpu->set_pixels_per_clock(1);
MCFG_TMS340X0_SCANLINE_RGB32_CB(btoads_state, scanline_update) /* scanline updater (RGB32) */ m_maincpu->set_scanline_rgb32_callback(FUNC(btoads_state::scanline_update));
MCFG_TMS340X0_TO_SHIFTREG_CB(btoads_state, to_shiftreg) /* write to shiftreg function */ m_maincpu->set_shiftreg_in_callback(FUNC(btoads_state::to_shiftreg));
MCFG_TMS340X0_FROM_SHIFTREG_CB(btoads_state, from_shiftreg) /* read from shiftreg function */ m_maincpu->set_shiftreg_out_callback(FUNC(btoads_state::from_shiftreg));
MCFG_DEVICE_ADD("audiocpu", Z80, SOUND_CLOCK/4) MCFG_DEVICE_ADD("audiocpu", Z80, SOUND_CLOCK/4)
MCFG_DEVICE_PROGRAM_MAP(sound_map) MCFG_DEVICE_PROGRAM_MAP(sound_map)

44
src/mame/drivers/coolpool.cpp
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@ -716,14 +716,14 @@ INPUT_PORTS_END
MACHINE_CONFIG_START(coolpool_state::amerdart) MACHINE_CONFIG_START(coolpool_state::amerdart)
/* basic machine hardware */ /* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", TMS34010, XTAL(40'000'000)) TMS34010(config, m_maincpu, XTAL(40'000'000));
MCFG_DEVICE_PROGRAM_MAP(amerdart_map) m_maincpu->set_addrmap(AS_PROGRAM, &coolpool_state::amerdart_map);
MCFG_TMS340X0_HALT_ON_RESET(false) /* halt on reset */ m_maincpu->set_halt_on_reset(false);
MCFG_TMS340X0_PIXEL_CLOCK(XTAL(40'000'000)/12) /* pixel clock */ m_maincpu->set_pixel_clock(XTAL(40'000'000)/12);
MCFG_TMS340X0_PIXELS_PER_CLOCK(2) /* pixels per clock */ m_maincpu->set_pixels_per_clock(2);
MCFG_TMS340X0_SCANLINE_RGB32_CB(coolpool_state, amerdart_scanline) /* scanline callback (rgb32) */ m_maincpu->set_scanline_rgb32_callback(FUNC(coolpool_state::amerdart_scanline));
MCFG_TMS340X0_TO_SHIFTREG_CB(coolpool_state, to_shiftreg) /* write to shiftreg function */ m_maincpu->set_shiftreg_in_callback(FUNC(coolpool_state::to_shiftreg));
MCFG_TMS340X0_FROM_SHIFTREG_CB(coolpool_state, from_shiftreg) /* read from shiftreg function */ m_maincpu->set_shiftreg_out_callback(FUNC(coolpool_state::from_shiftreg));
MCFG_DEVICE_ADD("dsp", TMS32015, XTAL(40'000'000)/2) MCFG_DEVICE_ADD("dsp", TMS32015, XTAL(40'000'000)/2)
MCFG_DEVICE_PROGRAM_MAP(amerdart_dsp_pgm_map) MCFG_DEVICE_PROGRAM_MAP(amerdart_dsp_pgm_map)
@ -757,14 +757,14 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(coolpool_state::coolpool) MACHINE_CONFIG_START(coolpool_state::coolpool)
/* basic machine hardware */ /* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", TMS34010, XTAL(40'000'000)) TMS34010(config, m_maincpu, XTAL(40'000'000));
MCFG_DEVICE_PROGRAM_MAP(coolpool_map) m_maincpu->set_addrmap(AS_PROGRAM, &coolpool_state::coolpool_map);
MCFG_TMS340X0_HALT_ON_RESET(false) /* halt on reset */ m_maincpu->set_halt_on_reset(false);
MCFG_TMS340X0_PIXEL_CLOCK(XTAL(40'000'000)/6) /* pixel clock */ m_maincpu->set_pixel_clock(XTAL(40'000'000)/6);
MCFG_TMS340X0_PIXELS_PER_CLOCK(1) /* pixels per clock */ m_maincpu->set_pixels_per_clock(1);
MCFG_TMS340X0_SCANLINE_RGB32_CB(coolpool_state, coolpool_scanline) /* scanline callback (rgb32) */ m_maincpu->set_scanline_rgb32_callback(FUNC(coolpool_state::coolpool_scanline));
MCFG_TMS340X0_TO_SHIFTREG_CB(coolpool_state, to_shiftreg) /* write to shiftreg function */ m_maincpu->set_shiftreg_in_callback(FUNC(coolpool_state::to_shiftreg));
MCFG_TMS340X0_FROM_SHIFTREG_CB(coolpool_state, from_shiftreg) /* read from shiftreg function */ m_maincpu->set_shiftreg_out_callback(FUNC(coolpool_state::from_shiftreg));
tms32026_device& dsp(TMS32026(config, m_dsp, XTAL(40'000'000))); tms32026_device& dsp(TMS32026(config, m_dsp, XTAL(40'000'000)));
dsp.set_addrmap(AS_PROGRAM, &coolpool_state::coolpool_dsp_pgm_map); dsp.set_addrmap(AS_PROGRAM, &coolpool_state::coolpool_dsp_pgm_map);
@ -801,14 +801,12 @@ MACHINE_CONFIG_START(coolpool_state::coolpool)
MACHINE_CONFIG_END MACHINE_CONFIG_END
MACHINE_CONFIG_START(coolpool_state::_9ballsht) void coolpool_state::_9ballsht(machine_config &config)
{
coolpool(config); coolpool(config);
m_maincpu->set_addrmap(AS_PROGRAM, &coolpool_state::nballsht_map);
MCFG_DEVICE_MODIFY("maincpu") m_dsp->set_addrmap(AS_IO, &coolpool_state::nballsht_dsp_io_map);
MCFG_DEVICE_PROGRAM_MAP(nballsht_map) }
subdevice<tms32026_device>("dsp")->set_addrmap(AS_IO, &coolpool_state::nballsht_dsp_io_map);
MACHINE_CONFIG_END

32
src/mame/drivers/exterm.cpp
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@ -374,22 +374,22 @@ INPUT_PORTS_END
MACHINE_CONFIG_START(exterm_state::exterm) MACHINE_CONFIG_START(exterm_state::exterm)
/* basic machine hardware */ /* basic machine hardware */
MCFG_DEVICE_ADD(m_maincpu, TMS34010, 40000000) TMS34010(config, m_maincpu, 40000000);
MCFG_DEVICE_PROGRAM_MAP(master_map) m_maincpu->set_addrmap(AS_PROGRAM, &exterm_state::master_map);
MCFG_TMS340X0_HALT_ON_RESET(false) m_maincpu->set_halt_on_reset(false);
MCFG_TMS340X0_PIXEL_CLOCK(40000000/8) m_maincpu->set_pixel_clock(40000000/8);
MCFG_TMS340X0_PIXELS_PER_CLOCK(1) m_maincpu->set_pixels_per_clock(1);
MCFG_TMS340X0_SCANLINE_IND16_CB(exterm_state, scanline_update) m_maincpu->set_scanline_ind16_callback(FUNC(exterm_state::scanline_update));
MCFG_TMS340X0_TO_SHIFTREG_CB(exterm_state, to_shiftreg_master) m_maincpu->set_shiftreg_in_callback(FUNC(exterm_state::to_shiftreg_master));
MCFG_TMS340X0_FROM_SHIFTREG_CB(exterm_state, from_shiftreg_master) m_maincpu->set_shiftreg_out_callback(FUNC(exterm_state::from_shiftreg_master));
MCFG_DEVICE_ADD(m_slave, TMS34010, 40000000) TMS34010(config, m_slave, 40000000);
MCFG_DEVICE_PROGRAM_MAP(slave_map) m_slave->set_addrmap(AS_PROGRAM, &exterm_state::slave_map);
MCFG_TMS340X0_HALT_ON_RESET(true) m_slave->set_halt_on_reset(true);
MCFG_TMS340X0_PIXEL_CLOCK(40000000/8) m_slave->set_pixel_clock(40000000/8);
MCFG_TMS340X0_PIXELS_PER_CLOCK(1) m_slave->set_pixels_per_clock(1);
MCFG_TMS340X0_TO_SHIFTREG_CB(exterm_state, to_shiftreg_slave) m_slave->set_shiftreg_in_callback(FUNC(exterm_state::to_shiftreg_slave));
MCFG_TMS340X0_FROM_SHIFTREG_CB(exterm_state, from_shiftreg_slave) m_slave->set_shiftreg_out_callback(FUNC(exterm_state::from_shiftreg_slave));
M6502(config, m_audiocpu, 2000000).set_addrmap(AS_PROGRAM, &exterm_state::sound_master_map); M6502(config, m_audiocpu, 2000000).set_addrmap(AS_PROGRAM, &exterm_state::sound_master_map);
M6502(config, m_audioslave, 2000000).set_addrmap(AS_PROGRAM, &exterm_state::sound_slave_map); M6502(config, m_audioslave, 2000000).set_addrmap(AS_PROGRAM, &exterm_state::sound_slave_map);
@ -397,7 +397,7 @@ MACHINE_CONFIG_START(exterm_state::exterm)
GENERIC_LATCH_8(config, m_soundlatch[0]).data_pending_callback().set_inputline(m_audiocpu, M6502_IRQ_LINE); GENERIC_LATCH_8(config, m_soundlatch[0]).data_pending_callback().set_inputline(m_audiocpu, M6502_IRQ_LINE);
GENERIC_LATCH_8(config, m_soundlatch[1]).data_pending_callback().set_inputline(m_audioslave, M6502_IRQ_LINE); GENERIC_LATCH_8(config, m_soundlatch[1]).data_pending_callback().set_inputline(m_audioslave, M6502_IRQ_LINE);
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) config.m_minimum_quantum = attotime::from_hz(6000);
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);

75
src/mame/drivers/harddriv.cpp
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@ -1475,16 +1475,16 @@ MACHINE_CONFIG_START(harddriv_state::driver_nomsp)
m_adc8->in_callback<6>().set_ioport("8BADC.6"); m_adc8->in_callback<6>().set_ioport("8BADC.6");
m_adc8->in_callback<7>().set_ioport("8BADC.7"); m_adc8->in_callback<7>().set_ioport("8BADC.7");
MCFG_DEVICE_ADD("gsp", TMS34010, HARDDRIV_GSP_CLOCK) TMS34010(config, m_gsp, HARDDRIV_GSP_CLOCK);
MCFG_DEVICE_PROGRAM_MAP(driver_gsp_map) m_gsp->set_addrmap(AS_PROGRAM, &harddriv_state::driver_gsp_map);
MCFG_TMS340X0_HALT_ON_RESET(true) /* halt on reset */ m_gsp->set_halt_on_reset(true);
MCFG_TMS340X0_PIXEL_CLOCK(4000000) /* pixel clock */ m_gsp->set_pixel_clock(4000000);
MCFG_TMS340X0_PIXELS_PER_CLOCK(4) /* pixels per clock */ m_gsp->set_pixels_per_clock(4);
MCFG_TMS340X0_SCANLINE_IND16_CB(harddriv_state, scanline_driver) /* scanline callback (indexed16) */ m_gsp->set_scanline_ind16_callback(FUNC(harddriv_state::scanline_driver));
MCFG_TMS340X0_OUTPUT_INT_CB(WRITELINE(*this, harddriv_state, hdgsp_irq_gen)) m_gsp->output_int().set(FUNC(harddriv_state::hdgsp_irq_gen));
MCFG_TMS340X0_TO_SHIFTREG_CB(harddriv_state, hdgsp_write_to_shiftreg) m_gsp->set_shiftreg_in_callback(FUNC(harddriv_state::hdgsp_write_to_shiftreg));
MCFG_TMS340X0_FROM_SHIFTREG_CB(harddriv_state, hdgsp_read_from_shiftreg) m_gsp->set_shiftreg_out_callback(FUNC(harddriv_state::hdgsp_read_from_shiftreg));
MCFG_VIDEO_SET_SCREEN("screen") m_gsp->set_screen("screen");
MCFG_QUANTUM_TIME(attotime::from_hz(30000)) MCFG_QUANTUM_TIME(attotime::from_hz(30000))
@ -1517,13 +1517,13 @@ MACHINE_CONFIG_START(harddriv_state::driver_msp)
driver_nomsp(config); driver_nomsp(config);
/* basic machine hardware */ /* basic machine hardware */
MCFG_DEVICE_ADD("msp", TMS34010, XTAL(50'000'000)) TMS34010(config, m_msp, XTAL(50'000'000));
MCFG_DEVICE_PROGRAM_MAP(driver_msp_map) m_msp->set_addrmap(AS_PROGRAM, &harddriv_state::driver_msp_map);
MCFG_TMS340X0_HALT_ON_RESET(true) /* halt on reset */ m_msp->set_halt_on_reset(true);
MCFG_TMS340X0_PIXEL_CLOCK(5000000) /* pixel clock */ m_msp->set_pixel_clock(5000000);
MCFG_TMS340X0_PIXELS_PER_CLOCK(2) /* pixels per clock */ m_msp->set_pixels_per_clock(2);
MCFG_TMS340X0_OUTPUT_INT_CB(WRITELINE(*this, harddriv_state, hdmsp_irq_gen)) m_msp->output_int().set(FUNC(harddriv_state::hdmsp_irq_gen));
MCFG_VIDEO_SET_SCREEN("screen") m_msp->set_screen("screen");
config.device_remove("slapstic"); config.device_remove("slapstic");
MACHINE_CONFIG_END MACHINE_CONFIG_END
@ -1538,11 +1538,10 @@ MACHINE_CONFIG_START(harddriv_state::multisync_nomsp)
MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_PROGRAM_MAP(multisync_68k_map) MCFG_DEVICE_PROGRAM_MAP(multisync_68k_map)
MCFG_DEVICE_MODIFY("gsp") m_gsp->set_addrmap(AS_PROGRAM, &harddriv_state::multisync_gsp_map);
MCFG_DEVICE_PROGRAM_MAP(multisync_gsp_map) m_gsp->set_pixel_clock(6000000);
MCFG_TMS340X0_PIXEL_CLOCK(6000000) /* pixel clock */ m_gsp->set_pixels_per_clock(2);
MCFG_TMS340X0_PIXELS_PER_CLOCK(2) /* pixels per clock */ m_gsp->set_scanline_ind16_callback(FUNC(harddriv_state::scanline_multisync));
MCFG_TMS340X0_SCANLINE_IND16_CB(harddriv_state, scanline_multisync) /* scanline callback (indexed16) */
/* video hardware */ /* video hardware */
MCFG_SCREEN_MODIFY("screen") MCFG_SCREEN_MODIFY("screen")
@ -1551,21 +1550,21 @@ MACHINE_CONFIG_END
/* Multisync board with MSP (used by Hard Drivin' compact) */ /* Multisync board with MSP (used by Hard Drivin' compact) */
MACHINE_CONFIG_START(harddriv_state::multisync_msp) void harddriv_state::multisync_msp(machine_config &config)
{
multisync_nomsp(config);
multisync_nomsp(config); /* basic machine hardware */
TMS34010(config, m_msp, XTAL(50'000'000));
m_msp->set_addrmap(AS_PROGRAM, &harddriv_state::driver_msp_map);
m_msp->set_halt_on_reset(true);
m_msp->set_pixel_clock(5000000);
m_msp->set_pixels_per_clock(2);
m_msp->output_int().set(FUNC(harddriv_state::hdmsp_irq_gen));
m_msp->set_screen("screen");
/* basic machine hardware */ config.device_remove("slapstic");
MCFG_DEVICE_ADD("msp", TMS34010, XTAL(50'000'000)) }
MCFG_DEVICE_PROGRAM_MAP(driver_msp_map)
MCFG_TMS340X0_HALT_ON_RESET(true) /* halt on reset */
MCFG_TMS340X0_PIXEL_CLOCK(5000000) /* pixel clock */
MCFG_TMS340X0_PIXELS_PER_CLOCK(2) /* pixels per clock */
MCFG_TMS340X0_OUTPUT_INT_CB(WRITELINE(*this, harddriv_state, hdmsp_irq_gen))
MCFG_VIDEO_SET_SCREEN("screen")
config.device_remove("slapstic");
MACHINE_CONFIG_END
/* Multisync II board (used by Hard Drivin's Airborne) */ /* Multisync II board (used by Hard Drivin's Airborne) */
@ -1577,8 +1576,7 @@ MACHINE_CONFIG_START(harddriv_state::multisync2)
MCFG_DEVICE_MODIFY("maincpu") MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_PROGRAM_MAP(multisync2_68k_map) MCFG_DEVICE_PROGRAM_MAP(multisync2_68k_map)
MCFG_DEVICE_MODIFY("gsp") m_gsp->set_addrmap(AS_PROGRAM, &harddriv_state::multisync2_gsp_map);
MCFG_DEVICE_PROGRAM_MAP(multisync2_gsp_map)
config.device_remove("slapstic"); config.device_remove("slapstic");
MACHINE_CONFIG_END MACHINE_CONFIG_END
@ -1861,8 +1859,7 @@ MACHINE_CONFIG_START(stunrun_board_device_state::device_add_mconfig)
multisync_nomsp(config); multisync_nomsp(config);
/* basic machine hardware */ /* multisync board without MSP */ /* basic machine hardware */ /* multisync board without MSP */
MCFG_DEVICE_MODIFY("gsp") m_gsp->set_pixel_clock(5000000);
MCFG_TMS340X0_PIXEL_CLOCK(5000000) /* pixel clock */
adsp(config); /* ADSP board */ adsp(config); /* ADSP board */
config.device_remove("slapstic"); config.device_remove("slapstic");

18
src/mame/drivers/jpmimpct.cpp
View File

@ -843,15 +843,15 @@ MACHINE_CONFIG_START(jpmimpct_state::jpmimpct)
MCFG_DEVICE_ADD("maincpu", M68000, 8000000) MCFG_DEVICE_ADD("maincpu", M68000, 8000000)
MCFG_DEVICE_PROGRAM_MAP(m68k_program_map) MCFG_DEVICE_PROGRAM_MAP(m68k_program_map)
MCFG_DEVICE_ADD("dsp", TMS34010, 40000000) TMS34010(config, m_dsp, 40000000);
MCFG_DEVICE_PROGRAM_MAP(tms_program_map) m_dsp->set_addrmap(AS_PROGRAM, &jpmimpct_state::tms_program_map);
MCFG_TMS340X0_HALT_ON_RESET(true) /* halt on reset */ m_dsp->set_halt_on_reset(true);
MCFG_TMS340X0_PIXEL_CLOCK(40000000/16) /* pixel clock */ m_dsp->set_pixel_clock(40000000/16);
MCFG_TMS340X0_PIXELS_PER_CLOCK(4) /* pixels per clock */ m_dsp->set_pixels_per_clock(4);
MCFG_TMS340X0_SCANLINE_RGB32_CB(jpmimpct_state, scanline_update) /* scanline updater (rgb32) */ m_dsp->set_scanline_rgb32_callback(FUNC(jpmimpct_state::scanline_update));
MCFG_TMS340X0_OUTPUT_INT_CB(WRITELINE(*this, jpmimpct_state, tms_irq)) m_dsp->output_int().set(FUNC(jpmimpct_state::tms_irq));
MCFG_TMS340X0_TO_SHIFTREG_CB(jpmimpct_state, to_shiftreg) /* write to shiftreg function */ m_dsp->set_shiftreg_in_callback(FUNC(jpmimpct_state::to_shiftreg));
MCFG_TMS340X0_FROM_SHIFTREG_CB(jpmimpct_state, from_shiftreg) /* read from shiftreg function */ m_dsp->set_shiftreg_out_callback(FUNC(jpmimpct_state::from_shiftreg));
MCFG_QUANTUM_TIME(attotime::from_hz(30000)) MCFG_QUANTUM_TIME(attotime::from_hz(30000))
MCFG_MACHINE_START_OVERRIDE(jpmimpct_state,jpmimpct) MCFG_MACHINE_START_OVERRIDE(jpmimpct_state,jpmimpct)

15
src/mame/drivers/lethalj.cpp
View File

@ -634,12 +634,12 @@ INPUT_PORTS_END
MACHINE_CONFIG_START(lethalj_state::gameroom) MACHINE_CONFIG_START(lethalj_state::gameroom)
/* basic machine hardware */ /* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", TMS34010, MASTER_CLOCK) TMS34010(config, m_maincpu, MASTER_CLOCK);
MCFG_DEVICE_PROGRAM_MAP(lethalj_map) m_maincpu->set_addrmap(AS_PROGRAM, &lethalj_state::lethalj_map);
MCFG_TMS340X0_HALT_ON_RESET(false) /* halt on reset */ m_maincpu->set_halt_on_reset(false);
MCFG_TMS340X0_PIXEL_CLOCK(VIDEO_CLOCK) /* pixel clock */ m_maincpu->set_pixel_clock(VIDEO_CLOCK);
MCFG_TMS340X0_PIXELS_PER_CLOCK(1) /* pixels per clock */ m_maincpu->set_pixels_per_clock(1);
MCFG_TMS340X0_SCANLINE_IND16_CB(lethalj_state, scanline_update) /* scanline updater (indexed16) */ m_maincpu->set_scanline_ind16_callback(FUNC(lethalj_state::scanline_update));
MCFG_TICKET_DISPENSER_ADD("ticket", attotime::from_msec(200), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH) MCFG_TICKET_DISPENSER_ADD("ticket", attotime::from_msec(200), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH)
@ -668,8 +668,7 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(lethalj_state::lethalj) MACHINE_CONFIG_START(lethalj_state::lethalj)
gameroom(config); gameroom(config);
MCFG_DEVICE_MODIFY("maincpu") m_maincpu->set_pixel_clock(VIDEO_CLOCK_LETHALJ);
MCFG_TMS340X0_PIXEL_CLOCK(VIDEO_CLOCK_LETHALJ) /* pixel clock */
MCFG_SCREEN_MODIFY("screen") MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_RAW_PARAMS(VIDEO_CLOCK_LETHALJ, 689, 0, 512, 259, 0, 236) MCFG_SCREEN_RAW_PARAMS(VIDEO_CLOCK_LETHALJ, 689, 0, 512, 259, 0, 236)

12
src/mame/drivers/metalmx.cpp
View File

@ -674,12 +674,12 @@ MACHINE_CONFIG_START(metalmx_state::metalmx)
MCFG_DEVICE_PROGRAM_MAP(adsp_program_map) MCFG_DEVICE_PROGRAM_MAP(adsp_program_map)
MCFG_DEVICE_DATA_MAP(adsp_data_map) MCFG_DEVICE_DATA_MAP(adsp_data_map)
MCFG_DEVICE_ADD("gsp", TMS34020, 40000000) /* Unverified */ TMS34020(config, m_gsp, 40000000); /* Unverified */
MCFG_DEVICE_PROGRAM_MAP(gsp_map) m_gsp->set_addrmap(AS_PROGRAM, &metalmx_state::gsp_map);
MCFG_TMS340X0_HALT_ON_RESET(true) /* halt on reset */ m_gsp->set_halt_on_reset(true);
MCFG_TMS340X0_PIXEL_CLOCK(4000000) /* pixel clock */ m_gsp->set_pixel_clock(4000000);
MCFG_TMS340X0_PIXELS_PER_CLOCK(2) /* pixels per clock */ m_gsp->set_pixels_per_clock(2);
MCFG_TMS340X0_OUTPUT_INT_CB(INPUTLINE("maincpu", 4)) m_gsp->output_int().set_inputline("maincpu", 4);
MCFG_DEVICE_ADD("dsp32c_1", DSP32C, 40000000) /* Unverified */ MCFG_DEVICE_ADD("dsp32c_1", DSP32C, 40000000) /* Unverified */
MCFG_DEVICE_PROGRAM_MAP(dsp32c_1_map) MCFG_DEVICE_PROGRAM_MAP(dsp32c_1_map)

16
src/mame/drivers/micro3d.cpp
View File

@ -305,14 +305,14 @@ MACHINE_CONFIG_START(micro3d_state::micro3d)
MCFG_DEVICE_PROGRAM_MAP(hostmem) MCFG_DEVICE_PROGRAM_MAP(hostmem)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", micro3d_state, micro3d_vblank) MCFG_DEVICE_VBLANK_INT_DRIVER("screen", micro3d_state, micro3d_vblank)
MCFG_DEVICE_ADD("vgb", TMS34010, 40_MHz_XTAL) TMS34010(config, m_vgb, 40_MHz_XTAL);
MCFG_DEVICE_PROGRAM_MAP(vgbmem) m_vgb->set_addrmap(AS_PROGRAM, &micro3d_state::vgbmem);
MCFG_VIDEO_SET_SCREEN("screen") m_vgb->set_halt_on_reset(false);
MCFG_TMS340X0_HALT_ON_RESET(false) /* halt on reset */ m_vgb->set_pixel_clock(40_MHz_XTAL / 8);
MCFG_TMS340X0_PIXEL_CLOCK(40_MHz_XTAL / 8) /* pixel clock */ m_vgb->set_pixels_per_clock(4);
MCFG_TMS340X0_PIXELS_PER_CLOCK(4) /* pixels per clock */ m_vgb->set_scanline_ind16_callback(FUNC(micro3d_state::scanline_update));
MCFG_TMS340X0_SCANLINE_IND16_CB(micro3d_state, scanline_update) /* scanline updater (indexed16) */ m_vgb->output_int().set(FUNC(micro3d_state::tms_interrupt));
MCFG_TMS340X0_OUTPUT_INT_CB(WRITELINE(*this, micro3d_state, tms_interrupt)) m_vgb->set_screen("screen");
MCFG_DEVICE_ADD("drmath", AM29000, 32_MHz_XTAL / 2) MCFG_DEVICE_ADD("drmath", AM29000, 32_MHz_XTAL / 2)
MCFG_DEVICE_PROGRAM_MAP(drmath_prg) MCFG_DEVICE_PROGRAM_MAP(drmath_prg)

32
src/mame/drivers/midyunit.cpp
View File

@ -1102,14 +1102,14 @@ INPUT_PORTS_END
MACHINE_CONFIG_START(midyunit_state::zunit) MACHINE_CONFIG_START(midyunit_state::zunit)
/* basic machine hardware */ /* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", TMS34010, FAST_MASTER_CLOCK) TMS34010(config, m_maincpu, FAST_MASTER_CLOCK);
MCFG_DEVICE_PROGRAM_MAP(main_map) m_maincpu->set_addrmap(AS_PROGRAM, &midyunit_state::main_map);
MCFG_TMS340X0_HALT_ON_RESET(false) /* halt on reset */ m_maincpu->set_halt_on_reset(false);
MCFG_TMS340X0_PIXEL_CLOCK(MEDRES_PIXEL_CLOCK) /* pixel clock */ m_maincpu->set_pixel_clock(MEDRES_PIXEL_CLOCK);
MCFG_TMS340X0_PIXELS_PER_CLOCK(2) /* pixels per clock */ m_maincpu->set_pixels_per_clock(2);
MCFG_TMS340X0_SCANLINE_IND16_CB(midyunit_state, scanline_update) /* scanline updater (indexed16) */ m_maincpu->set_scanline_ind16_callback(FUNC(midyunit_state::scanline_update));
MCFG_TMS340X0_TO_SHIFTREG_CB(midyunit_state, to_shiftreg) /* write to shiftreg function */ m_maincpu->set_shiftreg_in_callback(FUNC(midyunit_state::to_shiftreg));
MCFG_TMS340X0_FROM_SHIFTREG_CB(midyunit_state, from_shiftreg) /* read from shiftreg function */ m_maincpu->set_shiftreg_out_callback(FUNC(midyunit_state::from_shiftreg));
MCFG_MACHINE_RESET_OVERRIDE(midyunit_state,midyunit) MCFG_MACHINE_RESET_OVERRIDE(midyunit_state,midyunit)
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
@ -1145,14 +1145,14 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(midyunit_state::yunit_core) MACHINE_CONFIG_START(midyunit_state::yunit_core)
/* basic machine hardware */ /* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", TMS34010, SLOW_MASTER_CLOCK) TMS34010(config, m_maincpu, SLOW_MASTER_CLOCK);
MCFG_DEVICE_PROGRAM_MAP(main_map) m_maincpu->set_addrmap(AS_PROGRAM, &midyunit_state::main_map);
MCFG_TMS340X0_HALT_ON_RESET(false) /* halt on reset */ m_maincpu->set_halt_on_reset(false);
MCFG_TMS340X0_PIXEL_CLOCK(STDRES_PIXEL_CLOCK) /* pixel clock */ m_maincpu->set_pixel_clock(STDRES_PIXEL_CLOCK);
MCFG_TMS340X0_PIXELS_PER_CLOCK(2) /* pixels per clock */ m_maincpu->set_pixels_per_clock(2);
MCFG_TMS340X0_SCANLINE_IND16_CB(midyunit_state, scanline_update) /* scanline updater (indexed16) */ m_maincpu->set_scanline_ind16_callback(FUNC(midyunit_state::scanline_update));
MCFG_TMS340X0_TO_SHIFTREG_CB(midyunit_state, to_shiftreg) /* write to shiftreg function */ m_maincpu->set_shiftreg_in_callback(FUNC(midyunit_state::to_shiftreg));
MCFG_TMS340X0_FROM_SHIFTREG_CB(midyunit_state, from_shiftreg) /* read from shiftreg function */ m_maincpu->set_shiftreg_out_callback(FUNC(midyunit_state::from_shiftreg));
MCFG_MACHINE_RESET_OVERRIDE(midyunit_state,midyunit) MCFG_MACHINE_RESET_OVERRIDE(midyunit_state,midyunit)
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);

14
src/mame/drivers/potgoldu.cpp
View File

@ -42,7 +42,7 @@ private:
void potgold_map(address_map &map); void potgold_map(address_map &map);
required_device<cpu_device> m_maincpu; required_device<tms34010_device> m_maincpu;
}; };
@ -81,12 +81,12 @@ INPUT_PORTS_END
MACHINE_CONFIG_START(potgold_state::potgold) MACHINE_CONFIG_START(potgold_state::potgold)
/* basic machine hardware */ /* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", TMS34010, XTAL(40'000'000)) TMS34010(config, m_maincpu, XTAL(40'000'000));
MCFG_DEVICE_PROGRAM_MAP(potgold_map) m_maincpu->set_addrmap(AS_PROGRAM, &potgold_state::potgold_map);
MCFG_TMS340X0_HALT_ON_RESET(false) /* halt on reset */ m_maincpu->set_halt_on_reset(false);
MCFG_TMS340X0_PIXEL_CLOCK(VIDEO_CLOCK/2) /* pixel clock */ m_maincpu->set_pixel_clock(VIDEO_CLOCK/2);
MCFG_TMS340X0_PIXELS_PER_CLOCK(1) /* pixels per clock */ m_maincpu->set_pixels_per_clock(1);
MCFG_TMS340X0_SCANLINE_RGB32_CB(potgold_state, scanline_update) /* scanline callback (rgb32) */ m_maincpu->set_scanline_rgb32_callback(FUNC(potgold_state::scanline_update));
MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(VIDEO_CLOCK/2, 444, 0, 320, 233, 0, 200) MCFG_SCREEN_RAW_PARAMS(VIDEO_CLOCK/2, 444, 0, 320, 233, 0, 200)

14
src/mame/drivers/skeetsht.cpp
View File

@ -243,13 +243,13 @@ MACHINE_CONFIG_START(skeetsht_state::skeetsht)
MCFG_DEVICE_IO_MAP(hc11_io_map) MCFG_DEVICE_IO_MAP(hc11_io_map)
MCFG_MC68HC11_CONFIG( 0, 0x100, 0x01 ) // And 512 bytes EEPROM? (68HC11A1) MCFG_MC68HC11_CONFIG( 0, 0x100, 0x01 ) // And 512 bytes EEPROM? (68HC11A1)
MCFG_DEVICE_ADD("tms", TMS34010, 48000000) TMS34010(config, m_tms, 48000000);
MCFG_DEVICE_PROGRAM_MAP(tms_program_map) m_tms->set_addrmap(AS_PROGRAM, &skeetsht_state::tms_program_map);
MCFG_TMS340X0_HALT_ON_RESET(true) /* halt on reset */ m_tms->set_halt_on_reset(true);
MCFG_TMS340X0_PIXEL_CLOCK(48000000 / 8) /* pixel clock */ m_tms->set_pixel_clock(48000000 / 8);
MCFG_TMS340X0_PIXELS_PER_CLOCK(1) /* pixels per clock */ m_tms->set_pixels_per_clock(1);
MCFG_TMS340X0_SCANLINE_RGB32_CB(skeetsht_state, scanline_update) /* scanline updater (rgb32) */ m_tms->set_scanline_rgb32_callback(FUNC(skeetsht_state::scanline_update));
MCFG_TMS340X0_OUTPUT_INT_CB(WRITELINE(*this, skeetsht_state, tms_irq)) m_tms->output_int().set(FUNC(skeetsht_state::tms_irq));
MCFG_TLC34076_ADD("tlc34076", TLC34076_6_BIT) MCFG_TLC34076_ADD("tlc34076", TLC34076_6_BIT)

18
src/mame/drivers/skimaxx.cpp
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@ -513,15 +513,15 @@ MACHINE_CONFIG_START(skimaxx_state::skimaxx)
/* video hardware */ /* video hardware */
MCFG_DEVICE_ADD("tms", TMS34010, XTAL(50'000'000)) TMS34010(config, m_tms, XTAL(50'000'000));
MCFG_DEVICE_PROGRAM_MAP(tms_program_map) m_tms->set_addrmap(AS_PROGRAM, &skimaxx_state::tms_program_map);
MCFG_TMS340X0_HALT_ON_RESET(false) /* halt on reset */ m_tms->set_halt_on_reset(false);
MCFG_TMS340X0_PIXEL_CLOCK(50000000/8) /* pixel clock */ m_tms->set_pixel_clock(50000000/8);
MCFG_TMS340X0_PIXELS_PER_CLOCK(2) /* pixels per clock */ m_tms->set_pixels_per_clock(2);
MCFG_TMS340X0_SCANLINE_IND16_CB(skimaxx_state, scanline_update) /* scanline updater (indexed16) */ m_tms->set_scanline_ind16_callback(FUNC(skimaxx_state::scanline_update));
MCFG_TMS340X0_OUTPUT_INT_CB(WRITELINE(*this, skimaxx_state, tms_irq)) m_tms->output_int().set(FUNC(skimaxx_state::tms_irq));
MCFG_TMS340X0_TO_SHIFTREG_CB(skimaxx_state, to_shiftreg) /* write to shiftreg function */ m_tms->set_shiftreg_in_callback(FUNC(skimaxx_state::to_shiftreg));
MCFG_TMS340X0_FROM_SHIFTREG_CB(skimaxx_state, from_shiftreg) /* read from shiftreg function */ m_tms->set_shiftreg_out_callback(FUNC(skimaxx_state::from_shiftreg));
MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_ADD("screen", RASTER)
// MCFG_SCREEN_RAW_PARAMS(40000000/4, 156*4, 0, 100*4, 328, 0, 300) // TODO - Wrong but TMS overrides it anyway // MCFG_SCREEN_RAW_PARAMS(40000000/4, 156*4, 0, 100*4, 328, 0, 300) // TODO - Wrong but TMS overrides it anyway

40
src/mame/drivers/tickee.cpp
View File

@ -761,12 +761,12 @@ INPUT_PORTS_END
MACHINE_CONFIG_START(tickee_state::tickee) MACHINE_CONFIG_START(tickee_state::tickee)
/* basic machine hardware */ /* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", TMS34010, XTAL(40'000'000)) TMS34010(config, m_maincpu, XTAL(40'000'000));
MCFG_DEVICE_PROGRAM_MAP(tickee_map) m_maincpu->set_addrmap(AS_PROGRAM, &tickee_state::tickee_map);
MCFG_TMS340X0_HALT_ON_RESET(false) /* halt on reset */ m_maincpu->set_halt_on_reset(false);
MCFG_TMS340X0_PIXEL_CLOCK(VIDEO_CLOCK/2) /* pixel clock */ m_maincpu->set_pixel_clock(VIDEO_CLOCK/2);
MCFG_TMS340X0_PIXELS_PER_CLOCK(1) /* pixels per clock */ m_maincpu->set_pixels_per_clock(1);
MCFG_TMS340X0_SCANLINE_RGB32_CB(tickee_state, scanline_update) /* scanline callback (rgb32) */ m_maincpu->set_scanline_rgb32_callback(FUNC(tickee_state::scanline_update));
MCFG_MACHINE_RESET_OVERRIDE(tickee_state,tickee) MCFG_MACHINE_RESET_OVERRIDE(tickee_state,tickee)
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1);
@ -810,14 +810,14 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(tickee_state::rapidfir) MACHINE_CONFIG_START(tickee_state::rapidfir)
/* basic machine hardware */ /* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", TMS34010, XTAL(50'000'000)) TMS34010(config, m_maincpu, XTAL(50'000'000));
MCFG_DEVICE_PROGRAM_MAP(rapidfir_map) m_maincpu->set_addrmap(AS_PROGRAM, &tickee_state::rapidfir_map);
MCFG_TMS340X0_HALT_ON_RESET(false) /* halt on reset */ m_maincpu->set_halt_on_reset(false);
MCFG_TMS340X0_PIXEL_CLOCK(VIDEO_CLOCK/2) /* pixel clock */ m_maincpu->set_pixel_clock(VIDEO_CLOCK/2);
MCFG_TMS340X0_PIXELS_PER_CLOCK(1) /* pixels per clock */ m_maincpu->set_pixels_per_clock(1);
MCFG_TMS340X0_SCANLINE_RGB32_CB(tickee_state, rapidfir_scanline_update) /* scanline callback (rgb32) */ m_maincpu->set_scanline_rgb32_callback(FUNC(tickee_state::rapidfir_scanline_update));
MCFG_TMS340X0_TO_SHIFTREG_CB(tickee_state, rapidfir_to_shiftreg) /* write to shiftreg function */ m_maincpu->set_shiftreg_in_callback(FUNC(tickee_state::rapidfir_to_shiftreg));
MCFG_TMS340X0_FROM_SHIFTREG_CB(tickee_state, rapidfir_from_shiftreg) /* read from shiftreg function */ m_maincpu->set_shiftreg_out_callback(FUNC(tickee_state::rapidfir_from_shiftreg));
MCFG_MACHINE_RESET_OVERRIDE(tickee_state,rapidfir) MCFG_MACHINE_RESET_OVERRIDE(tickee_state,rapidfir)
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1);
@ -844,12 +844,12 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(tickee_state::mouseatk) MACHINE_CONFIG_START(tickee_state::mouseatk)
/* basic machine hardware */ /* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", TMS34010, XTAL(40'000'000)) TMS34010(config, m_maincpu, XTAL(40'000'000));
MCFG_DEVICE_PROGRAM_MAP(mouseatk_map) m_maincpu->set_addrmap(AS_PROGRAM, &tickee_state::mouseatk_map);
MCFG_TMS340X0_HALT_ON_RESET(false) /* halt on reset */ m_maincpu->set_halt_on_reset(false);
MCFG_TMS340X0_PIXEL_CLOCK(VIDEO_CLOCK/2) /* pixel clock */ m_maincpu->set_pixel_clock(VIDEO_CLOCK/2);
MCFG_TMS340X0_PIXELS_PER_CLOCK(1) /* pixels per clock */ m_maincpu->set_pixels_per_clock(1);
MCFG_TMS340X0_SCANLINE_RGB32_CB(tickee_state, scanline_update) /* scanline callback (rgb32) */ m_maincpu->set_scanline_rgb32_callback(FUNC(tickee_state::scanline_update));
MCFG_MACHINE_RESET_OVERRIDE(tickee_state,tickee) MCFG_MACHINE_RESET_OVERRIDE(tickee_state,tickee)
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1);

18
src/mame/drivers/xtheball.cpp
View File

@ -294,15 +294,15 @@ INPUT_PORTS_END
MACHINE_CONFIG_START(xtheball_state::xtheball) MACHINE_CONFIG_START(xtheball_state::xtheball)
MCFG_DEVICE_ADD("maincpu", TMS34010, 40000000) TMS34010(config, m_maincpu, 40000000);
MCFG_DEVICE_PROGRAM_MAP(main_map) m_maincpu->set_addrmap(AS_PROGRAM, &xtheball_state::main_map);
MCFG_TMS340X0_HALT_ON_RESET(false) /* halt on reset */ m_maincpu->set_halt_on_reset(false);
MCFG_TMS340X0_PIXEL_CLOCK(10000000) /* pixel clock */ m_maincpu->set_pixel_clock(10000000);
MCFG_TMS340X0_PIXELS_PER_CLOCK(1) /* pixels per clock */ m_maincpu->set_pixels_per_clock(1);
MCFG_TMS340X0_SCANLINE_RGB32_CB(xtheball_state, scanline_update) /* scanline updater (rgb32) */ m_maincpu->set_scanline_rgb32_callback(FUNC(xtheball_state::scanline_update));
MCFG_TMS340X0_TO_SHIFTREG_CB(xtheball_state, to_shiftreg) /* write to shiftreg function */ m_maincpu->set_shiftreg_in_callback(FUNC(xtheball_state::to_shiftreg));
MCFG_TMS340X0_FROM_SHIFTREG_CB(xtheball_state, from_shiftreg) /* read from shiftreg function */ m_maincpu->set_shiftreg_out_callback(FUNC(xtheball_state::from_shiftreg));
MCFG_DEVICE_PERIODIC_INT_DRIVER(xtheball_state, irq1_line_hold, 15000) m_maincpu->set_periodic_int(FUNC(xtheball_state::irq1_line_hold), attotime::from_hz(15000));
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1);

20
src/mame/includes/btoads.h
View File

@ -21,16 +21,16 @@ class btoads_state : public driver_device
public: public:
btoads_state(const machine_config &mconfig, device_type type, const char *tag) btoads_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag), : driver_device(mconfig, type, tag),
m_audiocpu(*this, "audiocpu"), m_audiocpu(*this, "audiocpu"),
m_bsmt(*this, "bsmt"), m_bsmt(*this, "bsmt"),
m_tlc34076(*this, "tlc34076"), m_tlc34076(*this, "tlc34076"),
m_vram_fg0(*this, "vram_fg0", 16), m_vram_fg0(*this, "vram_fg0", 16),
m_vram_fg1(*this, "vram_fg1", 16), m_vram_fg1(*this, "vram_fg1", 16),
m_vram_fg_data(*this, "vram_fg_data"), m_vram_fg_data(*this, "vram_fg_data"),
m_vram_bg0(*this, "vram_bg0"), m_vram_bg0(*this, "vram_bg0"),
m_vram_bg1(*this, "vram_bg1"), m_vram_bg1(*this, "vram_bg1"),
m_sprite_scale(*this, "sprite_scale"), m_sprite_scale(*this, "sprite_scale"),
m_sprite_control(*this, "sprite_control") , m_sprite_control(*this, "sprite_control"),
m_maincpu(*this, "maincpu"), m_maincpu(*this, "maincpu"),
m_screen(*this, "screen") { } m_screen(*this, "screen") { }

2
src/mame/includes/midyunit.h
View File

@ -94,7 +94,7 @@ private:
TIMER_AUTOERASE_LINE TIMER_AUTOERASE_LINE
}; };
required_device<cpu_device> m_maincpu; required_device<tms34010_device> m_maincpu;
optional_device<cpu_device> m_audiocpu; optional_device<cpu_device> m_audiocpu;
optional_device<okim6295_device> m_oki; optional_device<okim6295_device> m_oki;
required_device<palette_device> m_palette; required_device<palette_device> m_palette;

18
src/mame/machine/inder_vid.cpp
View File

@ -98,15 +98,15 @@ void inder_vid_device::ramdac_map(address_map &map)
} }
MACHINE_CONFIG_START(inder_vid_device::device_add_mconfig) MACHINE_CONFIG_START(inder_vid_device::device_add_mconfig)
MCFG_DEVICE_ADD(m_tms, TMS34010, XTAL(40'000'000)) TMS34010(config, m_tms, XTAL(40'000'000));
MCFG_DEVICE_PROGRAM_MAP(megaphx_tms_map) m_tms->set_addrmap(AS_PROGRAM, &inder_vid_device::megaphx_tms_map);
MCFG_TMS340X0_HALT_ON_RESET(true) /* halt on reset */ m_tms->set_halt_on_reset(true);
MCFG_TMS340X0_PIXEL_CLOCK(XTAL(40'000'000)/12) /* pixel clock */ m_tms->set_pixel_clock(XTAL(40'000'000)/12);
MCFG_TMS340X0_PIXELS_PER_CLOCK(2) /* pixels per clock */ m_tms->set_pixels_per_clock(2);
MCFG_TMS340X0_SCANLINE_RGB32_CB(inder_vid_device, scanline) /* scanline updater (RGB32) */ m_tms->set_scanline_rgb32_callback(FUNC(inder_vid_device::scanline));
MCFG_TMS340X0_OUTPUT_INT_CB(INPUTLINE(":maincpu", 4)) m_tms->output_int().set_inputline(":maincpu", 4);
MCFG_TMS340X0_TO_SHIFTREG_CB(inder_vid_device, to_shiftreg) /* write to shiftreg function */ m_tms->set_shiftreg_in_callback(FUNC(inder_vid_device::to_shiftreg));
MCFG_TMS340X0_FROM_SHIFTREG_CB(inder_vid_device, from_shiftreg) /* read from shiftreg function */ m_tms->set_shiftreg_out_callback(FUNC(inder_vid_device::from_shiftreg));
MCFG_SCREEN_ADD("inder_screen", RASTER) MCFG_SCREEN_ADD("inder_screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(XTAL(40'000'000)/12, 424, 0, 338-1, 262, 0, 246-1) MCFG_SCREEN_RAW_PARAMS(XTAL(40'000'000)/12, 424, 0, 338-1, 262, 0, 246-1)