- m6809: Modernized the M6809 core. [MooglyGuy]
This commit is contained in:
Ryan Holtz
parent
e8e1d44daa
commit
9ad5d554de
1
.gitattributes
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.gitattributes
vendored
@ -573,6 +573,7 @@ src/emu/cpu/m6805/m6805.h svneol=native#text/plain
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src/emu/cpu/m6809/6809dasm.c svneol=native#text/plain
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src/emu/cpu/m6809/6809ops.c svneol=native#text/plain
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src/emu/cpu/m6809/6809tbl.c svneol=native#text/plain
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src/emu/cpu/m6809/6809tbl.h svneol=native#text/plain
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src/emu/cpu/m6809/m6809.c svneol=native#text/plain
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src/emu/cpu/m6809/m6809.h svneol=native#text/plain
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src/emu/cpu/mb86233/mb86233.c svneol=native#text/plain
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@ -363,14 +363,18 @@ static const char *const m6809_regs_te[16] =
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"A", "B", "CC", "DP", "inv", "inv", "inv", "inv"
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};
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CPU_DISASSEMBLE( m6809 )
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offs_t m6809_disassemble(legacy_cpu_device *device, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, int options, m6809_base_device *m6809)
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{
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UINT8 opcode, mode, pb, pbm, reg;
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const UINT8 *operandarray;
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unsigned int ea, flags;
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int numoperands, offset, indirect;
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const m6809_config *configdata = device ? (const m6809_config *)device->static_config() : NULL;
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int encrypt_only_first_byte = configdata ? configdata->encrypt_only_first_byte : 0;
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bool encrypt_only_first_byte = false;
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if (m6809 != NULL)
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{
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m6809_config &config = static_cast<m6809_config &>(*m6809);
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encrypt_only_first_byte = config.m_encrypt_only_first_byte;
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}
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int i, p = 0, page = 0, opcode_found = FALSE;
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@ -617,3 +621,13 @@ CPU_DISASSEMBLE( m6809 )
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return p | flags | DASMFLAG_SUPPORTED;
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}
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CPU_DISASSEMBLE( m6809 )
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{
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return m6809_disassemble(device, buffer, pc, oprom, opram, options, NULL);
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}
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offs_t m6809_base_device::disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, int options)
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{
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return m6809_disassemble(NULL, buffer, pc, oprom, opram, options, this);
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}
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@ -12,16 +12,16 @@ HNZVC
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*/
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#define OP_HANDLER(_name) INLINE void _name (m68_state_t *m68_state)
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#define OP_HANDLER(_name) void m6809_base_device::_name()
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OP_HANDLER( illegal )
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{
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logerror("M6809: illegal opcode at %04x\n",PC);
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}
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static void IIError(m68_state_t *m68_state)
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void m6809_base_device::IIError()
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{
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illegal(m68_state); // Vector to Trap handler
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illegal(); // Vector to Trap handler
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}
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/* $00 NEG direct ?**** */
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@ -178,12 +178,12 @@ OP_HANDLER( sync )
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/* SYNC stops processing instructions until an interrupt request happens. */
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/* This doesn't require the corresponding interrupt to be enabled: if it */
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/* is disabled, execution continues with the next instruction. */
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m68_state->int_state |= M6809_SYNC; /* HJB 990227 */
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check_irq_lines(m68_state);
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/* if M6809_SYNC has not been cleared by check_irq_lines(m68_state),
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m_int_state |= M6809_SYNC; /* HJB 990227 */
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check_irq_lines();
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/* if M6809_SYNC has not been cleared by check_irq_lines(),
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* stop execution until the interrupt lines change. */
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if( m68_state->int_state & M6809_SYNC )
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if (m68_state->icount > 0) m68_state->icount = 0;
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if( m_int_state & M6809_SYNC )
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if (m_icount > 0) m_icount = 0;
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}
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/* $14 ILLEGAL */
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@ -228,7 +228,7 @@ OP_HANDLER( orcc )
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UINT8 t;
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IMMBYTE(t);
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CC |= t;
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check_irq_lines(m68_state); /* HJB 990116 */
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check_irq_lines(); /* HJB 990116 */
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}
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/* $1B ILLEGAL */
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@ -239,7 +239,7 @@ OP_HANDLER( andcc )
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UINT8 t;
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IMMBYTE(t);
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CC &= t;
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check_irq_lines(m68_state); /* HJB 990116 */
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check_irq_lines(); /* HJB 990116 */
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}
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/* $1D SEX inherent -**-- */
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@ -554,7 +554,7 @@ OP_HANDLER( lble )
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/* $30 LEAX indexed --*-- */
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OP_HANDLER( leax )
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{
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fetch_effective_address(m68_state);
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fetch_effective_address();
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X = EA;
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CLR_Z;
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SET_Z(X);
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@ -563,7 +563,7 @@ OP_HANDLER( leax )
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/* $31 LEAY indexed --*-- */
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OP_HANDLER( leay )
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{
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fetch_effective_address(m68_state);
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fetch_effective_address();
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Y = EA;
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CLR_Z;
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SET_Z(Y);
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@ -572,15 +572,15 @@ OP_HANDLER( leay )
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/* $32 LEAS indexed ----- */
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OP_HANDLER( leas )
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{
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fetch_effective_address(m68_state);
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fetch_effective_address();
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S = EA;
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m68_state->int_state |= M6809_LDS;
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m_int_state |= M6809_LDS;
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}
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/* $33 LEAU indexed ----- */
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OP_HANDLER( leau )
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{
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fetch_effective_address(m68_state);
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fetch_effective_address();
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U = EA;
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}
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@ -589,14 +589,14 @@ OP_HANDLER( pshs )
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{
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UINT8 t;
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IMMBYTE(t);
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if( t&0x80 ) { PUSHWORD(pPC); m68_state->icount -= 2; }
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if( t&0x40 ) { PUSHWORD(pU); m68_state->icount -= 2; }
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if( t&0x20 ) { PUSHWORD(pY); m68_state->icount -= 2; }
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if( t&0x10 ) { PUSHWORD(pX); m68_state->icount -= 2; }
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if( t&0x08 ) { PUSHBYTE(DP); m68_state->icount -= 1; }
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if( t&0x04 ) { PUSHBYTE(B); m68_state->icount -= 1; }
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if( t&0x02 ) { PUSHBYTE(A); m68_state->icount -= 1; }
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if( t&0x01 ) { PUSHBYTE(CC); m68_state->icount -= 1; }
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if( t&0x80 ) { PUSHWORD(pPC); m_icount -= 2; }
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if( t&0x40 ) { PUSHWORD(pU); m_icount -= 2; }
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if( t&0x20 ) { PUSHWORD(pY); m_icount -= 2; }
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if( t&0x10 ) { PUSHWORD(pX); m_icount -= 2; }
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if( t&0x08 ) { PUSHBYTE(DP); m_icount -= 1; }
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if( t&0x04 ) { PUSHBYTE(B); m_icount -= 1; }
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if( t&0x02 ) { PUSHBYTE(A); m_icount -= 1; }
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if( t&0x01 ) { PUSHBYTE(CC); m_icount -= 1; }
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}
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/* 35 PULS inherent ----- */
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@ -604,17 +604,17 @@ OP_HANDLER( puls )
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{
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UINT8 t;
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IMMBYTE(t);
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if( t&0x01 ) { PULLBYTE(CC); m68_state->icount -= 1; }
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if( t&0x02 ) { PULLBYTE(A); m68_state->icount -= 1; }
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if( t&0x04 ) { PULLBYTE(B); m68_state->icount -= 1; }
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if( t&0x08 ) { PULLBYTE(DP); m68_state->icount -= 1; }
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if( t&0x10 ) { PULLWORD(XD); m68_state->icount -= 2; }
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if( t&0x20 ) { PULLWORD(YD); m68_state->icount -= 2; }
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if( t&0x40 ) { PULLWORD(UD); m68_state->icount -= 2; }
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if( t&0x80 ) { PULLWORD(PCD); m68_state->icount -= 2; }
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if( t&0x01 ) { PULLBYTE(CC); m_icount -= 1; }
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if( t&0x02 ) { PULLBYTE(A); m_icount -= 1; }
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if( t&0x04 ) { PULLBYTE(B); m_icount -= 1; }
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if( t&0x08 ) { PULLBYTE(DP); m_icount -= 1; }
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if( t&0x10 ) { PULLWORD(XD); m_icount -= 2; }
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if( t&0x20 ) { PULLWORD(YD); m_icount -= 2; }
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if( t&0x40 ) { PULLWORD(UD); m_icount -= 2; }
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if( t&0x80 ) { PULLWORD(PCD); m_icount -= 2; }
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/* HJB 990225: moved check after all PULLs */
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if( t&0x01 ) { check_irq_lines(m68_state); }
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if( t&0x01 ) { check_irq_lines(); }
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}
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/* $36 PSHU inherent ----- */
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@ -622,14 +622,14 @@ OP_HANDLER( pshu )
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{
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UINT8 t;
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IMMBYTE(t);
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if( t&0x80 ) { PSHUWORD(pPC); m68_state->icount -= 2; }
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if( t&0x40 ) { PSHUWORD(pS); m68_state->icount -= 2; }
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if( t&0x20 ) { PSHUWORD(pY); m68_state->icount -= 2; }
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if( t&0x10 ) { PSHUWORD(pX); m68_state->icount -= 2; }
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if( t&0x08 ) { PSHUBYTE(DP); m68_state->icount -= 1; }
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if( t&0x04 ) { PSHUBYTE(B); m68_state->icount -= 1; }
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if( t&0x02 ) { PSHUBYTE(A); m68_state->icount -= 1; }
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if( t&0x01 ) { PSHUBYTE(CC); m68_state->icount -= 1; }
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if( t&0x80 ) { PSHUWORD(pPC); m_icount -= 2; }
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if( t&0x40 ) { PSHUWORD(pS); m_icount -= 2; }
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if( t&0x20 ) { PSHUWORD(pY); m_icount -= 2; }
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if( t&0x10 ) { PSHUWORD(pX); m_icount -= 2; }
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if( t&0x08 ) { PSHUBYTE(DP); m_icount -= 1; }
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if( t&0x04 ) { PSHUBYTE(B); m_icount -= 1; }
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if( t&0x02 ) { PSHUBYTE(A); m_icount -= 1; }
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if( t&0x01 ) { PSHUBYTE(CC); m_icount -= 1; }
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}
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/* 37 PULU inherent ----- */
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@ -637,17 +637,17 @@ OP_HANDLER( pulu )
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{
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UINT8 t;
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IMMBYTE(t);
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if( t&0x01 ) { PULUBYTE(CC); m68_state->icount -= 1; }
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if( t&0x02 ) { PULUBYTE(A); m68_state->icount -= 1; }
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if( t&0x04 ) { PULUBYTE(B); m68_state->icount -= 1; }
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if( t&0x08 ) { PULUBYTE(DP); m68_state->icount -= 1; }
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if( t&0x10 ) { PULUWORD(XD); m68_state->icount -= 2; }
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if( t&0x20 ) { PULUWORD(YD); m68_state->icount -= 2; }
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if( t&0x40 ) { PULUWORD(SD); m68_state->icount -= 2; }
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if( t&0x80 ) { PULUWORD(PCD); m68_state->icount -= 2; }
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if( t&0x01 ) { PULUBYTE(CC); m_icount -= 1; }
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if( t&0x02 ) { PULUBYTE(A); m_icount -= 1; }
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if( t&0x04 ) { PULUBYTE(B); m_icount -= 1; }
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if( t&0x08 ) { PULUBYTE(DP); m_icount -= 1; }
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if( t&0x10 ) { PULUWORD(XD); m_icount -= 2; }
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if( t&0x20 ) { PULUWORD(YD); m_icount -= 2; }
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if( t&0x40 ) { PULUWORD(SD); m_icount -= 2; }
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if( t&0x80 ) { PULUWORD(PCD); m_icount -= 2; }
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/* HJB 990225: moved check after all PULLs */
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if( t&0x01 ) { check_irq_lines(m68_state); }
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if( t&0x01 ) { check_irq_lines(); }
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}
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/* $38 ILLEGAL */
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@ -672,7 +672,7 @@ OP_HANDLER( rti )
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t = CC & CC_E; /* HJB 990225: entire state saved? */
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if(t)
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{
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m68_state->icount -= 9;
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m_icount -= 9;
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PULLBYTE(A);
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PULLBYTE(B);
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PULLBYTE(DP);
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@ -681,7 +681,7 @@ OP_HANDLER( rti )
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PULLWORD(UD);
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}
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PULLWORD(PCD);
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check_irq_lines(m68_state); /* HJB 990116 */
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check_irq_lines(); /* HJB 990116 */
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}
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/* $3C CWAI inherent ----1 */
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@ -704,11 +704,11 @@ OP_HANDLER( cwai )
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PUSHBYTE(B);
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PUSHBYTE(A);
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PUSHBYTE(CC);
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m68_state->int_state |= M6809_CWAI; /* HJB 990228 */
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check_irq_lines(m68_state); /* HJB 990116 */
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if( m68_state->int_state & M6809_CWAI )
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if( m68_state->icount > 0 )
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m68_state->icount = 0;
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m_int_state |= M6809_CWAI; /* HJB 990228 */
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check_irq_lines(); /* HJB 990116 */
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if( m_int_state & M6809_CWAI )
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if( m_icount > 0 )
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m_icount = 0;
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}
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/* $3D MUL inherent --*-@ */
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@ -735,7 +735,7 @@ OP_HANDLER( swi )
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PUSHBYTE(A);
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PUSHBYTE(CC);
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CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
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PCD=RM16(m68_state, 0xfffa);
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PCD=RM16(0xfffa);
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}
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/* $103F SWI2 absolute indirect ----- */
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@ -750,7 +750,7 @@ OP_HANDLER( swi2 )
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PUSHBYTE(B);
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PUSHBYTE(A);
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PUSHBYTE(CC);
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PCD = RM16(m68_state, 0xfff4);
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PCD = RM16(0xfff4);
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}
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/* $113F SWI3 absolute indirect ----- */
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@ -765,7 +765,7 @@ OP_HANDLER( swi3 )
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PUSHBYTE(B);
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PUSHBYTE(A);
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PUSHBYTE(CC);
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PCD = RM16(m68_state, 0xfff2);
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PCD = RM16(0xfff2);
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}
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/* $40 NEGA inherent ?**** */
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@ -992,7 +992,7 @@ OP_HANDLER( clrb )
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OP_HANDLER( neg_ix )
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{
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UINT16 r,t;
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fetch_effective_address(m68_state);
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fetch_effective_address();
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t = RM(EAD);
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r=-t;
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CLR_NZVC;
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@ -1008,7 +1008,7 @@ OP_HANDLER( neg_ix )
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OP_HANDLER( com_ix )
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{
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UINT8 t;
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fetch_effective_address(m68_state);
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fetch_effective_address();
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t = ~RM(EAD);
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CLR_NZV;
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SET_NZ8(t);
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@ -1020,7 +1020,7 @@ OP_HANDLER( com_ix )
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OP_HANDLER( lsr_ix )
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{
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UINT8 t;
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fetch_effective_address(m68_state);
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fetch_effective_address();
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t=RM(EAD);
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CLR_NZC;
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CC |= (t & CC_C);
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@ -1034,7 +1034,7 @@ OP_HANDLER( lsr_ix )
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OP_HANDLER( ror_ix )
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{
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UINT8 t,r;
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fetch_effective_address(m68_state);
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fetch_effective_address();
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t=RM(EAD);
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r = (CC & CC_C) << 7;
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CLR_NZC;
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@ -1047,7 +1047,7 @@ OP_HANDLER( ror_ix )
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OP_HANDLER( asr_ix )
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{
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UINT8 t;
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fetch_effective_address(m68_state);
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fetch_effective_address();
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t=RM(EAD);
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CLR_NZC;
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CC |= (t & CC_C);
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@ -1060,7 +1060,7 @@ OP_HANDLER( asr_ix )
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OP_HANDLER( asl_ix )
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{
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UINT16 t,r;
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fetch_effective_address(m68_state);
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fetch_effective_address();
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t=RM(EAD);
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r = t << 1;
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CLR_NZVC;
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@ -1072,7 +1072,7 @@ OP_HANDLER( asl_ix )
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OP_HANDLER( rol_ix )
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{
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UINT16 t,r;
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fetch_effective_address(m68_state);
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fetch_effective_address();
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t=RM(EAD);
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r = CC & CC_C;
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r |= t << 1;
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@ -1085,7 +1085,7 @@ OP_HANDLER( rol_ix )
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OP_HANDLER( dec_ix )
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{
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UINT8 t;
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fetch_effective_address(m68_state);
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fetch_effective_address();
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t = RM(EAD) - 1;
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CLR_NZV; SET_FLAGS8D(t);
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WM(EAD,t);
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@ -1097,7 +1097,7 @@ OP_HANDLER( dec_ix )
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OP_HANDLER( inc_ix )
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{
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UINT8 t;
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fetch_effective_address(m68_state);
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fetch_effective_address();
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t = RM(EAD) + 1;
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CLR_NZV; SET_FLAGS8I(t);
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WM(EAD,t);
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@ -1107,7 +1107,7 @@ OP_HANDLER( inc_ix )
|
||||
OP_HANDLER( tst_ix )
|
||||
{
|
||||
UINT8 t;
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
t = RM(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ8(t);
|
||||
@ -1116,14 +1116,14 @@ OP_HANDLER( tst_ix )
|
||||
/* $6E JMP indexed ----- */
|
||||
OP_HANDLER( jmp_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
PCD = EAD;
|
||||
}
|
||||
|
||||
/* $6F CLR indexed -0100 */
|
||||
OP_HANDLER( clr_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
(void)RM(EAD);
|
||||
WM(EAD,0);
|
||||
CLR_NZVC; SEZ;
|
||||
@ -1462,7 +1462,7 @@ OP_HANDLER( stx_im )
|
||||
CLR_NZV;
|
||||
SET_NZ16(X);
|
||||
IMM16;
|
||||
WM16(m68_state, EAD,&pX);
|
||||
WM16(EAD,&pX);
|
||||
}
|
||||
|
||||
/* is this a legal instruction? */
|
||||
@ -1472,7 +1472,7 @@ OP_HANDLER( sty_im )
|
||||
CLR_NZV;
|
||||
SET_NZ16(Y);
|
||||
IMM16;
|
||||
WM16(m68_state, EAD,&pY);
|
||||
WM16(EAD,&pY);
|
||||
}
|
||||
|
||||
/* $90 SUBA direct ?**** */
|
||||
@ -1691,7 +1691,7 @@ OP_HANDLER( stx_di )
|
||||
CLR_NZV;
|
||||
SET_NZ16(X);
|
||||
DIRECT;
|
||||
WM16(m68_state, EAD,&pX);
|
||||
WM16(EAD,&pX);
|
||||
}
|
||||
|
||||
/* $109F STY direct -**0- */
|
||||
@ -1700,14 +1700,14 @@ OP_HANDLER( sty_di )
|
||||
CLR_NZV;
|
||||
SET_NZ16(Y);
|
||||
DIRECT;
|
||||
WM16(m68_state, EAD,&pY);
|
||||
WM16(EAD,&pY);
|
||||
}
|
||||
|
||||
/* $a0 SUBA indexed ?**** */
|
||||
OP_HANDLER( suba_ix )
|
||||
{
|
||||
UINT16 t,r;
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
t = RM(EAD);
|
||||
r = A - t;
|
||||
CLR_NZVC;
|
||||
@ -1719,7 +1719,7 @@ OP_HANDLER( suba_ix )
|
||||
OP_HANDLER( cmpa_ix )
|
||||
{
|
||||
UINT16 t,r;
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
t = RM(EAD);
|
||||
r = A - t;
|
||||
CLR_NZVC;
|
||||
@ -1730,7 +1730,7 @@ OP_HANDLER( cmpa_ix )
|
||||
OP_HANDLER( sbca_ix )
|
||||
{
|
||||
UINT16 t,r;
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
t = RM(EAD);
|
||||
r = A - t - (CC & CC_C);
|
||||
CLR_NZVC;
|
||||
@ -1743,8 +1743,8 @@ OP_HANDLER( subd_ix )
|
||||
{
|
||||
UINT32 r,d;
|
||||
PAIR b;
|
||||
fetch_effective_address(m68_state);
|
||||
b.d=RM16(m68_state, EAD);
|
||||
fetch_effective_address();
|
||||
b.d=RM16(EAD);
|
||||
d = D;
|
||||
r = d - b.d;
|
||||
CLR_NZVC;
|
||||
@ -1757,8 +1757,8 @@ OP_HANDLER( cmpd_ix )
|
||||
{
|
||||
UINT32 r,d;
|
||||
PAIR b;
|
||||
fetch_effective_address(m68_state);
|
||||
b.d=RM16(m68_state, EAD);
|
||||
fetch_effective_address();
|
||||
b.d=RM16(EAD);
|
||||
d = D;
|
||||
r = d - b.d;
|
||||
CLR_NZVC;
|
||||
@ -1770,8 +1770,8 @@ OP_HANDLER( cmpu_ix )
|
||||
{
|
||||
UINT32 r;
|
||||
PAIR b;
|
||||
fetch_effective_address(m68_state);
|
||||
b.d=RM16(m68_state, EAD);
|
||||
fetch_effective_address();
|
||||
b.d=RM16(EAD);
|
||||
r = U - b.d;
|
||||
CLR_NZVC;
|
||||
SET_FLAGS16(U,b.d,r);
|
||||
@ -1780,7 +1780,7 @@ OP_HANDLER( cmpu_ix )
|
||||
/* $a4 ANDA indexed -**0- */
|
||||
OP_HANDLER( anda_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
A &= RM(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ8(A);
|
||||
@ -1790,7 +1790,7 @@ OP_HANDLER( anda_ix )
|
||||
OP_HANDLER( bita_ix )
|
||||
{
|
||||
UINT8 r;
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
r = A & RM(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ8(r);
|
||||
@ -1799,7 +1799,7 @@ OP_HANDLER( bita_ix )
|
||||
/* $a6 LDA indexed -**0- */
|
||||
OP_HANDLER( lda_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
A = RM(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ8(A);
|
||||
@ -1808,7 +1808,7 @@ OP_HANDLER( lda_ix )
|
||||
/* $a7 STA indexed -**0- */
|
||||
OP_HANDLER( sta_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
CLR_NZV;
|
||||
SET_NZ8(A);
|
||||
WM(EAD,A);
|
||||
@ -1817,7 +1817,7 @@ OP_HANDLER( sta_ix )
|
||||
/* $a8 EORA indexed -**0- */
|
||||
OP_HANDLER( eora_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
A ^= RM(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ8(A);
|
||||
@ -1827,7 +1827,7 @@ OP_HANDLER( eora_ix )
|
||||
OP_HANDLER( adca_ix )
|
||||
{
|
||||
UINT16 t,r;
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
t = RM(EAD);
|
||||
r = A + t + (CC & CC_C);
|
||||
CLR_HNZVC;
|
||||
@ -1839,7 +1839,7 @@ OP_HANDLER( adca_ix )
|
||||
/* $aA ORA indexed -**0- */
|
||||
OP_HANDLER( ora_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
A |= RM(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ8(A);
|
||||
@ -1849,7 +1849,7 @@ OP_HANDLER( ora_ix )
|
||||
OP_HANDLER( adda_ix )
|
||||
{
|
||||
UINT16 t,r;
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
t = RM(EAD);
|
||||
r = A + t;
|
||||
CLR_HNZVC;
|
||||
@ -1863,8 +1863,8 @@ OP_HANDLER( cmpx_ix )
|
||||
{
|
||||
UINT32 r,d;
|
||||
PAIR b;
|
||||
fetch_effective_address(m68_state);
|
||||
b.d=RM16(m68_state, EAD);
|
||||
fetch_effective_address();
|
||||
b.d=RM16(EAD);
|
||||
d = X;
|
||||
r = d - b.d;
|
||||
CLR_NZVC;
|
||||
@ -1876,8 +1876,8 @@ OP_HANDLER( cmpy_ix )
|
||||
{
|
||||
UINT32 r,d;
|
||||
PAIR b;
|
||||
fetch_effective_address(m68_state);
|
||||
b.d=RM16(m68_state, EAD);
|
||||
fetch_effective_address();
|
||||
b.d=RM16(EAD);
|
||||
d = Y;
|
||||
r = d - b.d;
|
||||
CLR_NZVC;
|
||||
@ -1889,8 +1889,8 @@ OP_HANDLER( cmps_ix )
|
||||
{
|
||||
UINT32 r,d;
|
||||
PAIR b;
|
||||
fetch_effective_address(m68_state);
|
||||
b.d=RM16(m68_state, EAD);
|
||||
fetch_effective_address();
|
||||
b.d=RM16(EAD);
|
||||
d = S;
|
||||
r = d - b.d;
|
||||
CLR_NZVC;
|
||||
@ -1900,7 +1900,7 @@ OP_HANDLER( cmps_ix )
|
||||
/* $aD JSR indexed ----- */
|
||||
OP_HANDLER( jsr_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
PUSHWORD(pPC);
|
||||
PCD = EAD;
|
||||
}
|
||||
@ -1908,8 +1908,8 @@ OP_HANDLER( jsr_ix )
|
||||
/* $aE LDX (LDY) indexed -**0- */
|
||||
OP_HANDLER( ldx_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
X=RM16(m68_state, EAD);
|
||||
fetch_effective_address();
|
||||
X=RM16(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ16(X);
|
||||
}
|
||||
@ -1917,8 +1917,8 @@ OP_HANDLER( ldx_ix )
|
||||
/* $10aE LDY indexed -**0- */
|
||||
OP_HANDLER( ldy_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
Y=RM16(m68_state, EAD);
|
||||
fetch_effective_address();
|
||||
Y=RM16(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ16(Y);
|
||||
}
|
||||
@ -1926,19 +1926,19 @@ OP_HANDLER( ldy_ix )
|
||||
/* $aF STX (STY) indexed -**0- */
|
||||
OP_HANDLER( stx_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
CLR_NZV;
|
||||
SET_NZ16(X);
|
||||
WM16(m68_state, EAD,&pX);
|
||||
WM16(EAD,&pX);
|
||||
}
|
||||
|
||||
/* $10aF STY indexed -**0- */
|
||||
OP_HANDLER( sty_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
CLR_NZV;
|
||||
SET_NZ16(Y);
|
||||
WM16(m68_state, EAD,&pY);
|
||||
WM16(EAD,&pY);
|
||||
}
|
||||
|
||||
/* $b0 SUBA extended ?**** */
|
||||
@ -2156,7 +2156,7 @@ OP_HANDLER( stx_ex )
|
||||
CLR_NZV;
|
||||
SET_NZ16(X);
|
||||
EXTENDED;
|
||||
WM16(m68_state, EAD,&pX);
|
||||
WM16(EAD,&pX);
|
||||
}
|
||||
|
||||
/* $10bF STY extended -**0- */
|
||||
@ -2165,7 +2165,7 @@ OP_HANDLER( sty_ex )
|
||||
CLR_NZV;
|
||||
SET_NZ16(Y);
|
||||
EXTENDED;
|
||||
WM16(m68_state, EAD,&pY);
|
||||
WM16(EAD,&pY);
|
||||
}
|
||||
|
||||
/* $c0 SUBB immediate ?**** */
|
||||
@ -2309,7 +2309,7 @@ OP_HANDLER( std_im )
|
||||
CLR_NZV;
|
||||
SET_NZ16(D);
|
||||
IMM16;
|
||||
WM16(m68_state, EAD,&pD);
|
||||
WM16(EAD,&pD);
|
||||
}
|
||||
|
||||
/* $cE LDU (LDS) immediate -**0- */
|
||||
@ -2326,7 +2326,7 @@ OP_HANDLER( lds_im )
|
||||
IMMWORD(pS);
|
||||
CLR_NZV;
|
||||
SET_NZ16(S);
|
||||
m68_state->int_state |= M6809_LDS;
|
||||
m_int_state |= M6809_LDS;
|
||||
}
|
||||
|
||||
/* is this a legal instruction? */
|
||||
@ -2336,7 +2336,7 @@ OP_HANDLER( stu_im )
|
||||
CLR_NZV;
|
||||
SET_NZ16(U);
|
||||
IMM16;
|
||||
WM16(m68_state, EAD,&pU);
|
||||
WM16(EAD,&pU);
|
||||
}
|
||||
|
||||
/* is this a legal instruction? */
|
||||
@ -2346,7 +2346,7 @@ OP_HANDLER( sts_im )
|
||||
CLR_NZV;
|
||||
SET_NZ16(S);
|
||||
IMM16;
|
||||
WM16(m68_state, EAD,&pS);
|
||||
WM16(EAD,&pS);
|
||||
}
|
||||
|
||||
/* $d0 SUBB direct ?**** */
|
||||
@ -2489,7 +2489,7 @@ OP_HANDLER( std_di )
|
||||
CLR_NZV;
|
||||
SET_NZ16(D);
|
||||
DIRECT;
|
||||
WM16(m68_state, EAD,&pD);
|
||||
WM16(EAD,&pD);
|
||||
}
|
||||
|
||||
/* $dE LDU (LDS) direct -**0- */
|
||||
@ -2506,7 +2506,7 @@ OP_HANDLER( lds_di )
|
||||
DIRWORD(pS);
|
||||
CLR_NZV;
|
||||
SET_NZ16(S);
|
||||
m68_state->int_state |= M6809_LDS;
|
||||
m_int_state |= M6809_LDS;
|
||||
}
|
||||
|
||||
/* $dF STU (STS) direct -**0- */
|
||||
@ -2515,7 +2515,7 @@ OP_HANDLER( stu_di )
|
||||
CLR_NZV;
|
||||
SET_NZ16(U);
|
||||
DIRECT;
|
||||
WM16(m68_state, EAD,&pU);
|
||||
WM16(EAD,&pU);
|
||||
}
|
||||
|
||||
/* $10dF STS direct -**0- */
|
||||
@ -2524,14 +2524,14 @@ OP_HANDLER( sts_di )
|
||||
CLR_NZV;
|
||||
SET_NZ16(S);
|
||||
DIRECT;
|
||||
WM16(m68_state, EAD,&pS);
|
||||
WM16(EAD,&pS);
|
||||
}
|
||||
|
||||
/* $e0 SUBB indexed ?**** */
|
||||
OP_HANDLER( subb_ix )
|
||||
{
|
||||
UINT16 t,r;
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
t = RM(EAD);
|
||||
r = B - t;
|
||||
CLR_NZVC;
|
||||
@ -2543,7 +2543,7 @@ OP_HANDLER( subb_ix )
|
||||
OP_HANDLER( cmpb_ix )
|
||||
{
|
||||
UINT16 t,r;
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
t = RM(EAD);
|
||||
r = B - t;
|
||||
CLR_NZVC;
|
||||
@ -2554,7 +2554,7 @@ OP_HANDLER( cmpb_ix )
|
||||
OP_HANDLER( sbcb_ix )
|
||||
{
|
||||
UINT16 t,r;
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
t = RM(EAD);
|
||||
r = B - t - (CC & CC_C);
|
||||
CLR_NZVC;
|
||||
@ -2567,8 +2567,8 @@ OP_HANDLER( addd_ix )
|
||||
{
|
||||
UINT32 r,d;
|
||||
PAIR b;
|
||||
fetch_effective_address(m68_state);
|
||||
b.d=RM16(m68_state, EAD);
|
||||
fetch_effective_address();
|
||||
b.d=RM16(EAD);
|
||||
d = D;
|
||||
r = d + b.d;
|
||||
CLR_NZVC;
|
||||
@ -2579,7 +2579,7 @@ OP_HANDLER( addd_ix )
|
||||
/* $e4 ANDB indexed -**0- */
|
||||
OP_HANDLER( andb_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
B &= RM(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ8(B);
|
||||
@ -2589,7 +2589,7 @@ OP_HANDLER( andb_ix )
|
||||
OP_HANDLER( bitb_ix )
|
||||
{
|
||||
UINT8 r;
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
r = B & RM(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ8(r);
|
||||
@ -2598,7 +2598,7 @@ OP_HANDLER( bitb_ix )
|
||||
/* $e6 LDB indexed -**0- */
|
||||
OP_HANDLER( ldb_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
B = RM(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ8(B);
|
||||
@ -2607,7 +2607,7 @@ OP_HANDLER( ldb_ix )
|
||||
/* $e7 STB indexed -**0- */
|
||||
OP_HANDLER( stb_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
CLR_NZV;
|
||||
SET_NZ8(B);
|
||||
WM(EAD,B);
|
||||
@ -2616,7 +2616,7 @@ OP_HANDLER( stb_ix )
|
||||
/* $e8 EORB indexed -**0- */
|
||||
OP_HANDLER( eorb_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
B ^= RM(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ8(B);
|
||||
@ -2626,7 +2626,7 @@ OP_HANDLER( eorb_ix )
|
||||
OP_HANDLER( adcb_ix )
|
||||
{
|
||||
UINT16 t,r;
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
t = RM(EAD);
|
||||
r = B + t + (CC & CC_C);
|
||||
CLR_HNZVC;
|
||||
@ -2638,7 +2638,7 @@ OP_HANDLER( adcb_ix )
|
||||
/* $eA ORB indexed -**0- */
|
||||
OP_HANDLER( orb_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
B |= RM(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ8(B);
|
||||
@ -2648,7 +2648,7 @@ OP_HANDLER( orb_ix )
|
||||
OP_HANDLER( addb_ix )
|
||||
{
|
||||
UINT16 t,r;
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
t = RM(EAD);
|
||||
r = B + t;
|
||||
CLR_HNZVC;
|
||||
@ -2660,25 +2660,25 @@ OP_HANDLER( addb_ix )
|
||||
/* $eC LDD indexed -**0- */
|
||||
OP_HANDLER( ldd_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
D=RM16(m68_state, EAD);
|
||||
fetch_effective_address();
|
||||
D=RM16(EAD);
|
||||
CLR_NZV; SET_NZ16(D);
|
||||
}
|
||||
|
||||
/* $eD STD indexed -**0- */
|
||||
OP_HANDLER( std_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
CLR_NZV;
|
||||
SET_NZ16(D);
|
||||
WM16(m68_state, EAD,&pD);
|
||||
WM16(EAD,&pD);
|
||||
}
|
||||
|
||||
/* $eE LDU (LDS) indexed -**0- */
|
||||
OP_HANDLER( ldu_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
U=RM16(m68_state, EAD);
|
||||
fetch_effective_address();
|
||||
U=RM16(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ16(U);
|
||||
}
|
||||
@ -2686,29 +2686,29 @@ OP_HANDLER( ldu_ix )
|
||||
/* $10eE LDS indexed -**0- */
|
||||
OP_HANDLER( lds_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
S=RM16(m68_state, EAD);
|
||||
fetch_effective_address();
|
||||
S=RM16(EAD);
|
||||
CLR_NZV;
|
||||
SET_NZ16(S);
|
||||
m68_state->int_state |= M6809_LDS;
|
||||
m_int_state |= M6809_LDS;
|
||||
}
|
||||
|
||||
/* $eF STU (STS) indexed -**0- */
|
||||
OP_HANDLER( stu_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
CLR_NZV;
|
||||
SET_NZ16(U);
|
||||
WM16(m68_state, EAD,&pU);
|
||||
WM16(EAD,&pU);
|
||||
}
|
||||
|
||||
/* $10eF STS indexed -**0- */
|
||||
OP_HANDLER( sts_ix )
|
||||
{
|
||||
fetch_effective_address(m68_state);
|
||||
fetch_effective_address();
|
||||
CLR_NZV;
|
||||
SET_NZ16(S);
|
||||
WM16(m68_state, EAD,&pS);
|
||||
WM16(EAD,&pS);
|
||||
}
|
||||
|
||||
/* $f0 SUBB extended ?**** */
|
||||
@ -2851,7 +2851,7 @@ OP_HANDLER( std_ex )
|
||||
CLR_NZV;
|
||||
SET_NZ16(D);
|
||||
EXTENDED;
|
||||
WM16(m68_state, EAD,&pD);
|
||||
WM16(EAD,&pD);
|
||||
}
|
||||
|
||||
/* $fE LDU (LDS) extended -**0- */
|
||||
@ -2868,7 +2868,7 @@ OP_HANDLER( lds_ex )
|
||||
EXTWORD(pS);
|
||||
CLR_NZV;
|
||||
SET_NZ16(S);
|
||||
m68_state->int_state |= M6809_LDS;
|
||||
m_int_state |= M6809_LDS;
|
||||
}
|
||||
|
||||
/* $fF STU (STS) extended -**0- */
|
||||
@ -2877,7 +2877,7 @@ OP_HANDLER( stu_ex )
|
||||
CLR_NZV;
|
||||
SET_NZ16(U);
|
||||
EXTENDED;
|
||||
WM16(m68_state, EAD,&pU);
|
||||
WM16(EAD,&pU);
|
||||
}
|
||||
|
||||
/* $10fF STS extended -**0- */
|
||||
@ -2886,92 +2886,92 @@ OP_HANDLER( sts_ex )
|
||||
CLR_NZV;
|
||||
SET_NZ16(S);
|
||||
EXTENDED;
|
||||
WM16(m68_state, EAD,&pS);
|
||||
WM16(EAD,&pS);
|
||||
}
|
||||
|
||||
/* $10xx opcodes */
|
||||
OP_HANDLER( pref10 )
|
||||
{
|
||||
UINT8 ireg2 = m68_state->config->encrypt_only_first_byte ? ROP_ARG(PCD) : ROP(PCD);
|
||||
UINT8 ireg2 = m_encrypt_only_first_byte ? ROP_ARG(PCD) : ROP(PCD);
|
||||
PC++;
|
||||
switch( ireg2 )
|
||||
{
|
||||
case 0x21: lbrn(m68_state); m68_state->icount-=5; break;
|
||||
case 0x22: lbhi(m68_state); m68_state->icount-=5; break;
|
||||
case 0x23: lbls(m68_state); m68_state->icount-=5; break;
|
||||
case 0x24: lbcc(m68_state); m68_state->icount-=5; break;
|
||||
case 0x25: lbcs(m68_state); m68_state->icount-=5; break;
|
||||
case 0x26: lbne(m68_state); m68_state->icount-=5; break;
|
||||
case 0x27: lbeq(m68_state); m68_state->icount-=5; break;
|
||||
case 0x28: lbvc(m68_state); m68_state->icount-=5; break;
|
||||
case 0x29: lbvs(m68_state); m68_state->icount-=5; break;
|
||||
case 0x2a: lbpl(m68_state); m68_state->icount-=5; break;
|
||||
case 0x2b: lbmi(m68_state); m68_state->icount-=5; break;
|
||||
case 0x2c: lbge(m68_state); m68_state->icount-=5; break;
|
||||
case 0x2d: lblt(m68_state); m68_state->icount-=5; break;
|
||||
case 0x2e: lbgt(m68_state); m68_state->icount-=5; break;
|
||||
case 0x2f: lble(m68_state); m68_state->icount-=5; break;
|
||||
case 0x21: lbrn(); m_icount-=5; break;
|
||||
case 0x22: lbhi(); m_icount-=5; break;
|
||||
case 0x23: lbls(); m_icount-=5; break;
|
||||
case 0x24: lbcc(); m_icount-=5; break;
|
||||
case 0x25: lbcs(); m_icount-=5; break;
|
||||
case 0x26: lbne(); m_icount-=5; break;
|
||||
case 0x27: lbeq(); m_icount-=5; break;
|
||||
case 0x28: lbvc(); m_icount-=5; break;
|
||||
case 0x29: lbvs(); m_icount-=5; break;
|
||||
case 0x2a: lbpl(); m_icount-=5; break;
|
||||
case 0x2b: lbmi(); m_icount-=5; break;
|
||||
case 0x2c: lbge(); m_icount-=5; break;
|
||||
case 0x2d: lblt(); m_icount-=5; break;
|
||||
case 0x2e: lbgt(); m_icount-=5; break;
|
||||
case 0x2f: lble(); m_icount-=5; break;
|
||||
|
||||
case 0x3f: swi2(m68_state); m68_state->icount-=20; break;
|
||||
case 0x3f: swi2(); m_icount-=20; break;
|
||||
|
||||
case 0x83: cmpd_im(m68_state); m68_state->icount-=5; break;
|
||||
case 0x8c: cmpy_im(m68_state); m68_state->icount-=5; break;
|
||||
case 0x8e: ldy_im(m68_state); m68_state->icount-=4; break;
|
||||
case 0x8f: sty_im(m68_state); m68_state->icount-=4; break;
|
||||
case 0x83: cmpd_im(); m_icount-=5; break;
|
||||
case 0x8c: cmpy_im(); m_icount-=5; break;
|
||||
case 0x8e: ldy_im(); m_icount-=4; break;
|
||||
case 0x8f: sty_im(); m_icount-=4; break;
|
||||
|
||||
case 0x93: cmpd_di(m68_state); m68_state->icount-=7; break;
|
||||
case 0x9c: cmpy_di(m68_state); m68_state->icount-=7; break;
|
||||
case 0x9e: ldy_di(m68_state); m68_state->icount-=6; break;
|
||||
case 0x9f: sty_di(m68_state); m68_state->icount-=6; break;
|
||||
case 0x93: cmpd_di(); m_icount-=7; break;
|
||||
case 0x9c: cmpy_di(); m_icount-=7; break;
|
||||
case 0x9e: ldy_di(); m_icount-=6; break;
|
||||
case 0x9f: sty_di(); m_icount-=6; break;
|
||||
|
||||
case 0xa3: cmpd_ix(m68_state); m68_state->icount-=7; break;
|
||||
case 0xac: cmpy_ix(m68_state); m68_state->icount-=7; break;
|
||||
case 0xae: ldy_ix(m68_state); m68_state->icount-=6; break;
|
||||
case 0xaf: sty_ix(m68_state); m68_state->icount-=6; break;
|
||||
case 0xa3: cmpd_ix(); m_icount-=7; break;
|
||||
case 0xac: cmpy_ix(); m_icount-=7; break;
|
||||
case 0xae: ldy_ix(); m_icount-=6; break;
|
||||
case 0xaf: sty_ix(); m_icount-=6; break;
|
||||
|
||||
case 0xb3: cmpd_ex(m68_state); m68_state->icount-=8; break;
|
||||
case 0xbc: cmpy_ex(m68_state); m68_state->icount-=8; break;
|
||||
case 0xbe: ldy_ex(m68_state); m68_state->icount-=7; break;
|
||||
case 0xbf: sty_ex(m68_state); m68_state->icount-=7; break;
|
||||
case 0xb3: cmpd_ex(); m_icount-=8; break;
|
||||
case 0xbc: cmpy_ex(); m_icount-=8; break;
|
||||
case 0xbe: ldy_ex(); m_icount-=7; break;
|
||||
case 0xbf: sty_ex(); m_icount-=7; break;
|
||||
|
||||
case 0xce: lds_im(m68_state); m68_state->icount-=4; break;
|
||||
case 0xcf: sts_im(m68_state); m68_state->icount-=4; break;
|
||||
case 0xce: lds_im(); m_icount-=4; break;
|
||||
case 0xcf: sts_im(); m_icount-=4; break;
|
||||
|
||||
case 0xde: lds_di(m68_state); m68_state->icount-=6; break;
|
||||
case 0xdf: sts_di(m68_state); m68_state->icount-=6; break;
|
||||
case 0xde: lds_di(); m_icount-=6; break;
|
||||
case 0xdf: sts_di(); m_icount-=6; break;
|
||||
|
||||
case 0xee: lds_ix(m68_state); m68_state->icount-=6; break;
|
||||
case 0xef: sts_ix(m68_state); m68_state->icount-=6; break;
|
||||
case 0xee: lds_ix(); m_icount-=6; break;
|
||||
case 0xef: sts_ix(); m_icount-=6; break;
|
||||
|
||||
case 0xfe: lds_ex(m68_state); m68_state->icount-=7; break;
|
||||
case 0xff: sts_ex(m68_state); m68_state->icount-=7; break;
|
||||
case 0xfe: lds_ex(); m_icount-=7; break;
|
||||
case 0xff: sts_ex(); m_icount-=7; break;
|
||||
|
||||
default: IIError(m68_state); break;
|
||||
default: IIError(); break;
|
||||
}
|
||||
}
|
||||
|
||||
/* $11xx opcodes */
|
||||
OP_HANDLER( pref11 )
|
||||
{
|
||||
UINT8 ireg2 = m68_state->config->encrypt_only_first_byte ? ROP_ARG(PCD) : ROP(PCD);
|
||||
UINT8 ireg2 = m_encrypt_only_first_byte ? ROP_ARG(PCD) : ROP(PCD);
|
||||
PC++;
|
||||
switch( ireg2 )
|
||||
{
|
||||
case 0x3f: swi3(m68_state); m68_state->icount-=20; break;
|
||||
case 0x3f: swi3(); m_icount-=20; break;
|
||||
|
||||
case 0x83: cmpu_im(m68_state); m68_state->icount-=5; break;
|
||||
case 0x8c: cmps_im(m68_state); m68_state->icount-=5; break;
|
||||
case 0x83: cmpu_im(); m_icount-=5; break;
|
||||
case 0x8c: cmps_im(); m_icount-=5; break;
|
||||
|
||||
case 0x93: cmpu_di(m68_state); m68_state->icount-=7; break;
|
||||
case 0x9c: cmps_di(m68_state); m68_state->icount-=7; break;
|
||||
case 0x93: cmpu_di(); m_icount-=7; break;
|
||||
case 0x9c: cmps_di(); m_icount-=7; break;
|
||||
|
||||
case 0xa3: cmpu_ix(m68_state); m68_state->icount-=7; break;
|
||||
case 0xac: cmps_ix(m68_state); m68_state->icount-=7; break;
|
||||
case 0xa3: cmpu_ix(); m_icount-=7; break;
|
||||
case 0xac: cmps_ix(); m_icount-=7; break;
|
||||
|
||||
case 0xb3: cmpu_ex(m68_state); m68_state->icount-=8; break;
|
||||
case 0xbc: cmps_ex(m68_state); m68_state->icount-=8; break;
|
||||
case 0xb3: cmpu_ex(); m_icount-=8; break;
|
||||
case 0xbc: cmps_ex(); m_icount-=8; break;
|
||||
|
||||
default: IIError(m68_state); break;
|
||||
default: IIError(); break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -1,323 +1,45 @@
|
||||
INLINE void abx(m68_state_t *m68_state);
|
||||
INLINE void adca_di(m68_state_t *m68_state);
|
||||
INLINE void adca_ex(m68_state_t *m68_state);
|
||||
INLINE void adca_im(m68_state_t *m68_state);
|
||||
INLINE void adca_ix(m68_state_t *m68_state);
|
||||
INLINE void adcb_di(m68_state_t *m68_state);
|
||||
INLINE void adcb_ex(m68_state_t *m68_state);
|
||||
INLINE void adcb_im(m68_state_t *m68_state);
|
||||
INLINE void adcb_ix(m68_state_t *m68_state);
|
||||
INLINE void adda_di(m68_state_t *m68_state);
|
||||
INLINE void adda_ex(m68_state_t *m68_state);
|
||||
INLINE void adda_im(m68_state_t *m68_state);
|
||||
INLINE void adda_ix(m68_state_t *m68_state);
|
||||
INLINE void addb_di(m68_state_t *m68_state);
|
||||
INLINE void addb_ex(m68_state_t *m68_state);
|
||||
INLINE void addb_im(m68_state_t *m68_state);
|
||||
INLINE void addb_ix(m68_state_t *m68_state);
|
||||
INLINE void addd_di(m68_state_t *m68_state);
|
||||
INLINE void addd_ex(m68_state_t *m68_state);
|
||||
INLINE void addd_im(m68_state_t *m68_state);
|
||||
INLINE void addd_ix(m68_state_t *m68_state);
|
||||
INLINE void anda_di(m68_state_t *m68_state);
|
||||
INLINE void anda_ex(m68_state_t *m68_state);
|
||||
INLINE void anda_im(m68_state_t *m68_state);
|
||||
INLINE void anda_ix(m68_state_t *m68_state);
|
||||
INLINE void andb_di(m68_state_t *m68_state);
|
||||
INLINE void andb_ex(m68_state_t *m68_state);
|
||||
INLINE void andb_im(m68_state_t *m68_state);
|
||||
INLINE void andb_ix(m68_state_t *m68_state);
|
||||
INLINE void andcc(m68_state_t *m68_state);
|
||||
INLINE void asla(m68_state_t *m68_state);
|
||||
INLINE void aslb(m68_state_t *m68_state);
|
||||
INLINE void asl_di(m68_state_t *m68_state);
|
||||
INLINE void asl_ex(m68_state_t *m68_state);
|
||||
INLINE void asl_ix(m68_state_t *m68_state);
|
||||
INLINE void asra(m68_state_t *m68_state);
|
||||
INLINE void asrb(m68_state_t *m68_state);
|
||||
INLINE void asr_di(m68_state_t *m68_state);
|
||||
INLINE void asr_ex(m68_state_t *m68_state);
|
||||
INLINE void asr_ix(m68_state_t *m68_state);
|
||||
INLINE void bcc(m68_state_t *m68_state);
|
||||
INLINE void bcs(m68_state_t *m68_state);
|
||||
INLINE void beq(m68_state_t *m68_state);
|
||||
INLINE void bge(m68_state_t *m68_state);
|
||||
INLINE void bgt(m68_state_t *m68_state);
|
||||
INLINE void bhi(m68_state_t *m68_state);
|
||||
INLINE void bita_di(m68_state_t *m68_state);
|
||||
INLINE void bita_ex(m68_state_t *m68_state);
|
||||
INLINE void bita_im(m68_state_t *m68_state);
|
||||
INLINE void bita_ix(m68_state_t *m68_state);
|
||||
INLINE void bitb_di(m68_state_t *m68_state);
|
||||
INLINE void bitb_ex(m68_state_t *m68_state);
|
||||
INLINE void bitb_im(m68_state_t *m68_state);
|
||||
INLINE void bitb_ix(m68_state_t *m68_state);
|
||||
INLINE void ble(m68_state_t *m68_state);
|
||||
INLINE void bls(m68_state_t *m68_state);
|
||||
INLINE void blt(m68_state_t *m68_state);
|
||||
INLINE void bmi(m68_state_t *m68_state);
|
||||
INLINE void bne(m68_state_t *m68_state);
|
||||
INLINE void bpl(m68_state_t *m68_state);
|
||||
INLINE void bra(m68_state_t *m68_state);
|
||||
INLINE void brn(m68_state_t *m68_state);
|
||||
INLINE void bsr(m68_state_t *m68_state);
|
||||
INLINE void bvc(m68_state_t *m68_state);
|
||||
INLINE void bvs(m68_state_t *m68_state);
|
||||
INLINE void clra(m68_state_t *m68_state);
|
||||
INLINE void clrb(m68_state_t *m68_state);
|
||||
INLINE void clr_di(m68_state_t *m68_state);
|
||||
INLINE void clr_ex(m68_state_t *m68_state);
|
||||
INLINE void clr_ix(m68_state_t *m68_state);
|
||||
INLINE void cmpa_di(m68_state_t *m68_state);
|
||||
INLINE void cmpa_ex(m68_state_t *m68_state);
|
||||
INLINE void cmpa_im(m68_state_t *m68_state);
|
||||
INLINE void cmpa_ix(m68_state_t *m68_state);
|
||||
INLINE void cmpb_di(m68_state_t *m68_state);
|
||||
INLINE void cmpb_ex(m68_state_t *m68_state);
|
||||
INLINE void cmpb_im(m68_state_t *m68_state);
|
||||
INLINE void cmpb_ix(m68_state_t *m68_state);
|
||||
INLINE void cmpd_di(m68_state_t *m68_state);
|
||||
INLINE void cmpd_ex(m68_state_t *m68_state);
|
||||
INLINE void cmpd_im(m68_state_t *m68_state);
|
||||
INLINE void cmpd_ix(m68_state_t *m68_state);
|
||||
INLINE void cmps_di(m68_state_t *m68_state);
|
||||
INLINE void cmps_ex(m68_state_t *m68_state);
|
||||
INLINE void cmps_im(m68_state_t *m68_state);
|
||||
INLINE void cmps_ix(m68_state_t *m68_state);
|
||||
INLINE void cmpu_di(m68_state_t *m68_state);
|
||||
INLINE void cmpu_ex(m68_state_t *m68_state);
|
||||
INLINE void cmpu_im(m68_state_t *m68_state);
|
||||
INLINE void cmpu_ix(m68_state_t *m68_state);
|
||||
INLINE void cmpx_di(m68_state_t *m68_state);
|
||||
INLINE void cmpx_ex(m68_state_t *m68_state);
|
||||
INLINE void cmpx_im(m68_state_t *m68_state);
|
||||
INLINE void cmpx_ix(m68_state_t *m68_state);
|
||||
INLINE void cmpy_di(m68_state_t *m68_state);
|
||||
INLINE void cmpy_ex(m68_state_t *m68_state);
|
||||
INLINE void cmpy_im(m68_state_t *m68_state);
|
||||
INLINE void cmpy_ix(m68_state_t *m68_state);
|
||||
INLINE void coma(m68_state_t *m68_state);
|
||||
INLINE void comb(m68_state_t *m68_state);
|
||||
INLINE void com_di(m68_state_t *m68_state);
|
||||
INLINE void com_ex(m68_state_t *m68_state);
|
||||
INLINE void com_ix(m68_state_t *m68_state);
|
||||
INLINE void cwai(m68_state_t *m68_state);
|
||||
INLINE void daa(m68_state_t *m68_state);
|
||||
INLINE void deca(m68_state_t *m68_state);
|
||||
INLINE void decb(m68_state_t *m68_state);
|
||||
INLINE void dec_di(m68_state_t *m68_state);
|
||||
INLINE void dec_ex(m68_state_t *m68_state);
|
||||
INLINE void dec_ix(m68_state_t *m68_state);
|
||||
INLINE void eora_di(m68_state_t *m68_state);
|
||||
INLINE void eora_ex(m68_state_t *m68_state);
|
||||
INLINE void eora_im(m68_state_t *m68_state);
|
||||
INLINE void eora_ix(m68_state_t *m68_state);
|
||||
INLINE void eorb_di(m68_state_t *m68_state);
|
||||
INLINE void eorb_ex(m68_state_t *m68_state);
|
||||
INLINE void eorb_im(m68_state_t *m68_state);
|
||||
INLINE void eorb_ix(m68_state_t *m68_state);
|
||||
INLINE void exg(m68_state_t *m68_state);
|
||||
INLINE void illegal(m68_state_t *m68_state);
|
||||
INLINE void inca(m68_state_t *m68_state);
|
||||
INLINE void incb(m68_state_t *m68_state);
|
||||
INLINE void inc_di(m68_state_t *m68_state);
|
||||
INLINE void inc_ex(m68_state_t *m68_state);
|
||||
INLINE void inc_ix(m68_state_t *m68_state);
|
||||
INLINE void jmp_di(m68_state_t *m68_state);
|
||||
INLINE void jmp_ex(m68_state_t *m68_state);
|
||||
INLINE void jmp_ix(m68_state_t *m68_state);
|
||||
INLINE void jsr_di(m68_state_t *m68_state);
|
||||
INLINE void jsr_ex(m68_state_t *m68_state);
|
||||
INLINE void jsr_ix(m68_state_t *m68_state);
|
||||
INLINE void lbcc(m68_state_t *m68_state);
|
||||
INLINE void lbcs(m68_state_t *m68_state);
|
||||
INLINE void lbeq(m68_state_t *m68_state);
|
||||
INLINE void lbge(m68_state_t *m68_state);
|
||||
INLINE void lbgt(m68_state_t *m68_state);
|
||||
INLINE void lbhi(m68_state_t *m68_state);
|
||||
INLINE void lble(m68_state_t *m68_state);
|
||||
INLINE void lbls(m68_state_t *m68_state);
|
||||
INLINE void lblt(m68_state_t *m68_state);
|
||||
INLINE void lbmi(m68_state_t *m68_state);
|
||||
INLINE void lbne(m68_state_t *m68_state);
|
||||
INLINE void lbpl(m68_state_t *m68_state);
|
||||
INLINE void lbra(m68_state_t *m68_state);
|
||||
INLINE void lbrn(m68_state_t *m68_state);
|
||||
INLINE void lbsr(m68_state_t *m68_state);
|
||||
INLINE void lbvc(m68_state_t *m68_state);
|
||||
INLINE void lbvs(m68_state_t *m68_state);
|
||||
INLINE void lda_di(m68_state_t *m68_state);
|
||||
INLINE void lda_ex(m68_state_t *m68_state);
|
||||
INLINE void lda_im(m68_state_t *m68_state);
|
||||
INLINE void lda_ix(m68_state_t *m68_state);
|
||||
INLINE void ldb_di(m68_state_t *m68_state);
|
||||
INLINE void ldb_ex(m68_state_t *m68_state);
|
||||
INLINE void ldb_im(m68_state_t *m68_state);
|
||||
INLINE void ldb_ix(m68_state_t *m68_state);
|
||||
INLINE void ldd_di(m68_state_t *m68_state);
|
||||
INLINE void ldd_ex(m68_state_t *m68_state);
|
||||
INLINE void ldd_im(m68_state_t *m68_state);
|
||||
INLINE void ldd_ix(m68_state_t *m68_state);
|
||||
INLINE void lds_di(m68_state_t *m68_state);
|
||||
INLINE void lds_ex(m68_state_t *m68_state);
|
||||
INLINE void lds_im(m68_state_t *m68_state);
|
||||
INLINE void lds_ix(m68_state_t *m68_state);
|
||||
INLINE void ldu_di(m68_state_t *m68_state);
|
||||
INLINE void ldu_ex(m68_state_t *m68_state);
|
||||
INLINE void ldu_im(m68_state_t *m68_state);
|
||||
INLINE void ldu_ix(m68_state_t *m68_state);
|
||||
INLINE void ldx_di(m68_state_t *m68_state);
|
||||
INLINE void ldx_ex(m68_state_t *m68_state);
|
||||
INLINE void ldx_im(m68_state_t *m68_state);
|
||||
INLINE void ldx_ix(m68_state_t *m68_state);
|
||||
INLINE void ldy_di(m68_state_t *m68_state);
|
||||
INLINE void ldy_ex(m68_state_t *m68_state);
|
||||
INLINE void ldy_im(m68_state_t *m68_state);
|
||||
INLINE void ldy_ix(m68_state_t *m68_state);
|
||||
INLINE void leas(m68_state_t *m68_state);
|
||||
INLINE void leau(m68_state_t *m68_state);
|
||||
INLINE void leax(m68_state_t *m68_state);
|
||||
INLINE void leay(m68_state_t *m68_state);
|
||||
INLINE void lsra(m68_state_t *m68_state);
|
||||
INLINE void lsrb(m68_state_t *m68_state);
|
||||
INLINE void lsr_di(m68_state_t *m68_state);
|
||||
INLINE void lsr_ex(m68_state_t *m68_state);
|
||||
INLINE void lsr_ix(m68_state_t *m68_state);
|
||||
INLINE void mul(m68_state_t *m68_state);
|
||||
INLINE void nega(m68_state_t *m68_state);
|
||||
INLINE void negb(m68_state_t *m68_state);
|
||||
INLINE void neg_di(m68_state_t *m68_state);
|
||||
INLINE void neg_ex(m68_state_t *m68_state);
|
||||
INLINE void neg_ix(m68_state_t *m68_state);
|
||||
INLINE void nop(m68_state_t *m68_state);
|
||||
INLINE void ora_di(m68_state_t *m68_state);
|
||||
INLINE void ora_ex(m68_state_t *m68_state);
|
||||
INLINE void ora_im(m68_state_t *m68_state);
|
||||
INLINE void ora_ix(m68_state_t *m68_state);
|
||||
INLINE void orb_di(m68_state_t *m68_state);
|
||||
INLINE void orb_ex(m68_state_t *m68_state);
|
||||
INLINE void orb_im(m68_state_t *m68_state);
|
||||
INLINE void orb_ix(m68_state_t *m68_state);
|
||||
INLINE void orcc(m68_state_t *m68_state);
|
||||
INLINE void pref10(m68_state_t *m68_state);
|
||||
INLINE void pref11(m68_state_t *m68_state);
|
||||
INLINE void pshs(m68_state_t *m68_state);
|
||||
INLINE void pshu(m68_state_t *m68_state);
|
||||
INLINE void puls(m68_state_t *m68_state);
|
||||
INLINE void pulu(m68_state_t *m68_state);
|
||||
INLINE void rola(m68_state_t *m68_state);
|
||||
INLINE void rolb(m68_state_t *m68_state);
|
||||
INLINE void rol_di(m68_state_t *m68_state);
|
||||
INLINE void rol_ex(m68_state_t *m68_state);
|
||||
INLINE void rol_ix(m68_state_t *m68_state);
|
||||
INLINE void rora(m68_state_t *m68_state);
|
||||
INLINE void rorb(m68_state_t *m68_state);
|
||||
INLINE void ror_di(m68_state_t *m68_state);
|
||||
INLINE void ror_ex(m68_state_t *m68_state);
|
||||
INLINE void ror_ix(m68_state_t *m68_state);
|
||||
INLINE void rti(m68_state_t *m68_state);
|
||||
INLINE void rts(m68_state_t *m68_state);
|
||||
INLINE void sbca_di(m68_state_t *m68_state);
|
||||
INLINE void sbca_ex(m68_state_t *m68_state);
|
||||
INLINE void sbca_im(m68_state_t *m68_state);
|
||||
INLINE void sbca_ix(m68_state_t *m68_state);
|
||||
INLINE void sbcb_di(m68_state_t *m68_state);
|
||||
INLINE void sbcb_ex(m68_state_t *m68_state);
|
||||
INLINE void sbcb_im(m68_state_t *m68_state);
|
||||
INLINE void sbcb_ix(m68_state_t *m68_state);
|
||||
INLINE void sex(m68_state_t *m68_state);
|
||||
INLINE void sta_di(m68_state_t *m68_state);
|
||||
INLINE void sta_ex(m68_state_t *m68_state);
|
||||
INLINE void sta_im(m68_state_t *m68_state);
|
||||
INLINE void sta_ix(m68_state_t *m68_state);
|
||||
INLINE void stb_di(m68_state_t *m68_state);
|
||||
INLINE void stb_ex(m68_state_t *m68_state);
|
||||
INLINE void stb_im(m68_state_t *m68_state);
|
||||
INLINE void stb_ix(m68_state_t *m68_state);
|
||||
INLINE void std_di(m68_state_t *m68_state);
|
||||
INLINE void std_ex(m68_state_t *m68_state);
|
||||
INLINE void std_im(m68_state_t *m68_state);
|
||||
INLINE void std_ix(m68_state_t *m68_state);
|
||||
INLINE void sts_di(m68_state_t *m68_state);
|
||||
INLINE void sts_ex(m68_state_t *m68_state);
|
||||
INLINE void sts_im(m68_state_t *m68_state);
|
||||
INLINE void sts_ix(m68_state_t *m68_state);
|
||||
INLINE void stu_di(m68_state_t *m68_state);
|
||||
INLINE void stu_ex(m68_state_t *m68_state);
|
||||
INLINE void stu_im(m68_state_t *m68_state);
|
||||
INLINE void stu_ix(m68_state_t *m68_state);
|
||||
INLINE void stx_di(m68_state_t *m68_state);
|
||||
INLINE void stx_ex(m68_state_t *m68_state);
|
||||
INLINE void stx_im(m68_state_t *m68_state);
|
||||
INLINE void stx_ix(m68_state_t *m68_state);
|
||||
INLINE void sty_di(m68_state_t *m68_state);
|
||||
INLINE void sty_ex(m68_state_t *m68_state);
|
||||
INLINE void sty_im(m68_state_t *m68_state);
|
||||
INLINE void sty_ix(m68_state_t *m68_state);
|
||||
INLINE void suba_di(m68_state_t *m68_state);
|
||||
INLINE void suba_ex(m68_state_t *m68_state);
|
||||
INLINE void suba_im(m68_state_t *m68_state);
|
||||
INLINE void suba_ix(m68_state_t *m68_state);
|
||||
INLINE void subb_di(m68_state_t *m68_state);
|
||||
INLINE void subb_ex(m68_state_t *m68_state);
|
||||
INLINE void subb_im(m68_state_t *m68_state);
|
||||
INLINE void subb_ix(m68_state_t *m68_state);
|
||||
INLINE void subd_di(m68_state_t *m68_state);
|
||||
INLINE void subd_ex(m68_state_t *m68_state);
|
||||
INLINE void subd_im(m68_state_t *m68_state);
|
||||
INLINE void subd_ix(m68_state_t *m68_state);
|
||||
INLINE void swi2(m68_state_t *m68_state);
|
||||
INLINE void swi3(m68_state_t *m68_state);
|
||||
INLINE void swi(m68_state_t *m68_state);
|
||||
INLINE void sync(m68_state_t *m68_state);
|
||||
INLINE void tfr(m68_state_t *m68_state);
|
||||
INLINE void tsta(m68_state_t *m68_state);
|
||||
INLINE void tstb(m68_state_t *m68_state);
|
||||
INLINE void tst_di(m68_state_t *m68_state);
|
||||
INLINE void tst_ex(m68_state_t *m68_state);
|
||||
INLINE void tst_ix(m68_state_t *m68_state);
|
||||
|
||||
static const UINT8 flags8i[256]= /* increment */
|
||||
const UINT8 m6809_base_device::m_flags8i[256] = /* increment */
|
||||
{
|
||||
CC_Z,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
CC_N|CC_V,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
|
||||
CC_Z, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
CC_N|CC_V,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
|
||||
};
|
||||
static const UINT8 flags8d[256]= /* decrement */
|
||||
|
||||
const UINT8 m6809_base_device::m_flags8d[256] = /* decrement */
|
||||
{
|
||||
CC_Z,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,CC_V,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
|
||||
CC_Z,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,CC_V,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
|
||||
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
|
||||
};
|
||||
|
||||
/* FIXME: Cycles differ slighly from hd6309 emulation */
|
||||
static const UINT8 index_cycle_em[256] = { /* Index Loopup cycle counts */
|
||||
const UINT8 m6809_base_device::m_index_cycle_em[256] = { /* Index Loopup cycle counts */
|
||||
/* 0xX0, 0xX1, 0xX2, 0xX3, 0xX4, 0xX5, 0xX6, 0xX7, 0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
|
||||
|
||||
/* 0x0X */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
|
||||
@ -339,7 +61,7 @@ static const UINT8 index_cycle_em[256] = { /* Index Loopup cycle counts *
|
||||
};
|
||||
|
||||
/* timings for 1-byte opcodes */
|
||||
static const UINT8 cycles1[] =
|
||||
const UINT8 m6809_base_device::m_cycles1[256] =
|
||||
{
|
||||
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
|
||||
/*0*/ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 3, 6,
|
||||
@ -359,56 +81,3 @@ static const UINT8 cycles1[] =
|
||||
/*E*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5,
|
||||
/*F*/ 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6
|
||||
};
|
||||
|
||||
static void (*const m6809_main[0x100])(m68_state_t *) = {
|
||||
/* 0xX0, 0xX1, 0xX2, 0xX3, 0xX4, 0xX5, 0xX6, 0xX7,
|
||||
0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
|
||||
|
||||
/* 0x0X */ neg_di, neg_di, com_di, com_di, lsr_di, lsr_di, ror_di, asr_di,
|
||||
asl_di, rol_di, dec_di, dec_di, inc_di, tst_di, jmp_di, clr_di,
|
||||
|
||||
/* 0x1X */ pref10, pref11, nop, sync, illegal,illegal,lbra, lbsr,
|
||||
illegal,daa, orcc, illegal,andcc, sex, exg, tfr,
|
||||
|
||||
/* 0x2X */ bra, brn, bhi, bls, bcc, bcs, bne, beq,
|
||||
bvc, bvs, bpl, bmi, bge, blt, bgt, ble,
|
||||
|
||||
/* 0x3X */ leax, leay, leas, leau, pshs, puls, pshu, pulu,
|
||||
illegal,rts, abx, rti, cwai, mul, illegal,swi,
|
||||
|
||||
/* 0x4X */ nega, nega, coma, coma, lsra, lsra, rora, asra,
|
||||
asla, rola, deca, deca, inca, tsta, clra, clra,
|
||||
|
||||
/* 0x5X */ negb, negb, comb, comb, lsrb, lsrb, rorb, asrb,
|
||||
aslb, rolb, decb, decb, incb, tstb, clrb, clrb,
|
||||
|
||||
/* 0x6X */ neg_ix, neg_ix, com_ix, com_ix, lsr_ix, lsr_ix, ror_ix, asr_ix,
|
||||
asl_ix, rol_ix, dec_ix, dec_ix, inc_ix, tst_ix, jmp_ix, clr_ix,
|
||||
|
||||
/* 0x7X */ neg_ex, neg_ex, com_ex, com_ex, lsr_ex, lsr_ex, ror_ex, asr_ex,
|
||||
asl_ex, rol_ex, dec_ex, dec_ex, inc_ex, tst_ex, jmp_ex, clr_ex,
|
||||
|
||||
/* 0x8X */ suba_im,cmpa_im,sbca_im,subd_im,anda_im,bita_im,lda_im, sta_im,
|
||||
eora_im,adca_im,ora_im, adda_im,cmpx_im,bsr, ldx_im, stx_im,
|
||||
|
||||
/* 0x9X */ suba_di,cmpa_di,sbca_di,subd_di,anda_di,bita_di,lda_di, sta_di,
|
||||
eora_di,adca_di,ora_di, adda_di,cmpx_di,jsr_di, ldx_di, stx_di,
|
||||
|
||||
/* 0xAX */ suba_ix,cmpa_ix,sbca_ix,subd_ix,anda_ix,bita_ix,lda_ix, sta_ix,
|
||||
eora_ix,adca_ix,ora_ix, adda_ix,cmpx_ix,jsr_ix, ldx_ix, stx_ix,
|
||||
|
||||
/* 0xBX */ suba_ex,cmpa_ex,sbca_ex,subd_ex,anda_ex,bita_ex,lda_ex, sta_ex,
|
||||
eora_ex,adca_ex,ora_ex, adda_ex,cmpx_ex,jsr_ex, ldx_ex, stx_ex,
|
||||
|
||||
/* 0xCX */ subb_im,cmpb_im,sbcb_im,addd_im,andb_im,bitb_im,ldb_im, stb_im,
|
||||
eorb_im,adcb_im,orb_im, addb_im,ldd_im, std_im, ldu_im, stu_im,
|
||||
|
||||
/* 0xDX */ subb_di,cmpb_di,sbcb_di,addd_di,andb_di,bitb_di,ldb_di, stb_di,
|
||||
eorb_di,adcb_di,orb_di, addb_di,ldd_di, std_di, ldu_di, stu_di,
|
||||
|
||||
/* 0xEX */ subb_ix,cmpb_ix,sbcb_ix,addd_ix,andb_ix,bitb_ix,ldb_ix, stb_ix,
|
||||
eorb_ix,adcb_ix,orb_ix, addb_ix,ldd_ix, std_ix, ldu_ix, stu_ix,
|
||||
|
||||
/* 0xFX */ subb_ex,cmpb_ex,sbcb_ex,addd_ex,andb_ex,bitb_ex,ldb_ex, stb_ex,
|
||||
eorb_ex,adcb_ex,orb_ex, addb_ex,ldd_ex, std_ex, ldu_ex, stu_ex
|
||||
};
|
||||
|
||||
278
src/emu/cpu/m6809/6809tbl.h
Normal file
278
src/emu/cpu/m6809/6809tbl.h
Normal file
@ -0,0 +1,278 @@
|
||||
void abx();
|
||||
void adca_di();
|
||||
void adca_ex();
|
||||
void adca_im();
|
||||
void adca_ix();
|
||||
void adcb_di();
|
||||
void adcb_ex();
|
||||
void adcb_im();
|
||||
void adcb_ix();
|
||||
void adda_di();
|
||||
void adda_ex();
|
||||
void adda_im();
|
||||
void adda_ix();
|
||||
void addb_di();
|
||||
void addb_ex();
|
||||
void addb_im();
|
||||
void addb_ix();
|
||||
void addd_di();
|
||||
void addd_ex();
|
||||
void addd_im();
|
||||
void addd_ix();
|
||||
void anda_di();
|
||||
void anda_ex();
|
||||
void anda_im();
|
||||
void anda_ix();
|
||||
void andb_di();
|
||||
void andb_ex();
|
||||
void andb_im();
|
||||
void andb_ix();
|
||||
void andcc();
|
||||
void asla();
|
||||
void aslb();
|
||||
void asl_di();
|
||||
void asl_ex();
|
||||
void asl_ix();
|
||||
void asra();
|
||||
void asrb();
|
||||
void asr_di();
|
||||
void asr_ex();
|
||||
void asr_ix();
|
||||
void bcc();
|
||||
void bcs();
|
||||
void beq();
|
||||
void bge();
|
||||
void bgt();
|
||||
void bhi();
|
||||
void bita_di();
|
||||
void bita_ex();
|
||||
void bita_im();
|
||||
void bita_ix();
|
||||
void bitb_di();
|
||||
void bitb_ex();
|
||||
void bitb_im();
|
||||
void bitb_ix();
|
||||
void ble();
|
||||
void bls();
|
||||
void blt();
|
||||
void bmi();
|
||||
void bne();
|
||||
void bpl();
|
||||
void bra();
|
||||
void brn();
|
||||
void bsr();
|
||||
void bvc();
|
||||
void bvs();
|
||||
void clra();
|
||||
void clrb();
|
||||
void clr_di();
|
||||
void clr_ex();
|
||||
void clr_ix();
|
||||
void cmpa_di();
|
||||
void cmpa_ex();
|
||||
void cmpa_im();
|
||||
void cmpa_ix();
|
||||
void cmpb_di();
|
||||
void cmpb_ex();
|
||||
void cmpb_im();
|
||||
void cmpb_ix();
|
||||
void cmpd_di();
|
||||
void cmpd_ex();
|
||||
void cmpd_im();
|
||||
void cmpd_ix();
|
||||
void cmps_di();
|
||||
void cmps_ex();
|
||||
void cmps_im();
|
||||
void cmps_ix();
|
||||
void cmpu_di();
|
||||
void cmpu_ex();
|
||||
void cmpu_im();
|
||||
void cmpu_ix();
|
||||
void cmpx_di();
|
||||
void cmpx_ex();
|
||||
void cmpx_im();
|
||||
void cmpx_ix();
|
||||
void cmpy_di();
|
||||
void cmpy_ex();
|
||||
void cmpy_im();
|
||||
void cmpy_ix();
|
||||
void coma();
|
||||
void comb();
|
||||
void com_di();
|
||||
void com_ex();
|
||||
void com_ix();
|
||||
void cwai();
|
||||
void daa();
|
||||
void deca();
|
||||
void decb();
|
||||
void dec_di();
|
||||
void dec_ex();
|
||||
void dec_ix();
|
||||
void eora_di();
|
||||
void eora_ex();
|
||||
void eora_im();
|
||||
void eora_ix();
|
||||
void eorb_di();
|
||||
void eorb_ex();
|
||||
void eorb_im();
|
||||
void eorb_ix();
|
||||
void exg();
|
||||
void illegal();
|
||||
void inca();
|
||||
void incb();
|
||||
void inc_di();
|
||||
void inc_ex();
|
||||
void inc_ix();
|
||||
void jmp_di();
|
||||
void jmp_ex();
|
||||
void jmp_ix();
|
||||
void jsr_di();
|
||||
void jsr_ex();
|
||||
void jsr_ix();
|
||||
void lbcc();
|
||||
void lbcs();
|
||||
void lbeq();
|
||||
void lbge();
|
||||
void lbgt();
|
||||
void lbhi();
|
||||
void lble();
|
||||
void lbls();
|
||||
void lblt();
|
||||
void lbmi();
|
||||
void lbne();
|
||||
void lbpl();
|
||||
void lbra();
|
||||
void lbrn();
|
||||
void lbsr();
|
||||
void lbvc();
|
||||
void lbvs();
|
||||
void lda_di();
|
||||
void lda_ex();
|
||||
void lda_im();
|
||||
void lda_ix();
|
||||
void ldb_di();
|
||||
void ldb_ex();
|
||||
void ldb_im();
|
||||
void ldb_ix();
|
||||
void ldd_di();
|
||||
void ldd_ex();
|
||||
void ldd_im();
|
||||
void ldd_ix();
|
||||
void lds_di();
|
||||
void lds_ex();
|
||||
void lds_im();
|
||||
void lds_ix();
|
||||
void ldu_di();
|
||||
void ldu_ex();
|
||||
void ldu_im();
|
||||
void ldu_ix();
|
||||
void ldx_di();
|
||||
void ldx_ex();
|
||||
void ldx_im();
|
||||
void ldx_ix();
|
||||
void ldy_di();
|
||||
void ldy_ex();
|
||||
void ldy_im();
|
||||
void ldy_ix();
|
||||
void leas();
|
||||
void leau();
|
||||
void leax();
|
||||
void leay();
|
||||
void lsra();
|
||||
void lsrb();
|
||||
void lsr_di();
|
||||
void lsr_ex();
|
||||
void lsr_ix();
|
||||
void mul();
|
||||
void nega();
|
||||
void negb();
|
||||
void neg_di();
|
||||
void neg_ex();
|
||||
void neg_ix();
|
||||
void nop();
|
||||
void ora_di();
|
||||
void ora_ex();
|
||||
void ora_im();
|
||||
void ora_ix();
|
||||
void orb_di();
|
||||
void orb_ex();
|
||||
void orb_im();
|
||||
void orb_ix();
|
||||
void orcc();
|
||||
void pref10();
|
||||
void pref11();
|
||||
void pshs();
|
||||
void pshu();
|
||||
void puls();
|
||||
void pulu();
|
||||
void rola();
|
||||
void rolb();
|
||||
void rol_di();
|
||||
void rol_ex();
|
||||
void rol_ix();
|
||||
void rora();
|
||||
void rorb();
|
||||
void ror_di();
|
||||
void ror_ex();
|
||||
void ror_ix();
|
||||
void rti();
|
||||
void rts();
|
||||
void sbca_di();
|
||||
void sbca_ex();
|
||||
void sbca_im();
|
||||
void sbca_ix();
|
||||
void sbcb_di();
|
||||
void sbcb_ex();
|
||||
void sbcb_im();
|
||||
void sbcb_ix();
|
||||
void sex();
|
||||
void sta_di();
|
||||
void sta_ex();
|
||||
void sta_im();
|
||||
void sta_ix();
|
||||
void stb_di();
|
||||
void stb_ex();
|
||||
void stb_im();
|
||||
void stb_ix();
|
||||
void std_di();
|
||||
void std_ex();
|
||||
void std_im();
|
||||
void std_ix();
|
||||
void sts_di();
|
||||
void sts_ex();
|
||||
void sts_im();
|
||||
void sts_ix();
|
||||
void stu_di();
|
||||
void stu_ex();
|
||||
void stu_im();
|
||||
void stu_ix();
|
||||
void stx_di();
|
||||
void stx_ex();
|
||||
void stx_im();
|
||||
void stx_ix();
|
||||
void sty_di();
|
||||
void sty_ex();
|
||||
void sty_im();
|
||||
void sty_ix();
|
||||
void suba_di();
|
||||
void suba_ex();
|
||||
void suba_im();
|
||||
void suba_ix();
|
||||
void subb_di();
|
||||
void subb_ex();
|
||||
void subb_im();
|
||||
void subb_ix();
|
||||
void subd_di();
|
||||
void subd_ex();
|
||||
void subd_im();
|
||||
void subd_ix();
|
||||
void swi2();
|
||||
void swi3();
|
||||
void swi();
|
||||
void sync();
|
||||
void tfr();
|
||||
void tsta();
|
||||
void tstb();
|
||||
void tst_di();
|
||||
void tst_ex();
|
||||
void tst_ix();
|
||||
File diff suppressed because it is too large
Load Diff
@ -5,6 +5,153 @@
|
||||
#ifndef __M6809_H__
|
||||
#define __M6809_H__
|
||||
|
||||
//**************************************************************************
|
||||
// INTERFACE CONFIGURATION MACROS
|
||||
//**************************************************************************
|
||||
|
||||
#define MCFG_CPU_M6809_CONFIG(_config) \
|
||||
m6809_base_device::static_set_config(*device, _config); \
|
||||
|
||||
//**************************************************************************
|
||||
// TYPE DEFINITIONS
|
||||
//**************************************************************************
|
||||
|
||||
class m6809_device;
|
||||
|
||||
// ======================> m6809_config
|
||||
|
||||
struct m6809_config
|
||||
{
|
||||
bool m_encrypt_only_first_byte;
|
||||
};
|
||||
|
||||
|
||||
// device type definition
|
||||
extern const device_type M6809;
|
||||
extern const device_type M6809E;
|
||||
|
||||
// ======================> m6809_device
|
||||
|
||||
// Used by core CPU interface
|
||||
class m6809_base_device : public cpu_device,
|
||||
public m6809_config
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
m6809_base_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock, const device_type type, int divider);
|
||||
|
||||
// inline configuration helpers
|
||||
static void static_set_config(device_t &device, const m6809_config &config);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
// device_execute_interface overrides
|
||||
virtual UINT32 execute_min_cycles() const;
|
||||
virtual UINT32 execute_max_cycles() const;
|
||||
virtual UINT32 execute_input_lines() const;
|
||||
virtual void execute_run();
|
||||
virtual void execute_set_input(int inputnum, int state);
|
||||
virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const;
|
||||
virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const;
|
||||
|
||||
// device_memory_interface overrides
|
||||
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
|
||||
|
||||
// device_disasm_interface overrides
|
||||
virtual UINT32 disasm_min_opcode_bytes() const;
|
||||
virtual UINT32 disasm_max_opcode_bytes() const;
|
||||
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
|
||||
|
||||
// device_state_interface overrides
|
||||
virtual void state_string_export(const device_state_entry &entry, astring &string);
|
||||
|
||||
private:
|
||||
UINT32 RM16(UINT32 addr);
|
||||
void WM16(UINT32 addr, PAIR *p);
|
||||
|
||||
void IIError();
|
||||
void fetch_effective_address();
|
||||
|
||||
void check_irq_lines();
|
||||
void set_irq_line(int irqline, int state);
|
||||
void update_state();
|
||||
|
||||
offs_t disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, int options);
|
||||
|
||||
#include "6809tbl.h"
|
||||
|
||||
// opcode/condition tables
|
||||
static const UINT8 m_flags8i[256];
|
||||
static const UINT8 m_flags8d[256];
|
||||
static const UINT8 m_index_cycle_em[256];
|
||||
static const UINT8 m_cycles1[256];
|
||||
|
||||
typedef void (m6809_base_device::*ophandler)();
|
||||
|
||||
ophandler m_opcode[256];
|
||||
|
||||
static const ophandler s_opcodetable[256];
|
||||
|
||||
protected:
|
||||
const char *m_tag;
|
||||
|
||||
// address spaces
|
||||
const address_space_config m_program_config;
|
||||
|
||||
// CPU registers
|
||||
PAIR m_pc; /* Program counter */
|
||||
PAIR m_ppc; /* Previous program counter */
|
||||
PAIR m_d; /* Accumulator a and b */
|
||||
PAIR m_dp; /* Direct Page register (page in MSB) */
|
||||
PAIR m_u, m_s; /* Stack pointers */
|
||||
PAIR m_x, m_y; /* Index registers */
|
||||
UINT8 m_cc;
|
||||
UINT8 m_ireg; /* First opcode */
|
||||
UINT8 m_irq_state[2];
|
||||
|
||||
int m_extra_cycles; /* cycles used up by interrupts */
|
||||
|
||||
device_irq_acknowledge_callback m_irq_callback;
|
||||
|
||||
PAIR m_ea; /* effective address */
|
||||
|
||||
// other internal states
|
||||
int m_icount;
|
||||
UINT8 m_int_state; /* SYNC and CWAI flags */
|
||||
UINT8 m_nmi_state;
|
||||
int m_clock_divider;
|
||||
|
||||
// address spaces
|
||||
address_space *m_program;
|
||||
direct_read_data *m_direct;
|
||||
};
|
||||
|
||||
// device type definition
|
||||
extern const device_type ATMEGA88;
|
||||
extern const device_type ATMEGA644;
|
||||
|
||||
// ======================> m6809_device
|
||||
|
||||
class m6809_device : public m6809_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
m6809_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: m6809_base_device(mconfig, tag, owner, clock, M6809, 1) { }
|
||||
};
|
||||
|
||||
// ======================> m6809e_device
|
||||
|
||||
class m6809e_device : public m6809_base_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
m6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: m6809_base_device(mconfig, tag, owner, clock, M6809E, 4) { }
|
||||
};
|
||||
|
||||
enum
|
||||
{
|
||||
@ -15,17 +162,9 @@ enum
|
||||
#define M6809_IRQ_LINE 0 /* IRQ line number */
|
||||
#define M6809_FIRQ_LINE 1 /* FIRQ line number */
|
||||
|
||||
DECLARE_LEGACY_CPU_DEVICE(M6809, m6809);
|
||||
DECLARE_LEGACY_CPU_DEVICE(M6809E, m6809e);
|
||||
|
||||
/* M6809e has LIC line to indicate opcode/data fetch */
|
||||
|
||||
|
||||
CPU_DISASSEMBLE( m6809 );
|
||||
|
||||
struct m6809_config
|
||||
{
|
||||
UINT8 encrypt_only_first_byte; /* encrypt only the first byte in 10 xx and 11 xx opcodes */
|
||||
};
|
||||
|
||||
#endif /* __M6809_H__ */
|
||||
|
||||
@ -198,7 +198,7 @@ WRITE8_MEMBER(capbowl_state::capbowl_sndcmd_w)
|
||||
static void firqhandler( device_t *device, int irq )
|
||||
{
|
||||
capbowl_state *state = device->machine().driver_data<capbowl_state>();
|
||||
state->m_audiocpu->set_input_line(1, irq ? ASSERT_LINE : CLEAR_LINE);
|
||||
state->m_audiocpu->set_input_line(M6809_FIRQ_LINE, irq ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -554,7 +554,7 @@ static MACHINE_CONFIG_START( qix_base, qix_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK_OSC/4/4) /* 1.25 MHz */
|
||||
MCFG_CPU_PROGRAM_MAP(main_map)
|
||||
MCFG_CPU_CONFIG(encryption_config) // for kram3
|
||||
MCFG_CPU_M6809_CONFIG(encryption_config) // for kram3
|
||||
|
||||
/* high interleave needed to ensure correct text in service mode */
|
||||
/* Zookeeper settings and high score table seem especially sensitive to this */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user