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https://github.com/holub/mame
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Sync with MESS
This commit is contained in:
Wilbert Pol
parent
84422fd1ca
commit
9add8b78c0
@ -129,12 +129,13 @@ typedef int (*OpcodeEmulator) (lr35902_state *cpustate);
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/* Memory functions */
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/****************************************************************************/
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#define mem_ReadByte(cs,A) ((UINT8)(cs)->w.program->read_byte(A))
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#define mem_WriteByte(cs,A,V) ((cs)->w.program->write_byte(A,V))
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#define mem_ReadByte(cs,A) ((UINT8)(cs)->w.program->read_byte(A)); CYCLES_PASSED(4);
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#define mem_WriteByte(cs,A,V) ((cs)->w.program->write_byte(A,V)); CYCLES_PASSED(4);
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INLINE UINT16 mem_ReadWord (lr35902_state *cpustate, UINT32 address)
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{
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UINT16 value = (UINT16) mem_ReadByte (cpustate, (address + 1) & 0xffff) << 8;
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UINT16 value = mem_ReadByte (cpustate, (address + 1) & 0xffff);
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value <<= 8;
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value |= mem_ReadByte (cpustate, address);
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return value;
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}
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@ -145,46 +146,6 @@ INLINE void mem_WriteWord (lr35902_state *cpustate, UINT32 address, UINT16 value
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mem_WriteByte (cpustate, (address + 1) & 0xffff, value >> 8);
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}
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static const int Cycles[256] =
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{
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4,12, 8, 8, 4, 4, 8, 4,20, 8, 8, 8, 4, 4, 8, 4,
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4,12, 8, 8, 4, 4, 8, 4,12, 8, 8, 8, 4, 4, 8, 4,
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8,12, 8, 8, 4, 4, 8, 4, 8, 8, 8, 8, 4, 4, 8, 4,
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8,12, 8, 8,12,12,12, 4, 8, 8, 8, 8, 4, 4, 8, 4,
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4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 8, 4,
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4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 8, 4,
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4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 8, 4,
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8, 8, 8, 8, 8, 8, 4, 8, 4, 4, 4, 4, 4, 4, 8, 4,
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4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 8, 4,
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4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 8, 4,
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4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 8, 4,
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4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 8, 4,
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8,12,12,16,12,16, 8,16, 8,16,12, 0,12,24, 8,16,
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8,12,12, 4,12,16, 8,16, 8,16,12, 4,12, 4, 8,16,
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12,12, 8, 4, 4,16, 8,16,16, 4,16, 4, 4, 4, 8,16,
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12,12, 8, 4, 4,16, 8,16,12, 8,16, 4, 4, 4, 8,16
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};
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static const int CyclesCB[256] =
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{
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8, 8, 8, 8, 8, 8,16, 8, 8, 8, 8, 8, 8, 8,16, 8,
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8, 8, 8, 8, 8, 8,16, 8, 8, 8, 8, 8, 8, 8,16, 8,
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8, 8, 8, 8, 8, 8,16, 8, 8, 8, 8, 8, 8, 8,16, 8,
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8, 8, 8, 8, 8, 8,16, 8, 8, 8, 8, 8, 8, 8,16, 8,
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8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
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8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
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8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
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8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
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8, 8, 8, 8, 8, 8,16, 8, 8, 8, 8, 8, 8, 8,16, 8,
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8, 8, 8, 8, 8, 8,16, 8, 8, 8, 8, 8, 8, 8,16, 8,
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8, 8, 8, 8, 8, 8,16, 8, 8, 8, 8, 8, 8, 8,16, 8,
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8, 8, 8, 8, 8, 8,16, 8, 8, 8, 8, 8, 8, 8,16, 8,
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8, 8, 8, 8, 8, 8,16, 8, 8, 8, 8, 8, 8, 8,16, 8,
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8, 8, 8, 8, 8, 8,16, 8, 8, 8, 8, 8, 8, 8,16, 8,
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8, 8, 8, 8, 8, 8,16, 8, 8, 8, 8, 8, 8, 8,16, 8,
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8, 8, 8, 8, 8, 8,16, 8, 8, 8, 8, 8, 8, 8,16, 8
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};
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static CPU_INIT( lr35902 )
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{
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lr35902_state *cpustate = get_safe_token(device);
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@ -285,7 +246,7 @@ INLINE void lr35902_ProcessInterrupts (lr35902_state *cpustate)
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(*cpustate->w.irq_callback)(cpustate->w.device, irqline);
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cpustate->w.enable &= ~IME;
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cpustate->w.IF &= ~(1 << irqline);
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CYCLES_PASSED( 20 );
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CYCLES_PASSED( 12 );
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cpustate->w.SP -= 2;
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mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
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cpustate->w.PC = 0x40 + irqline * 8;
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@ -318,7 +279,7 @@ static CPU_EXECUTE( lr35902 )
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lr35902_ProcessInterrupts (cpustate);
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debugger_instruction_hook(device, cpustate->w.PC);
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if ( cpustate->w.enable & HALTED ) {
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CYCLES_PASSED( Cycles[0x76] );
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CYCLES_PASSED( 4 );
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cpustate->w.execution_state = 1;
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} else {
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cpustate->w.op = mem_ReadByte (cpustate, cpustate->w.PC++);
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@ -326,7 +287,6 @@ static CPU_EXECUTE( lr35902 )
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cpustate->w.PC--;
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cpustate->w.doHALTbug = 0;
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}
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CYCLES_PASSED( Cycles[cpustate->w.op] );
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}
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}
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cpustate->w.execution_state ^= 1;
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@ -147,15 +147,15 @@ case 0x02: /* LD (BC),A */
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mem_WriteByte (cpustate, cpustate->w.BC, cpustate->b.A);
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break;
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case 0x03: /* INC BC */
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#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
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if (cpustate->b.B == 0xFE)
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{
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trash_sprites (state);
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}
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#endif
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cpustate->w.BC += 1;
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break;
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cpustate->w.BC += 1;
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CYCLES_PASSED( 4 );
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break;
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case 0x04: /* INC B */
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INC_8BIT (cpustate->b.B)
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@ -186,9 +186,9 @@ case 0x08: /* LD (n16),SP */
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cpustate->w.PC += 2;
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break;
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case 0x09: /* ADD HL,BC */
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ADD_HL_RR (cpustate->w.BC)
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break;
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ADD_HL_RR (cpustate->w.BC)
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CYCLES_PASSED( 4 );
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break;
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case 0x0A: /* LD A,(BC) */
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cpustate->b.A = mem_ReadByte (cpustate, cpustate->w.BC);
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@ -201,9 +201,9 @@ case 0x0B: /* DEC BC */
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trash_sprites (state);
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}
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#endif
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cpustate->w.BC -= 1;
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break;
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cpustate->w.BC -= 1;
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CYCLES_PASSED( 4 );
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break;
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case 0x0C: /* INC C */
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INC_8BIT (cpustate->b.C)
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@ -248,8 +248,9 @@ case 0x13: /* INC DE */
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}
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#endif
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cpustate->w.DE += 1;
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break;
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cpustate->w.DE += 1;
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CYCLES_PASSED( 4 );
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break;
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case 0x14: /* INC D */
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INC_8BIT (cpustate->b.D)
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@ -275,12 +276,13 @@ case 0x18: /* JR n8 */
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offset = mem_ReadByte (cpustate, cpustate->w.PC++);
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cpustate->w.PC += offset;
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CYCLES_PASSED( 4 );
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}
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break;
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case 0x19: /* ADD HL,DE */
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ADD_HL_RR (cpustate->w.DE)
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break;
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ADD_HL_RR (cpustate->w.DE)
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CYCLES_PASSED( 4 );
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break;
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case 0x1A: /* LD A,(DE) */
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cpustate->b.A = mem_ReadByte (cpustate, cpustate->w.DE);
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@ -293,9 +295,9 @@ case 0x1B: /* DEC DE */
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trash_sprites (state);
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}
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#endif
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cpustate->w.DE -= 1;
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break;
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cpustate->w.DE -= 1;
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CYCLES_PASSED( 4 );
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break;
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case 0x1C: /* INC E */
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INC_8BIT (cpustate->b.E)
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@ -316,20 +318,15 @@ case 0x1F: /* RRA */
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cpustate->b.F = x;
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break;
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case 0x20: /* JR NZ,n8 */
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if (cpustate->b.F & FLAG_Z)
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{
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cpustate->w.PC++;
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}
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else
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{
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INT8 offset;
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offset = mem_ReadByte (cpustate, cpustate->w.PC++);
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cpustate->w.PC += offset;
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CYCLES_PASSED( 4 );
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}
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break;
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{
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INT8 offset = mem_ReadByte (cpustate, cpustate->w.PC++);
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if (! (cpustate->b.F & FLAG_Z) )
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{
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cpustate->w.PC += offset;
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CYCLES_PASSED( 4 );
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}
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}
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break;
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case 0x21: /* LD HL,n16 */
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cpustate->w.HL = mem_ReadWord (cpustate, cpustate->w.PC);
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@ -356,8 +353,9 @@ case 0x23: /* INC HL */
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}
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#endif
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cpustate->w.HL += 1;
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break;
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cpustate->w.HL += 1;
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CYCLES_PASSED( 4 );
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break;
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case 0x24: /* INC H */
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INC_8BIT (cpustate->b.H);
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@ -397,25 +395,20 @@ case 0x27: /* DAA */
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}
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break;
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case 0x28: /* JR Z,n8 */
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{
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INT8 offset = mem_ReadByte (cpustate, cpustate->w.PC++);;
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if (cpustate->b.F & FLAG_Z)
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{
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INT8 offset;
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offset = mem_ReadByte (cpustate, cpustate->w.PC++);
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cpustate->w.PC += offset;
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CYCLES_PASSED( 4 );
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}
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else
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{
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cpustate->w.PC += 1;
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}
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break;
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if (cpustate->b.F & FLAG_Z)
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{
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cpustate->w.PC += offset;
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CYCLES_PASSED( 4 );
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}
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}
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break;
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case 0x29: /* ADD HL,HL */
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ADD_HL_RR (cpustate->w.HL)
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break;
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ADD_HL_RR (cpustate->w.HL)
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CYCLES_PASSED( 4 );
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break;
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case 0x2A: /* LD A,(HL+) */
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#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
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if (cpustate->b.H == 0xFE)
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@ -435,9 +428,9 @@ case 0x2B: /* DEC HL */
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trash_sprites (state);
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}
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#endif
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cpustate->w.HL -= 1;
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break;
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cpustate->w.HL -= 1;
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CYCLES_PASSED( 4 );
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break;
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case 0x2C: /* INC L */
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INC_8BIT (cpustate->b.L);
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@ -456,20 +449,16 @@ case 0x2F: /* CPL */
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cpustate->b.F |= FLAG_N | FLAG_H;
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break;
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case 0x30: /* JR NC,n8 */
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{
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INT8 offset = mem_ReadByte (cpustate, cpustate->w.PC++);
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if (cpustate->b.F & FLAG_C)
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{
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cpustate->w.PC += 1;
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}
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else
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{
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INT8 offset;
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offset = mem_ReadByte (cpustate, cpustate->w.PC++);
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cpustate->w.PC += offset;
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CYCLES_PASSED( 4 );
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}
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break;
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if ( ! (cpustate->b.F & FLAG_C) )
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{
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cpustate->w.PC += offset;
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CYCLES_PASSED( 4 );
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}
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}
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break;
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case 0x31: /* LD SP,n16 */
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cpustate->w.SP = mem_ReadWord (cpustate, cpustate->w.PC);
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@ -488,16 +477,17 @@ case 0x32: /* LD (HL-),A */
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cpustate->w.HL -= 1;
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break;
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case 0x33: /* INC SP */
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cpustate->w.SP += 1;
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break;
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cpustate->w.SP += 1;
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CYCLES_PASSED( 4 );
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break;
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case 0x34: /* INC (HL) */
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{
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register UINT8 r, f;
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f = (UINT8) (cpustate->b.F & FLAG_C);
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r = (UINT8) (mem_ReadByte (cpustate, cpustate->w.HL) + 1);
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r = mem_ReadByte (cpustate, cpustate->w.HL);
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r += 1;
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mem_WriteByte (cpustate, cpustate->w.HL, r);
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if (r == 0)
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@ -515,7 +505,8 @@ case 0x35: /* DEC (HL) */
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register UINT8 r, f;
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f = (UINT8) ((cpustate->b.F & FLAG_C) | FLAG_N);
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r = (UINT8) (mem_ReadByte (cpustate, cpustate->w.HL) - 1);
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r = mem_ReadByte (cpustate, cpustate->w.HL);
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r -= 1;
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mem_WriteByte (cpustate, cpustate->w.HL, r);
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if (r == 0)
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@ -529,31 +520,30 @@ case 0x35: /* DEC (HL) */
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break;
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case 0x36: /* LD (HL),n8 */
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/* FIXED / broken ? */
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mem_WriteByte (cpustate, cpustate->w.HL, mem_ReadByte (cpustate, cpustate->w.PC++));
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{
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UINT8 v = mem_ReadByte (cpustate, cpustate->w.PC++);
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mem_WriteByte (cpustate, cpustate->w.HL, v);
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}
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break;
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case 0x37: /* SCF */
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cpustate->b.F = (UINT8) ((cpustate->b.F & FLAG_Z) | FLAG_C);
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break;
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case 0x38: /* JR C,n8 */
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{
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INT8 offset = mem_ReadByte (cpustate, cpustate->w.PC++);
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if (cpustate->b.F & FLAG_C)
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{
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INT8 offset;
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offset = mem_ReadByte (cpustate, cpustate->w.PC++);
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cpustate->w.PC += offset;
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CYCLES_PASSED( 4 );
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}
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else
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{
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cpustate->w.PC += 1;
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}
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break;
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if (cpustate->b.F & FLAG_C)
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{
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cpustate->w.PC += offset;
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CYCLES_PASSED( 4 );
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}
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}
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break;
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case 0x39: /* ADD HL,SP */
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ADD_HL_RR (cpustate->w.SP)
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break;
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ADD_HL_RR (cpustate->w.SP)
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CYCLES_PASSED( 4 );
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break;
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case 0x3A: /* LD A,(HL-) */
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#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
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if (cpustate->b.H == 0xFE)
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@ -566,9 +556,9 @@ case 0x3A: /* LD A,(HL-) */
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cpustate->w.HL -= 1;
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break;
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case 0x3B: /* DEC SP */
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cpustate->w.SP -= 1;
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break;
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cpustate->w.SP -= 1;
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CYCLES_PASSED( 4 );
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break;
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case 0x3C: /* INC A */
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INC_8BIT (cpustate->b.A);
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@ -1100,257 +1090,235 @@ case 0xBF: /* CP A,A */
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CP_A_X (cpustate->b.A)
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break;
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case 0xC0: /* RET NZ */
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if (!(cpustate->b.F & FLAG_Z))
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{
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cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.SP);
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cpustate->w.SP += 2;
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CYCLES_PASSED( 12 );
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}
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break;
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CYCLES_PASSED( 4 );
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if (!(cpustate->b.F & FLAG_Z))
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{
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cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.SP);
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cpustate->w.SP += 2;
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CYCLES_PASSED( 4 );
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}
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break;
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case 0xC1: /* POP BC */
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cpustate->w.BC = mem_ReadWord (cpustate, cpustate->w.SP);
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cpustate->w.SP += 2;
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break;
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case 0xC2: /* JP NZ,n16 */
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{
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UINT16 addr = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
cpustate->w.PC += 2;
|
||||
|
||||
if (cpustate->b.F & FLAG_Z)
|
||||
{
|
||||
cpustate->w.PC += 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
break;
|
||||
if ( ! (cpustate->b.F & FLAG_Z) )
|
||||
{
|
||||
cpustate->w.PC = addr;
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 0xC3: /* JP n16 */
|
||||
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
break;
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xC4: /* CALL NZ,n16 */
|
||||
{
|
||||
UINT16 addr = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
cpustate->w.PC += 2;
|
||||
|
||||
if (cpustate->b.F & FLAG_Z)
|
||||
{
|
||||
cpustate->w.PC += 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
register UINT16 PC;
|
||||
PC = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
cpustate->w.PC += 2;
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = PC;
|
||||
CYCLES_PASSED( 12 );
|
||||
}
|
||||
break;
|
||||
if ( ! (cpustate->b.F & FLAG_Z) )
|
||||
{
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = addr;
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 0xC5: /* PUSH BC */
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.BC);
|
||||
break;
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.BC);
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xC6: /* ADD A,n8 */
|
||||
|
||||
x = mem_ReadByte (cpustate, cpustate->w.PC++);
|
||||
ADD_A_X (x)
|
||||
break;
|
||||
case 0xC7: /* RST 0 */
|
||||
|
||||
{
|
||||
register UINT16 PC;
|
||||
PC = cpustate->w.PC;
|
||||
cpustate->w.PC = 0;
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, PC);
|
||||
}
|
||||
break;
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 0;
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xC8: /* RET Z */
|
||||
|
||||
if (cpustate->b.F & FLAG_Z)
|
||||
{
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.SP);
|
||||
cpustate->w.SP += 2;
|
||||
CYCLES_PASSED( 12 );
|
||||
}
|
||||
break;
|
||||
CYCLES_PASSED( 4 );
|
||||
if (cpustate->b.F & FLAG_Z)
|
||||
{
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.SP);
|
||||
cpustate->w.SP += 2;
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
break;
|
||||
case 0xC9: /* RET */
|
||||
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.SP);
|
||||
cpustate->w.SP += 2;
|
||||
break;
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.SP);
|
||||
cpustate->w.SP += 2;
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xCA: /* JP Z,n16 */
|
||||
{
|
||||
UINT16 addr = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
cpustate->w.PC += 2;
|
||||
|
||||
if (cpustate->b.F & FLAG_Z)
|
||||
{
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
else
|
||||
{
|
||||
cpustate->w.PC += 2;
|
||||
}
|
||||
break;
|
||||
if (cpustate->b.F & FLAG_Z)
|
||||
{
|
||||
cpustate->w.PC = addr;
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 0xCB: /* PREFIX! */
|
||||
x = mem_ReadByte (cpustate, cpustate->w.PC++);
|
||||
CYCLES_PASSED( CyclesCB[x] );
|
||||
switch (x)
|
||||
{
|
||||
#include "opc_cb.h"
|
||||
}
|
||||
break;
|
||||
case 0xCC: /* CALL Z,n16 */
|
||||
{
|
||||
UINT16 addr = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
cpustate->w.PC += 2;
|
||||
|
||||
if (cpustate->b.F & FLAG_Z)
|
||||
{
|
||||
register UINT16 PC;
|
||||
PC = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
cpustate->w.PC += 2;
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = PC;
|
||||
CYCLES_PASSED( 12 );
|
||||
}
|
||||
else
|
||||
{
|
||||
cpustate->w.PC += 2;
|
||||
}
|
||||
break;
|
||||
if (cpustate->b.F & FLAG_Z)
|
||||
{
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = addr;
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 0xCD: /* CALL n16 */
|
||||
{
|
||||
register UINT16 PC;
|
||||
PC = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
cpustate->w.PC += 2;
|
||||
{
|
||||
UINT16 addr = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
cpustate->w.PC += 2;
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = PC;
|
||||
}
|
||||
break;
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = addr;
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
break;
|
||||
case 0xCE: /* ADC A,n8 */
|
||||
|
||||
x = mem_ReadByte (cpustate, cpustate->w.PC++);
|
||||
ADC_A_X (x)
|
||||
break;
|
||||
case 0xCF: /* RST 8 */
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 8;
|
||||
break;
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 8;
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xD0: /* RET NC */
|
||||
|
||||
if (!(cpustate->b.F & FLAG_C))
|
||||
{
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.SP);
|
||||
cpustate->w.SP += 2;
|
||||
CYCLES_PASSED( 12 );
|
||||
}
|
||||
break;
|
||||
CYCLES_PASSED( 4 );
|
||||
if (!(cpustate->b.F & FLAG_C))
|
||||
{
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.SP);
|
||||
cpustate->w.SP += 2;
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
break;
|
||||
case 0xD1: /* POP DE */
|
||||
|
||||
cpustate->w.DE = mem_ReadWord (cpustate, cpustate->w.SP);
|
||||
cpustate->w.SP += 2;
|
||||
break;
|
||||
case 0xD2: /* JP NC,n16 */
|
||||
{
|
||||
UINT16 addr = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
cpustate->w.PC += 2;
|
||||
|
||||
if (cpustate->b.F & FLAG_C)
|
||||
{
|
||||
cpustate->w.PC += 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
break;
|
||||
if ( ! (cpustate->b.F & FLAG_C) )
|
||||
{
|
||||
cpustate->w.PC = addr;
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 0xD3: /* EH? */
|
||||
break;
|
||||
case 0xD4: /* CALL NC,n16 */
|
||||
{
|
||||
UINT16 addr = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
cpustate->w.PC += 2;
|
||||
|
||||
if (cpustate->b.F & FLAG_C)
|
||||
{
|
||||
cpustate->w.PC += 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
register UINT16 PC;
|
||||
PC = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
cpustate->w.PC += 2;
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = PC;
|
||||
CYCLES_PASSED( 12 );
|
||||
}
|
||||
break;
|
||||
if ( ! (cpustate->b.F & FLAG_C) )
|
||||
{
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = addr;
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 0xD5: /* PUSH DE */
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.DE);
|
||||
break;
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.DE);
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xD6: /* SUB A,n8 */
|
||||
|
||||
x = mem_ReadByte (cpustate, cpustate->w.PC++);
|
||||
SUB_A_X (x)
|
||||
break;
|
||||
case 0xD7: /* RST $10 */
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 0x10;
|
||||
break;
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 0x10;
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xD8: /* RET C */
|
||||
|
||||
if (cpustate->b.F & FLAG_C)
|
||||
{
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.SP);
|
||||
cpustate->w.SP += 2;
|
||||
CYCLES_PASSED( 12 );
|
||||
}
|
||||
break;
|
||||
CYCLES_PASSED( 4 );
|
||||
if (cpustate->b.F & FLAG_C)
|
||||
{
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.SP);
|
||||
cpustate->w.SP += 2;
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
break;
|
||||
case 0xD9: /* RETI */
|
||||
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.SP);
|
||||
cpustate->w.SP += 2;
|
||||
cpustate->w.enable |= IME;
|
||||
break;
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.SP);
|
||||
cpustate->w.SP += 2;
|
||||
cpustate->w.enable |= IME;
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xDA: /* JP C,n16 */
|
||||
{
|
||||
UINT16 addr = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
cpustate->w.PC += 2;
|
||||
|
||||
if (cpustate->b.F & FLAG_C)
|
||||
{
|
||||
cpustate->w.PC = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
else
|
||||
{
|
||||
cpustate->w.PC += 2;
|
||||
}
|
||||
break;
|
||||
if (cpustate->b.F & FLAG_C)
|
||||
{
|
||||
cpustate->w.PC = addr;
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 0xDB: /* EH? */
|
||||
break;
|
||||
case 0xDC: /* CALL C,n16 */
|
||||
{
|
||||
UINT16 addr = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
cpustate->w.PC += 2;
|
||||
|
||||
if (cpustate->b.F & FLAG_C)
|
||||
{
|
||||
register UINT16 PC;
|
||||
PC = mem_ReadWord (cpustate, cpustate->w.PC);
|
||||
cpustate->w.PC += 2;
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = PC;
|
||||
CYCLES_PASSED( 12 );
|
||||
}
|
||||
else
|
||||
{
|
||||
cpustate->w.PC += 2;
|
||||
}
|
||||
break;
|
||||
if (cpustate->b.F & FLAG_C)
|
||||
{
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = addr;
|
||||
CYCLES_PASSED( 4 );
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 0xDD: /* EH? */
|
||||
break;
|
||||
case 0xDE: /* SBC A,n8 */
|
||||
@ -1359,13 +1327,16 @@ case 0xDE: /* SBC A,n8 */
|
||||
SBC_A_X (x)
|
||||
break;
|
||||
case 0xDF: /* RST $18 */
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 0x18;
|
||||
break;
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 0x18;
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xE0: /* LD ($FF00+n8),A */
|
||||
mem_WriteByte (cpustate, mem_ReadByte (cpustate, cpustate->w.PC++) + 0xFF00, cpustate->b.A);
|
||||
{
|
||||
UINT8 v = mem_ReadByte (cpustate, cpustate->w.PC++);
|
||||
mem_WriteByte (cpustate, 0xFF00 + v, cpustate->b.A);
|
||||
}
|
||||
break;
|
||||
case 0xE1: /* POP HL */
|
||||
|
||||
@ -1381,21 +1352,21 @@ case 0xE3: /* EH? */
|
||||
case 0xE4: /* EH? */
|
||||
break;
|
||||
case 0xE5: /* PUSH HL */
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.HL);
|
||||
break;
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.HL);
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xE6: /* AND A,n8 */
|
||||
|
||||
x = mem_ReadByte (cpustate, cpustate->w.PC++);
|
||||
AND_A_X (x)
|
||||
break;
|
||||
case 0xE7: /* RST $20 */
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 0x20;
|
||||
break;
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 0x20;
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xE8: /* ADD SP,n8 */
|
||||
/*
|
||||
* Z - Reset.
|
||||
@ -1407,7 +1378,7 @@ case 0xE8: /* ADD SP,n8 */
|
||||
{
|
||||
register INT32 n;
|
||||
|
||||
n = (INT32) ((INT8) mem_ReadByte (cpustate, cpustate->w.PC++));
|
||||
n = (INT8) mem_ReadByte (cpustate, cpustate->w.PC++);
|
||||
|
||||
if ( ( cpustate->w.SP & 0xFF ) + (UINT8)(n & 0xFF) > 0xFF )
|
||||
{
|
||||
@ -1425,6 +1396,7 @@ case 0xE8: /* ADD SP,n8 */
|
||||
|
||||
cpustate->w.SP = (UINT16) ( cpustate->w.SP + n );
|
||||
}
|
||||
CYCLES_PASSED( 8 );
|
||||
break;
|
||||
case 0xE9: /* JP (HL) */
|
||||
|
||||
@ -1447,14 +1419,16 @@ case 0xEE: /* XOR A,n8 */
|
||||
XOR_A_X (x)
|
||||
break;
|
||||
case 0xEF: /* RST $28 */
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 0x28;
|
||||
break;
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 0x28;
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xF0: /* LD A,($FF00+n8) */
|
||||
|
||||
cpustate->b.A = mem_ReadByte (cpustate, 0xFF00 + mem_ReadByte (cpustate, cpustate->w.PC++));
|
||||
{
|
||||
UINT8 v = mem_ReadByte (cpustate, cpustate->w.PC++);
|
||||
cpustate->b.A = mem_ReadByte (cpustate, 0xFF00 + v);
|
||||
}
|
||||
break;
|
||||
case 0xF1: /* POP AF */
|
||||
|
||||
@ -1472,21 +1446,21 @@ case 0xF3: /* DI */
|
||||
case 0xF4: /* EH? */
|
||||
break;
|
||||
case 0xF5: /* PUSH AF */
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, (UINT16) (cpustate->w.AF & 0xFFF0));
|
||||
break;
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, (UINT16) (cpustate->w.AF & 0xFFF0));
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xF6: /* OR A,n8 */
|
||||
|
||||
x = mem_ReadByte (cpustate, cpustate->w.PC++);
|
||||
OR_A_X (x)
|
||||
break;
|
||||
case 0xF7: /* RST $30 */
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 0x30;
|
||||
break;
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 0x30;
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xF8: /* LD HL,SP+n8 */
|
||||
/*
|
||||
* n = one UINT8 signed immediate value.
|
||||
@ -1501,7 +1475,7 @@ case 0xF8: /* LD HL,SP+n8 */
|
||||
{
|
||||
register INT32 n;
|
||||
|
||||
n = (INT32) ((INT8) mem_ReadByte (cpustate, cpustate->w.PC++));
|
||||
n = (INT8) mem_ReadByte (cpustate, cpustate->w.PC++);
|
||||
|
||||
if ( ( cpustate->w.SP & 0xFF ) + (UINT8)(n & 0xFF) > 0xFF )
|
||||
{
|
||||
@ -1519,33 +1493,31 @@ case 0xF8: /* LD HL,SP+n8 */
|
||||
|
||||
cpustate->w.HL = (UINT16) ( cpustate->w.SP + n );
|
||||
}
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xF9: /* LD SP,HL */
|
||||
|
||||
cpustate->w.SP = cpustate->w.HL;
|
||||
break;
|
||||
cpustate->w.SP = cpustate->w.HL;
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
case 0xFA: /* LD A,(n16) */
|
||||
|
||||
cpustate->b.A = mem_ReadByte (cpustate, mem_ReadWord (cpustate, cpustate->w.PC));
|
||||
cpustate->w.PC += 2;
|
||||
break;
|
||||
cpustate->b.A = mem_ReadByte (cpustate, mem_ReadWord (cpustate, cpustate->w.PC));
|
||||
cpustate->w.PC += 2;
|
||||
break;
|
||||
case 0xFB: /* EI */
|
||||
|
||||
cpustate->w.enable |= IME;
|
||||
cpustate->w.ei_delay = 1;
|
||||
break;
|
||||
cpustate->w.enable |= IME;
|
||||
cpustate->w.ei_delay = 1;
|
||||
break;
|
||||
case 0xFC: /* EH? */
|
||||
break;
|
||||
break;
|
||||
case 0xFD: /* EH? */
|
||||
break;
|
||||
break;
|
||||
case 0xFE: /* CP A,n8 */
|
||||
|
||||
x = mem_ReadByte (cpustate, cpustate->w.PC++);
|
||||
CP_A_X (x)
|
||||
break;
|
||||
x = mem_ReadByte (cpustate, cpustate->w.PC++);
|
||||
CP_A_X (x)
|
||||
break;
|
||||
case 0xFF: /* RST $38 */
|
||||
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 0x38;
|
||||
break;
|
||||
cpustate->w.SP -= 2;
|
||||
mem_WriteWord (cpustate, cpustate->w.SP, cpustate->w.PC);
|
||||
cpustate->w.PC = 0x38;
|
||||
CYCLES_PASSED( 4 );
|
||||
break;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user