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Big update to comments in tms5220.c, also redid LFSR again to be slightly more accurate after a reset. Minor changes to the non-NORMALMODE as well, should sound better.
This commit is contained in:
Jonathan Gevaryahu
parent
e10e630314
commit
9b553552df
@ -50,8 +50,8 @@ TODO:
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* If a command is still executing, /READY will be kept high until the command has
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finished if the next command is written.
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* tomcat has a 5220 which is not hooked up at all
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* documentation is inconsistent in the patents about what data is returned for chirp rom addresses (base 0) 41 to 51; the patent says the 'rom returns zeroes for locations beyond 40', but at the same time the rom stores the complement of the actual chirp rom value, so are locations beyond 40 = 0x00(0) or = 0xFF(-1)? The latter seems more likely to me, and that is how it is currently implemented. (LN).
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* Is the TS=0 forcing energy to 0 for next frame in the interpolator actually correct?
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* documentation is inconsistent in the patents about what data is returned for chirp rom addresses (base 0) 41 to 51; the patent says the 'rom returns zeroes for locations beyond 40', but at the same time the rom stores the complement of the actual chirp rom value, so are locations beyond 40 = 0x00(0) or = 0xFF(-1)? The patent text and images imply 0x00, but I'm (LN) not completely convinced yet.
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* Is the TS=0 forcing energy to 0 for next frame in the interpolator actually correct? I'm (LN) guessing no. The patent schematics state that TS=0 shuts off the output dac completely, though doesn't affect the I/O pin.
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Pedantic detail from observation of real chip:
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The 5200 and 5220 chips outputs the following coefficients over PROMOUT while
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@ -86,57 +86,37 @@ looping: uses old interface
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portraits: uses *NO* interface; the i/o cpu hasn't been hooked to anything!
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dotron and midwayfb(mcr.c): uses old interface
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Email from Lord Nightmare having a lot more detail follows:
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Yes, there is at least two more differences:
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The 5220 is 'noisier' when playing unvoiced frames than the 5220C is; I
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think the 5220C may use a different energy table (or use one value lower
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in the normal energy table) than the 5220 does, possibly only when
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playing unvoiced frames, but I can't prove this without a decap; the
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5220C's PROMOUT pin (for dumping the lpc tables as played) is
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nonfunctional due to changed design or a die bug.
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In addition, the NOP commands on the FIFO interface have been changed
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and data passed in the low bits has a meaning regarding frame length:
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commands :
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(lsb is right, msb is left; x means don't care)
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x0x0xbcc : (5220: NOP) (5220C: select frame length by cc, and b selects
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whether every frame is preceeded by 2 bits to select the frame length
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(instead of using the value set by cc)) (default is 00 for frame length
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(200 samples) and 0 for whether the preceeding 2 bits are enabled (off))
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x001xxxx: sends eight read bit commands (M0 high M1 low) to VSM and
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reads the resulting bits serially into a temporary register, which
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becomes readable as the next byte read from the tms52xx once ready goes
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active.
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Documentation of chip commands:
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x0x0xbcc : on 5200/5220: NOP (does nothing); on 5220C: Select frame length by cc, and b selects whether every frame is preceeded by 2 bits to select the frame length (instead of using the value set by cc); the default (and after a reset command) is as if '0x00' was written, i.e. for frame length (200 samples) and 0 for whether the preceeding 2 bits are enabled (off)
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Note the bit order of the byte read from the TMS52xx is BACKWARDS as
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compared to the actual data order as in the rom on the VSM chips! This
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was IMHO a rather silly design decision of TI. (I asked Larry
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Brantingham about this but he wasn't involved with the TMS52xx chips,
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just the 5100)
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There's ASCII data in the TI 99/4 speech module VSMs which has the bit
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order reversed on purpose because of this!
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x001xxxx: READ BYTE (RDBY) Sends eight read bit commands (M0 high M1 low) to VSM and reads the resulting bits serially into a temporary register, which becomes readable as the next byte read from the tms52xx once ready goes active. Note the bit order of the byte read from the TMS52xx is BACKWARDS as compared to the actual data order as in the rom on the VSM chips; the read byte command of the tms5100 reads the bits in the 'correct' order. This was IMHO a rather silly design decision of TI. (I (LN) asked Larry Brantingham about this but he wasn't involved with the TMS52xx chips, just the 5100); There's ASCII data in the TI 99/4 speech module VSMs which has the bit order reversed on purpose because of this!
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TALK STATUS must be CLEAR for this command to work; otherwise it is treated as a NOP.
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x011xxxx: sends a read and branch command (M0 high, M1 high) to force
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VSM to set its data pointer to whatever the data is at its current
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pointer location is)
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x100aaaa: send a load address command (M0 low M1 high) to vsm with the 4
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'a' bits
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x101xxxx: 'speak' begins speaking from current address in the data
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pointer of the vsms
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x110xxxx: 'speak external' begins speaking from the 16 byte fifo
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x111xxxx: resets the speech synthesis core immediately; clears the bit
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offset counter in the fifo to the nearest byte 'forward ', but does NOT
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clear the fifo, annoyingly!
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x011xxxx: READ AND BRANCH (RB) Sends a read and branch command (M0 high, M1 high) to force VSM to set its data pointer to whatever the data is at its current pointer location is)
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TALK STATUS must be CLEAR for this command to work; otherwise it is treated as a NOP.
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Its also possible but inconclusive that the chirp table was changed.
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The LPC tables between the 5220 and 5220C are MOSTLY the same of not
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completely so, but as mentioned above the energy table has some sort of
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difference.
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x100aaaa: LOAD ADDRESS (LA) Send a load address command (M0 low M1 high) to VSM with the 4 'a' bits; Note you need to send four or five of these in sequence to actually specify an address to the vsm.
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TALK STATUS must be CLEAR for this command to work; otherwise it is treated as a NOP.
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x101xxxx: SPEAK (SPK) Begins speaking, pulling spech data from the current address pointer location of the VSM modules.
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x110xxxx: SPEAK EXTERNAL (SPKEXT) Clears the FIFO using SPKEE line, then sets TALKD (TALKST remains zero) until 8 bytes have been written to the FIFO, at which point it begins speaking, pulling data from the 16 byte fifo.
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TALK STATUS must be CLEAR for this command to work; otherwise it is treated as a NOP.
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x111xxxx: RESET (RST) Resets the speech synthesis core immediately, and clears the FIFO.
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As for which games used which chips, from the TMS5220 wikipedia page:
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Other chip differences:
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The 5220 is 'noisier' when playing unvoiced frames than the 5220C is; I (LN) think the 5220C may use a different energy table (or use one value lower in the normal energy table) than the 5220 does, possibly only when playing unvoiced frames, but I can't prove this without a decap; the 5220C's PROMOUT pin (for dumping the lpc tables as played) is non-functional due to a changed design or a die bug (or may need special timing to know exactly when to read it, different than the 5200 and 5220 which are both easily readable).
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In addition, the NOP commands on the FIFO interface have been changed on the 5220C and data passed in the low bits has a meaning regarding frame length, see above.
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TMS5200 AKA TMC0285: (1981 to 1983ish when supplies ran low)
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It is also possible but inconclusive that the chirp table was changed; The LPC tables between the 5220 and 5220C are MOSTLY the same of not completely so, but as mentioned above the energy table has some sort of difference.
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As for which games used which chips:
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TMS5200 AKA TMC0285: (1980 to 1983)
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Arcade: Zaccaria's 'money money' and 'jack rabbit'; Bally/Midway's
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'Discs of Tron' (all environmental cabs and a few upright cabs; the code
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exists on all versions for the speech though, and upright cabs can be
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@ -147,7 +127,7 @@ upgraded to add it by hacking on a 'Squawk & Talk' pinball speech board
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serial chips); Street Electronics Corp.'s Apple II 'Echo 2' Speech
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synthesizer (early cards only)
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TMS5220: (mostly on things made between 1982 and 1984-1985)
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TMS5220: (mostly on things made between 1981 and 1984-1985)
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Arcade: Bally/Midway's 'NFL Football'; Atari's 'Star Wars',
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'Firefox', 'Return of the Jedi', 'Road Runner', 'The Empire Strikes
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Back' (all verified with schematics); Venture Line's 'Looping' and 'Sky
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@ -169,11 +149,6 @@ this), mostly on later pinballs with LPC speech)
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module (6511 based), IBM PS/2 Speech adapter (parallel port connection
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device), PES Speech adapter (serial port connection)
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Changes by R. Nabet (from 2001)
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* added Speech ROM support
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* modified code so that the beast only start speaking at the start of next frame, like the data
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sheet says
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***********************************************************************************************/
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#include "emu.h"
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@ -227,9 +202,9 @@ device), PES Speech adapter (serial port connection)
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#undef DEBUG_PIN_READS
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// above spams the errorlog with i/o ready messages whenever the ready or irq pin is read
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#undef DEBUG_GENERATION
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// above dumps some debug information related to the sample generation loop, i.e. when ramp frames happen
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// above dumps debug information related to the sample generation loop, i.e. whether interpolation is inhibited or not, and what the current and target values for each frame are.
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#undef DEBUG_GENERATION_VERBOSE
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// above dumps MUCH MORE debug information related to the sample generation loop, namely the k, pitch and energy values for EVERY SINGLE SAMPLE.
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// above dumps MUCH MORE debug information related to the sample generation loop, namely the excitation, energy, pitch, k*, and output values for EVERY SINGLE SAMPLE during a frame.
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#undef DEBUG_LATTICE
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// above dumps the lattice filter state data each sample.
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#undef DEBUG_CLIP
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@ -237,7 +212,7 @@ device), PES Speech adapter (serial port connection)
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#undef DEBUG_IO_READY
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// above debugs the io ready callback
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#undef DEBUG_RS_WS
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// above debugs the new up-and-coming tms5220_data_r and data_w access methods which actually respect rs and ws
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// above debugs the new tms5220_data_r and data_w access methods which actually respect rs and ws
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#define MAX_SAMPLE_CHUNK 512
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#define FIFO_SIZE 16
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@ -274,10 +249,10 @@ struct _tms5220_state
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/* these contain global status bits */
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UINT8 speaking_now; /* True only if actual speech is being generated right now. Is set when a speak vsm command happens OR when speak external happens and buffer low becomes nontrue; Is cleared when speech halts after the last stop frame or the last frame after talk status is otherwise cleared.*/
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UINT8 speak_external; /* DDIS is 1, i.e. Speak External command in progress, writes go to FIFO. */
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UINT8 talk_status; /* TS status bit is 1 i.e. speak or speak external is in progress and we have not encountered a stop frame yet; talk_status differs from speaking_now in that speaking_now is set as soon as a speak or speak external command is started; talk_status does NOT go active until after 8 bytes are written to the fifo on a speak external command, otherwise the two are the same. TS is cleared by 3 things: 1. when a STOP command has just been processed as a new frame in the speech stream; 2. if the fifo runs out in speak external mode; 3. on power-up/during a reset command; When it gets cleared, speak_external is also cleared, an interrupt is generated, and speaking_now will be cleared when the next frame starts. */
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UINT8 buffer_low; /* FIFO has less than 8 bytes in it */
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UINT8 buffer_empty; /* FIFO is empty*/
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UINT8 speak_external; /* If 1, DDIS is 1, i.e. Speak External command in progress, writes go to FIFO. */
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UINT8 talk_status; /* If 1, TS status bit is 1, i.e. speak or speak external is in progress and we have not encountered a stop frame yet; talk_status differs from speaking_now in that speaking_now is set as soon as a speak or speak external command is started; talk_status does NOT go active until after 8 bytes are written to the fifo on a speak external command, otherwise the two are the same. TS is cleared by 3 things: 1. when a STOP command has just been processed as a new frame in the speech stream; 2. if the fifo runs out in speak external mode; 3. on power-up/during a reset command; When it gets cleared, speak_external is also cleared, an interrupt is generated, and speaking_now will be cleared when the next frame starts. */
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UINT8 buffer_low; /* If 1, FIFO has less than 8 bytes in it */
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UINT8 buffer_empty; /* If 1, FIFO is empty */
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UINT8 irq_pin; /* state of the IRQ pin (output) */
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/* these contain data describing the current and previous voice frames */
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@ -314,37 +289,33 @@ struct _tms5220_state
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INT32 target_k[10];
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#endif
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UINT16 previous_energy; /* needed for lattice filter to match patent */
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UINT16 previous_energy; /* needed for lattice filter to match patent */
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//UINT8 interp_period; /* TODO: the current interpolation period, counts 1,2,3,4,5,6,7,0 for divide by 8,8,8,4,4,4,2,1 */
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UINT8 interp_count; /* number of samples within each sub-interpolation period, ranges from 0-24 */
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UINT8 inhibit; /* interpolation is inhibited until the DIV1 period */
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//UINT8 interp_period; /* TODO: the current interpolation period, counts 1,2,3,4,5,6,7,0 for divide by 8,8,8,4,4,4,2,1 */
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UINT8 interp_count; /* number of samples within each sub-interpolation period, ranges from 0-24; TODO: rename this variable to PC/merge into PC function */
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UINT8 inhibit; /* If 1, interpolation is inhibited until the DIV1 period */
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//UINT8 spkslow_delay; /* delay counter for interp count, only used on tms51xx */
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UINT8 sample_count; /* number of samples within the ENTIRE interpolation period, ranges from 0-199 */
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UINT8 tms5220c_rate; /* only relevant for tms5220C's multi frame rate feature; is the actual 4 bit value written on a 0x2* or 0x0* command */
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UINT8 sample_count; /* number of samples within the ENTIRE interpolation period, ranges from 0-199; TODO: merge into PC function */
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UINT8 tms5220c_rate; /* only relevant for tms5220C's multi frame rate feature; is the actual 4 bit value written on a 0x2* or 0x0* command */
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UINT16 pitch_count; /* pitch counter; provides chirp rom address */
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INT32 u[11];
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INT32 x[10];
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INT32 RNG; /* the random noise generator configuration is: 1 + x + x^3 + x^4 + x^13 */
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UINT16 RNG; /* the random noise generator configuration is: 1 + x + x^3 + x^4 + x^13 */
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INT16 excitation_data;
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/* R Nabet : These have been added to emulate speech Roms */
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UINT8 schedule_dummy_read; /* set after each load address, so that next read operation
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is preceded by a dummy read */
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UINT8 schedule_dummy_read; /* set after each load address, so that next read operation is preceded by a dummy read */
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UINT8 data_register; /* data register, used by read command */
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UINT8 RDB_flag; /* whether we should read data register or status register */
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/* io_ready: page 3 of the datasheet specifies that READY will be asserted until
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* data is available or processed by the system.
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*/
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UINT8 io_ready;
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/* flag for "true" timing involving rs/ws */
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UINT8 true_timing;
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/* rsws - state, rs bit 1, ws bit 0 */
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@ -565,7 +536,24 @@ static void tms5220_data_write(tms5220_state *tms, int data)
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/**********************************************************************************************
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update_status_and_ints -- check to see if the buffer low flag should be on or off
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update_status_and_ints -- check to see if the various flags should be on or off
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Description of flags, and their position in the status register:
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From the data sheet:
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bit D0(bit 7) = TS - Talk Status is active (high) when the VSP is processing speech data.
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Talk Status goes active at the initiation of a Speak command or after nine
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bytes of data are loaded into the FIFO following a Speak External command. It
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goes inactive (low) when the stop code (Energy=1111) is processed, or
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immediately by a buffer empty condition or a reset command.
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bit D1(bit 6) = BL - Buffer Low is active (high) when the FIFO buffer is more than half empty.
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Buffer Low is set when the "Last-In" byte is shifted down past the half-full
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boundary of the stack. Buffer Low is cleared when data is loaded to the stack
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so that the "Last-In" byte lies above the half-full boundary and becomes the
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eighth data byte of the stack.
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bit D2(bit 5) = BE - Buffer Empty is active (high) when the FIFO buffer has run out of data
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while executing a Speak External command. Buffer Empty is set when the last bit
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of the "Last-In" byte is shifted out to the Synthesis Section. This causes
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Talk Status to be cleared. Speed is terminated at some abnormal point and the
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Speak External command execution is terminated.
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***********************************************************************************************/
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@ -654,23 +642,6 @@ static int extract_bits(tms5220_state *tms, int count)
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tms5220_status_read -- read status or data from the TMS5220
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From the data sheet:
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bit D0(bit 7) = TS - Talk Status is active (high) when the VSP is processing speech data.
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Talk Status goes active at the initiation of a Speak command or after nine
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bytes of data are loaded into the FIFO following a Speak External command. It
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goes inactive (low) when the stop code (Energy=1111) is processed, or
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immediately by a buffer empty condition or a reset command.
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bit D1(bit 6) = BL - Buffer Low is active (high) when the FIFO buffer is more than half empty.
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Buffer Low is set when the "Last-In" byte is shifted down past the half-full
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boundary of the stack. Buffer Low is cleared when data is loaded to the stack
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so that the "Last-In" byte lies above the half-full boundary and becomes the
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ninth data byte of the stack.
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bit D2(bit 5) = BE - Buffer Empty is active (high) when the FIFO buffer has run out of data
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while executing a Speak External command. Buffer Empty is set when the last bit
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of the "Last-In" byte is shifted out to the Synthesis Section. This causes
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Talk Status to be cleared. Speed is terminated at some abnormal point and the
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Speak External command execution is terminated.
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***********************************************************************************************/
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static int tms5220_status_read(tms5220_state *tms)
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@ -694,7 +665,6 @@ static int tms5220_status_read(tms5220_state *tms)
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}
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/**********************************************************************************************
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tms5220_ready_read -- returns the ready state of the TMS5220
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@ -713,6 +683,8 @@ static int tms5220_ready_read(tms5220_state *tms)
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/**********************************************************************************************
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tms5220_cycles_to_ready -- returns the number of cycles until ready is asserted
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NOTE: this function is deprecated and is known to be VERY inaccurate.
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Use at your own peril!
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***********************************************************************************************/
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@ -766,7 +738,6 @@ static int tms5220_int_read(tms5220_state *tms)
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}
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/**********************************************************************************************
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tms5220_process -- fill the buffer with a specific number of samples
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@ -779,8 +750,6 @@ static void tms5220_process(tms5220_state *tms, INT16 *buffer, unsigned int size
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int i, interp_period, bitout, zpar;
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INT32 this_sample;
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//tryagain:
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/* if we're empty and still not speaking, fill with nothingness */
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if (!tms->speaking_now)
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goto empty;
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@ -975,7 +944,7 @@ static void tms5220_process(tms5220_state *tms, INT16 *buffer, unsigned int size
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tms->excitation_data = ~0x3F; /* according to the patent it is (either + or -) half of the maximum value in the chirp table, so either 01000000(0x40) or 11000000(0xC0)*/
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else
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tms->excitation_data = 0x40;
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#else
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#else // hack to double unvoiced strength, doesn't match patent
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if (tms->RNG & 1)
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tms->excitation_data = ~0x7F;
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else
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@ -997,11 +966,11 @@ static void tms5220_process(tms5220_state *tms, INT16 *buffer, unsigned int size
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tms->excitation_data = tms->coeff->chirptable[51];
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else /*tms->pitch_count < 51*/
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tms->excitation_data = tms->coeff->chirptable[tms->pitch_count];
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#else
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if (tms->pitch_count >= 51)
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tms->excitation_data = tms->coeff->chirptable[51]^~0x0;
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else /*tms->pitch_count < 51*/
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tms->excitation_data = tms->coeff->chirptable[tms->pitch_count]^~0x0;
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#else // hack based sort of on the D68_10.ASM file from qboxpro, which has 0x580 and 0x3A80 at the end of its chirp table
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if (tms->pitch_count >= 45)
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tms->excitation_data = -128;
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else /*tms->pitch_count < 45*/
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tms->excitation_data = tms->coeff->chirptable[tms->pitch_count];
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#endif
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}
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@ -1009,11 +978,11 @@ static void tms5220_process(tms5220_state *tms, INT16 *buffer, unsigned int size
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for (i=0; i<20; i++)
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{
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bitout = ((tms->RNG >> 12) & 1) ^
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((tms->RNG >> 10) & 1) ^
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((tms->RNG >> 9) & 1) ^
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((tms->RNG >> 3) & 1) ^
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((tms->RNG >> 2) & 1) ^
|
||||
((tms->RNG >> 0) & 1);
|
||||
tms->RNG >>= 1;
|
||||
tms->RNG |= bitout << 12;
|
||||
tms->RNG <<= 1;
|
||||
tms->RNG |= bitout;
|
||||
}
|
||||
this_sample = lattice_filter(tms); /* execute lattice filter */
|
||||
#ifdef DEBUG_GENERATION_VERBOSE
|
||||
@ -1651,7 +1620,7 @@ WRITE_LINE_DEVICE_HANDLER( tms5220_wsq_w )
|
||||
/* 100 nsec from data sheet, through 3 asynchronous gates on patent */
|
||||
//timer_set(tms->device->machine, ATTOTIME_IN_HZ(device->clock), tms, 0, io_ready_cb); // /READY goes inactive immediately, within one clock... for that matter, what do we even need a timer for then?
|
||||
tms->io_ready = 0;
|
||||
timer_set(tms->device->machine, ATTOTIME_IN_HZ(device->clock/16), tms, 1, io_ready_cb); // this should take around 10-16 (closer to ~15) cycles to complete
|
||||
timer_set(tms->device->machine, ATTOTIME_IN_HZ(device->clock/16), tms, 1, io_ready_cb); // this should take around 10-16 (closer to ~15) cycles to complete for fifo writes, TODO: but actually depends on what command is written if in command mode
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user