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housekeeping (nw)

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* aic6250: silence logging
* am9517a: silence logging
* ncr5390: remove mcfg and unneeded read/write handler wrappers
* interpro: use regular read/write handlers
* next: de-mcfg ncr5390
* sun4: de-mcfg ncr5390
This commit is contained in:
Patrick Mackinlay 2019-01-07 15:52:53 +07:00
parent ae6185e5f6
commit 9b5eaf70b6
6 changed files with 27 additions and 40 deletions
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4
src/devices/machine/aic6250.h
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@ -52,11 +52,11 @@ protected:
u8 status_reg_1_r(); u8 status_reg_1_r();
u8 scsi_signal_reg_r(); u8 scsi_signal_reg_r();
u8 scsi_id_data_r(); u8 scsi_id_data_r();
u8 source_dest_id_r() { logerror("source_dest_id_r\n"); return m_source_dest_id; } u8 source_dest_id_r() { return m_source_dest_id; }
u8 memory_data_r(); u8 memory_data_r();
u8 port_a_r(); u8 port_a_r();
u8 port_b_r(); u8 port_b_r();
u8 scsi_latch_data_r() { logerror("scsi_latch_data_r 0x%02x\n", m_scsi_latch_data); return m_scsi_latch_data; } u8 scsi_latch_data_r() { return m_scsi_latch_data; }
void dma_count_l_w(u8 data) { m_dma_count &= ~0x0000ff; m_dma_count |= (data << 0); } void dma_count_l_w(u8 data) { m_dma_count &= ~0x0000ff; m_dma_count |= (data << 0); }
void dma_count_m_w(u8 data) { m_dma_count &= ~0x00ff00; m_dma_count |= (data << 8); } void dma_count_m_w(u8 data) { m_dma_count &= ~0x00ff00; m_dma_count |= (data << 8); }

26
src/devices/machine/am9517a.cpp
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@ -1108,12 +1108,12 @@ WRITE8_MEMBER(v5x_dmau_device::write)
//m_buswidth = data & 0x02; //m_buswidth = data & 0x02;
//if (data & 0x01) //if (data & 0x01)
// soft_reset(); // soft_reset();
logerror("DMA: Initialise [%02x]\n", data); LOG("DMA: Initialise [%02x]\n", data);
break; break;
case 0x01: // Channel case 0x01: // Channel
m_selected_channel = data & 0x03; m_selected_channel = data & 0x03;
m_base = data & 0x04; m_base = data & 0x04;
logerror("DMA: Channel selected [%02x]\n", data); LOG("DMA: Channel selected [%02x]\n", data);
break; break;
case 0x02: // Count (low) case 0x02: // Count (low)
m_channel[channel].m_base_count = m_channel[channel].m_base_count =
@ -1121,7 +1121,7 @@ WRITE8_MEMBER(v5x_dmau_device::write)
if (m_base == 0) if (m_base == 0)
m_channel[channel].m_count = m_channel[channel].m_count =
(m_channel[channel].m_count & 0xff00) | data; (m_channel[channel].m_count & 0xff00) | data;
logerror("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count); LOG("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count);
break; break;
case 0x03: // Count (high) case 0x03: // Count (high)
m_channel[channel].m_base_count = m_channel[channel].m_base_count =
@ -1129,7 +1129,7 @@ WRITE8_MEMBER(v5x_dmau_device::write)
if (m_base == 0) if (m_base == 0)
m_channel[channel].m_count = m_channel[channel].m_count =
(m_channel[channel].m_count & 0x00ff) | (data << 8); (m_channel[channel].m_count & 0x00ff) | (data << 8);
logerror("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count); LOG("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count);
break; break;
case 0x04: // Address (low) case 0x04: // Address (low)
m_channel[channel].m_base_address = m_channel[channel].m_base_address =
@ -1137,7 +1137,7 @@ WRITE8_MEMBER(v5x_dmau_device::write)
if (m_base == 0) if (m_base == 0)
m_channel[channel].m_address = m_channel[channel].m_address =
(m_channel[channel].m_address & 0xffffff00) | data; (m_channel[channel].m_address & 0xffffff00) | data;
logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address); LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
break; break;
case 0x05: // Address (mid) case 0x05: // Address (mid)
m_channel[channel].m_base_address = m_channel[channel].m_base_address =
@ -1145,7 +1145,7 @@ WRITE8_MEMBER(v5x_dmau_device::write)
if (m_base == 0) if (m_base == 0)
m_channel[channel].m_address = m_channel[channel].m_address =
(m_channel[channel].m_address & 0xffff00ff) | (data << 8); (m_channel[channel].m_address & 0xffff00ff) | (data << 8);
logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address); LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
break; break;
case 0x06: // Address (high) case 0x06: // Address (high)
m_channel[channel].m_base_address = m_channel[channel].m_base_address =
@ -1153,7 +1153,7 @@ WRITE8_MEMBER(v5x_dmau_device::write)
if (m_base == 0) if (m_base == 0)
m_channel[channel].m_address = m_channel[channel].m_address =
(m_channel[channel].m_address & 0xff00ffff) | (data << 16); (m_channel[channel].m_address & 0xff00ffff) | (data << 16);
logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address); LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
break; break;
case 0x07: // Address (highest) case 0x07: // Address (highest)
m_channel[channel].m_base_address = m_channel[channel].m_base_address =
@ -1161,31 +1161,31 @@ WRITE8_MEMBER(v5x_dmau_device::write)
if (m_base == 0) if (m_base == 0)
m_channel[channel].m_address = m_channel[channel].m_address =
(m_channel[channel].m_address & 0x00ffffff) | (data << 24); (m_channel[channel].m_address & 0x00ffffff) | (data << 24);
logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address); LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
break; break;
case 0x0a: // Mode control case 0x0a: // Mode control
m_channel[channel].m_mode = data; m_channel[channel].m_mode = data;
// clear terminal count // clear terminal count
m_status &= ~(1 << channel); m_status &= ~(1 << channel);
logerror("DMA: Channel %i Mode control set [%02x]\n",m_selected_channel,m_channel[channel].m_mode); LOG("DMA: Channel %i Mode control set [%02x]\n",m_selected_channel,m_channel[channel].m_mode);
break; break;
case 0x08: // Device control (low) case 0x08: // Device control (low)
m_command = data; m_command = data;
logerror("DMA: Device control low set [%02x]\n",data); LOG("DMA: Device control low set [%02x]\n",data);
break; break;
case 0x09: // Device control (high) case 0x09: // Device control (high)
m_command_high = data; m_command_high = data;
logerror("DMA: Device control high set [%02x]\n",data); LOG("DMA: Device control high set [%02x]\n",data);
break; break;
case 0x0e: // Request case 0x0e: // Request
//m_reg.request = data; //m_reg.request = data;
logerror("(invalid) DMA: Request set [%02x]\n",data); // no software requests on the v53 integrated version LOG("(invalid) DMA: Request set [%02x]\n",data); // no software requests on the v53 integrated version
break; break;
case 0x0f: // Mask case 0x0f: // Mask
m_mask = data & 0x0f; m_mask = data & 0x0f;
logerror("DMA: Mask set [%02x]\n",data); LOG("DMA: Mask set [%02x]\n",data);
break; break;

13
src/devices/machine/ncr5390.h
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@ -7,21 +7,12 @@
#include "machine/nscsi_bus.h" #include "machine/nscsi_bus.h"
#define MCFG_NCR5390_IRQ_HANDLER(_devcb) \
downcast<ncr5390_device &>(*device).set_irq_handler(DEVCB_##_devcb);
#define MCFG_NCR5390_DRQ_HANDLER(_devcb) \
downcast<ncr5390_device &>(*device).set_drq_handler(DEVCB_##_devcb);
class ncr5390_device : public nscsi_device class ncr5390_device : public nscsi_device
{ {
public: public:
ncr5390_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); ncr5390_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// configuration helpers // configuration helpers
template <class Object> devcb_base &set_irq_handler(Object &&cb) { return m_irq_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_drq_handler(Object &&cb) { return m_drq_handler.set_callback(std::forward<Object>(cb)); }
auto irq_handler_cb() { return m_irq_handler.bind(); } auto irq_handler_cb() { return m_irq_handler.bind(); }
auto drq_handler_cb() { return m_drq_handler.bind(); } auto drq_handler_cb() { return m_drq_handler.bind(); }
@ -56,10 +47,6 @@ public:
uint8_t dma_r(); uint8_t dma_r();
void dma_w(uint8_t val); void dma_w(uint8_t val);
// memory mapped wrappers for dma read/write
DECLARE_READ8_MEMBER(mdma_r) { return dma_r(); }
DECLARE_WRITE8_MEMBER(mdma_w) { dma_w(data); }
protected: protected:
ncr5390_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); ncr5390_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);

4
src/mame/drivers/interpro.cpp
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@ -778,8 +778,8 @@ void interpro_state::ioga(machine_config &config)
// ioga dma and serial dma channels // ioga dma and serial dma channels
//m_ioga->dma_r_callback<0>().set(unknown); // plotter //m_ioga->dma_r_callback<0>().set(unknown); // plotter
m_ioga->dma_r_callback<1>().set(INTERPRO_SCSI_DEVICE_TAG, FUNC(ncr53c90a_device::mdma_r)); m_ioga->dma_r_callback<1>().set(INTERPRO_SCSI_DEVICE_TAG, FUNC(ncr53c90a_device::dma_r));
m_ioga->dma_w_callback<1>().set(INTERPRO_SCSI_DEVICE_TAG, FUNC(ncr53c90a_device::mdma_w)); m_ioga->dma_w_callback<1>().set(INTERPRO_SCSI_DEVICE_TAG, FUNC(ncr53c90a_device::dma_w));
m_ioga->dma_r_callback<2>().set(m_fdc, FUNC(upd765_family_device::mdma_r)); m_ioga->dma_r_callback<2>().set(m_fdc, FUNC(upd765_family_device::mdma_r));
m_ioga->dma_w_callback<2>().set(m_fdc, FUNC(upd765_family_device::mdma_w)); m_ioga->dma_w_callback<2>().set(m_fdc, FUNC(upd765_family_device::mdma_w));
m_ioga->serial_dma_r_callback<0>().set(m_scc2, FUNC(z80scc_device::db_r)); m_ioga->serial_dma_r_callback<0>().set(m_scc2, FUNC(z80scc_device::db_r));

10
src/mame/drivers/next.cpp
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@ -995,11 +995,11 @@ static void next_scsi_devices(device_slot_interface &device)
void next_state::ncr5390(device_t *device) void next_state::ncr5390(device_t *device)
{ {
devcb_base *devcb; ncr5390_device &adapter = downcast<ncr5390_device &>(*device);
(void)devcb;
MCFG_DEVICE_CLOCK(10000000) adapter.set_clock(10000000);
MCFG_NCR5390_IRQ_HANDLER(WRITELINE(*this, next_state, scsi_irq)) adapter.irq_handler_cb().set(*this, FUNC(next_state::scsi_irq));
MCFG_NCR5390_DRQ_HANDLER(WRITELINE(*this, next_state, scsi_drq)) adapter.drq_handler_cb().set(*this, FUNC(next_state::scsi_drq));
} }
MACHINE_CONFIG_START(next_state::next_base) MACHINE_CONFIG_START(next_state::next_base)

10
src/mame/drivers/sun4.cpp
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@ -1839,11 +1839,11 @@ static void sun_scsi_devices(device_slot_interface &device)
void sun4_state::ncr53c90a(device_t *device) void sun4_state::ncr53c90a(device_t *device)
{ {
devcb_base *devcb; ncr53c90a_device &adapter = downcast<ncr53c90a_device &>(*device);
(void)devcb;
MCFG_DEVICE_CLOCK(10000000) adapter.set_clock(10000000);
MCFG_NCR5390_IRQ_HANDLER(WRITELINE(*this, sun4_state, scsi_irq)) adapter.irq_handler_cb().set(*this, FUNC(sun4_state::scsi_irq));
MCFG_NCR5390_DRQ_HANDLER(WRITELINE(*this, sun4_state, scsi_drq)) adapter.drq_handler_cb().set(*this, FUNC(sun4_state::scsi_drq));
} }
MACHINE_CONFIG_START(sun4_state::sun4) MACHINE_CONFIG_START(sun4_state::sun4)