mirror of
https://github.com/holub/mame
synced 2025-04-19 23:12:11 +03:00
risc2500/tasc: fixed high pitched sound problem
This commit is contained in:
hap
parent
4d532a9cfa
commit
9bb192141c
@ -497,10 +497,13 @@ void arm_cpu_device::device_start()
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{
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m_program = &space(AS_PROGRAM);
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if(m_program->endianness() == ENDIANNESS_LITTLE) {
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if(m_program->endianness() == ENDIANNESS_LITTLE)
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{
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m_program->cache(m_cachele);
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m_pr32 = [this](offs_t address) -> u32 { return m_cachele.read_dword(address); };
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} else {
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}
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else
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{
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m_program->cache(m_cachebe);
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m_pr32 = [this](offs_t address) -> u32 { return m_cachebe.read_dword(address); };
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}
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@ -824,7 +827,7 @@ void arm_cpu_device::HandleALU( uint32_t insn )
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{
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op2 = decodeShift(insn, (insn & INSN_S) ? &sc : nullptr);
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if (!(insn & INSN_S))
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if (!(insn & INSN_S))
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sc=0;
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}
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@ -10,11 +10,13 @@ The SmartBoard can detect which piece is present on a specific square, more
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info on the technology used in the piece recognition system can be found in
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the US patent 5,129,654
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SB30 (81 LEDs) is "SmartBoard I"
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SB20 (64 LEDs) is "SmartBoard II"
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SmartBoard I is SB30 (81 LEDs, analog chesspieces)
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SmartBoard II is SB20 (64 LEDs, digital chesspieces)
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SmartBoard III is SB30 again, but digital
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SB20 is not emulated. It's on different hardware, with embedded CPU to reduce
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I/O overhead. Note, SB20 is not compatible with old versions of Tasc R30.
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SB20 and the newer SB30 are not emulated. They're on different hardware, with
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embedded CPU to reduce I/O overhead. Note, These are not compatible with old
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versions of Tasc R30.
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******************************************************************************/
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@ -5,13 +5,13 @@
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Mephisto Berlin 68000 / Berlin Professional 68020
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Berlin Professional has the same engine as Mephisto Genius.
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TODO:
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- does it have ROM waitstates like mephisto_modular?
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Undocumented buttons:
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- holding ENTER and LEFT cursor on boot runs diagnostics
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- holding CLEAR on boot clears battery backed RAM
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TODO:
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- does it have ROM waitstates like mephisto_modular?
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******************************************************************************/
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#include "emu.h"
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@ -5,34 +5,47 @@
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Saitek RISC 2500, Mephisto Montreux
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The chess engine is also compatible with Tasc's The ChessMachine software.
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The hardware+software appears to have been subcontracted to Tasc. It has similarities
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with Tasc R30, PCB label and Montreux repair manual schematics footnotes say TASC23C.
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The hardware+software appears to have been subcontracted to Tasc. It has
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similarities with Tasc R30.
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To make sure it continues the game at next power-on, press the OFF button before
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exiting MAME. If nvram is broken somehow, boot with the BACK button held down.
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Hardware notes:
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- PCB label: TASC23C
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- ARM2 CPU(VY86C010) @ 14.16MHz
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- 128KB ROM, 128KB RAM*
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- SED1520, custom LCD screen
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- 8*8 chessboard buttons, 16 leds, piezo
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*: Sold with 128KB RAM by default. This can be easily increased up to 2MB
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by the user(chesscomputer owner, but also the MAME user in this case).
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The manual also says that RAM is expandable.
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According to Saitek's repair manual, there is a GAL and a clock frequency
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divider chip, ROM access goes through it. This allows reading from slow EPROM
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while the chess engine resides in faster RAM. The piezo output routine is
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also in ROM, it would be way too high-pitched at full speed.
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Undocumented buttons:
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- hold LEFT+RIGHT on boot to start the QC TestMode
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- hold UP+DOWN on boot to start the TestMode
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TODO:
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- bootrom disable timer shouldn't be needed, real ARM has already fetched the next opcode
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- Sound is too short and high pitched, better when you underclock the cpu.
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Is cpu cycle timing wrong? I suspect conditional branch timing due to cache miss
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(pipeline has to refill). The delay loop between writing to the speaker is simply:
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SUBS R2, R2, #$1, BNE $2000cd8
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- more accurate dynamic cpu clock divider (without the cost of emulation speed)
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******************************************************************************/
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#include "emu.h"
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#include "cpu/arm/arm.h"
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#include "machine/ram.h"
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#include "machine/nvram.h"
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#include "machine/ram.h"
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#include "machine/sensorboard.h"
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#include "machine/timer.h"
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#include "video/sed1520.h"
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#include "sound/dac.h"
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#include "sound/spkrdev.h"
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#include "emupal.h"
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#include "screen.h"
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@ -54,7 +67,7 @@ public:
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, m_ram(*this, "ram")
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, m_nvram(*this, "nvram")
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, m_disable_bootrom(*this, "disable_bootrom")
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, m_dac(*this, "dac")
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, m_speaker(*this, "speaker")
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, m_lcdc(*this, "lcdc")
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, m_board(*this, "board")
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, m_inputs(*this, "P%u", 0)
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@ -79,7 +92,7 @@ private:
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required_device<ram_device> m_ram;
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required_device<nvram_device> m_nvram;
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required_device<timer_device> m_disable_bootrom;
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required_device<dac_byte_interface> m_dac;
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required_device<speaker_sound_device> m_speaker;
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required_device<sed1520_device> m_lcdc;
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required_device<sensorboard_device> m_board;
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required_ioport_array<8> m_inputs;
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@ -93,6 +106,7 @@ private:
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SED1520_UPDATE_CB(screen_update_cb);
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u32 input_r();
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void control_w(u32 data);
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u32 rom_r(offs_t offset);
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void power_off();
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u32 disable_boot_rom_r();
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@ -100,8 +114,10 @@ private:
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TIMER_DEVICE_CALLBACK_MEMBER(disable_bootrom) { install_bootrom(false); }
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bool m_bootrom_enabled = false;
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u32 m_control = 0;
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bool m_power = false;
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u32 m_control = 0;
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u32 m_prev_pc = 0;
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u64 m_prev_cycle = 0;
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};
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void risc2500_state::machine_start()
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@ -116,6 +132,8 @@ void risc2500_state::machine_start()
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save_item(NAME(m_power));
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save_item(NAME(m_bootrom_enabled));
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save_item(NAME(m_control));
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save_item(NAME(m_prev_pc));
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save_item(NAME(m_prev_cycle));
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}
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void risc2500_state::machine_reset()
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@ -124,6 +142,8 @@ void risc2500_state::machine_reset()
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m_power = true;
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m_control = 0;
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m_prev_pc = m_maincpu->pc();
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m_prev_cycle = m_maincpu->total_cycles();
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}
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@ -190,10 +210,10 @@ SED1520_UPDATE_CB(risc2500_state::screen_update_cb)
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void risc2500_state::install_bootrom(bool enable)
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{
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address_space &program = m_maincpu->space(AS_PROGRAM);
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program.unmap_readwrite(0, std::max(m_rom.bytes(), size_t(m_ram->size()) - 1));
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program.unmap_readwrite(0, std::max(m_rom.bytes(), size_t(m_ram->size())) - 1);
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if (enable)
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program.install_rom(0, m_rom.bytes() - 1, m_rom);
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program.install_read_handler(0, m_rom.bytes() - 1, read32sm_delegate(*this, FUNC(risc2500_state::rom_r)));
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else
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program.install_ram(0, m_ram->size() - 1, m_ram->pointer());
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@ -238,7 +258,7 @@ void risc2500_state::power_off()
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u32 risc2500_state::input_r()
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{
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u32 data = 0;
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u32 data = (u32)m_lcdc->status_read() << 16;
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for (int i = 0; i < 8; i++)
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{
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@ -249,7 +269,10 @@ u32 risc2500_state::input_r()
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}
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}
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return data | ((u32)m_lcdc->status_read() << 16);
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if (!machine().side_effects_disabled())
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m_maincpu->set_input_line(ARM_FIRQ_LINE, CLEAR_LINE);
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return data;
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}
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void risc2500_state::control_w(u32 data)
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@ -278,7 +301,7 @@ void risc2500_state::control_w(u32 data)
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}
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// speaker
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m_dac->write(data >> 28 & 3);
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m_speaker->level_w(data >> 28 & 3);
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// power-off
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if (BIT(m_control & ~data, 24))
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@ -287,6 +310,38 @@ void risc2500_state::control_w(u32 data)
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m_control = data;
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}
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u32 risc2500_state::rom_r(offs_t offset)
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{
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if (!machine().side_effects_disabled())
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{
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// handle dynamic cpu clock divider when accessing rom
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u64 cur_cycle = m_maincpu->total_cycles();
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u64 prev_cycle = m_prev_cycle;
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s64 diff = cur_cycle - prev_cycle;
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u32 pc = m_maincpu->pc();
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u32 prev_pc = m_prev_pc;
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m_prev_pc = pc;
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if (diff >= 0)
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{
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static constexpr int arm_branch_cycles = 3;
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static constexpr int arm_max_cycles = 17; // block data transfer
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static constexpr int divider = -8 + 1;
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// this takes care of almost all cases, otherwise, total cycles taken can't be determined
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if (diff <= arm_branch_cycles || (diff <= arm_max_cycles && (pc - prev_pc) == 4 && (pc & ~0x02000000) == (offset * 4)))
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m_maincpu->adjust_icount(divider * (int)diff);
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else
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m_maincpu->adjust_icount(divider);
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}
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m_prev_cycle = m_maincpu->total_cycles();
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}
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return m_rom[offset];
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}
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/******************************************************************************
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@ -297,7 +352,7 @@ void risc2500_state::risc2500_mem(address_map &map)
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{
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map(0x01800000, 0x01800003).r(FUNC(risc2500_state::disable_boot_rom_r));
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map(0x01000000, 0x01000003).rw(FUNC(risc2500_state::input_r), FUNC(risc2500_state::control_w));
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map(0x02000000, 0x0203ffff).rom().region("maincpu", 0);
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map(0x02000000, 0x0203ffff).r(FUNC(risc2500_state::rom_r));
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}
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@ -353,15 +408,17 @@ INPUT_PORTS_END
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void risc2500_state::risc2500(machine_config &config)
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{
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/* basic machine hardware */
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ARM(config, m_maincpu, 28.322_MHz_XTAL / 2); // VY86C010
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ARM(config, m_maincpu, 28.322_MHz_XTAL / 2);
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m_maincpu->set_addrmap(AS_PROGRAM, &risc2500_state::risc2500_mem);
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m_maincpu->set_copro_type(arm_cpu_device::copro_type::VL86C020);
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m_maincpu->set_periodic_int(FUNC(risc2500_state::irq1_line_hold), attotime::from_hz(32.768_kHz_XTAL/128)); // 256Hz
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const attotime irq_period = attotime::from_hz(32.768_kHz_XTAL / 128); // 256Hz
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m_maincpu->set_periodic_int(FUNC(risc2500_state::irq1_line_assert), irq_period);
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TIMER(config, "disable_bootrom").configure_generic(FUNC(risc2500_state::disable_bootrom));
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RAM(config, m_ram).set_extra_options("128K, 256K, 512K, 1M, 2M");
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m_ram->set_default_size("2M");
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m_ram->set_default_size("128K");
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m_ram->set_default_value(0);
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NVRAM(config, "nvram", nvram_device::DEFAULT_NONE);
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@ -389,8 +446,10 @@ void risc2500_state::risc2500(machine_config &config)
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m_lcdc->set_screen_update_cb(FUNC(risc2500_state::screen_update_cb));
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/* sound hardware */
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SPEAKER(config, "speaker").front_center();
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DAC_2BIT_BINARY_WEIGHTED_ONES_COMPLEMENT(config, m_dac).add_route(ALL_OUTPUTS, "speaker", 0.25);
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SPEAKER(config, "mono").front_center();
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static const double speaker_levels[4] = { 0.0, 1.0, -1.0, 0.0 };
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SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.25);
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m_speaker->set_levels(4, speaker_levels);
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}
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@ -423,7 +482,7 @@ ROM_END
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******************************************************************************/
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// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY, FULLNAME, FLAGS
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CONS( 1992, risc2500, 0, 0, risc2500, risc2500, risc2500_state, empty_init, "Saitek / Tasc", "Kasparov RISC 2500 (v1.04)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_SOUND )
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CONS( 1992, risc2500a, risc2500, 0, risc2500, risc2500, risc2500_state, empty_init, "Saitek / Tasc", "Kasparov RISC 2500 (v1.03)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_SOUND )
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CONS( 1992, risc2500, 0, 0, risc2500, risc2500, risc2500_state, empty_init, "Saitek / Tasc", "Kasparov RISC 2500 (v1.04)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
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CONS( 1992, risc2500a, risc2500, 0, risc2500, risc2500, risc2500_state, empty_init, "Saitek / Tasc", "Kasparov RISC 2500 (v1.03)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
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CONS( 1995, montreux, 0, 0, risc2500, risc2500, risc2500_state, empty_init, "Saitek / Tasc", "Mephisto Montreux", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_SOUND ) // after Saitek bought Hegener + Glaser
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CONS( 1995, montreux, 0, 0, risc2500, risc2500, risc2500_state, empty_init, "Saitek / Tasc", "Mephisto Montreux", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // after Saitek bought Hegener + Glaser
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@ -8,6 +8,9 @@ Commonly known as Tasc R30, it's basically a dedicated ChessMachine.
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The King chess engines are also compatible with Tasc's The ChessMachine software
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on PC, however the prototype Gideon 2.1(internally: Rebel 2.01) is not.
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WARNING: Don't configure more than 512KB RAM for R30 The King 2.50, it will still
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be playable but will actually use less than 512KB RAM and become weaker.
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The King 2.23 version was not released to the public. It has an opening book
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meant for chesscomputer competitions.
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For more information, see: http://chesseval.com/ChessEvalJournal/R30v223.htm
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@ -24,6 +27,14 @@ R40 hardware notes:
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- +512KB extra RAM piggybacked
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- rest same as R30
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EPROMs are interchangable between R30 and R40, with some limitations with
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The King 2.50 (see below).
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Regarding RAM: The King 2.2x will work fine with RAM expanded up to 8MB.
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The King 2.50 appears to be protected against RAM upgrades though, and will
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limit itself to 128KB if it detects a non-default amount of RAM. Gideon doesn't
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use RAM above 128KB either, perhaps the R30 prototype only had 128KB RAM.
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Documentation for the Toshiba chips is hard to find, but similar chips exist:
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T7778 is equivalent to T6A39, T7900 is equivalent to T6A40.
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@ -39,7 +50,8 @@ notes:
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TODO:
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- bootrom disable timer shouldn't be needed, real ARM has already fetched the next opcode
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- sound is too high pitched, same problem as in risc2500
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- more accurate dynamic cpu clock divider (same problem as in saitek_risc2500.cpp),
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sound pitch is correct now though
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******************************************************************************/
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@ -48,10 +60,11 @@ TODO:
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#include "cpu/arm/arm.h"
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#include "machine/bankdev.h"
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#include "machine/nvram.h"
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#include "machine/ram.h"
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#include "machine/smartboard.h"
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#include "machine/timer.h"
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#include "video/t6963c.h"
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#include "sound/dac.h"
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#include "sound/spkrdev.h"
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#include "speaker.h"
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@ -68,10 +81,10 @@ public:
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driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_rom(*this, "maincpu"),
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m_mainram(*this, "mainram"),
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m_ram(*this, "ram"),
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m_lcd(*this, "lcd"),
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m_smartboard(*this, "smartboard"),
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m_dac(*this, "dac"),
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m_speaker(*this, "speaker"),
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m_disable_bootrom(*this, "disable_bootrom"),
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m_inputs(*this, "IN.%u", 0U),
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m_out_leds(*this, "pled%u", 0U)
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@ -79,19 +92,21 @@ public:
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void tasc(machine_config &config);
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DECLARE_INPUT_CHANGED_MEMBER(switch_cpu_freq) { set_cpu_freq(); }
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protected:
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virtual void machine_start() override;
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virtual void machine_reset() override { install_bootrom(true); }
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virtual void machine_reset() override;
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virtual void device_post_load() override { install_bootrom(m_bootrom_enabled); }
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private:
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// devices/pointers
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required_device<arm_cpu_device> m_maincpu;
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required_region_ptr<u32> m_rom;
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required_shared_ptr<u32> m_mainram;
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required_device<ram_device> m_ram;
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required_device<lm24014h_device> m_lcd;
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required_device<tasc_sb30_device> m_smartboard;
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required_device<dac_byte_interface> m_dac;
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required_device<speaker_sound_device> m_speaker;
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required_device<timer_device> m_disable_bootrom;
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required_ioport_array<4> m_inputs;
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output_finder<2> m_out_leds;
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@ -101,14 +116,17 @@ private:
|
||||
|
||||
// I/O handlers
|
||||
u32 input_r();
|
||||
u32 rom_r(offs_t offset);
|
||||
void control_w(offs_t offset, u32 data, u32 mem_mask = ~0);
|
||||
|
||||
void set_cpu_freq();
|
||||
void install_bootrom(bool enable);
|
||||
void disable_bootrom_next();
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(disable_bootrom) { install_bootrom(false); }
|
||||
bool m_bootrom_enabled = false;
|
||||
|
||||
u32 m_control = 0;
|
||||
u32 m_prev_pc = 0;
|
||||
u64 m_prev_cycle = 0;
|
||||
};
|
||||
|
||||
void tasc_state::machine_start()
|
||||
@ -117,6 +135,23 @@ void tasc_state::machine_start()
|
||||
|
||||
save_item(NAME(m_bootrom_enabled));
|
||||
save_item(NAME(m_control));
|
||||
save_item(NAME(m_prev_pc));
|
||||
save_item(NAME(m_prev_cycle));
|
||||
}
|
||||
|
||||
void tasc_state::machine_reset()
|
||||
{
|
||||
install_bootrom(true);
|
||||
set_cpu_freq();
|
||||
|
||||
m_prev_pc = m_maincpu->pc();
|
||||
m_prev_cycle = m_maincpu->total_cycles();
|
||||
}
|
||||
|
||||
void tasc_state::set_cpu_freq()
|
||||
{
|
||||
// R30 is 30MHz, R40 is 40MHz
|
||||
m_maincpu->set_unscaled_clock((ioport("FAKE")->read() & 1) ? 40_MHz_XTAL : 30_MHz_XTAL);
|
||||
}
|
||||
|
||||
|
||||
@ -125,34 +160,30 @@ void tasc_state::machine_start()
|
||||
I/O
|
||||
******************************************************************************/
|
||||
|
||||
// bootrom bankswitch
|
||||
|
||||
void tasc_state::install_bootrom(bool enable)
|
||||
{
|
||||
address_space &program = m_maincpu->space(AS_PROGRAM);
|
||||
program.unmap_readwrite(0, std::max(m_rom.bytes(), m_mainram.bytes()) - 1);
|
||||
program.unmap_readwrite(0, std::max(m_rom.bytes(), size_t(m_ram->size())) - 1);
|
||||
|
||||
// bootrom bankswitch
|
||||
if (enable)
|
||||
program.install_rom(0, m_rom.bytes() - 1, m_rom);
|
||||
program.install_read_handler(0, m_rom.bytes() - 1, read32sm_delegate(*this, FUNC(tasc_state::rom_r)));
|
||||
else
|
||||
program.install_ram(0, m_mainram.bytes() - 1, m_mainram);
|
||||
program.install_ram(0, m_ram->size() - 1, m_ram->pointer());
|
||||
|
||||
m_bootrom_enabled = enable;
|
||||
}
|
||||
|
||||
void tasc_state::disable_bootrom_next()
|
||||
{
|
||||
// disconnect bootrom from the bus after next opcode
|
||||
if (m_bootrom_enabled && !m_disable_bootrom->enabled() && !machine().side_effects_disabled())
|
||||
m_disable_bootrom->adjust(m_maincpu->cycles_to_attotime(5));
|
||||
}
|
||||
|
||||
|
||||
// main I/O
|
||||
|
||||
u32 tasc_state::input_r()
|
||||
{
|
||||
disable_bootrom_next();
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
// disconnect bootrom from the bus after next opcode
|
||||
if (m_bootrom_enabled && !m_disable_bootrom->enabled())
|
||||
m_disable_bootrom->adjust(m_maincpu->cycles_to_attotime(5));
|
||||
|
||||
m_maincpu->set_input_line(ARM_FIRQ_LINE, CLEAR_LINE);
|
||||
}
|
||||
|
||||
// read chessboard
|
||||
u32 data = m_smartboard->data_r();
|
||||
@ -181,12 +212,44 @@ void tasc_state::control_w(offs_t offset, u32 data, u32 mem_mask)
|
||||
{
|
||||
m_out_leds[0] = BIT(data, 0);
|
||||
m_out_leds[1] = BIT(data, 1);
|
||||
m_dac->write((data >> 2) & 3);
|
||||
m_speaker->level_w((data >> 2) & 3);
|
||||
}
|
||||
|
||||
COMBINE_DATA(&m_control);
|
||||
}
|
||||
|
||||
u32 tasc_state::rom_r(offs_t offset)
|
||||
{
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
// handle dynamic cpu clock divider when accessing rom
|
||||
u64 cur_cycle = m_maincpu->total_cycles();
|
||||
u64 prev_cycle = m_prev_cycle;
|
||||
s64 diff = cur_cycle - prev_cycle;
|
||||
|
||||
u32 pc = m_maincpu->pc();
|
||||
u32 prev_pc = m_prev_pc;
|
||||
m_prev_pc = pc;
|
||||
|
||||
if (diff >= 0)
|
||||
{
|
||||
static constexpr int arm_branch_cycles = 3;
|
||||
static constexpr int arm_max_cycles = 17; // block data transfer
|
||||
static constexpr int divider = -7 + 1;
|
||||
|
||||
// this takes care of almost all cases, otherwise, total cycles taken can't be determined
|
||||
if (diff <= arm_branch_cycles || (diff <= arm_max_cycles && (pc - prev_pc) == 4 && (pc & ~0x02000000) == (offset * 4)))
|
||||
m_maincpu->adjust_icount(divider * (int)diff);
|
||||
else
|
||||
m_maincpu->adjust_icount(divider);
|
||||
}
|
||||
|
||||
m_prev_cycle = m_maincpu->total_cycles();
|
||||
}
|
||||
|
||||
return m_rom[offset];
|
||||
}
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
@ -195,9 +258,8 @@ void tasc_state::control_w(offs_t offset, u32 data, u32 mem_mask)
|
||||
|
||||
void tasc_state::main_map(address_map &map)
|
||||
{
|
||||
map(0x00000000, 0x0007ffff).ram().share("mainram");
|
||||
map(0x01000000, 0x01000003).rw(FUNC(tasc_state::input_r), FUNC(tasc_state::control_w));
|
||||
map(0x02000000, 0x0203ffff).rom().region("maincpu", 0);
|
||||
map(0x02000000, 0x0203ffff).r(FUNC(tasc_state::rom_r));
|
||||
map(0x03000000, 0x0307ffff).m("nvram_map", FUNC(address_map_bank_device::amap8)).umask32(0x000000ff);
|
||||
}
|
||||
|
||||
@ -233,6 +295,11 @@ static INPUT_PORTS_START( tasc )
|
||||
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_ENTER) PORT_NAME("ENTER")
|
||||
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_DOWN) PORT_NAME("DOWN")
|
||||
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_R) PORT_NAME("Right Clock")
|
||||
|
||||
PORT_START("FAKE")
|
||||
PORT_CONFNAME( 0x01, 0x00, "CPU Frequency" ) PORT_CHANGED_MEMBER(DEVICE_SELF, tasc_state, switch_cpu_freq, 0)
|
||||
PORT_CONFSETTING( 0x00, "30MHz (R30)" )
|
||||
PORT_CONFSETTING( 0x01, "40MHz (R40)" )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
@ -247,10 +314,16 @@ void tasc_state::tasc(machine_config &config)
|
||||
ARM(config, m_maincpu, 30_MHz_XTAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &tasc_state::main_map);
|
||||
m_maincpu->set_copro_type(arm_cpu_device::copro_type::VL86C020);
|
||||
m_maincpu->set_periodic_int(FUNC(tasc_state::irq1_line_hold), attotime::from_hz(32.768_kHz_XTAL/128)); // 256Hz
|
||||
|
||||
const attotime irq_period = attotime::from_hz(32.768_kHz_XTAL / 128); // 256Hz
|
||||
m_maincpu->set_periodic_int(FUNC(tasc_state::irq1_line_assert), irq_period);
|
||||
|
||||
TIMER(config, "disable_bootrom").configure_generic(FUNC(tasc_state::disable_bootrom));
|
||||
|
||||
RAM(config, m_ram).set_extra_options("512K, 1M, 2M, 4M, 8M"); // see driver notes
|
||||
m_ram->set_default_size("512K");
|
||||
m_ram->set_default_value(0);
|
||||
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
ADDRESS_MAP_BANK(config, "nvram_map").set_map(&tasc_state::nvram_map).set_options(ENDIANNESS_LITTLE, 8, 17);
|
||||
|
||||
@ -264,8 +337,10 @@ void tasc_state::tasc(machine_config &config)
|
||||
config.set_default_layout(layout_tascr30);
|
||||
|
||||
/* sound hardware */
|
||||
SPEAKER(config, "speaker").front_center();
|
||||
DAC_2BIT_BINARY_WEIGHTED_ONES_COMPLEMENT(config, m_dac).add_route(ALL_OUTPUTS, "speaker", 0.25);
|
||||
SPEAKER(config, "mono").front_center();
|
||||
static const double speaker_levels[4] = { 0.0, 1.0, -1.0, 0.0 };
|
||||
SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.25);
|
||||
m_speaker->set_levels(4, speaker_levels);
|
||||
}
|
||||
|
||||
|
||||
@ -307,7 +382,7 @@ ROM_END
|
||||
******************************************************************************/
|
||||
|
||||
// YEAR NAME PARENT CMP MACHINE INPUT CLASS INIT COMPANY, FULLNAME, FLAGS
|
||||
CONS( 1995, tascr30, 0, 0, tasc, tasc, tasc_state, empty_init, "Tasc", "ChessSystem R30 (The King 2.50)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_SOUND )
|
||||
CONS( 1993, tascr30a, tascr30, 0, tasc, tasc, tasc_state, empty_init, "Tasc", "ChessSystem R30 (The King 2.20)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_SOUND )
|
||||
CONS( 1993, tascr30b, tascr30, 0, tasc, tasc, tasc_state, empty_init, "Tasc", "ChessSystem R30 (The King 2.23, TM version)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_SOUND ) // competed in several chesscomputer tournaments
|
||||
CONS( 1993, tascr30g, tascr30, 0, tasc, tasc, tasc_state, empty_init, "Tasc", "ChessSystem R30 (Gideon 2.1, prototype)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_SOUND ) // made in 1993, later released in 2012
|
||||
CONS( 1995, tascr30, 0, 0, tasc, tasc, tasc_state, empty_init, "Tasc", "ChessSystem R30 (The King 2.50)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1993, tascr30a, tascr30, 0, tasc, tasc, tasc_state, empty_init, "Tasc", "ChessSystem R30 (The King 2.20)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1993, tascr30b, tascr30, 0, tasc, tasc, tasc_state, empty_init, "Tasc", "ChessSystem R30 (The King 2.23, TM version)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // competed in several chesscomputer tournaments
|
||||
CONS( 1993, tascr30g, tascr30, 0, tasc, tasc, tasc_state, empty_init, "Tasc", "ChessSystem R30 (Gideon 2.1, prototype)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // made in 1993, later released in 2012
|
||||
|
||||
Loading…
Reference in New Issue
Block a user