mirror of
https://github.com/holub/mame
synced 2025-05-21 21:29:15 +03:00
More cleanup. Added address-space-specific constants for the various
bus width and shift CPU interface constants. Changed all the cores to use them. Minor spacing cleanup in Z80, Z180, TMS34010, ADSP21xx cores. Changed ADSP21xx cores to accept a configuration struct instead of using set_info to specify serial port callbacks. Simplified the ADSP21xx get/set info significantly. Removed support for only including certain variants of the chips; they are now either all supported or all unsupported.
This commit is contained in:
parent
bc33516388
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9be5d30f20
@ -385,7 +385,6 @@ static void wr_px(adsp2100_state *adsp, INT32 val) { adsp->px = val; }
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static void wr_ifc(adsp2100_state *adsp, INT32 val)
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{
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adsp->ifc = val;
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#if (HAS_ADSP2181)
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if (adsp->chip_type >= CHIP_TYPE_ADSP2181)
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{
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/* clear timer */
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@ -406,7 +405,6 @@ static void wr_ifc(adsp2100_state *adsp, INT32 val)
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if (val & 0x8000) adsp->irq_latch[ADSP2181_IRQ2] = 1;
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}
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else
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#endif
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{
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/* clear timer */
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if (val & 0x002) adsp->irq_latch[ADSP2101_IRQ0] = 0;
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@ -548,7 +548,6 @@ static void check_irqs(adsp2100_state *adsp)
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{
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UINT8 check;
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#if (HAS_ADSP2181)
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if (adsp->chip_type >= CHIP_TYPE_ADSP2181)
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{
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/* check IRQ2 */
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@ -598,9 +597,7 @@ static void check_irqs(adsp2100_state *adsp)
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if (check && adsp2181_generate_irq(adsp, ADSP2181_TIMER, 9))
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return;
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}
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else
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#endif
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if (adsp->chip_type >= CHIP_TYPE_ADSP2101)
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else if (adsp->chip_type >= CHIP_TYPE_ADSP2101)
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{
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/* check IRQ2 */
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check = (adsp->icntl & 4) ? adsp->irq_latch[ADSP2101_IRQ2] : adsp->irq_state[ADSP2101_IRQ2];
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@ -675,6 +672,7 @@ static void set_irq_line(adsp2100_state *adsp, int irqline, int state)
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static adsp2100_state *adsp21xx_init(const device_config *device, cpu_irq_callback irqcallback, int chiptype)
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{
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const adsp21xx_config *config = device->static_config;
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adsp2100_state *adsp = device->token;
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/* create the tables */
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@ -685,10 +683,19 @@ static adsp2100_state *adsp21xx_init(const device_config *device, cpu_irq_callba
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adsp->chip_type = chiptype;
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adsp->irq_callback = irqcallback;
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/* fetch device parameters */
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adsp->device = device;
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adsp->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
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adsp->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA);
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adsp->io = cpu_get_address_space(device, ADDRESS_SPACE_IO);
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/* copy function pointers from the config */
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if (config != NULL)
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{
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adsp->sport_rx_callback = config->rx;
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adsp->sport_tx_callback = config->tx;
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adsp->timer_fired = config->timer;
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}
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/* set up the state table */
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adsp->state = state_table_template;
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@ -1834,8 +1841,18 @@ static CPU_SET_INFO( adsp21xx )
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switch (state)
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{
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/* --- the following bits of info are set as 64-bit signed integers --- */
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case CPUINFO_INT_PC: adsp->pc = info->i; break;
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case CPUINFO_INT_SP: adsp->pc_sp = info->i; break;
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case CPUINFO_INT_INPUT_STATE + 0:
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case CPUINFO_INT_INPUT_STATE + 1:
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case CPUINFO_INT_INPUT_STATE + 2:
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case CPUINFO_INT_INPUT_STATE + 3:
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case CPUINFO_INT_INPUT_STATE + 4:
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case CPUINFO_INT_INPUT_STATE + 5:
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case CPUINFO_INT_INPUT_STATE + 6:
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case CPUINFO_INT_INPUT_STATE + 7:
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case CPUINFO_INT_INPUT_STATE + 8:
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case CPUINFO_INT_INPUT_STATE + 9:
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set_irq_line(adsp, state - CPUINFO_INT_INPUT_STATE, info->i);
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break;
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}
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}
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@ -1854,7 +1871,7 @@ static CPU_GET_INFO( adsp21xx )
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case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(adsp2100_state); break;
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case CPUINFO_INT_INPUT_LINES: /* set per CPU */ break;
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case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
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case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
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case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
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case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
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case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
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case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
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@ -1862,29 +1879,36 @@ static CPU_GET_INFO( adsp21xx )
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case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
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case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
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case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
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case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 14; break;
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case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -2; break;
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case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 16; break;
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case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 14; break;
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case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = -1; break;
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case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
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case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
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case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
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case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
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case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 14; break;
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case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -2; break;
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case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 16; break;
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case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 14; break;
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case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break;
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case CPUINFO_INT_PREVIOUSPC: info->i = adsp->ppc; break;
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case CPUINFO_INT_PC: info->i = adsp->pc; break;
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case CPUINFO_INT_SP: info->i = adsp->pc_sp; break;
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case CPUINFO_INT_INPUT_STATE + 0:
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case CPUINFO_INT_INPUT_STATE + 1:
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case CPUINFO_INT_INPUT_STATE + 2:
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case CPUINFO_INT_INPUT_STATE + 3:
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case CPUINFO_INT_INPUT_STATE + 4:
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case CPUINFO_INT_INPUT_STATE + 5:
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case CPUINFO_INT_INPUT_STATE + 6:
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case CPUINFO_INT_INPUT_STATE + 7:
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case CPUINFO_INT_INPUT_STATE + 8:
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case CPUINFO_INT_INPUT_STATE + 9:
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info->i = adsp->irq_state[state - CPUINFO_INT_INPUT_STATE];
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break;
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/* --- the following bits of info are returned as pointers to data or functions --- */
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case CPUINFO_FCT_SET_INFO: /* set per CPU */ break;
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case CPUINFO_FCT_INIT: /* set per CPU */ break;
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case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(adsp21xx); break;
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case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(adsp21xx); break;
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case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(adsp21xx); break;
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case CPUINFO_FCT_BURN: info->burn = NULL; break;
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case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(adsp21xx); break;
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case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(adsp21xx); break;
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/* --- the following bits of info are returned as pointers to functions --- */
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case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp21xx); break;
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case CPUINFO_FCT_INIT: /* set per CPU */ break;
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case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(adsp21xx); break;
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case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(adsp21xx); break;
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case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(adsp21xx); break;
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case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(adsp21xx); break;
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case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(adsp21xx); break;
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/* --- the following bits of info are returned as pointers --- */
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case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &adsp->icount; break;
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case CPUINFO_PTR_STATE_TABLE: info->state_table = &adsp->state; break;
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@ -1909,7 +1933,6 @@ static CPU_GET_INFO( adsp21xx )
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}
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}
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#if (HAS_ADSP2104||HAS_ADSP2105||HAS_ADSP2115||HAS_ADSP2181)
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static void adsp21xx_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
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{
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/* see how many words we need to copy */
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@ -1921,9 +1944,8 @@ static void adsp21xx_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
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dstdata[i] = opcode;
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}
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}
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#endif
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#if (HAS_ADSP2100)
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/**************************************************************************
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* ADSP2100 section
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**************************************************************************/
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@ -1935,51 +1957,25 @@ static CPU_INIT( adsp2100 )
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adsp->imask_mask = 0x0f;
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}
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static CPU_SET_INFO( adsp2100 )
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{
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adsp2100_state *adsp = device->token;
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switch (state)
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{
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/* --- the following bits of info are set as 64-bit signed integers --- */
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case CPUINFO_INT_INPUT_STATE + ADSP2100_IRQ0: set_irq_line(adsp, ADSP2100_IRQ0, info->i); break;
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case CPUINFO_INT_INPUT_STATE + ADSP2100_IRQ1: set_irq_line(adsp, ADSP2100_IRQ1, info->i); break;
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case CPUINFO_INT_INPUT_STATE + ADSP2100_IRQ2: set_irq_line(adsp, ADSP2100_IRQ2, info->i); break;
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case CPUINFO_INT_INPUT_STATE + ADSP2100_IRQ3: set_irq_line(adsp, ADSP2100_IRQ3, info->i); break;
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default:
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CPU_SET_INFO_CALL(adsp21xx);
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break;
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}
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}
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CPU_GET_INFO( adsp2100 )
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{
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adsp2100_state *adsp = (device != NULL) ? device->token : NULL;
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switch (state)
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{
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/* --- the following bits of info are returned as 64-bit signed integers --- */
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case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
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case CPUINFO_INT_INPUT_STATE + ADSP2100_IRQ0: info->i = adsp->irq_state[ADSP2100_IRQ0]; break;
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case CPUINFO_INT_INPUT_STATE + ADSP2100_IRQ1: info->i = adsp->irq_state[ADSP2100_IRQ1]; break;
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case CPUINFO_INT_INPUT_STATE + ADSP2100_IRQ2: info->i = adsp->irq_state[ADSP2100_IRQ2]; break;
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case CPUINFO_INT_INPUT_STATE + ADSP2100_IRQ3: info->i = adsp->irq_state[ADSP2100_IRQ3]; break;
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case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
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/* --- the following bits of info are returned as pointers to data or functions --- */
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case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(adsp2100); break;
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case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp2100); break;
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case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(adsp2100); break;
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/* --- the following bits of info are returned as NULL-terminated strings --- */
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case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2100"); break;
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case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2100"); break;
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default:
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CPU_GET_INFO_CALL(adsp21xx);
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break;
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}
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}
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#endif
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#if (HAS_ADSP2101)
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/**************************************************************************
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* ADSP2101 section
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**************************************************************************/
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@ -1991,64 +1987,25 @@ static CPU_INIT( adsp2101 )
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adsp->imask_mask = 0x3f;
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}
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static CPU_SET_INFO( adsp2101 )
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{
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adsp2100_state *adsp = device->token;
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switch (state)
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{
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/* --- the following bits of info are set as 64-bit signed integers --- */
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case CPUINFO_INT_INPUT_STATE + ADSP2101_IRQ0: set_irq_line(adsp, ADSP2101_IRQ0, info->i); break;
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case CPUINFO_INT_INPUT_STATE + ADSP2101_IRQ1: set_irq_line(adsp, ADSP2101_IRQ1, info->i); break;
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case CPUINFO_INT_INPUT_STATE + ADSP2101_IRQ2: set_irq_line(adsp, ADSP2101_IRQ2, info->i); break;
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case CPUINFO_INT_INPUT_STATE + ADSP2101_SPORT0_RX:set_irq_line(adsp, ADSP2101_SPORT0_RX, info->i); break;
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case CPUINFO_INT_INPUT_STATE + ADSP2101_SPORT0_TX:set_irq_line(adsp, ADSP2101_SPORT0_TX, info->i); break;
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case CPUINFO_INT_INPUT_STATE + ADSP2101_TIMER: set_irq_line(adsp, ADSP2101_TIMER, info->i); break;
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/* --- the following bits of info are set as pointers to data or functions --- */
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case CPUINFO_FCT_ADSP2100_RX_HANDLER: adsp->sport_rx_callback = (adsp21xx_rx_func)info->f; break;
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case CPUINFO_FCT_ADSP2100_TX_HANDLER: adsp->sport_tx_callback = (adsp21xx_tx_func)info->f; break;
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case CPUINFO_FCT_ADSP2100_TIMER_HANDLER: adsp->timer_fired = (adsp21xx_timer_func)info->f; break;
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default:
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CPU_SET_INFO_CALL(adsp21xx);
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break;
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}
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}
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CPU_GET_INFO( adsp2101 )
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{
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adsp2100_state *adsp = (device != NULL) ? device->token : NULL;
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switch (state)
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{
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/* --- the following bits of info are returned as 64-bit signed integers --- */
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case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
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case CPUINFO_INT_INPUT_STATE + ADSP2101_IRQ0: info->i = adsp->irq_state[ADSP2101_IRQ0]; break;
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case CPUINFO_INT_INPUT_STATE + ADSP2101_IRQ1: info->i = adsp->irq_state[ADSP2101_IRQ1]; break;
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case CPUINFO_INT_INPUT_STATE + ADSP2101_IRQ2: info->i = adsp->irq_state[ADSP2101_IRQ2]; break;
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case CPUINFO_INT_INPUT_STATE + ADSP2101_SPORT0_RX:info->i = adsp->irq_state[ADSP2101_SPORT0_RX];break;
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case CPUINFO_INT_INPUT_STATE + ADSP2101_SPORT0_TX:info->i = adsp->irq_state[ADSP2101_SPORT0_TX];break;
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case CPUINFO_INT_INPUT_STATE + ADSP2101_TIMER: info->i = adsp->irq_state[ADSP2101_TIMER]; break;
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case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
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/* --- the following bits of info are returned as pointers to data or functions --- */
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case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(adsp2101); break;
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case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp2101); break;
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case CPUINFO_FCT_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break;
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case CPUINFO_FCT_ADSP2100_TX_HANDLER: info->f = (genf *)adsp->sport_tx_callback; break;
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case CPUINFO_FCT_ADSP2100_TIMER_HANDLER: info->f = (genf *)adsp->timer_fired; break;
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case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(adsp2101); break;
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/* --- the following bits of info are returned as NULL-terminated strings --- */
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case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2101"); break;
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case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2101"); break;
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default:
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CPU_GET_INFO_CALL(adsp21xx);
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break;
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}
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}
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#endif
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#if (HAS_ADSP2104)
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/**************************************************************************
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* ADSP2104 section
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**************************************************************************/
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@ -2065,64 +2022,25 @@ void adsp2104_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
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adsp21xx_load_boot_data(srcdata, dstdata);
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}
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static CPU_SET_INFO( adsp2104 )
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{
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adsp2100_state *adsp = device->token;
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switch (state)
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{
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/* --- the following bits of info are set as 64-bit signed integers --- */
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case CPUINFO_INT_INPUT_STATE + ADSP2104_IRQ0: set_irq_line(adsp, ADSP2104_IRQ0, info->i); break;
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case CPUINFO_INT_INPUT_STATE + ADSP2104_IRQ1: set_irq_line(adsp, ADSP2104_IRQ1, info->i); break;
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case CPUINFO_INT_INPUT_STATE + ADSP2104_IRQ2: set_irq_line(adsp, ADSP2104_IRQ2, info->i); break;
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case CPUINFO_INT_INPUT_STATE + ADSP2104_SPORT0_RX:set_irq_line(adsp, ADSP2104_SPORT0_RX, info->i); break;
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case CPUINFO_INT_INPUT_STATE + ADSP2104_SPORT0_TX:set_irq_line(adsp, ADSP2104_SPORT0_TX, info->i); break;
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case CPUINFO_INT_INPUT_STATE + ADSP2104_TIMER: set_irq_line(adsp, ADSP2104_TIMER, info->i); break;
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/* --- the following bits of info are set as pointers to data or functions --- */
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case CPUINFO_FCT_ADSP2100_RX_HANDLER: adsp->sport_rx_callback = (adsp21xx_rx_func)info->f; break;
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case CPUINFO_FCT_ADSP2100_TX_HANDLER: adsp->sport_tx_callback = (adsp21xx_tx_func)info->f; break;
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case CPUINFO_FCT_ADSP2100_TIMER_HANDLER: adsp->timer_fired = (adsp21xx_timer_func)info->f; break;
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default:
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CPU_SET_INFO_CALL(adsp21xx);
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break;
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}
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}
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CPU_GET_INFO( adsp2104 )
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{
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adsp2100_state *adsp = (device != NULL) ? device->token : NULL;
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switch (state)
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{
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/* --- the following bits of info are returned as 64-bit signed integers --- */
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case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
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case CPUINFO_INT_INPUT_STATE + ADSP2104_IRQ0: info->i = adsp->irq_state[ADSP2104_IRQ0]; break;
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case CPUINFO_INT_INPUT_STATE + ADSP2104_IRQ1: info->i = adsp->irq_state[ADSP2104_IRQ1]; break;
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case CPUINFO_INT_INPUT_STATE + ADSP2104_IRQ2: info->i = adsp->irq_state[ADSP2104_IRQ2]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2104_SPORT0_RX:info->i = adsp->irq_state[ADSP2104_SPORT0_RX];break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2104_SPORT0_TX:info->i = adsp->irq_state[ADSP2104_SPORT0_TX];break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2104_TIMER: info->i = adsp->irq_state[ADSP2104_TIMER]; break;
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 6; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(adsp2104); break;
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp2104); break;
|
||||
|
||||
case CPUINFO_FCT_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break;
|
||||
case CPUINFO_FCT_ADSP2100_TX_HANDLER: info->f = (genf *)adsp->sport_tx_callback; break;
|
||||
case CPUINFO_FCT_ADSP2100_TIMER_HANDLER: info->f = (genf *)adsp->timer_fired; break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(adsp2104); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2104"); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2104"); break;
|
||||
|
||||
default:
|
||||
CPU_GET_INFO_CALL(adsp21xx);
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if (HAS_ADSP2105)
|
||||
/**************************************************************************
|
||||
* ADSP2105 section
|
||||
**************************************************************************/
|
||||
@ -2139,58 +2057,25 @@ void adsp2105_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
|
||||
adsp21xx_load_boot_data(srcdata, dstdata);
|
||||
}
|
||||
|
||||
static CPU_SET_INFO( adsp2105 )
|
||||
{
|
||||
adsp2100_state *adsp = device->token;
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are set as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2105_IRQ0: set_irq_line(adsp, ADSP2105_IRQ0, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2105_IRQ1: set_irq_line(adsp, ADSP2105_IRQ1, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2105_IRQ2: set_irq_line(adsp, ADSP2105_IRQ2, info->i); break;
|
||||
|
||||
/* --- the following bits of info are set as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_ADSP2100_RX_HANDLER: adsp->sport_rx_callback = (adsp21xx_rx_func)info->f; break;
|
||||
case CPUINFO_FCT_ADSP2100_TX_HANDLER: adsp->sport_tx_callback = (adsp21xx_tx_func)info->f; break;
|
||||
case CPUINFO_FCT_ADSP2100_TIMER_HANDLER: adsp->timer_fired = (adsp21xx_timer_func)info->f; break;
|
||||
|
||||
default:
|
||||
CPU_SET_INFO_CALL(adsp21xx);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
CPU_GET_INFO( adsp2105 )
|
||||
{
|
||||
adsp2100_state *adsp = (device != NULL) ? device->token : NULL;
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 3; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2105_IRQ0: info->i = adsp->irq_state[ADSP2105_IRQ0]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2105_IRQ1: info->i = adsp->irq_state[ADSP2105_IRQ1]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2105_IRQ2: info->i = adsp->irq_state[ADSP2105_IRQ2]; break;
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 3; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(adsp2105); break;
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp2105); break;
|
||||
|
||||
case CPUINFO_FCT_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break;
|
||||
case CPUINFO_FCT_ADSP2100_TX_HANDLER: info->f = (genf *)adsp->sport_tx_callback; break;
|
||||
case CPUINFO_FCT_ADSP2100_TIMER_HANDLER: info->f = (genf *)adsp->timer_fired; break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(adsp2105); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2105"); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2105"); break;
|
||||
|
||||
default:
|
||||
CPU_GET_INFO_CALL(adsp21xx);
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if (HAS_ADSP2115)
|
||||
/**************************************************************************
|
||||
* ADSP2115 section
|
||||
**************************************************************************/
|
||||
@ -2207,64 +2092,25 @@ void adsp2115_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
|
||||
adsp21xx_load_boot_data(srcdata, dstdata);
|
||||
}
|
||||
|
||||
static CPU_SET_INFO( adsp2115 )
|
||||
{
|
||||
adsp2100_state *adsp = device->token;
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are set as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2115_IRQ0: set_irq_line(adsp, ADSP2115_IRQ0, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2115_IRQ1: set_irq_line(adsp, ADSP2115_IRQ1, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2115_IRQ2: set_irq_line(adsp, ADSP2115_IRQ2, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2115_SPORT0_RX:set_irq_line(adsp, ADSP2115_SPORT0_RX, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2115_SPORT0_TX:set_irq_line(adsp, ADSP2115_SPORT0_TX, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2115_TIMER: set_irq_line(adsp, ADSP2115_TIMER, info->i); break;
|
||||
|
||||
/* --- the following bits of info are set as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_ADSP2100_RX_HANDLER: adsp->sport_rx_callback = (adsp21xx_rx_func)info->f; break;
|
||||
case CPUINFO_FCT_ADSP2100_TX_HANDLER: adsp->sport_tx_callback = (adsp21xx_tx_func)info->f; break;
|
||||
case CPUINFO_FCT_ADSP2100_TIMER_HANDLER: adsp->timer_fired = (adsp21xx_timer_func)info->f; break;
|
||||
|
||||
default:
|
||||
CPU_SET_INFO_CALL(adsp21xx);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
CPU_GET_INFO( adsp2115 )
|
||||
{
|
||||
adsp2100_state *adsp = (device != NULL) ? device->token : NULL;
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2115_IRQ0: info->i = adsp->irq_state[ADSP2115_IRQ0]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2115_IRQ1: info->i = adsp->irq_state[ADSP2115_IRQ1]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2115_IRQ2: info->i = adsp->irq_state[ADSP2115_IRQ2]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2115_SPORT0_RX:info->i = adsp->irq_state[ADSP2115_SPORT0_RX];break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2115_SPORT0_TX:info->i = adsp->irq_state[ADSP2115_SPORT0_TX];break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2115_TIMER: info->i = adsp->irq_state[ADSP2115_TIMER]; break;
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 6; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(adsp2115); break;
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp2115); break;
|
||||
|
||||
case CPUINFO_FCT_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break;
|
||||
case CPUINFO_FCT_ADSP2100_TX_HANDLER: info->f = (genf *)adsp->sport_tx_callback; break;
|
||||
case CPUINFO_FCT_ADSP2100_TIMER_HANDLER: info->f = (genf *)adsp->timer_fired; break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(adsp2115); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2115"); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2115"); break;
|
||||
|
||||
default:
|
||||
CPU_GET_INFO_CALL(adsp21xx);
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if (HAS_ADSP2181)
|
||||
/**************************************************************************
|
||||
* ADSP2181 section
|
||||
**************************************************************************/
|
||||
@ -2281,61 +2127,19 @@ void adsp2181_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
|
||||
adsp21xx_load_boot_data(srcdata, dstdata);
|
||||
}
|
||||
|
||||
static CPU_SET_INFO( adsp2181 )
|
||||
{
|
||||
adsp2100_state *adsp = device->token;
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are set as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_IRQ0: set_irq_line(adsp, ADSP2181_IRQ0, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_IRQ1: set_irq_line(adsp, ADSP2181_IRQ1, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_IRQ2: set_irq_line(adsp, ADSP2181_IRQ2, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_SPORT0_RX:set_irq_line(adsp, ADSP2181_SPORT0_RX, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_SPORT0_TX:set_irq_line(adsp, ADSP2181_SPORT0_TX, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_TIMER: set_irq_line(adsp, ADSP2181_TIMER, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_IRQE: set_irq_line(adsp, ADSP2181_IRQE, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_IRQL1: set_irq_line(adsp, ADSP2181_IRQL1, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_IRQL2: set_irq_line(adsp, ADSP2181_IRQL2, info->i); break;
|
||||
|
||||
/* --- the following bits of info are set as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_ADSP2100_RX_HANDLER: adsp->sport_rx_callback = (adsp21xx_rx_func)info->f; break;
|
||||
case CPUINFO_FCT_ADSP2100_TX_HANDLER: adsp->sport_tx_callback = (adsp21xx_tx_func)info->f; break;
|
||||
case CPUINFO_FCT_ADSP2100_TIMER_HANDLER: adsp->timer_fired = (adsp21xx_timer_func)info->f; break;
|
||||
|
||||
default:
|
||||
CPU_SET_INFO_CALL(adsp21xx);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
CPU_GET_INFO( adsp2181 )
|
||||
{
|
||||
adsp2100_state *adsp = (device != NULL) ? device->token : NULL;
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_IRQ0: info->i = adsp->irq_state[ADSP2181_IRQ0]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_IRQ1: info->i = adsp->irq_state[ADSP2181_IRQ1]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_IRQ2: info->i = adsp->irq_state[ADSP2181_IRQ2]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_SPORT0_RX:info->i = adsp->irq_state[ADSP2181_SPORT0_RX];break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_SPORT0_TX:info->i = adsp->irq_state[ADSP2181_SPORT0_TX];break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_TIMER: info->i = adsp->irq_state[ADSP2181_TIMER]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_IRQE: info->i = adsp->irq_state[ADSP2181_IRQE]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_IRQL1: info->i = adsp->irq_state[ADSP2181_IRQL1]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ADSP2181_IRQL2: info->i = adsp->irq_state[ADSP2181_IRQL2]; break;
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 9; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 11; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 11; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = -1; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(adsp2181); break;
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp2181); break;
|
||||
|
||||
case CPUINFO_FCT_ADSP2100_RX_HANDLER: info->f = (genf *)adsp->sport_rx_callback; break;
|
||||
case CPUINFO_FCT_ADSP2100_TX_HANDLER: info->f = (genf *)adsp->sport_tx_callback; break;
|
||||
case CPUINFO_FCT_ADSP2100_TIMER_HANDLER: info->f = (genf *)adsp->timer_fired; break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(adsp2181); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "ADSP2181"); break;
|
||||
@ -2415,5 +2219,3 @@ UINT16 adsp2181_idma_data_r(const device_config *device)
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
@ -15,7 +15,7 @@
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
GLOBAL CONSTANTS
|
||||
TYPE DEFINITIONS
|
||||
***************************************************************************/
|
||||
|
||||
/* transmit and receive data callbacks types */
|
||||
@ -23,6 +23,15 @@ typedef INT32 (*adsp21xx_rx_func)(const device_config *device, int port);
|
||||
typedef void (*adsp21xx_tx_func)(const device_config *device, int port, INT32 data);
|
||||
typedef void (*adsp21xx_timer_func)(const device_config *device, int enable);
|
||||
|
||||
typedef struct _adsp21xx_config adsp21xx_config;
|
||||
struct _adsp21xx_config
|
||||
{
|
||||
adsp21xx_rx_func rx; /* callback for serial receive */
|
||||
adsp21xx_tx_func tx; /* callback for serial transmit */
|
||||
adsp21xx_timer_func timer; /* callback for timer fired */
|
||||
};
|
||||
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
REGISTER ENUMERATION
|
||||
@ -50,12 +59,6 @@ enum
|
||||
ADSP2100_GENPCBASE = REG_GENPCBASE
|
||||
};
|
||||
|
||||
enum
|
||||
{
|
||||
CPUINFO_FCT_ADSP2100_RX_HANDLER = CPUINFO_FCT_CPU_SPECIFIC,
|
||||
CPUINFO_FCT_ADSP2100_TX_HANDLER,
|
||||
CPUINFO_FCT_ADSP2100_TIMER_HANDLER
|
||||
};
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
@ -69,10 +72,9 @@ enum
|
||||
#define ADSP2100_IRQ2 2 /* IRQ2 */
|
||||
#define ADSP2100_IRQ3 3 /* IRQ3 */
|
||||
|
||||
#if (HAS_ADSP2100)
|
||||
extern CPU_GET_INFO( adsp2100 );
|
||||
CPU_GET_INFO( adsp2100 );
|
||||
#define CPU_ADSP2100 CPU_GET_INFO_NAME( adsp2100 )
|
||||
#endif
|
||||
|
||||
|
||||
/**************************************************************************
|
||||
* ADSP2101 section
|
||||
@ -87,12 +89,10 @@ extern CPU_GET_INFO( adsp2100 );
|
||||
#define ADSP2101_SPORT0_TX 4 /* SPORT0 transmit IRQ */
|
||||
#define ADSP2101_TIMER 5 /* internal timer IRQ */
|
||||
|
||||
#if (HAS_ADSP2101)
|
||||
extern CPU_GET_INFO( adsp2101 );
|
||||
CPU_GET_INFO( adsp2101 );
|
||||
#define CPU_ADSP2101 CPU_GET_INFO_NAME( adsp2101 )
|
||||
#endif
|
||||
|
||||
#if (HAS_ADSP2104)
|
||||
|
||||
/**************************************************************************
|
||||
* ADSP2104 section
|
||||
**************************************************************************/
|
||||
@ -106,12 +106,12 @@ extern CPU_GET_INFO( adsp2101 );
|
||||
#define ADSP2104_SPORT0_TX 4 /* SPORT0 transmit IRQ */
|
||||
#define ADSP2104_TIMER 5 /* internal timer IRQ */
|
||||
|
||||
extern CPU_GET_INFO( adsp2104 );
|
||||
CPU_GET_INFO( adsp2104 );
|
||||
#define CPU_ADSP2104 CPU_GET_INFO_NAME( adsp2104 )
|
||||
extern void adsp2104_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
|
||||
#endif /* (HAS_ADSP2104) */
|
||||
|
||||
#if (HAS_ADSP2105)
|
||||
void adsp2104_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
|
||||
|
||||
|
||||
/**************************************************************************
|
||||
* ADSP2105 section
|
||||
**************************************************************************/
|
||||
@ -123,12 +123,12 @@ extern void adsp2104_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
|
||||
#define ADSP2105_IRQ2 2 /* IRQ2 */
|
||||
#define ADSP2105_TIMER 5 /* internal timer IRQ */
|
||||
|
||||
extern CPU_GET_INFO( adsp2105 );
|
||||
CPU_GET_INFO( adsp2105 );
|
||||
#define CPU_ADSP2105 CPU_GET_INFO_NAME( adsp2105 )
|
||||
extern void adsp2105_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
|
||||
#endif /* (HAS_ADSP2105) */
|
||||
|
||||
#if (HAS_ADSP2115)
|
||||
void adsp2105_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
|
||||
|
||||
|
||||
/**************************************************************************
|
||||
* ADSP2115 section
|
||||
**************************************************************************/
|
||||
@ -142,12 +142,12 @@ extern void adsp2105_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
|
||||
#define ADSP2115_SPORT0_TX 4 /* SPORT0 transmit IRQ */
|
||||
#define ADSP2115_TIMER 5 /* internal timer IRQ */
|
||||
|
||||
extern CPU_GET_INFO( adsp2115 );
|
||||
CPU_GET_INFO( adsp2115 );
|
||||
#define CPU_ADSP2115 CPU_GET_INFO_NAME( adsp2115 )
|
||||
extern void adsp2115_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
|
||||
#endif /* (HAS_ADSP2115) */
|
||||
|
||||
#if (HAS_ADSP2181)
|
||||
void adsp2115_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
|
||||
|
||||
|
||||
/**************************************************************************
|
||||
* ADSP2181 section
|
||||
**************************************************************************/
|
||||
@ -164,30 +164,14 @@ extern void adsp2115_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
|
||||
#define ADSP2181_IRQL1 7 /* IRQL1 */
|
||||
#define ADSP2181_IRQL2 8 /* IRQL2 */
|
||||
|
||||
extern CPU_GET_INFO( adsp2181 );
|
||||
CPU_GET_INFO( adsp2181 );
|
||||
#define CPU_ADSP2181 CPU_GET_INFO_NAME( adsp2181 )
|
||||
extern void adsp2181_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
|
||||
extern void adsp2181_idma_addr_w(const device_config *device, UINT16 data);
|
||||
extern UINT16 adsp2181_idma_addr_r(const device_config *device);
|
||||
extern void adsp2181_idma_data_w(const device_config *device, UINT16 data);
|
||||
extern UINT16 adsp2181_idma_data_r(const device_config *device);
|
||||
#endif /* (HAS_ADSP2181) */
|
||||
|
||||
|
||||
INLINE void adsp21xx_set_rx_handler(const device_config *device, adsp21xx_rx_func handler)
|
||||
{
|
||||
device_set_info_fct(device, CPUINFO_FCT_ADSP2100_RX_HANDLER, (genf *)handler);
|
||||
}
|
||||
|
||||
INLINE void adsp21xx_set_tx_handler(const device_config *device, adsp21xx_tx_func handler)
|
||||
{
|
||||
device_set_info_fct(device, CPUINFO_FCT_ADSP2100_TX_HANDLER, (genf *)handler);
|
||||
}
|
||||
|
||||
INLINE void adsp21xx_set_timer_handler(const device_config *device, adsp21xx_timer_func handler)
|
||||
{
|
||||
device_set_info_fct(device, CPUINFO_FCT_ADSP2100_TIMER_HANDLER, (genf *)handler);
|
||||
}
|
||||
void adsp2181_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
|
||||
void adsp2181_idma_addr_w(const device_config *device, UINT16 data);
|
||||
UINT16 adsp2181_idma_addr_r(const device_config *device);
|
||||
void adsp2181_idma_data_w(const device_config *device, UINT16 data);
|
||||
UINT16 adsp2181_idma_data_r(const device_config *device);
|
||||
|
||||
|
||||
#endif /* __ADSP2100_H__ */
|
||||
|
@ -891,15 +891,15 @@ static CPU_GET_INFO( alpha8xxx )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 10; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 6; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 10; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 6; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
#if HANDLE_HALT_LINE
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_HALT: info->i = cpustate->halt ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
#endif
|
||||
|
@ -882,15 +882,15 @@ CPU_GET_INFO( apexc )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 2; /* IIRC */ break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 75; /* IIRC */ break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 15; /*13+2 ignored bits to make double word address*/ break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = /*5*/8; /* no I/O bus, but we use address 0 for punchtape I/O */ break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = /*0*/1; /*0 is quite enough but the MAME core does not understand*/ break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 15; /*13+2 ignored bits to make double word address*/ break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = /*5*/8; /* no I/O bus, but we use address 0 for punchtape I/O */ break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = /*0*/1; /*0 is quite enough but the MAME core does not understand*/ break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_SP: info->i = 0; /* no SP */ break;
|
||||
case CPUINFO_INT_PC:
|
||||
|
@ -1459,15 +1459,15 @@ CPU_GET_INFO( arm )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 3; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 26; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 26; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + ARM_IRQ_LINE: info->i = cpustate->pendingIrq; break;
|
||||
case CPUINFO_INT_INPUT_STATE + ARM_FIRQ_LINE: info->i = cpustate->pendingFiq; break;
|
||||
|
@ -232,15 +232,15 @@ CPU_GET_INFO( arm7 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 3; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
/* interrupt lines/exceptions */
|
||||
case CPUINFO_INT_INPUT_STATE + ARM7_IRQ_LINE: info->i = cpustate->pendingIrq; break;
|
||||
|
@ -1714,15 +1714,15 @@ CPU_GET_INFO( asap )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + ASAP_IRQ0: info->i = asap->irq_state; break;
|
||||
|
||||
|
@ -737,15 +737,15 @@ CPU_GET_INFO( ccpu )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 15; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 5; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 15; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 5; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
|
||||
|
||||
|
@ -993,15 +993,15 @@ CPU_GET_INFO( cdp1802 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = CDP1802_CYCLES_EXECUTE * 2; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = CDP1802_CYCLES_EXECUTE * 3; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 3; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 3; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_INT: info->i = cpustate->irq; break;
|
||||
case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_DMAIN: info->i = cpustate->dmain; break;
|
||||
|
@ -413,15 +413,15 @@ CPU_GET_INFO( cop410 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = 0; break;
|
||||
|
||||
@ -450,9 +450,9 @@ CPU_GET_INFO( cop410 )
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cop400->icount; break;
|
||||
case CPUINFO_FCT_VALIDITY_CHECK: info->validity_check = CPU_VALIDITY_CHECK_NAME(cop410); break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM:
|
||||
info->internal_map8 = ADDRESS_MAP_NAME(cop410_internal_rom); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA:
|
||||
info->internal_map8 = ADDRESS_MAP_NAME(cop410_internal_ram); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
@ -506,7 +506,7 @@ CPU_GET_INFO( cop401 )
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "COP401"); break;
|
||||
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "National Semiconductor COPS"); break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM:
|
||||
info->internal_map8 = NULL; break;
|
||||
|
||||
default: CPU_GET_INFO_CALL(cop410); break;
|
||||
|
@ -497,15 +497,15 @@ CPU_GET_INFO( cop420 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 10; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 10; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = 0; break;
|
||||
|
||||
@ -535,9 +535,9 @@ CPU_GET_INFO( cop420 )
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cop400->icount; break;
|
||||
case CPUINFO_FCT_VALIDITY_CHECK: info->validity_check = CPU_VALIDITY_CHECK_NAME(cop420); break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM:
|
||||
info->internal_map8 = ADDRESS_MAP_NAME(cop420_internal_rom); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA:
|
||||
info->internal_map8 = ADDRESS_MAP_NAME(cop420_internal_ram); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
@ -609,7 +609,7 @@ CPU_GET_INFO( cop402 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM:
|
||||
info->internal_map8 = NULL; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
|
@ -519,15 +519,15 @@ CPU_GET_INFO( cop444 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 10; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 7; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 10; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = 0; break;
|
||||
|
||||
@ -557,9 +557,9 @@ CPU_GET_INFO( cop444 )
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cop400->icount; break;
|
||||
case CPUINFO_FCT_VALIDITY_CHECK: info->validity_check = CPU_VALIDITY_CHECK_NAME(cop444); break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM:
|
||||
info->internal_map8 = ADDRESS_MAP_NAME(cop444_internal_rom); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA:
|
||||
info->internal_map8 = ADDRESS_MAP_NAME(cop444_internal_ram); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
@ -612,12 +612,12 @@ CPU_GET_INFO( cop424 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM:
|
||||
info->internal_map8 = ADDRESS_MAP_NAME(cop424_internal_rom); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA:
|
||||
info->internal_map8 = ADDRESS_MAP_NAME(cop424_internal_ram); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
@ -669,7 +669,7 @@ CPU_GET_INFO( cop404 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM:
|
||||
info->internal_map8 = NULL; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
|
@ -3454,15 +3454,15 @@ CPU_GET_INFO( cp1610 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 7; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* TODO??? */ break;
|
||||
|
||||
|
@ -142,14 +142,9 @@ $(CPUOBJ)/alph8201/alph8201.o: $(CPUSRC)/alph8201/alph8201.c \
|
||||
# Analog Devices ADSP21xx series
|
||||
#-------------------------------------------------
|
||||
|
||||
CPUDEFS += -DHAS_ADSP2100=$(if $(filter ADSP2100,$(CPUS)),1,0)
|
||||
CPUDEFS += -DHAS_ADSP2101=$(if $(filter ADSP2101,$(CPUS)),1,0)
|
||||
CPUDEFS += -DHAS_ADSP2104=$(if $(filter ADSP2104,$(CPUS)),1,0)
|
||||
CPUDEFS += -DHAS_ADSP2105=$(if $(filter ADSP2105,$(CPUS)),1,0)
|
||||
CPUDEFS += -DHAS_ADSP2115=$(if $(filter ADSP2115,$(CPUS)),1,0)
|
||||
CPUDEFS += -DHAS_ADSP2181=$(if $(filter ADSP2181,$(CPUS)),1,0)
|
||||
CPUDEFS += -DHAS_ADSP21XX=$(if $(filter ADSP21XX,$(CPUS)),1,0)
|
||||
|
||||
ifneq ($(filter ADSP2100 ADSP2101 ADSP2104 ADSP2105 ADSP2115 ADSP2181,$(CPUS)),)
|
||||
ifneq ($(filter ADSP21XX,$(CPUS)),)
|
||||
OBJDIRS += $(CPUOBJ)/adsp2100
|
||||
CPUOBJS += $(CPUOBJ)/adsp2100/adsp2100.o
|
||||
DBGOBJS += $(CPUOBJ)/adsp2100/2100dasm.o
|
||||
|
@ -1864,15 +1864,15 @@ CPU_GET_INFO( cquestsnd )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -3; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -3; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_PC:
|
||||
case CPUINFO_INT_REGISTER + CQUESTSND_PC: info->i = cpustate->pc; break;
|
||||
@ -1982,15 +1982,15 @@ CPU_GET_INFO( cquestrot )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -3; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -3; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_PC:
|
||||
case CPUINFO_INT_REGISTER + CQUESTROT_PC: info->i = cpustate->pc; break;
|
||||
@ -2100,15 +2100,15 @@ CPU_GET_INFO( cquestlin )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -3; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -3; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_PC:
|
||||
case CPUINFO_INT_REGISTER + CQUESTLIN_FGPC: info->i = cpustate->pc[cpustate->clkcnt & 3 ? BACKGROUND : FOREGROUND]; break;
|
||||
|
@ -735,15 +735,15 @@ CPU_GET_INFO( dsp32c )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 4; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + DSP32_IRQ0: info->i = 0; break;
|
||||
case CPUINFO_INT_INPUT_STATE + DSP32_IRQ1: info->i = 0; break;
|
||||
|
@ -381,15 +381,15 @@ CPU_GET_INFO( dsp56k )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break; // ?
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 8; break; // ?
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break; // 1-5
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break; // 1-5
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break; // 1-5
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; // 1-5
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + DSP56K_IRQ_MODA: info->i = DSP56K_IRQ_MODA; break;
|
||||
case CPUINFO_INT_INPUT_STATE + DSP56K_IRQ_MODB: info->i = DSP56K_IRQ_MODB; break;
|
||||
@ -464,9 +464,9 @@ CPU_GET_INFO( dsp56k )
|
||||
case CPUINFO_FCT_WRITE: info->write = NULL; break;
|
||||
case CPUINFO_FCT_READOP: info->readop = NULL; break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA:
|
||||
info->internal_map16 = ADDRESS_MAP_NAME(dsp56156_x_data_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM:
|
||||
info->internal_map16 = ADDRESS_MAP_NAME(dsp56156_program_map); break;
|
||||
|
||||
// --- the following bits of info are returned as NULL-terminated strings ---
|
||||
|
@ -4885,13 +4885,13 @@ static CPU_GET_INFO( hyperstone )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 36; break;
|
||||
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 15; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 15; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: /* not implemented */ break;
|
||||
|
||||
@ -5022,8 +5022,8 @@ static CPU_GET_INFO( hyperstone )
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hyperstone); break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map16 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_IO: info->internal_map16 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map16 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_IO: info->internal_map16 = NULL; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "Hyperstone CPU"); break;
|
||||
@ -5174,10 +5174,10 @@ CPU_GET_INFO( e116t )
|
||||
switch (state)
|
||||
{
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_4k_iram_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_4k_iram_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(e116t); break;
|
||||
@ -5197,10 +5197,10 @@ CPU_GET_INFO( e116xt )
|
||||
switch (state)
|
||||
{
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_8k_iram_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_8k_iram_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(e116xt); break;
|
||||
@ -5220,10 +5220,10 @@ CPU_GET_INFO( e116xs )
|
||||
switch (state)
|
||||
{
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_16k_iram_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_16k_iram_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(e116xs); break;
|
||||
@ -5243,10 +5243,10 @@ CPU_GET_INFO( e116xsr )
|
||||
switch (state)
|
||||
{
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_16k_iram_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_16k_iram_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(e116xsr); break;
|
||||
@ -5266,10 +5266,10 @@ CPU_GET_INFO( e132n )
|
||||
switch (state)
|
||||
{
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 32; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_4k_iram_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_4k_iram_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(e132n); break;
|
||||
@ -5289,10 +5289,10 @@ CPU_GET_INFO( e132t )
|
||||
switch (state)
|
||||
{
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 32; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_4k_iram_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_4k_iram_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(e132t); break;
|
||||
@ -5312,10 +5312,10 @@ CPU_GET_INFO( e132xn )
|
||||
switch (state)
|
||||
{
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 32; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_8k_iram_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_8k_iram_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(e132xn); break;
|
||||
@ -5335,10 +5335,10 @@ CPU_GET_INFO( e132xt )
|
||||
switch (state)
|
||||
{
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 32; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_8k_iram_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_8k_iram_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(e132xt); break;
|
||||
@ -5358,10 +5358,10 @@ CPU_GET_INFO( e132xs )
|
||||
switch (state)
|
||||
{
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 32; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_16k_iram_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_16k_iram_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(e132xs); break;
|
||||
@ -5381,10 +5381,10 @@ CPU_GET_INFO( e132xsr )
|
||||
switch (state)
|
||||
{
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 32; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_16k_iram_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_16k_iram_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(e132xsr); break;
|
||||
@ -5404,10 +5404,10 @@ CPU_GET_INFO( gms30c2116 )
|
||||
switch (state)
|
||||
{
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_4k_iram_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_4k_iram_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(gms30c2116); break;
|
||||
@ -5427,10 +5427,10 @@ CPU_GET_INFO( gms30c2132 )
|
||||
switch (state)
|
||||
{
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 32; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_4k_iram_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_4k_iram_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(gms30c2132); break;
|
||||
@ -5450,10 +5450,10 @@ CPU_GET_INFO( gms30c2216 )
|
||||
switch (state)
|
||||
{
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_8k_iram_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(e116_8k_iram_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(gms30c2216); break;
|
||||
@ -5473,10 +5473,10 @@ CPU_GET_INFO( gms30c2232 )
|
||||
switch (state)
|
||||
{
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 32; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_8k_iram_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(e132_8k_iram_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(gms30c2232); break;
|
||||
|
@ -2013,15 +2013,15 @@ CPU_GET_INFO( f8 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 7; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_SP: info->i = cpustate->pc1; break;
|
||||
case CPUINFO_INT_PC: info->i = (cpustate->pc0 - 1) & 0xffff; break;
|
||||
|
@ -417,15 +417,15 @@ CPU_GET_INFO( g65816 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 20; /* rough guess */ break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + G65816_LINE_IRQ: info->i = LINE_IRQ; break;
|
||||
case CPUINFO_INT_INPUT_STATE + G65816_LINE_NMI: info->i = LINE_NMI; break;
|
||||
|
@ -435,16 +435,16 @@ CPU_GET_INFO( h6280 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 17 + 6*65536; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 21; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 2; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 21; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 2; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_state[0]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + 1: info->i = cpustate->irq_state[1]; break;
|
||||
|
@ -554,20 +554,20 @@ CPU_GET_INFO( h8_3002 )
|
||||
case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
|
||||
|
||||
// Bus sizes
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
// Internal maps
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(h8_3002_internal_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map16 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_IO: info->internal_map16 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(h8_3002_internal_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map16 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_IO: info->internal_map16 = NULL; break;
|
||||
|
||||
// CPU misc parameters
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "H8/3002"); break;
|
||||
@ -614,7 +614,7 @@ CPU_GET_INFO( h8_3044 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(h8_3044_internal_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(h8_3044_internal_map); break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(h8_24); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "H8/3044"); break;
|
||||
default:
|
||||
@ -626,7 +626,7 @@ CPU_GET_INFO( h8_3007 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = address_map_h8_3007_internal_map; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = address_map_h8_3007_internal_map; break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8_3007); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "H8/3007"); break;
|
||||
default:
|
||||
|
@ -530,20 +530,20 @@ CPU_GET_INFO( h8_3334 )
|
||||
case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
|
||||
|
||||
// Bus sizes
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
// Internal maps
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = address_map_h8_3334_internal_map; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_IO: info->internal_map16 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = address_map_h8_3334_internal_map; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_IO: info->internal_map16 = NULL; break;
|
||||
|
||||
// CPU misc parameters
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "H8/3334"); break;
|
||||
|
@ -1265,15 +1265,15 @@ CPU_GET_INFO( hd6309 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 20; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + HD6309_IRQ_LINE: info->i = m68_state->irq_state[HD6309_IRQ_LINE]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + HD6309_FIRQ_LINE:info->i = m68_state->irq_state[HD6309_FIRQ_LINE]; break;
|
||||
|
@ -862,17 +862,17 @@ CPU_GET_INFO( i386 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 12; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = 12; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
|
||||
|
||||
|
@ -1670,15 +1670,15 @@ CPU_GET_INFO( i8085 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 4; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + I8085_INTR_LINE: info->i = (cpustate->IREQ & IM_INTR) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
case CPUINFO_INT_INPUT_STATE + I8085_RST55_LINE:info->i = (cpustate->IREQ & IM_RST55) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
|
@ -381,15 +381,15 @@ CPU_GET_INFO( i80286 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 50; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
|
||||
|
@ -519,15 +519,15 @@ CPU_GET_INFO( i8086 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 50; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
|
||||
@ -591,8 +591,8 @@ CPU_GET_INFO( i8088 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8088); break;
|
||||
@ -641,8 +641,8 @@ CPU_GET_INFO( i80188 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8088); break;
|
||||
|
@ -1193,18 +1193,18 @@ CPU_GET_INFO( i8041 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + I8X41_INT_IBF: info->i = (STATE & IBF) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
case CPUINFO_INT_INPUT_STATE + I8X41_INT_TEST1: info->i = (STATE & TEST1) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
@ -1319,8 +1319,8 @@ CPU_GET_INFO( i8042 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8042); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8042"); break;
|
||||
default: CPU_GET_INFO_CALL(i8041); break;
|
||||
|
@ -2133,23 +2133,23 @@ CPU_GET_INFO( i960 )
|
||||
case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
|
||||
|
||||
// Bus sizes
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH_IO: info->i = 0; break;
|
||||
|
||||
// Internal maps
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = NULL;break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map32 = NULL;break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_IO: info->internal_map32 = NULL;break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = NULL;break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map32 = NULL;break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_IO: info->internal_map32 = NULL;break;
|
||||
|
||||
// CPU misc parameters
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "i960KB"); break;
|
||||
|
@ -1516,9 +1516,9 @@ CPU_GET_INFO( jaguargpu )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ0: info->i = (jaguar->ctrl[G_CTRL] & 0x40) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ1: info->i = (jaguar->ctrl[G_CTRL] & 0x80) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
|
@ -549,15 +549,15 @@ CPU_GET_INFO( konami )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 13; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + KONAMI_IRQ_LINE: info->i = cpustate->irq_state[KONAMI_IRQ_LINE]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + KONAMI_FIRQ_LINE:info->i = cpustate->irq_state[KONAMI_FIRQ_LINE]; break;
|
||||
|
@ -190,15 +190,15 @@ CPU_GET_INFO( lh5801 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 19; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE: info->i = cpustate->irq_state; break;
|
||||
|
||||
|
@ -422,15 +422,15 @@ CPU_GET_INFO( lr35902 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; /* right? */ break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 16; /* right? */ break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_SP: info->i = cpustate->w.SP; break;
|
||||
case CPUINFO_INT_PC: info->i = cpustate->w.PC; break;
|
||||
|
@ -1076,15 +1076,15 @@ CPU_GET_INFO( m37710 )
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 20; /* rough guess */ break;
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = M37710_LINE_MAX; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ0: info->i = 0; break;
|
||||
case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ1: info->i = 0; break;
|
||||
@ -1119,9 +1119,9 @@ CPU_GET_INFO( m37710 )
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m37710); break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->ICount; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(m37710_internal_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map16 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_IO: info->internal_map8 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(m37710_internal_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map16 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_IO: info->internal_map8 = NULL; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "M37710"); break;
|
||||
|
@ -450,17 +450,17 @@ CPU_GET_INFO( m4510 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 10; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 13; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = 13; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + M4510_IRQ_LINE: info->i = cpustate->irq_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
|
||||
|
@ -709,15 +709,15 @@ CPU_GET_INFO( m6502 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 10; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + M6502_IRQ_LINE: info->i = cpustate->irq_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE + M6502_SET_OVERFLOW: info->i = cpustate->so_state; break;
|
||||
@ -990,8 +990,8 @@ CPU_GET_INFO( deco16 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(deco16); break;
|
||||
|
@ -332,15 +332,15 @@ CPU_GET_INFO( m6509 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 10; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + M6509_IRQ_LINE: info->i = cpustate->irq_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE + M6509_SET_OVERFLOW:info->i = cpustate->so_state; break;
|
||||
|
@ -276,17 +276,17 @@ CPU_GET_INFO( m65ce02 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 10; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 13; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = 13; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE+M65CE02_NMI_STATE: info->i = cpustate->nmi_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE+M65CE02_IRQ_STATE: info->i = cpustate->irq_state; break;
|
||||
|
@ -2693,15 +2693,15 @@ CPU_GET_INFO( m6800 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 12; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + M6800_IRQ_LINE: info->i = cpustate->irq_state[M6800_IRQ_LINE]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + M6800_TIN_LINE: info->i = cpustate->irq_state[M6800_TIN_LINE]; break;
|
||||
@ -2770,8 +2770,8 @@ CPU_GET_INFO( m6801 )
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m6801); break;
|
||||
@ -2823,15 +2823,15 @@ CPU_GET_INFO( m6803 )
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m6803); break;
|
||||
case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6803); break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6803); break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(m6803_mem); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(m6803_mem); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "M6803"); break;
|
||||
@ -2878,8 +2878,8 @@ CPU_GET_INFO( hd63701 )
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hd63701); break;
|
||||
|
@ -597,15 +597,15 @@ static CPU_GET_INFO( m68k )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 4; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = 0; /* there is no level 0 */ break;
|
||||
case CPUINFO_INT_INPUT_STATE + 1: info->i = (m68k->virq_state >> 1) & 1; break;
|
||||
@ -987,8 +987,8 @@ CPU_GET_INFO( m68008 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 22; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 22; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m68008); break;
|
||||
@ -1129,8 +1129,8 @@ CPU_GET_INFO( m68020 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
|
||||
case CPUINFO_INT_PC: info->i = REG_PC; break;
|
||||
case CPUINFO_INT_REGISTER + M68K_MSP: info->i = (m68k->s_flag && m68k->m_flag) ? REG_SP : REG_MSP; break;
|
||||
@ -1225,7 +1225,7 @@ CPU_GET_INFO( m68ec020 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_PC: info->i = REG_PC & 0x00ffffff; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
@ -1300,8 +1300,8 @@ CPU_GET_INFO( m68040 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
|
||||
case CPUINFO_INT_PC: info->i = REG_PC; break;
|
||||
case CPUINFO_INT_REGISTER + M68K_MSP: info->i = (m68k->s_flag && m68k->m_flag) ? REG_SP : REG_MSP; break;
|
||||
|
@ -927,15 +927,15 @@ CPU_GET_INFO( m6805 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 10; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 12; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 12; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + M6805_IRQ_LINE: info->i = cpustate->irq_state[M6805_IRQ_LINE]; break;
|
||||
|
||||
@ -1070,7 +1070,7 @@ CPU_GET_INFO( hd63705 )
|
||||
case CPUINFO_INT_INPUT_STATE + HD63705_INT_ADCONV: info->i = cpustate->irq_state[HD63705_INT_ADCONV]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->irq_state[HD63705_INT_NMI]; break;
|
||||
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(hd63705); break;
|
||||
|
@ -1107,15 +1107,15 @@ CPU_GET_INFO( m6809 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 19; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + M6809_IRQ_LINE: info->i = m68_state->irq_state[M6809_IRQ_LINE]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + M6809_FIRQ_LINE: info->i = m68_state->irq_state[M6809_FIRQ_LINE]; break;
|
||||
|
@ -1644,15 +1644,15 @@ CPU_GET_INFO( mb86233 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -2; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -2; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
|
||||
|
||||
|
@ -792,15 +792,15 @@ CPU_GET_INFO( mb88 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 11; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 7; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 3; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 11; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 3; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + MB88_IRQ_LINE: info->i = cpustate->pending_interrupt ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
|
||||
@ -882,8 +882,8 @@ CPU_GET_INFO( mb8841 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 11; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 7; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 11; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "MB8841"); break;
|
||||
@ -897,8 +897,8 @@ CPU_GET_INFO( mb8842 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 11; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 7; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 11; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "MB8842"); break;
|
||||
@ -912,8 +912,8 @@ CPU_GET_INFO( mb8843 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 10; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 10; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "MB8843"); break;
|
||||
@ -927,8 +927,8 @@ CPU_GET_INFO( mb8844 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 10; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 10; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "MB8844"); break;
|
||||
|
@ -425,15 +425,15 @@ CPU_GET_INFO( mc68hc11 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 41; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
|
||||
|
||||
|
@ -1043,15 +1043,15 @@ static CPU_GET_INFO( mcs48 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 12; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: /*info->i = 6 or 7;*/ break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 12; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: /*info->i = 6 or 7;*/ break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_IRQ: info->i = cpustate->irq_state ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA: info->i = cpustate->ea; break;
|
||||
@ -1084,8 +1084,8 @@ static CPU_GET_INFO( mcs48 )
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mcs48); break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: /*info->internal_map8 = ADDRESS_MAP_NAME(program_10bit);*/ break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: /*info->internal_map8 = ADDRESS_MAP_NAME(data_7bit);*/ break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: /*info->internal_map8 = ADDRESS_MAP_NAME(program_10bit);*/ break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: /*info->internal_map8 = ADDRESS_MAP_NAME(data_7bit);*/ break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: /*strcpy(info->s, "I8039");*/ break;
|
||||
@ -1137,8 +1137,8 @@ CPU_GET_INFO( i8035 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8035); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8035"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs48); break;
|
||||
@ -1151,9 +1151,9 @@ CPU_GET_INFO( i8048 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8048); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8048"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs48); break;
|
||||
@ -1166,9 +1166,9 @@ CPU_GET_INFO( i8648 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8048); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8648"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs48); break;
|
||||
@ -1181,9 +1181,9 @@ CPU_GET_INFO( i8748 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8048); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8748"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs48); break;
|
||||
@ -1196,8 +1196,8 @@ CPU_GET_INFO( mb8884 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8035); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "MB8884"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs48); break;
|
||||
@ -1210,9 +1210,9 @@ CPU_GET_INFO( n7751 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 6; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8048); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "N7751"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs48); break;
|
||||
@ -1227,8 +1227,8 @@ CPU_GET_INFO( i8039 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 7; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8039); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8039"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs48); break;
|
||||
@ -1241,9 +1241,9 @@ CPU_GET_INFO( i8049 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 7; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8049); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8049"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs48); break;
|
||||
@ -1256,9 +1256,9 @@ CPU_GET_INFO( i8749 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 7; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8049); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8749"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs48); break;
|
||||
@ -1271,9 +1271,9 @@ CPU_GET_INFO( m58715 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 7; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8049); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "M58715"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs48); break;
|
||||
|
@ -2462,15 +2462,15 @@ static CPU_GET_INFO( mcs51 )
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 20; /* rough guess */ break;
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 3; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 9; /* due to sfr mapping */ break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 18; /* 128k for ds5002fp */ break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 9; /* due to sfr mapping */ break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 18; /* 128k for ds5002fp */ break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break;
|
||||
case CPUINFO_INT_PC: info->i = PC; break;
|
||||
@ -2504,9 +2504,9 @@ static CPU_GET_INFO( mcs51 )
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8051); break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mcs51_state->icount; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_IO: info->internal_map8 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_IO: info->internal_map8 = NULL; break;
|
||||
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8051"); break;
|
||||
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "MCS-51"); break;
|
||||
@ -2554,7 +2554,7 @@ CPU_GET_INFO( i8031 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8031"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs51); break;
|
||||
}
|
||||
@ -2565,8 +2565,8 @@ CPU_GET_INFO( i8051 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_12bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_12bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8051"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs51); break;
|
||||
}
|
||||
@ -2578,7 +2578,7 @@ CPU_GET_INFO( i8032 )
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8052); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8052); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8032"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs51); break;
|
||||
@ -2590,8 +2590,8 @@ CPU_GET_INFO( i8052 )
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8052); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_13bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_13bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8052); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8052"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs51); break;
|
||||
@ -2602,8 +2602,8 @@ CPU_GET_INFO( i8751 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_12bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_12bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8751"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs51); break;
|
||||
}
|
||||
@ -2614,8 +2614,8 @@ CPU_GET_INFO( i8752 )
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8052); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_13bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_13bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8052); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I8752"); break;
|
||||
default: CPU_GET_INFO_CALL(mcs51); break;
|
||||
@ -2633,8 +2633,8 @@ CPU_GET_INFO( i80c31 )
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c31); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c51); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "I80C31"); break;
|
||||
default: CPU_GET_INFO_CALL(i8031); break;
|
||||
|
@ -312,15 +312,15 @@ CPU_GET_INFO( minx )
|
||||
case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break;
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = 0; break;
|
||||
case CPUINFO_INT_REGISTER + REG_GENPC: info->i = GET_MINX_PC; break;
|
||||
case CPUINFO_INT_REGISTER + REG_GENSP:
|
||||
|
@ -457,11 +457,11 @@ void mips3com_get_info(mips3_state *mips, UINT32 state, cpuinfo *info)
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = MIPS3_MAX_PADDR_SHIFT;break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = MIPS3_MIN_PAGE_SHIFT; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = MIPS3_MAX_PADDR_SHIFT;break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = MIPS3_MIN_PAGE_SHIFT; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ0: info->i = (mips->cpr[0][COP0_Cause] & 0x400) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ1: info->i = (mips->cpr[0][COP0_Cause] & 0x800) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
|
@ -4042,15 +4042,15 @@ CPU_GET_INFO( psxcpu )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + PSXCPU_IRQ0: info->i = (psxcpu->cp0r[ CP0_CAUSE ] & 0x400) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
case CPUINFO_INT_INPUT_STATE + PSXCPU_IRQ1: info->i = (psxcpu->cp0r[ CP0_CAUSE ] & 0x800) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
@ -4196,9 +4196,9 @@ CPU_GET_INFO( psxcpu )
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(psxcpu); break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &psxcpu->icount; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(psxcpu_internal_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map32 = 0; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_IO: info->internal_map32 = 0; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(psxcpu_internal_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map32 = 0; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_IO: info->internal_map32 = 0; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "PSX CPU"); break;
|
||||
@ -4337,7 +4337,7 @@ CPU_GET_INFO( cxd8661r )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(cxd8661r_internal_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(cxd8661r_internal_map); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "CXD8661R"); break;
|
||||
|
@ -1183,15 +1183,15 @@ static CPU_GET_INFO( r3000 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 29; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 29; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + R3000_IRQ0: info->i = (r3000->cpr[0][COP0_Cause] & 0x400) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
case CPUINFO_INT_INPUT_STATE + R3000_IRQ1: info->i = (r3000->cpr[0][COP0_Cause] & 0x800) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
|
@ -1334,15 +1334,15 @@ static CPU_GET_INFO( nec )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 80; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = (nec_state->pending_irq & INT_IRQ) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = nec_state->nmi_state; break;
|
||||
@ -1438,8 +1438,8 @@ CPU_GET_INFO( v20 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v20); break;
|
||||
@ -1463,8 +1463,8 @@ CPU_GET_INFO( v25 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v20); break;
|
||||
|
@ -943,15 +943,15 @@ CPU_GET_INFO( pdp1 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 5; /* 5us cycle time */ break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 31; /* we emulate individual 5us cycle, but MUL/DIV have longer timings */ break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 18; /*16+2 ignored bits to make double word address*/ break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 18; /*16+2 ignored bits to make double word address*/ break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_SP: info->i = 0; /* no SP */ break;
|
||||
case CPUINFO_INT_PC: info->i = PC; break;
|
||||
|
@ -442,15 +442,15 @@ CPU_GET_INFO( tx0_64kw )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -2; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -2; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_SP: info->i = 0; /* no SP */ break;
|
||||
case CPUINFO_INT_PC: info->i = PC; break;
|
||||
@ -568,15 +568,15 @@ CPU_GET_INFO( tx0_8kw )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 13; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -2; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 13; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -2; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_SP: info->i = 0; /* no SP */ break;
|
||||
case CPUINFO_INT_PC: info->i = PC; break;
|
||||
|
@ -1018,15 +1018,15 @@ static CPU_GET_INFO( pic16c5x )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 10; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 5; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 5; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 5; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 5; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PREVPC; break;
|
||||
|
||||
@ -1144,8 +1144,8 @@ CPU_GET_INFO( pic16c54 )
|
||||
{
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c54); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c54_rom); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c54_ram); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c54_rom); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c54_ram); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C54"); break;
|
||||
@ -1198,8 +1198,8 @@ CPU_GET_INFO( pic16c55 )
|
||||
{
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c55); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c55_rom); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c55_ram); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c55_rom); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c55_ram); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C55"); break;
|
||||
@ -1252,10 +1252,10 @@ CPU_GET_INFO( pic16c56 )
|
||||
{
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c56); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c56_rom); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c56_ram); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c56_rom); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c56_ram); break;
|
||||
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 10; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 10; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C56"); break;
|
||||
@ -1311,11 +1311,11 @@ CPU_GET_INFO( pic16c57 )
|
||||
{
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c57); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c57_rom); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c57_ram); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c57_rom); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c57_ram); break;
|
||||
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 11; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 7; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 11; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C57"); break;
|
||||
@ -1371,11 +1371,11 @@ CPU_GET_INFO( pic16c58 )
|
||||
{
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c58); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c58_rom); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c58_ram); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c58_rom); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c58_ram); break;
|
||||
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 11; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 7; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 11; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C58"); break;
|
||||
|
@ -1816,15 +1816,15 @@ static CPU_GET_INFO( ppc )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
|
||||
|
||||
@ -1970,10 +1970,10 @@ CPU_GET_INFO( ppc603 )
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
|
||||
case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 17; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = 17; break;
|
||||
case CPUINFO_INT_REGISTER + PPC_DEC: info->i = read_decrementer(); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
@ -2022,8 +2022,8 @@ CPU_GET_INFO( ppc602 )
|
||||
case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
|
||||
case CPUINFO_INT_REGISTER + PPC_IBR: info->i = ppc.ibr; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc602); break;
|
||||
@ -2069,8 +2069,8 @@ CPU_GET_INFO( mpc8240 )
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
|
||||
case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mpc8240); break;
|
||||
@ -2114,8 +2114,8 @@ CPU_GET_INFO( ppc601 )
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
|
||||
case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc601); break;
|
||||
@ -2159,8 +2159,8 @@ CPU_GET_INFO( ppc604 )
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
|
||||
case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc604); break;
|
||||
|
@ -1089,11 +1089,11 @@ void ppccom_get_info(powerpc_state *ppc, UINT32 state, cpuinfo *info)
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = POWERPC_MIN_PAGE_SHIFT;break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = POWERPC_MIN_PAGE_SHIFT;break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + PPC_IRQ: info->i = ppc->irq_pending ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
|
||||
@ -1854,14 +1854,14 @@ void ppc4xx_get_info(powerpc_state *ppc, UINT32 state, cpuinfo *info)
|
||||
case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_3: info->i = ppc4xx_get_irq_line(ppc, PPC4XX_IRQ_BIT_EXT3); break;
|
||||
case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_4: info->i = ppc4xx_get_irq_line(ppc, PPC4XX_IRQ_BIT_EXT4); break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 31; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = POWERPC_MIN_PAGE_SHIFT;break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 31; break;
|
||||
case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = POWERPC_MIN_PAGE_SHIFT;break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: /* provided per-CPU */ break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(internal_ppc4xx); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(internal_ppc4xx); break;
|
||||
|
||||
/* --- everything else is handled generically --- */
|
||||
default: ppccom_get_info(ppc, state, info); break;
|
||||
|
@ -2933,15 +2933,15 @@ CPU_GET_INFO( rsp )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
|
||||
|
||||
|
@ -1522,17 +1522,17 @@ CPU_GET_INFO( s2650 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 5; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 13; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 15; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 15; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = s2650c->irq_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE + 1: info->i = s2650_get_sense(s2650c) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
|
@ -311,15 +311,15 @@ CPU_GET_INFO( saturn )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 21; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + SATURN_NMI_LINE: info->i = cpustate->nmi_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE + SATURN_IRQ_LINE: info->i = cpustate->irq_state; break;
|
||||
|
@ -179,15 +179,15 @@ CPU_GET_INFO( sc61860 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->oldpc; break;
|
||||
|
||||
|
@ -1848,15 +1848,15 @@ CPU_GET_INFO( se3208 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + SE3208_INT: info->i = se3208_state->IRQ; break;
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = se3208_state->NMI; break;
|
||||
|
@ -2338,15 +2338,15 @@ CPU_GET_INFO( sh2 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLIN: info->i = sh2->irq_line_state[SH2_INT_VBLIN]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLOUT: info->i = sh2->irq_line_state[SH2_INT_VBLOUT]; break;
|
||||
|
@ -3416,20 +3416,20 @@ CPU_GET_INFO( sh2 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
// Internal maps
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(sh2_internal_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map32 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_IO: info->internal_map32 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(sh2_internal_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map32 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_IO: info->internal_map32 = NULL; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLIN: info->i = sh2->irq_line_state[SH2_INT_VBLIN]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLOUT: info->i = sh2->irq_line_state[SH2_INT_VBLOUT]; break;
|
||||
|
@ -3643,17 +3643,17 @@ CPU_GET_INFO( sh4 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map64 = ADDRESS_MAP_NAME(sh4_internal_map); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map64 = ADDRESS_MAP_NAME(sh4_internal_map); break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + SH4_IRL0: info->i = sh4->irq_line_state[SH4_IRL0]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + SH4_IRL1: info->i = sh4->irq_line_state[SH4_IRL1]; break;
|
||||
|
@ -1081,15 +1081,15 @@ static CPU_GET_INFO( sharc )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -3; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = -2; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 64; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -3; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -2; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
|
||||
|
||||
@ -1206,7 +1206,7 @@ static CPU_GET_INFO( sharc )
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
|
||||
case CPUINFO_FCT_READ: info->read = CPU_READ_NAME(sharc); break;
|
||||
case CPUINFO_FCT_READOP: info->readop = CPU_READOP_NAME(sharc); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map64 = ADDRESS_MAP_NAME(internal_pgm); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map64 = ADDRESS_MAP_NAME(internal_pgm); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "SHARC"); break;
|
||||
|
@ -449,15 +449,15 @@ CPU_GET_INFO( sm8500 )
|
||||
case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break;
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_INPUT_STATE + 0:
|
||||
case CPUINFO_INT_INPUT_STATE + 1:
|
||||
case CPUINFO_INT_INPUT_STATE + 2:
|
||||
|
@ -1734,15 +1734,15 @@ CPU_GET_INFO( spc700 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 8; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = (LINE_IRQ == IRQ_SET) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
|
||||
|
@ -824,15 +824,15 @@ CPU_GET_INFO( ssp1601 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 4; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 4; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: /* not implemented */ break;
|
||||
|
||||
@ -872,8 +872,8 @@ CPU_GET_INFO( ssp1601 )
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ssp1601); break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ssp1601_state->g_cycles; break;
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map16 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_IO: info->internal_map16 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map16 = NULL; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_IO: info->internal_map16 = NULL; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, CHIP_NAME); break;
|
||||
|
@ -418,15 +418,15 @@ CPU_GET_INFO( t11 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 12; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 110; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + T11_IRQ0: info->i = (cpustate->irq_state & 1) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
case CPUINFO_INT_INPUT_STATE + T11_IRQ1: info->i = (cpustate->irq_state & 2) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
|
@ -2741,17 +2741,17 @@ CPU_GET_INFO( tmp90840 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 26; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->irq_state & (1 << INTNMI); break;
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ0: info->i = cpustate->irq_state & (1 << INT0); break;
|
||||
@ -2787,7 +2787,7 @@ CPU_GET_INFO( tmp90840 )
|
||||
case CPUINFO_FCT_BURN: info->burn = CPU_BURN_NAME(t90); break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(t90); break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tmp90840_mem); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tmp90840_mem); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
|
||||
@ -2833,7 +2833,7 @@ CPU_GET_INFO( tmp90841 )
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tmp90841_mem); return;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tmp90841_mem); return;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
|
||||
@ -2849,7 +2849,7 @@ CPU_GET_INFO( tmp91640 )
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tmp91640_mem); return;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tmp91640_mem); return;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
|
||||
@ -2865,7 +2865,7 @@ CPU_GET_INFO( tmp91641 )
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tmp91641_mem); return;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tmp91641_mem); return;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
|
||||
|
@ -955,15 +955,15 @@ CPU_GET_INFO( tms32010 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 12; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 5; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 12; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 5; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = -1; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = (cpustate->INTF & TMS32010_INT_PENDING) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
|
||||
@ -990,7 +990,7 @@ CPU_GET_INFO( tms32010 )
|
||||
case CPUINFO_FCT_BURN: info->burn = NULL; break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32010); break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map16 = ADDRESS_MAP_NAME(tms32010_ram); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map16 = ADDRESS_MAP_NAME(tms32010_ram); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "TMS32010"); break;
|
||||
|
@ -2300,15 +2300,15 @@ CPU_GET_INFO( tms32025 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1*CLK; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 5*CLK; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 17; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 17; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = -1; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + TMS32025_INT0: info->i = (cpustate->IFR & 0x01) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
case CPUINFO_INT_INPUT_STATE + TMS32025_INT1: info->i = (cpustate->IFR & 0x02) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
|
@ -708,15 +708,15 @@ CPU_GET_INFO( tms32031 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -2; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -2; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + TMS32031_IRQ0: info->i = (IREG(tms, TMR_IF) & (1 << TMS32031_IRQ0)) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
case CPUINFO_INT_INPUT_STATE + TMS32031_IRQ1: info->i = (IREG(tms, TMR_IF) & (1 << TMS32031_IRQ1)) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
@ -783,7 +783,7 @@ CPU_GET_INFO( tms32031 )
|
||||
case CPUINFO_FCT_BURN: info->burn = NULL; break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32031); break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms->icount; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(internal_32031); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(internal_32031); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "TMS32031"); break;
|
||||
@ -854,7 +854,7 @@ CPU_GET_INFO( tms32032 )
|
||||
{
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms32032); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(internal_32032); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(internal_32032); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "TMS32032"); break;
|
||||
|
@ -583,15 +583,15 @@ static CPU_GET_INFO( tms )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 5; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
|
||||
|
||||
@ -632,8 +632,8 @@ static CPU_GET_INFO( tms )
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32051); break;
|
||||
case CPUINFO_FCT_READ: info->read = CPU_READ_NAME(tms); break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(internal_pgm); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map16 = ADDRESS_MAP_NAME(internal_data); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(internal_pgm); break;
|
||||
case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: info->internal_map16 = ADDRESS_MAP_NAME(internal_data); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "TMS3205x"); break;
|
||||
|
@ -1719,8 +1719,8 @@ static CPU_SET_INFO( tms34010 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are set as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(tms, 0, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(tms, 1, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(tms, 0, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(tms, 1, info->i); break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1737,46 +1737,42 @@ CPU_GET_INFO( tms34010 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms34010_state); break;
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
|
||||
case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
|
||||
case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
|
||||
case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
|
||||
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 8; break;
|
||||
case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 10000; break;
|
||||
case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms34010_state); break;
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
|
||||
case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
|
||||
case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
|
||||
case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
|
||||
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 8; break;
|
||||
case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 10000; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 3; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 3; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = (IOREG(tms, REG_INTPEND) & TMS34010_INT1) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
case CPUINFO_INT_INPUT_STATE + 1: info->i = (IOREG(tms, REG_INTPEND) & TMS34010_INT2) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms34010); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms34010); break;
|
||||
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms34010); break;
|
||||
case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tms34010); break;
|
||||
case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms34010); break;
|
||||
case CPUINFO_FCT_BURN: info->burn = NULL; break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms34010); break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms->icount; break;
|
||||
case CPUINFO_PTR_STATE_TABLE: info->state_table = &tms->state; break;
|
||||
/* --- the following bits of info are returned as pointers to functions --- */
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms34010); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms34010); break;
|
||||
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms34010); break;
|
||||
case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tms34010); break;
|
||||
case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms34010); break;
|
||||
case CPUINFO_FCT_BURN: info->burn = NULL; break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms34010); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers --- */
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms->icount; break;
|
||||
case CPUINFO_PTR_STATE_TABLE: info->state_table = &tms->state; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "TMS34010"); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "TMS34010"); break;
|
||||
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "Texas Instruments 340x0"); break;
|
||||
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0"); break;
|
||||
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
|
||||
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0"); break;
|
||||
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
|
||||
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Alex Pasadyn/Zsolt Vasvari\nParts based on code by Aaron Giles"); break;
|
||||
|
||||
case CPUINFO_STR_FLAGS:
|
||||
@ -1813,14 +1809,14 @@ CPU_GET_INFO( tms34020 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
|
||||
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms34020); break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms34020); break;
|
||||
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms34020); break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms34020); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "TMS34020"); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "TMS34020"); break;
|
||||
|
||||
default: CPU_GET_INFO_CALL(tms34010); break;
|
||||
}
|
||||
|
@ -272,15 +272,15 @@ CPU_GET_INFO( tms7000 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 48; break; /* 48 represents the multiply instruction, the next highest is 17 */
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + TMS7000_IRQ1_LINE: info->i = cpustate->irq_state[TMS7000_IRQ1_LINE]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + TMS7000_IRQ2_LINE: info->i = cpustate->irq_state[TMS7000_IRQ2_LINE]; break;
|
||||
|
@ -4674,11 +4674,11 @@ void TMS99XX_GET_INFO(const device_config *device, UINT32 state, cpuinfo *info)
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 10;/*TODO: compute this value*/break;
|
||||
|
||||
#if (USE_16_BIT_ACCESSORS)
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
#else
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
#endif
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM:
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM:
|
||||
#if (TMS99XX_MODEL == TI990_10_ID)
|
||||
/* this CPU has a mapper to expand the address space */
|
||||
info->i = 21;
|
||||
@ -4693,12 +4693,12 @@ void TMS99XX_GET_INFO(const device_config *device, UINT32 state, cpuinfo *info)
|
||||
info->i = 16;
|
||||
#endif
|
||||
break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO:
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO:
|
||||
#if (TMS99XX_MODEL == TI990_10_ID)
|
||||
/* 3 MSBs do exist, although they are not connected (don't ask...) */
|
||||
info->i = 15;
|
||||
@ -4719,7 +4719,7 @@ void TMS99XX_GET_INFO(const device_config *device, UINT32 state, cpuinfo *info)
|
||||
info->i = 15;
|
||||
#endif
|
||||
break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
/* not implemented */
|
||||
/* case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = get_irq_line(INPUT_LINE_NMI); break;
|
||||
|
@ -2016,15 +2016,15 @@ CPU_GET_INFO( upd7810 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = (IRR & INTNMI) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
case CPUINFO_INT_INPUT_STATE + UPD7810_INTF1: info->i = (IRR & INTF1) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
|
@ -1050,15 +1050,15 @@ CPU_GET_INFO( v30mz )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 80; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = (cpustate->pending_irq & INT_IRQ) ? ASSERT_LINE : CLEAR_LINE; break;
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
|
||||
|
@ -578,15 +578,15 @@ CPU_GET_INFO( v60 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 24; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_line; break;
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_line; break;
|
||||
@ -744,9 +744,9 @@ CPU_GET_INFO( v70 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v70); break;
|
||||
|
@ -1154,15 +1154,15 @@ CPU_GET_INFO( v810 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 32; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_line; break;
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_line; break;
|
||||
|
@ -2505,15 +2505,15 @@ static CPU_SET_INFO( z180 )
|
||||
{
|
||||
/* --- the following bits of info are set as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + Z180_INT0: set_irq_line(cpustate, Z180_INT0, info->i); break;
|
||||
case CPUINFO_INT_INPUT_STATE + Z180_INT0: set_irq_line(cpustate, Z180_INT0, info->i); break;
|
||||
|
||||
/* --- the following bits of info are set as pointers to data or functions --- */
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: cc[Z180_TABLE_op] = info->p; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: cc[Z180_TABLE_cb] = info->p; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: cc[Z180_TABLE_ed] = info->p; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xy: cc[Z180_TABLE_xy] = info->p; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xycb: cc[Z180_TABLE_xycb] = info->p; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ex: cc[Z180_TABLE_ex] = info->p; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: cc[Z180_TABLE_op] = info->p; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: cc[Z180_TABLE_cb] = info->p; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: cc[Z180_TABLE_ed] = info->p; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xy: cc[Z180_TABLE_xy] = info->p; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xycb: cc[Z180_TABLE_xycb] = info->p; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ex: cc[Z180_TABLE_ex] = info->p; break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -2539,39 +2539,39 @@ CPU_GET_INFO( z180 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE + Z180_INT0: info->i = cpustate->irq_state[0]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + Z180_INT1: info->i = cpustate->irq_state[1]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + Z180_INT2: info->i = cpustate->irq_state[2]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE + Z180_INT0: info->i = cpustate->irq_state[0]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + Z180_INT1: info->i = cpustate->irq_state[1]; break;
|
||||
case CPUINFO_INT_INPUT_STATE + Z180_INT2: info->i = cpustate->irq_state[2]; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z180); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z180); break;
|
||||
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z180); break;
|
||||
case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(z180); break;
|
||||
case CPUINFO_FCT_BURN: info->burn = CPU_BURN_NAME(z180); break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z180); break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
|
||||
case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(z180); break;
|
||||
case CPUINFO_PTR_STATE_TABLE: info->state_table = &cpustate->state; break;
|
||||
case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(z180);break;
|
||||
case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(z180);break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: info->p = (void *)cc[Z180_TABLE_op]; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: info->p = (void *)cc[Z180_TABLE_cb]; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: info->p = (void *)cc[Z180_TABLE_ed]; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xy: info->p = (void *)cc[Z180_TABLE_xy]; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xycb: info->p = (void *)cc[Z180_TABLE_xycb]; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ex: info->p = (void *)cc[Z180_TABLE_ex]; break;
|
||||
/* --- the following bits of info are returned as pointers --- */
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z180); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z180); break;
|
||||
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z180); break;
|
||||
case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(z180); break;
|
||||
case CPUINFO_FCT_BURN: info->burn = CPU_BURN_NAME(z180); break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z180); break;
|
||||
case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(z180); break;
|
||||
case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(z180); break;
|
||||
case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(z180); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to functions --- */
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
|
||||
case CPUINFO_PTR_STATE_TABLE: info->state_table = &cpustate->state; break;
|
||||
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: info->p = (void *)cc[Z180_TABLE_op]; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: info->p = (void *)cc[Z180_TABLE_cb]; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: info->p = (void *)cc[Z180_TABLE_ed]; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xy: info->p = (void *)cc[Z180_TABLE_xy]; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xycb: info->p = (void *)cc[Z180_TABLE_xycb]; break;
|
||||
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ex: info->p = (void *)cc[Z180_TABLE_ex]; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "Z180"); break;
|
||||
|
@ -3645,42 +3645,40 @@ CPU_GET_INFO( z80 )
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(z80_state); break;
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
|
||||
case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
|
||||
case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
|
||||
case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
|
||||
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
|
||||
case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
|
||||
case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(z80_state); break;
|
||||
case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
|
||||
case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
|
||||
case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
|
||||
case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
|
||||
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
|
||||
case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
|
||||
case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = z80->nmi_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = z80->irq_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = z80->nmi_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = z80->irq_state; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z80); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z80); break;
|
||||
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z80); break;
|
||||
case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(z80); break;
|
||||
case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(z80); break;
|
||||
case CPUINFO_FCT_BURN: info->burn = NULL; break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z80); break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &z80->icount; break;
|
||||
case CPUINFO_PTR_STATE_TABLE: info->state_table = &z80->state; break;
|
||||
case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(z80);break;
|
||||
case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(z80);break;
|
||||
/* --- the following bits of info are returned as pointers to functions --- */
|
||||
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z80); break;
|
||||
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z80); break;
|
||||
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z80); break;
|
||||
case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(z80); break;
|
||||
case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(z80); break;
|
||||
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z80); break;
|
||||
case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(z80); break;
|
||||
case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(z80); break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers --- */
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &z80->icount; break;
|
||||
case CPUINFO_PTR_STATE_TABLE: info->state_table = &z80->state; break;
|
||||
|
||||
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_op: info->p = (void *)cc[Z80_TABLE_op]; break;
|
||||
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_cb: info->p = (void *)cc[Z80_TABLE_cb]; break;
|
||||
@ -3690,11 +3688,11 @@ CPU_GET_INFO( z80 )
|
||||
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_ex: info->p = (void *)cc[Z80_TABLE_ex]; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "Z80"); break;
|
||||
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "Zilog Z80"); break;
|
||||
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "3.8"); break;
|
||||
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
|
||||
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "Z80"); break;
|
||||
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "Zilog Z80"); break;
|
||||
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "3.8"); break;
|
||||
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
|
||||
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
|
||||
|
||||
case CPUINFO_STR_FLAGS:
|
||||
sprintf(info->s, "%c%c%c%c%c%c%c%c",
|
||||
|
@ -523,15 +523,15 @@ CPU_GET_INFO( z8000 )
|
||||
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
|
||||
case CPUINFO_INT_MAX_CYCLES: info->i = 744; break;
|
||||
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
|
||||
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
|
||||
case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_state[0]; break;
|
||||
|
@ -29,15 +29,19 @@
|
||||
#define MAX_INPUT_EVENTS 32
|
||||
|
||||
|
||||
/* Interrupt line constants */
|
||||
/* I/O line states */
|
||||
enum
|
||||
{
|
||||
/* line states */
|
||||
CLEAR_LINE = 0, /* clear (a fired, held or pulsed) line */
|
||||
CLEAR_LINE = 0, /* clear (a fired or held) line */
|
||||
ASSERT_LINE, /* assert an interrupt immediately */
|
||||
HOLD_LINE, /* hold interrupt line until acknowledged */
|
||||
PULSE_LINE, /* pulse interrupt line for one instruction */
|
||||
PULSE_LINE /* pulse interrupt line instantaneously (only for NMI, RESET) */
|
||||
};
|
||||
|
||||
|
||||
/* I/O line definitions */
|
||||
enum
|
||||
{
|
||||
/* input lines */
|
||||
MAX_INPUT_LINES = 32+3,
|
||||
INPUT_LINE_IRQ0 = 0,
|
||||
@ -61,14 +65,14 @@ enum
|
||||
};
|
||||
|
||||
|
||||
/* Maximum number of registers of any CPU */
|
||||
/* register definitions */
|
||||
enum
|
||||
{
|
||||
MAX_REGS = 256,
|
||||
|
||||
REG_GENPCBASE = MAX_REGS - 1,
|
||||
REG_GENPC = MAX_REGS - 2,
|
||||
REG_GENSP = MAX_REGS - 3
|
||||
REG_GENPCBASE = MAX_REGS - 1, /* generic "base" PC, should point to start of current opcode */
|
||||
REG_GENPC = MAX_REGS - 2, /* generic PC, may point within an opcode */
|
||||
REG_GENSP = MAX_REGS - 3 /* generic SP, or closest equivalent */
|
||||
};
|
||||
|
||||
|
||||
@ -92,14 +96,29 @@ enum
|
||||
CPUINFO_INT_MAX_CYCLES, /* R/O: maximum cycles for a single instruction */
|
||||
|
||||
CPUINFO_INT_DATABUS_WIDTH, /* R/O: data bus size for each address space (8,16,32,64) */
|
||||
CPUINFO_INT_DATABUS_WIDTH_PROGRAM = CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM,
|
||||
CPUINFO_INT_DATABUS_WIDTH_DATA = CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA,
|
||||
CPUINFO_INT_DATABUS_WIDTH_IO = CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO,
|
||||
CPUINFO_INT_DATABUS_WIDTH_LAST = CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACES - 1,
|
||||
CPUINFO_INT_ADDRBUS_WIDTH, /* R/O: address bus size for each address space (12-32) */
|
||||
CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM = CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM,
|
||||
CPUINFO_INT_ADDRBUS_WIDTH_DATA = CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA,
|
||||
CPUINFO_INT_ADDRBUS_WIDTH_IO = CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO,
|
||||
CPUINFO_INT_ADDRBUS_WIDTH_LAST = CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACES - 1,
|
||||
CPUINFO_INT_ADDRBUS_SHIFT, /* R/O: shift applied to addresses each address space (+3 means >>3, -1 means <<1) */
|
||||
CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM = CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM,
|
||||
CPUINFO_INT_ADDRBUS_SHIFT_DATA = CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA,
|
||||
CPUINFO_INT_ADDRBUS_SHIFT_IO = CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO,
|
||||
CPUINFO_INT_ADDRBUS_SHIFT_LAST = CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACES - 1,
|
||||
CPUINFO_INT_LOGADDR_WIDTH, /* R/O: address bus size for logical accesses in each space (0=same as physical) */
|
||||
CPUINFO_INT_LOGADDR_WIDTH_PROGRAM = CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_PROGRAM,
|
||||
CPUINFO_INT_LOGADDR_WIDTH_DATA = CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_DATA,
|
||||
CPUINFO_INT_LOGADDR_WIDTH_IO = CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_IO,
|
||||
CPUINFO_INT_LOGADDR_WIDTH_LAST = CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACES - 1,
|
||||
CPUINFO_INT_PAGE_SHIFT, /* R/O: size of a page log 2 (i.e., 12=4096), or 0 if paging not supported */
|
||||
CPUINFO_INT_PAGE_SHIFT_PROGRAM = CPUINFO_INT_PAGE_SHIFT + ADDRESS_SPACE_PROGRAM,
|
||||
CPUINFO_INT_PAGE_SHIFT_DATA = CPUINFO_INT_PAGE_SHIFT + ADDRESS_SPACE_DATA,
|
||||
CPUINFO_INT_PAGE_SHIFT_IO = CPUINFO_INT_PAGE_SHIFT + ADDRESS_SPACE_IO,
|
||||
CPUINFO_INT_PAGE_SHIFT_LAST = CPUINFO_INT_PAGE_SHIFT + ADDRESS_SPACES - 1,
|
||||
|
||||
CPUINFO_INT_INPUT_STATE, /* R/W: states for each input line */
|
||||
@ -121,6 +140,9 @@ enum
|
||||
CPUINFO_PTR_INSTRUCTION_COUNTER = DEVINFO_PTR_CLASS_SPECIFIC,
|
||||
/* R/O: int *icount */
|
||||
CPUINFO_PTR_INTERNAL_MEMORY_MAP, /* R/O: const addrmap_token *map */
|
||||
CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM = CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM,
|
||||
CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA = CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA,
|
||||
CPUINFO_PTR_INTERNAL_MEMORY_MAP_IO = CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_IO,
|
||||
CPUINFO_PTR_INTERNAL_MEMORY_MAP_LAST = CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACES - 1,
|
||||
CPUINFO_PTR_STATE_TABLE, /* R/O: cpu_state_table *state */
|
||||
|
||||
|
@ -372,7 +372,6 @@ static UINT32 *dcs_external_program_ram;
|
||||
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Prototypes
|
||||
@ -583,6 +582,21 @@ ADDRESS_MAP_END
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* CPU configuration
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static const adsp21xx_config adsp_config =
|
||||
{
|
||||
NULL, /* callback for serial receive */
|
||||
sound_tx_callback, /* callback for serial transmit */
|
||||
timer_enable_callback /* callback for timer fired */
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Original DCS Machine Drivers
|
||||
@ -592,6 +606,7 @@ ADDRESS_MAP_END
|
||||
/* Basic DCS system with ADSP-2105 and 2k of SRAM (T-unit, V-unit, Killer Instinct) */
|
||||
MACHINE_DRIVER_START( dcs_audio_2k )
|
||||
MDRV_CPU_ADD("dcs", ADSP2105, XTAL_10MHz)
|
||||
MDRV_CPU_CONFIG(adsp_config)
|
||||
MDRV_CPU_PROGRAM_MAP(dcs_2k_program_map,0)
|
||||
MDRV_CPU_DATA_MAP(dcs_2k_data_map,0)
|
||||
|
||||
@ -630,6 +645,7 @@ MACHINE_DRIVER_END
|
||||
|
||||
MACHINE_DRIVER_START( dcs2_audio_2115 )
|
||||
MDRV_CPU_ADD("dcs2", ADSP2115, XTAL_16MHz)
|
||||
MDRV_CPU_CONFIG(adsp_config)
|
||||
MDRV_CPU_PROGRAM_MAP(dcs2_2115_program_map,0)
|
||||
MDRV_CPU_DATA_MAP(dcs2_2115_data_map,0)
|
||||
|
||||
@ -660,6 +676,7 @@ MACHINE_DRIVER_END
|
||||
|
||||
MACHINE_DRIVER_START( dcs2_audio_dsio )
|
||||
MDRV_CPU_ADD("dsio", ADSP2181, XTAL_32MHz)
|
||||
MDRV_CPU_CONFIG(adsp_config)
|
||||
MDRV_CPU_PROGRAM_MAP(dsio_program_map,0)
|
||||
MDRV_CPU_DATA_MAP(dsio_data_map,0)
|
||||
MDRV_CPU_IO_MAP(dsio_io_map,0)
|
||||
@ -683,6 +700,7 @@ MACHINE_DRIVER_END
|
||||
|
||||
MACHINE_DRIVER_START( dcs2_audio_denver )
|
||||
MDRV_CPU_ADD("denver", ADSP2181, XTAL_33_333MHz)
|
||||
MDRV_CPU_CONFIG(adsp_config)
|
||||
MDRV_CPU_PROGRAM_MAP(denver_program_map,0)
|
||||
MDRV_CPU_DATA_MAP(denver_data_map,0)
|
||||
MDRV_CPU_IO_MAP(denver_io_map,0)
|
||||
@ -904,7 +922,6 @@ static void dcs_register_state(running_machine *machine)
|
||||
state_save_register_postload(machine, sdrc_postload, NULL);
|
||||
}
|
||||
|
||||
|
||||
void dcs_init(running_machine *machine)
|
||||
{
|
||||
memset(&dcs, 0, sizeof(dcs));
|
||||
@ -917,10 +934,6 @@ void dcs_init(running_machine *machine)
|
||||
dcs.rev = 1;
|
||||
dcs.channels = 1;
|
||||
|
||||
/* initialize the ADSP Tx and timer callbacks */
|
||||
adsp21xx_set_tx_handler(dcs.cpu, sound_tx_callback);
|
||||
adsp21xx_set_timer_handler(dcs.cpu, timer_enable_callback);
|
||||
|
||||
/* configure boot and sound ROMs */
|
||||
dcs.bootrom = (UINT16 *)memory_region(machine, "dcs");
|
||||
dcs.bootrom_words = memory_region_length(machine, "dcs") / 2;
|
||||
@ -970,10 +983,6 @@ void dcs2_init(running_machine *machine, int dram_in_mb, offs_t polling_offset)
|
||||
dcs.data = cpu_get_address_space(dcs.cpu, ADDRESS_SPACE_DATA);
|
||||
dcs.channels = 2;
|
||||
|
||||
/* initialize the ADSP Tx and timer callbacks */
|
||||
adsp21xx_set_tx_handler(dcs.cpu, sound_tx_callback);
|
||||
adsp21xx_set_timer_handler(dcs.cpu, timer_enable_callback);
|
||||
|
||||
/* always boot from the base of "dcs" */
|
||||
dcs.bootrom = (UINT16 *)memory_region(machine, "dcs");
|
||||
dcs.bootrom_words = memory_region_length(machine, "dcs") / 2;
|
||||
|
@ -194,9 +194,6 @@ static MACHINE_RESET( common )
|
||||
adsp_ram_base[i] = opcode;
|
||||
}
|
||||
|
||||
/* initialize the ADSP Tx callback */
|
||||
adsp21xx_set_tx_handler(machine->cpu[2], adsp_tx_callback);
|
||||
|
||||
/* allocate a timer for feeding the autobuffer */
|
||||
adsp_autobuffer_timer = timer_alloc(machine, adsp_autobuffer_irq, NULL);
|
||||
|
||||
@ -908,6 +905,13 @@ INPUT_PORTS_END
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static const adsp21xx_config adsp_config =
|
||||
{
|
||||
NULL, /* callback for serial receive */
|
||||
adsp_tx_callback, /* callback for serial transmit */
|
||||
NULL /* callback for timer fired */
|
||||
};
|
||||
|
||||
static const tms32031_config tms_config =
|
||||
{
|
||||
0x1000,
|
||||
@ -925,10 +929,11 @@ static MACHINE_DRIVER_START( gaelco3d )
|
||||
MDRV_CPU_VBLANK_INT("main", vblank_gen)
|
||||
|
||||
MDRV_CPU_ADD("tms", TMS32031, 60000000)
|
||||
MDRV_CPU_PROGRAM_MAP(tms_map,0)
|
||||
MDRV_CPU_CONFIG(tms_config)
|
||||
MDRV_CPU_PROGRAM_MAP(tms_map,0)
|
||||
|
||||
MDRV_CPU_ADD("adsp", ADSP2115, 16000000)
|
||||
MDRV_CPU_CONFIG(adsp_config)
|
||||
MDRV_CPU_PROGRAM_MAP(adsp_program_map,0)
|
||||
MDRV_CPU_DATA_MAP(adsp_data_map, 0)
|
||||
|
||||
|
@ -133,12 +133,7 @@ CPUS += TMS32031
|
||||
CPUS += TMS32032
|
||||
CPUS += TMS32051
|
||||
CPUS += CCPU
|
||||
CPUS += ADSP2100
|
||||
CPUS += ADSP2101
|
||||
CPUS += ADSP2104
|
||||
CPUS += ADSP2105
|
||||
CPUS += ADSP2115
|
||||
CPUS += ADSP2181
|
||||
CPUS += ADSP21XX
|
||||
CPUS += PSXCPU
|
||||
CPUS += CXD8661R
|
||||
CPUS += ASAP
|
||||
|
Loading…
Reference in New Issue
Block a user