From 9c3661b004edb8437b209c068252095760a4e02e Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Sat, 25 Aug 2018 01:28:26 +0200 Subject: [PATCH] -st62xx: Various updates: [Ryan Holtz] * Init peripheral registers to the correct values on reset. * Reworked stack display in the debugger. * Hooked up data RAM. * Hooked up ROM and RAM banking. * Added named registers to the disassembler. --- src/devices/cpu/st62xx/st62xx.cpp | 47 ++++++++++-- src/devices/cpu/st62xx/st62xx.h | 7 +- src/devices/cpu/st62xx/st62xx_dasm.cpp | 102 +++++++++++-------------- src/devices/cpu/st62xx/st62xx_dasm.h | 3 + 4 files changed, 97 insertions(+), 62 deletions(-) diff --git a/src/devices/cpu/st62xx/st62xx.cpp b/src/devices/cpu/st62xx/st62xx.cpp index aa13dfed01a..7131add19fe 100644 --- a/src/devices/cpu/st62xx/st62xx.cpp +++ b/src/devices/cpu/st62xx/st62xx.cpp @@ -65,7 +65,12 @@ void st6228_device::device_start() state_add(STATE_FLAGS, "FLAGS", m_flags[0]).mask(0x3f); state_add(STATE_PC, "PC", m_pc).mask(0xfff); state_add(STATE_SP, "SP", m_stack_index).mask(0x7); - state_add(STATE_STACK, "STACK", m_stack[0]).callimport().callexport().formatstr("%04X"); + state_add(STATE_STACK0, "STACK0", m_stack[0]).formatstr("%03X"); + state_add(STATE_STACK1, "STACK1", m_stack[1]).formatstr("%03X"); + state_add(STATE_STACK2, "STACK2", m_stack[2]).formatstr("%03X"); + state_add(STATE_STACK3, "STACK3", m_stack[3]).formatstr("%03X"); + state_add(STATE_STACK4, "STACK4", m_stack[4]).formatstr("%03X"); + state_add(STATE_STACK5, "STACK5", m_stack[5]).formatstr("%03X"); state_add(STATE_A, "A", m_regs[REG_A]); state_add(STATE_X, "X", m_regs[REG_X]); state_add(STATE_Y, "Y", m_regs[REG_Y]); @@ -105,6 +110,11 @@ void st6228_device::device_reset() m_rambank->set_entry(0); m_program_rombank->set_entry(0); m_data_rombank->set_entry(0); + + m_regs[REG_TIMER_COUNT] = 0xff; + m_regs[REG_TIMER_PRESCALE] = 0x7f; + m_regs[REG_WATCHDOG] = 0xfe; + m_regs[REG_AD_CONTROL] = 0x40; } device_memory_interface::space_config_vector st6228_device::memory_space_config() const @@ -128,9 +138,6 @@ void st6228_device::state_string_export(const device_state_entry &entry, std::st (m_flags[0] & FLAG_C) ? 'C' : '.', (m_flags[0] & FLAG_Z) ? 'Z' : '.'); break; - case STATE_STACK: - str = string_format("%04X", m_stack[m_stack_index]); - break; } } @@ -143,6 +150,13 @@ WRITE8_MEMBER(st6228_device::regs_w) { offset += 0x80; + if (offset > REG_W && offset < REG_PORTA_DATA) + { + // Data RAM + m_regs[offset] = data; + return; + } + switch (offset) { case REG_X: @@ -152,6 +166,23 @@ WRITE8_MEMBER(st6228_device::regs_w) case REG_A: m_regs[offset] = data; break; + + case REG_DATA_ROM_WINDOW: + m_data_rombank->set_entry(data & 0x7f); + break; + + case REG_ROM_BANK_SELECT: + m_program_rombank->set_entry(data & 3); + break; + + case REG_RAM_BANK_SELECT: + m_rambank->set_entry(data & 1); + break; + + case REG_WATCHDOG: + // Do nothing for now + break; + default: logerror("%s: Unknown register write: %02x = %02x\n", machine().describe_context(), offset, data); break; @@ -163,6 +194,12 @@ READ8_MEMBER(st6228_device::regs_r) uint8_t ret = 0; offset += 0x80; + if (offset > REG_W && offset < REG_PORTA_DATA) + { + // Data RAM + return m_regs[offset]; + } + switch (offset) { case REG_X: @@ -395,7 +432,7 @@ void st6228_device::execute_run() case 0x0d: // LDI rr,nn { const uint8_t rr = m_program->read_byte(m_pc); - const uint8_t nn = m_program->read_byte(m_pc); + const uint8_t nn = m_program->read_byte(m_pc + 1); m_data->write_byte(rr, nn); if (nn) diff --git a/src/devices/cpu/st62xx/st62xx.h b/src/devices/cpu/st62xx/st62xx.h index 7cfd4ab84c2..cd74dc59f5b 100644 --- a/src/devices/cpu/st62xx/st62xx.h +++ b/src/devices/cpu/st62xx/st62xx.h @@ -69,7 +69,12 @@ protected: STATE_FLAGS = 1, STATE_PC, STATE_SP, - STATE_STACK, + STATE_STACK0, + STATE_STACK1, + STATE_STACK2, + STATE_STACK3, + STATE_STACK4, + STATE_STACK5, STATE_A, STATE_X, STATE_Y, diff --git a/src/devices/cpu/st62xx/st62xx_dasm.cpp b/src/devices/cpu/st62xx/st62xx_dasm.cpp index 6b8c32590ef..dc0f7bbc8c2 100644 --- a/src/devices/cpu/st62xx/st62xx_dasm.cpp +++ b/src/devices/cpu/st62xx/st62xx_dasm.cpp @@ -17,6 +17,37 @@ uint32_t st62xx_disassembler::opcode_alignment() const return 1; } +std::string st62xx_disassembler::reg_name(const uint8_t reg) +{ + static const char* REG_NAMES[256] = + { + nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, + nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, + nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, + nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, + + nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, + nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, + nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, + nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, + + "X", "Y", "V", "W", nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, + nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, + nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, + nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, + + "DRA", "DRB", "DRC", "DRD", "DDRA", "DDRB", "DDRC", "DDRD", "IOR", "DWR", "PRPR", "DRBR", "ORA", "ORB", "ORC", "ORD", + "ADR", "ADCR", "PSC", "TCR", "TSCR", nullptr, "UARTDR","UARTCR", "DWDR", nullptr, "IPR", nullptr, "SIDR", "SDSR", nullptr, nullptr, + nullptr, nullptr, nullptr, nullptr, nullptr, "ARMC", "ARSC0", "ARSC1", nullptr, "ARRC", "ARCP", "ARLR", nullptr, nullptr, nullptr, nullptr, + nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, + }; + + if (REG_NAMES[reg]) + return std::string(REG_NAMES[reg]); + else + return util::string_format("$%02Xh", reg); +} + offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) { offs_t base_pc = pc; @@ -141,22 +172,14 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d break; case 0x0d: { - const uint8_t nn = opcodes.r8(pc); - pc++; const uint8_t rr = opcodes.r8(pc); pc++; - if (rr == 0 && nn == 0x80) - util::stream_format(stream, "CLR X"); - else if (rr == 0 && nn == 0x81) - util::stream_format(stream, "CLR Y"); - else if (rr == 0 && nn == 0x82) - util::stream_format(stream, "CLR V"); - else if (rr == 0 && nn == 0x83) - util::stream_format(stream, "CLR W"); - else if (rr == 0) - util::stream_format(stream, "CLR $%Xh", nn); + const uint8_t nn = opcodes.r8(pc); + pc++; + if (nn == 0) + util::stream_format(stream, "CLR %s", reg_name(rr)); else - util::stream_format(stream, "LDI $%Xh,%Xh", rr, nn); + util::stream_format(stream, "LDI %s,%Xh", reg_name(rr), nn); break; } case 0x1d: @@ -206,9 +229,9 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d break; case 0x17: { - const uint8_t rr = opcodes.r8(pc); + const uint8_t nn = opcodes.r8(pc); pc++; - util::stream_format(stream, "LDI A,%Xh", rr); + util::stream_format(stream, "LDI A,%Xh", nn); break; } case 0x27: @@ -267,7 +290,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d { const uint8_t rr = opcodes.r8(pc); pc++; - util::stream_format(stream, "LD A,%Xh", rr); + util::stream_format(stream, "LD A,%s", reg_name(rr)); break; } case 0x2f: @@ -277,7 +300,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d { const uint8_t rr = opcodes.r8(pc); pc++; - util::stream_format(stream, "CP A,%Xh", rr); // rr + util::stream_format(stream, "CP A,%s", reg_name(rr)); // rr break; } case 0x4f: @@ -290,7 +313,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d if (rr == 0xff) util::stream_format(stream, "SLA A"); else - util::stream_format(stream, "ADD A,%Xh", rr); + util::stream_format(stream, "ADD A,%s", reg_name(rr)); break; } case 0x6f: @@ -300,18 +323,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d { const uint8_t rr = opcodes.r8(pc); pc++; - if (rr == 0xff) - util::stream_format(stream, "INC A"); // rr - else if (rr == 0x80) - util::stream_format(stream, "INC X"); // rr - else if (rr == 0x81) - util::stream_format(stream, "INC Y"); // rr - else if (rr == 0x82) - util::stream_format(stream, "INC V"); // rr - else if (rr == 0x83) - util::stream_format(stream, "INC W"); // rr - else - util::stream_format(stream, "INC %Xh", rr); // rr + util::stream_format(stream, "INC %s", reg_name(rr)); // rr break; } case 0x8f: @@ -321,7 +333,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d { const uint8_t rr = opcodes.r8(pc); pc++; - util::stream_format(stream, "LD %Xh,A", rr); // rr + util::stream_format(stream, "LD %s,A", reg_name(rr)); // rr break; } case 0xaf: @@ -331,18 +343,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d { const uint8_t rr = opcodes.r8(pc); pc++; - if (rr == 0xff) - util::stream_format(stream, "AND A,A"); // rr - else if (rr == 0x80) - util::stream_format(stream, "AND A,X"); // rr - else if (rr == 0x81) - util::stream_format(stream, "AND A,Y"); // rr - else if (rr == 0x82) - util::stream_format(stream, "AND A,V"); // rr - else if (rr == 0x83) - util::stream_format(stream, "AND A,W"); // rr - else - util::stream_format(stream, "AND A,%Xh", rr); // rr + util::stream_format(stream, "AND A,%s", reg_name(rr)); // rr break; } case 0xcf: @@ -355,7 +356,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d if (rr == 0xff) util::stream_format(stream, "CLR A", rr); else - util::stream_format(stream, "SUB A,%Xh", rr); + util::stream_format(stream, "SUB A,%s", reg_name(rr)); break; } case 0xef: @@ -365,18 +366,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d { const uint8_t rr = opcodes.r8(pc); pc++; - if (rr == 0xff) - util::stream_format(stream, "DEC A"); // rr - else if (rr == 0x80) - util::stream_format(stream, "DEC X"); // rr - else if (rr == 0x81) - util::stream_format(stream, "DEC Y"); // rr - else if (rr == 0x82) - util::stream_format(stream, "DEC V"); // rr - else if (rr == 0x83) - util::stream_format(stream, "DEC W"); // rr - else - util::stream_format(stream, "DEC %Xh", rr); // rr + util::stream_format(stream, "DEC %s", reg_name(rr)); // rr break; } default: diff --git a/src/devices/cpu/st62xx/st62xx_dasm.h b/src/devices/cpu/st62xx/st62xx_dasm.h index d3dd4c89b3a..1e30f04dd47 100644 --- a/src/devices/cpu/st62xx/st62xx_dasm.h +++ b/src/devices/cpu/st62xx/st62xx_dasm.h @@ -19,6 +19,9 @@ public: virtual uint32_t opcode_alignment() const override; virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; + +protected: + std::string reg_name(const uint8_t reg); }; #endif // MAME_CPU_ST62XX_DASM_H