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New machines marked NOT_WORKING
------------------------------- Sartorius-Werke GmbH 3733 [Mike McBike, rfka01, Vas Crabb]
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@ -3616,6 +3616,7 @@ files {
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MAME_DIR .. "src/mame/drivers/radicasi.cpp",
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MAME_DIR .. "src/mame/drivers/rvoice.cpp",
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MAME_DIR .. "src/mame/drivers/sacstate.cpp",
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MAME_DIR .. "src/mame/drivers/sartorius.cpp",
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MAME_DIR .. "src/mame/drivers/sbrain.cpp",
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MAME_DIR .. "src/mame/drivers/seattlecmp.cpp",
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MAME_DIR .. "src/mame/drivers/sh4robot.cpp",
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@ -56,7 +56,7 @@ opcode spaces. It's accessed via a 4008/4009 pair, or a 4289. With a
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support requires a 4040 with a 4289. Accesses are 4 bits wide. The
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address consists of the 8-bit value latched with the SRC instruction and
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a first/last bit that toggles on each program memory operation. There's
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no way for the CPU to get the sate of the first/last bit (even using
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no way for the CPU to get the state of the first/last bit (even using
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additional I/O to read it is difficult because it's only output during
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program memory reads and writes), so the developer has to be very
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careful to always do program memory operations in pairs or track the
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75
src/mame/drivers/sartorius.cpp
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75
src/mame/drivers/sartorius.cpp
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@ -0,0 +1,75 @@
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// license:BSD-3-Clause
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/*
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Sartorius 3733 digital scale
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Visible ICs:
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* Intel D4040 CPU
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* Intel D4289 8-bit memory controller
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* 2 * Intel P4002-1 (64+16)*4 RAM (sockets for 2 * Intel P4002-2 unpopulated)
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* 2 * 2708 1k*8 ROM labelled "129/0" and "129/1"
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* National Semiconductor MM74C907N hex open-drain P-channel buffer
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* Intersil IM6561AIJN 256*4 CMOS RAM
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* RCA CD4007AE dual complementary pair plus inverter
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* National Semicondictor CD4049CN hex inverting buffer
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* 4 * Motorola MC14099B 8-bit addressable latch
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* 2 * RCA CD4052BE 2-channel 4:1 analog switch
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Front panel has a digital display, an "R" button for switching between
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300g and 3kg ranges, and a T button for zeroing. Rear panel has a
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three-position rotary switch to select between standalone operation and
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data acquisition modes, and a 50-pin micro ribbon connector for data
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communication.
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No dates or other ASCII strings in program ROM. IC date codes up to
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1978.
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*/
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#include "emu.h"
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#include "cpu/mcs40/mcs40.h"
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namespace {
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class sart3733_state : public driver_device
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{
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public:
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sart3733_state(const machine_config &mconfig, device_type type, const char *tag) :
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driver_device(mconfig, type, tag)
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{
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}
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};
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ADDRESS_MAP_START(sart3733_rom, i4040_cpu_device::AS_ROM, 8, sart3733_state)
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AM_RANGE(0x0000, 0x07ff) AM_ROM AM_REGION("maincpu", 0x0000)
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ADDRESS_MAP_END
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ADDRESS_MAP_START(sart3733_memory, i4040_cpu_device::AS_RAM_MEMORY, 8, sart3733_state)
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AM_RANGE(0x0000, 0x007f) AM_RAM // 2 * 4002
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ADDRESS_MAP_END
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ADDRESS_MAP_START(sart3733_status, i4040_cpu_device::AS_RAM_STATUS, 8, sart3733_state)
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AM_RANGE(0x0000, 0x001f) AM_RAM // 2 * 4002
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ADDRESS_MAP_END
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MACHINE_CONFIG_START(sart3733)
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MCFG_CPU_ADD("maincpu", I4040, 750'000) // clock speed is a complete guess - can't see crystal or multi-phase clock generator
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MCFG_I4040_ROM_MAP(sart3733_rom)
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MCFG_I4040_RAM_MEMORY_MAP(sart3733_memory)
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MCFG_I4040_RAM_STATUS_MAP(sart3733_status)
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MACHINE_CONFIG_END
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INPUT_PORTS_START(sart3733)
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INPUT_PORTS_END
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ROM_START (sart3733)
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ROM_REGION(0x0800, "maincpu", 0)
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ROM_LOAD("129-0", 0x0000, 0x0400, CRC(7ba30b9a) SHA1(40f828145542c2032d30b9921c829406ba9a3679))
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ROM_LOAD("129-1", 0x0400, 0x0400, CRC(a1e2ac6e) SHA1(aaa504274bc077a0de2ba78675d1eb3ad3157b6a))
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ROM_END
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} // anonymous namespace
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SYST( 1978?, sart3733, 0, 0, sart3733, sart3733, sart3733_state, 0, "Sartorius-Werke GmbH", "3733", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW )
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@ -33255,6 +33255,9 @@ sapizps3 //
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sapizps3a //
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sapizps3b //
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@source:sartorius.cpp
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sart3733 //
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@source:saturn.cpp
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hisaturn // Hitachi HiSaturn
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saturn // 1995 Sega Saturn (USA)
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