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cop400: Properly separated COP444L from COP444C. [Curt Coder]

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This commit is contained in:
Curt Coder 2017-01-16 21:55:49 +02:00
parent 8d6054db1e
commit 9d371eb5ba
8 changed files with 772 additions and 158 deletions
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1
scripts/src/cpu.lua
View File

@ -426,6 +426,7 @@ if (CPUS["COP400"]~=null or _OPTIONS["with-tools"]) then
table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/cop400/cop410ds.cpp") table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/cop400/cop410ds.cpp")
table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/cop400/cop420ds.cpp") table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/cop400/cop420ds.cpp")
table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/cop400/cop444ds.cpp") table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/cop400/cop444ds.cpp")
table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/cop400/cop424ds.cpp")
end end
-------------------------------------------------- --------------------------------------------------

313
src/devices/cpu/cop400/cop400.cpp
View File

@ -10,29 +10,28 @@
Type ROM RAM G D IN Type ROM RAM G D IN
COP410 512x8 32x4 none COP410 512x8 32x4 N/A
COP411 512x8 32x4 0-2 0-1 none COP411 512x8 32x4 0-2 0-1 N/A
COP401 none 32x4 none COP413 512x8 32x4 N/A N/A
COP413? COP401 N/A 32x4 N/A
COP414?
COP415?
COP405?
COP420 1024x8 64x4 COP420 1024x8 64x4
COP421 1024x8 64x4 none COP421 1024x8 64x4 N/A
COP422 1024x8 64x4 2-3 2-3 none COP422 1024x8 64x4 2-3 2-3 N/A
COP402 none 64x4 COP402 N/A 64x4
COP444 2048x8 128x4 COP444L 2048x8 128x4
COP445 2048x8 128x4 none COP445L 2048x8 128x4 N/A
COP424 1024x8 64x4 COP404L N/A 128x4
COP425 1024x8 64x4 none
COP426 1024x8 64x4 2-3 2-3
COP404 none none
COP440 2048x8 160x4 COP424C 1024x8 64x4
COP441 2048x8 160x4 COP425C 1024x8 64x4 N/A
COP442 2048x8 160x4 COP426C 1024x8 64x4 2-3 2-3
COP444C 2048x8 128x4
COP445C 2048x8 128x4 N/A
COP446C 2048x8 128x4 2-3 2-3
COP404C N/A 128x4
**************************************************************************** ****************************************************************************
@ -48,10 +47,10 @@
TODO: TODO:
- CKO sync input - fix state masks
- COP410L/COP410C
- save internal RAM when CKO is RAM power supply pin - save internal RAM when CKO is RAM power supply pin
- COP413/COP414/COP415/COP405 - COP404L opcode map switching, dual timer, microbus enable
- COP404 opcode map switching, dual timer, microbus enable
*/ */
@ -67,12 +66,17 @@ const device_type COP402 = &device_creator<cop402_cpu_device>;
const device_type COP420 = &device_creator<cop420_cpu_device>; const device_type COP420 = &device_creator<cop420_cpu_device>;
const device_type COP421 = &device_creator<cop421_cpu_device>; const device_type COP421 = &device_creator<cop421_cpu_device>;
const device_type COP422 = &device_creator<cop422_cpu_device>; const device_type COP422 = &device_creator<cop422_cpu_device>;
const device_type COP404 = &device_creator<cop404_cpu_device>; const device_type COP404L = &device_creator<cop404l_cpu_device>;
const device_type COP424 = &device_creator<cop424_cpu_device>; const device_type COP444L = &device_creator<cop444l_cpu_device>;
const device_type COP425 = &device_creator<cop425_cpu_device>; const device_type COP445L = &device_creator<cop445l_cpu_device>;
const device_type COP426 = &device_creator<cop426_cpu_device>; const device_type COP404C = &device_creator<cop404c_cpu_device>;
const device_type COP444 = &device_creator<cop444_cpu_device>; const device_type COP424C = &device_creator<cop424c_cpu_device>;
const device_type COP445 = &device_creator<cop445_cpu_device>; const device_type COP425C = &device_creator<cop425c_cpu_device>;
const device_type COP426C = &device_creator<cop426c_cpu_device>;
const device_type COP444C = &device_creator<cop444c_cpu_device>;
const device_type COP445C = &device_creator<cop445c_cpu_device>;
const device_type COP446C = &device_creator<cop446c_cpu_device>;
/*************************************************************************** /***************************************************************************
@ -203,8 +207,17 @@ cop400_cpu_device::cop400_cpu_device(const machine_config &mconfig, device_type
} }
break; break;
case COP444_FEATURE: case COP444L_FEATURE:
m_opcode_map = COP444_OPCODE_MAP; m_opcode_map = COP444L_OPCODE_MAP;
for (int r = 0; r < 8; r++) {
m_InstLen[0x60 + r] = 2; // JMP
m_InstLen[0x68 + r] = 2; // JSR
}
break;
case COP424C_FEATURE:
m_opcode_map = COP424C_OPCODE_MAP;
for (int r = 0; r < 8; r++) { for (int r = 0; r < 8; r++) {
m_InstLen[0x60 + r] = 2; // JMP m_InstLen[0x60 + r] = 2; // JMP
@ -252,36 +265,58 @@ cop422_cpu_device::cop422_cpu_device(const machine_config &mconfig, const char *
{ {
} }
cop404_cpu_device::cop404_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) cop404l_cpu_device::cop404l_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP404, "COP404", tag, owner, clock, "cop404", __FILE__, 11, 7, COP444_FEATURE, 0xf, 0xf, 0xf, true, true, nullptr, ADDRESS_MAP_NAME(data_128b)) : cop400_cpu_device(mconfig, COP404L, "COP404L", tag, owner, clock, "cop404l", __FILE__, 11, 7, COP444L_FEATURE, 0xf, 0xf, 0xf, true, true, nullptr, ADDRESS_MAP_NAME(data_128b))
{ {
} }
cop424_cpu_device::cop424_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) cop444l_cpu_device::cop444l_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP424, "COP424", tag, owner, clock, "cop424", __FILE__, 10, 6, COP444_FEATURE, 0xf, 0xf, 0xf, true, true, ADDRESS_MAP_NAME(program_1kb), ADDRESS_MAP_NAME(data_64b)) : cop400_cpu_device(mconfig, COP444L, "COP444L", tag, owner, clock, "cop444l", __FILE__, 11, 7, COP444L_FEATURE, 0xf, 0xf, 0xf, true, true, ADDRESS_MAP_NAME(program_2kb), ADDRESS_MAP_NAME(data_128b))
{ {
} }
cop425_cpu_device::cop425_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) cop445l_cpu_device::cop445l_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP425, "COP425", tag, owner, clock, "cop425", __FILE__, 10, 6, COP444_FEATURE, 0xf, 0xf, 0, true, false, ADDRESS_MAP_NAME(program_1kb), ADDRESS_MAP_NAME(data_64b)) : cop400_cpu_device(mconfig, COP445L, "COP445L", tag, owner, clock, "cop445l", __FILE__, 11, 7, COP444L_FEATURE, 0x7, 0x3, 0, true, false, ADDRESS_MAP_NAME(program_2kb), ADDRESS_MAP_NAME(data_128b))
{ {
} }
cop426_cpu_device::cop426_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) cop404c_cpu_device::cop404c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP426, "COP426", tag, owner, clock, "cop426", __FILE__, 10, 6, COP444_FEATURE, 0xe, 0xe, 0xf, true, true, ADDRESS_MAP_NAME(program_1kb), ADDRESS_MAP_NAME(data_64b)) : cop400_cpu_device(mconfig, COP404C, "COP404C", tag, owner, clock, "cop404c", __FILE__, 11, 7, COP424C_FEATURE, 0xf, 0xf, 0xf, true, true, nullptr, ADDRESS_MAP_NAME(data_128b))
{ {
} }
cop444_cpu_device::cop444_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) cop424c_cpu_device::cop424c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP444, "COP444", tag, owner, clock, "cop444", __FILE__, 11, 7, COP444_FEATURE, 0xf, 0xf, 0xf, true, true, ADDRESS_MAP_NAME(program_2kb), ADDRESS_MAP_NAME(data_128b)) : cop400_cpu_device(mconfig, COP424C, "COP424C", tag, owner, clock, "cop424c", __FILE__, 10, 6, COP424C_FEATURE, 0xf, 0xf, 0xf, true, true, ADDRESS_MAP_NAME(program_1kb), ADDRESS_MAP_NAME(data_64b))
{ {
} }
cop445_cpu_device::cop445_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) cop425c_cpu_device::cop425c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP445, "COP445", tag, owner, clock, "cop445", __FILE__, 11, 7, COP444_FEATURE, 0x7, 0x3, 0, true, false, ADDRESS_MAP_NAME(program_2kb), ADDRESS_MAP_NAME(data_128b)) : cop400_cpu_device(mconfig, COP425C, "COP425C", tag, owner, clock, "cop425c", __FILE__, 10, 6, COP424C_FEATURE, 0xf, 0xf, 0, true, false, ADDRESS_MAP_NAME(program_1kb), ADDRESS_MAP_NAME(data_64b))
{ {
} }
cop426c_cpu_device::cop426c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP426C, "COP426C", tag, owner, clock, "cop426c", __FILE__, 10, 6, COP424C_FEATURE, 0xe, 0xe, 0xf, true, true, ADDRESS_MAP_NAME(program_1kb), ADDRESS_MAP_NAME(data_64b))
{
}
cop444c_cpu_device::cop444c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP444C, "COP444C", tag, owner, clock, "cop444c", __FILE__, 11, 7, COP424C_FEATURE, 0xf, 0xf, 0xf, true, true, ADDRESS_MAP_NAME(program_2kb), ADDRESS_MAP_NAME(data_128b))
{
}
cop445c_cpu_device::cop445c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP445C, "COP445C", tag, owner, clock, "cop445c", __FILE__, 11, 7, COP424C_FEATURE, 0xf, 0xf, 0, true, false, ADDRESS_MAP_NAME(program_2kb), ADDRESS_MAP_NAME(data_128b))
{
}
cop446c_cpu_device::cop446c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP446C, "COP446C", tag, owner, clock, "cop446c", __FILE__, 11, 7, COP424C_FEATURE, 0xe, 0xe, 0xf, true, true, ADDRESS_MAP_NAME(program_2kb), ADDRESS_MAP_NAME(data_128b))
{
}
/*************************************************************************** /***************************************************************************
INLINE FUNCTIONS INLINE FUNCTIONS
***************************************************************************/ ***************************************************************************/
@ -606,7 +641,7 @@ const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP420_OPCODE_MAP
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jid) OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jid)
}; };
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP444_OPCODE_23_MAP[256] = const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP444L_OPCODE_23_MAP[256] =
{ {
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
@ -645,23 +680,23 @@ const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP444_OPCODE_23_
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad)
}; };
void cop400_cpu_device::cop444_op23(uint8_t opcode) void cop400_cpu_device::cop444l_op23(uint8_t opcode)
{ {
uint8_t opcode23 = fetch(); uint8_t opcode23 = fetch();
(this->*COP444_OPCODE_23_MAP[opcode23])(opcode23); (this->*COP444L_OPCODE_23_MAP[opcode23])(opcode23);
} }
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP444_OPCODE_33_MAP[256] = const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP444L_OPCODE_33_MAP[256] =
{ {
OP(illegal) , OP(skgbz0) , OP(illegal) , OP(skgbz2) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(skgbz0) , OP(illegal) , OP(skgbz2) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(skgbz1) , OP(illegal) , OP(skgbz3) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(skgbz1) , OP(illegal) , OP(skgbz3) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(skgz) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(skgz) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(inin) , OP(inil) , OP(ing) , OP(illegal) , OP(cqma) , OP(illegal) , OP(inl) , OP(ctma) , OP(inin) , OP(inil) , OP(ing) , OP(illegal) , OP(cqma) , OP(illegal) , OP(inl) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(it) , OP(illegal) , OP(omg) , OP(illegal) , OP(camq) , OP(illegal) , OP(obd) , OP(camt) , OP(illegal) , OP(illegal) , OP(omg) , OP(illegal) , OP(camq) , OP(illegal) , OP(obd) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
@ -691,22 +726,22 @@ const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP444_OPCODE_33_
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi)
}; };
void cop400_cpu_device::cop444_op33(uint8_t opcode) void cop400_cpu_device::cop444l_op33(uint8_t opcode)
{ {
uint8_t opcode33 = fetch(); uint8_t opcode33 = fetch();
(this->*COP444_OPCODE_33_MAP[opcode33])(opcode33); (this->*COP444L_OPCODE_33_MAP[opcode33])(opcode33);
} }
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP444_OPCODE_MAP[256] = const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP444L_OPCODE_MAP[256] =
{ {
OP(clra) , OP(skmbz0) , OP(xor_) , OP(skmbz2) , OP(xis) , OP(ld) , OP(x) , OP(xds) , OP(clra) , OP(skmbz0) , OP(xor_) , OP(skmbz2) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(casc) , OP(skmbz1) , OP(cop444_xabr), OP(skmbz3) , OP(xis) , OP(ld) , OP(x) , OP(xds) , OP(casc) , OP(skmbz1) , OP(cop444l_xabr), OP(skmbz3) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(skc) , OP(ske) , OP(sc) , OP(cop444_op23) , OP(xis) , OP(ld) , OP(x) , OP(xds) , OP(skc) , OP(ske) , OP(sc) , OP(cop444l_op23) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(asc) , OP(add) , OP(rc) , OP(cop444_op33) , OP(xis) , OP(ld) , OP(x) , OP(xds) , OP(asc) , OP(add) , OP(rc) , OP(cop444l_op33) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(comp) , OP(skt) , OP(rmb2) , OP(rmb3) , OP(nop) , OP(rmb1) , OP(smb2) , OP(smb1) , OP(comp) , OP(skt) , OP(rmb2) , OP(rmb3) , OP(nop) , OP(rmb1) , OP(smb2) , OP(smb1) ,
@ -737,6 +772,136 @@ const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP444_OPCODE_MAP
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jid) OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jid)
}; };
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP424C_OPCODE_23_MAP[256] =
{
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) , OP(ldd) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) ,
OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad) , OP(xad)
};
void cop400_cpu_device::cop424c_op23(uint8_t opcode)
{
uint8_t opcode23 = fetch();
(this->*COP424C_OPCODE_23_MAP[opcode23])(opcode23);
}
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP424C_OPCODE_33_MAP[256] =
{
OP(illegal) , OP(skgbz0) , OP(illegal) , OP(skgbz2) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(skgbz1) , OP(illegal) , OP(skgbz3) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(skgz) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(inin) , OP(inil) , OP(ing) , OP(illegal) , OP(cqma) , OP(illegal) , OP(inl) , OP(ctma) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(it) , OP(illegal) , OP(omg) , OP(illegal) , OP(camq) , OP(illegal) , OP(obd) , OP(camt) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) ,
OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) , OP(ogi) ,
OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) ,
OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) , OP(lei) ,
OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(halt) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) , OP(illegal) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi)
};
void cop400_cpu_device::cop424c_op33(uint8_t opcode)
{
uint8_t opcode33 = fetch();
(this->*COP424C_OPCODE_33_MAP[opcode33])(opcode33);
}
const cop400_cpu_device::cop400_opcode_func cop400_cpu_device::COP424C_OPCODE_MAP[256] =
{
OP(clra) , OP(skmbz0) , OP(xor_) , OP(skmbz2) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(casc) , OP(skmbz1) , OP(cop444l_xabr), OP(skmbz3) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(skc) , OP(ske) , OP(sc) , OP(cop444l_op23) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(asc) , OP(add) , OP(rc) , OP(cop444l_op33) , OP(xis) , OP(ld) , OP(x) , OP(xds) ,
OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) , OP(lbi) ,
OP(comp) , OP(skt) , OP(rmb2) , OP(rmb3) , OP(nop) , OP(rmb1) , OP(smb2) , OP(smb1) ,
OP(cop420_ret) , OP(retsk) , OP(adt) , OP(smb3) , OP(rmb0) , OP(smb0) , OP(cba) , OP(xas) ,
OP(cab) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) ,
OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) , OP(aisc) ,
OP(jmp) , OP(jmp) , OP(jmp) , OP(jmp) , OP(jmp) , OP(jmp) , OP(jmp) , OP(jmp) ,
OP(jsr) , OP(jsr) , OP(jsr) , OP(jsr) , OP(jsr) , OP(jsr) , OP(jsr) , OP(jsr) ,
OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) ,
OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) , OP(stii) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(lqid) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) ,
OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jp) , OP(jid)
};
/*************************************************************************** /***************************************************************************
TIMER CALLBACKS TIMER CALLBACKS
@ -817,7 +982,12 @@ void cop400_cpu_device::serial_tick()
void cop400_cpu_device::counter_tick() void cop400_cpu_device::counter_tick()
{ {
m_skt_latch = 1; T++;
if (!T) {
m_skt_latch = 1;
m_idle = false;
}
} }
void cop400_cpu_device::inil_tick() void cop400_cpu_device::inil_tick()
@ -890,7 +1060,7 @@ void cop400_cpu_device::device_start()
if (m_has_counter) if (m_has_counter)
{ {
m_counter_timer = timer_alloc(TIMER_COUNTER); m_counter_timer = timer_alloc(TIMER_COUNTER);
m_counter_timer->adjust(attotime::zero, 0, attotime::from_ticks(m_cki * 1024, clock())); m_counter_timer->adjust(attotime::zero, 0, attotime::from_ticks(m_cki * 4, clock()));
} }
/* allocate IN latch timer */ /* allocate IN latch timer */
@ -931,11 +1101,11 @@ void cop400_cpu_device::device_start()
state_add(COP400_PC, "PC", m_pc).mask(0xfff); state_add(COP400_PC, "PC", m_pc).mask(0xfff);
if (m_featuremask & (COP410_FEATURE | COP420_FEATURE | COP444_FEATURE)) if (m_featuremask & (COP410_FEATURE | COP420_FEATURE | COP444L_FEATURE | COP424C_FEATURE))
{ {
state_add(COP400_SA, "SA", m_sa).mask(0xfff); state_add(COP400_SA, "SA", m_sa).mask(0xfff);
state_add(COP400_SB, "SB", m_sb).mask(0xfff); state_add(COP400_SB, "SB", m_sb).mask(0xfff);
if (m_featuremask & (COP420_FEATURE | COP444_FEATURE)) if (m_featuremask & (COP420_FEATURE | COP444L_FEATURE | COP424C_FEATURE))
{ {
state_add(COP400_SC, "SC", m_sc).mask(0xfff); state_add(COP400_SC, "SC", m_sc).mask(0xfff);
} }
@ -952,6 +1122,11 @@ void cop400_cpu_device::device_start()
state_add(COP400_SIO, "SIO", m_sio).mask(0xf); state_add(COP400_SIO, "SIO", m_sio).mask(0xf);
state_add(COP400_SKL, "SKL", m_skl).mask(0x1); state_add(COP400_SKL, "SKL", m_skl).mask(0x1);
if (m_featuremask & COP424C_FEATURE)
{
state_add(COP400_T, "T", m_t);
}
m_icountptr = &m_icount; m_icountptr = &m_icount;
m_q = 0; m_q = 0;
@ -964,8 +1139,8 @@ void cop400_cpu_device::device_start()
m_in[0] = m_in[1] = m_in[2] = m_in[3] = 0; m_in[0] = m_in[1] = m_in[2] = m_in[3] = 0;
m_si = 0; m_si = 0;
m_skip_lbi = 0; m_skip_lbi = 0;
m_last_skip = 0; m_last_skip = false;
m_skip = 0; m_skip = false;
} }
@ -987,8 +1162,8 @@ void cop400_cpu_device::device_reset()
T = 0; T = 0;
m_skt_latch = 1; m_skt_latch = 1;
m_halt = 0; m_halt = false;
m_idle = 0; m_idle = false;
} }
/*************************************************************************** /***************************************************************************
@ -1017,7 +1192,7 @@ void cop400_cpu_device::execute_run()
m_halt = IN_CKO(); m_halt = IN_CKO();
} }
if (m_halt) { if (m_halt || m_idle) {
m_icount--; m_icount--;
continue; continue;
} }
@ -1032,7 +1207,7 @@ void cop400_cpu_device::execute_run()
if ((function != OP(jp)) && (function != OP(jmp)) && (function != OP(jsr)) && !m_skip_lbi) { if ((function != OP(jp)) && (function != OP(jmp)) && (function != OP(jsr)) && !m_skip_lbi) {
// store skip logic // store skip logic
m_last_skip = m_skip; m_last_skip = m_skip;
m_skip = 0; m_skip = false;
// push next PC // push next PC
PUSH(PC); PUSH(PC);
@ -1054,7 +1229,7 @@ void cop400_cpu_device::execute_run()
opcode = fetch(); opcode = fetch();
} }
m_skip = 0; m_skip = false;
continue; continue;
} }
@ -1114,8 +1289,14 @@ offs_t cop400_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, co
extern CPU_DISASSEMBLE( cop410 ); extern CPU_DISASSEMBLE( cop410 );
extern CPU_DISASSEMBLE( cop420 ); extern CPU_DISASSEMBLE( cop420 );
extern CPU_DISASSEMBLE( cop444 ); extern CPU_DISASSEMBLE( cop444 );
extern CPU_DISASSEMBLE( cop424 );
if ( m_featuremask & COP444_FEATURE ) if ( m_featuremask & COP424C_FEATURE )
{
return CPU_DISASSEMBLE_NAME(cop424)(this, stream, pc, oprom, opram, options);
}
if ( m_featuremask & COP444L_FEATURE )
{ {
return CPU_DISASSEMBLE_NAME(cop444)(this, stream, pc, oprom, opram, options); return CPU_DISASSEMBLE_NAME(cop444)(this, stream, pc, oprom, opram, options);
} }

156
src/devices/cpu/cop400/cop400.h
View File

@ -71,7 +71,8 @@ enum
COP400_Q, COP400_Q,
COP400_EN, COP400_EN,
COP400_SIO, COP400_SIO,
COP400_SKL COP400_SKL,
COP400_T
}; };
/* input lines */ /* input lines */
@ -83,7 +84,7 @@ enum
COP400_IN2, COP400_IN2,
COP400_IN3, COP400_IN3,
/* COP404 */ /* COP404L */
COP400_MB, COP400_MB,
COP400_DUAL, COP400_DUAL,
COP400_SEL10, COP400_SEL10,
@ -190,12 +191,14 @@ protected:
enum { enum {
COP410_FEATURE = 0x01, COP410_FEATURE = 0x01,
COP420_FEATURE = 0x02, COP420_FEATURE = 0x02,
COP444_FEATURE = 0x04 COP444L_FEATURE = 0x04,
COP424C_FEATURE = 0x08
}; };
enum { enum {
TIMER_SERIAL, TIMER_SERIAL,
TIMER_COUNTER, TIMER_COUNTER,
TIMER_COUNTER_T,
TIMER_INIL TIMER_INIL
}; };
@ -239,11 +242,11 @@ protected:
uint8_t m_si; /* serial input */ uint8_t m_si; /* serial input */
/* skipping logic */ /* skipping logic */
int m_skip; /* skip next instruction */ bool m_skip; /* skip next instruction */
int m_skip_lbi; /* skip until next non-LBI instruction */ int m_skip_lbi; /* skip until next non-LBI instruction */
int m_last_skip; /* last value of skip */ bool m_last_skip; /* last value of skip */
int m_halt; /* halt mode */ bool m_halt; /* halt mode */
int m_idle; /* idle mode */ bool m_idle; /* idle mode */
/* execution logic */ /* execution logic */
int m_InstLen[256]; /* instruction length in bytes */ int m_InstLen[256]; /* instruction length in bytes */
@ -264,9 +267,12 @@ protected:
static const cop400_opcode_func COP420_OPCODE_23_MAP[256]; static const cop400_opcode_func COP420_OPCODE_23_MAP[256];
static const cop400_opcode_func COP420_OPCODE_33_MAP[256]; static const cop400_opcode_func COP420_OPCODE_33_MAP[256];
static const cop400_opcode_func COP420_OPCODE_MAP[256]; static const cop400_opcode_func COP420_OPCODE_MAP[256];
static const cop400_opcode_func COP444_OPCODE_23_MAP[256]; static const cop400_opcode_func COP444L_OPCODE_23_MAP[256];
static const cop400_opcode_func COP444_OPCODE_33_MAP[256]; static const cop400_opcode_func COP444L_OPCODE_33_MAP[256];
static const cop400_opcode_func COP444_OPCODE_MAP[256]; static const cop400_opcode_func COP444L_OPCODE_MAP[256];
static const cop400_opcode_func COP424C_OPCODE_23_MAP[256];
static const cop400_opcode_func COP424C_OPCODE_33_MAP[256];
static const cop400_opcode_func COP424C_OPCODE_MAP[256];
void serial_tick(); void serial_tick();
void counter_tick(); void counter_tick();
@ -325,7 +331,7 @@ protected:
void lbi(uint8_t opcode); void lbi(uint8_t opcode);
void lei(uint8_t opcode); void lei(uint8_t opcode);
void xabr(uint8_t opcode); void xabr(uint8_t opcode);
void cop444_xabr(uint8_t opcode); void cop444l_xabr(uint8_t opcode);
void skc(uint8_t opcode); void skc(uint8_t opcode);
void ske(uint8_t opcode); void ske(uint8_t opcode);
void skgz(uint8_t opcode); void skgz(uint8_t opcode);
@ -351,11 +357,12 @@ protected:
void cop410_op33(uint8_t opcode); void cop410_op33(uint8_t opcode);
void cop420_op23(uint8_t opcode); void cop420_op23(uint8_t opcode);
void cop420_op33(uint8_t opcode); void cop420_op33(uint8_t opcode);
void cop444_op23(uint8_t opcode); void cop444l_op23(uint8_t opcode);
void cop444_op33(uint8_t opcode); void cop444l_op33(uint8_t opcode);
void cop424c_op23(uint8_t opcode);
void cop424c_op33(uint8_t opcode);
void skgbz(int bit); void skgbz(int bit);
void skmbz(int bit); void skmbz(int bit);
}; };
@ -423,56 +430,92 @@ public:
/* COP444 family */ /* COP444 family */
// COP404 is a ROMless version of the COP444, which can emulate a COP410C/COP411C, COP424C/COP425C, or a COP444C/COP445C // COP404L is a ROMless version of the COP444, which can emulate a COP410/COP411, COP424/COP425, or a COP444/COP445
class cop404_cpu_device : public cop400_cpu_device class cop404l_cpu_device : public cop400_cpu_device
{ {
public: public:
// construction/destruction // construction/destruction
cop404_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); cop404l_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
}; };
// COP424 is functionally equivalent to COP444, with only 1K ROM and 64x4 bytes RAM class cop444l_cpu_device : public cop400_cpu_device
class cop424_cpu_device : public cop400_cpu_device
{ {
public: public:
// construction/destruction // construction/destruction
cop424_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); cop444l_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// COP425 is a 24-pin package version of the COP424, lacking the IN ports
class cop425_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
cop425_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// COP426 is a 20-pin package version of the COP424, with only L0-L7, G2-G3, D2-D3 ports
class cop426_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
cop426_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class cop444_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
cop444_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
}; };
// COP445 is a 24-pin package version of the COP444, lacking the IN ports // COP445 is a 24-pin package version of the COP444, lacking the IN ports
class cop445_cpu_device : public cop400_cpu_device class cop445l_cpu_device : public cop400_cpu_device
{ {
public: public:
// construction/destruction // construction/destruction
cop445_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); cop445l_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// COP404C
class cop404c_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
cop404c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// COP424C is functionally equivalent to COP444C, with only 1K ROM and 64x4 bytes RAM
class cop424c_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
cop424c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// COP425C is a 24-pin package version of the COP424C, lacking the IN ports
class cop425c_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
cop425c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// COP426C is a 20-pin package version of the COP424C, with only L0-L7, G2-G3, D2-D3 ports
class cop426c_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
cop426c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// COP444C
class cop444c_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
cop444c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// COP445C
class cop445c_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
cop445c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// COP446C
class cop446c_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
cop446c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
}; };
@ -483,12 +526,15 @@ extern const device_type COP402;
extern const device_type COP420; extern const device_type COP420;
extern const device_type COP421; extern const device_type COP421;
extern const device_type COP422; extern const device_type COP422;
extern const device_type COP404; extern const device_type COP404L;
extern const device_type COP424; extern const device_type COP444L;
extern const device_type COP425; extern const device_type COP445L;
extern const device_type COP426; extern const device_type COP404C;
extern const device_type COP444; extern const device_type COP424C;
extern const device_type COP445; extern const device_type COP425C;
extern const device_type COP426C;
extern const device_type COP444C;
extern const device_type COP445C;
extern const device_type COP446C;
#endif /* __COP400__ */ #endif /* __COP400__ */

34
src/devices/cpu/cop400/cop400op.hxx
View File

@ -35,7 +35,7 @@ INSTRUCTION( asc )
if (A > 0xF) if (A > 0xF)
{ {
C = 1; C = 1;
m_skip = 1; m_skip = true;
A &= 0xF; A &= 0xF;
} }
else else
@ -86,7 +86,7 @@ INSTRUCTION( aisc )
if (A > 0x0f) if (A > 0x0f)
{ {
m_skip = 1; m_skip = true;
A &= 0xF; A &= 0xF;
} }
} }
@ -238,7 +238,7 @@ INSTRUCTION( casc )
if (A > 0xF) if (A > 0xF)
{ {
C = 1; C = 1;
m_skip = 1; m_skip = true;
A &= 0xF; A &= 0xF;
} }
else else
@ -413,7 +413,7 @@ INSTRUCTION( cop420_ret )
INSTRUCTION( retsk ) INSTRUCTION( retsk )
{ {
POP(); POP();
m_skip = 1; m_skip = true;
} }
/* /*
@ -431,7 +431,7 @@ INSTRUCTION( retsk )
INSTRUCTION( halt ) INSTRUCTION( halt )
{ {
m_halt = 1; m_halt = true;
} }
/* /*
@ -447,8 +447,8 @@ INSTRUCTION( halt )
INSTRUCTION( it ) INSTRUCTION( it )
{ {
m_halt = 1; m_halt = true;
m_idle = 1; m_idle = true;
} }
/*************************************************************************** /***************************************************************************
@ -732,7 +732,7 @@ INSTRUCTION( xds )
B = B ^ r; B = B ^ r;
if (Bd == 0x0f) m_skip = 1; if (Bd == 0x0f) m_skip = true;
} }
/* /*
@ -767,7 +767,7 @@ INSTRUCTION( xis )
B = B ^ r; B = B ^ r;
if (Bd == 0x00) m_skip = 1; if (Bd == 0x00) m_skip = true;
} }
/* /*
@ -979,7 +979,7 @@ INSTRUCTION( xabr )
/* /*
Processor: COP444 Processor: COP444L
Mnemonic: XABR Mnemonic: XABR
@ -992,7 +992,7 @@ INSTRUCTION( xabr )
*/ */
INSTRUCTION( cop444_xabr ) INSTRUCTION( cop444l_xabr )
{ {
uint8_t Br = A & 0x07; uint8_t Br = A & 0x07;
uint8_t Bd = B & 0x0f; uint8_t Bd = B & 0x0f;
@ -1020,7 +1020,7 @@ INSTRUCTION( cop444_xabr )
INSTRUCTION( skc ) INSTRUCTION( skc )
{ {
if (C == 1) m_skip = 1; if (C == 1) m_skip = true;
} }
/* /*
@ -1038,7 +1038,7 @@ INSTRUCTION( skc )
INSTRUCTION( ske ) INSTRUCTION( ske )
{ {
if (A == RAM_R(B)) m_skip = 1; if (A == RAM_R(B)) m_skip = true;
} }
/* /*
@ -1056,7 +1056,7 @@ INSTRUCTION( ske )
INSTRUCTION( skgz ) INSTRUCTION( skgz )
{ {
if (IN_G() == 0) m_skip = 1; if (IN_G() == 0) m_skip = true;
} }
/* /*
@ -1081,7 +1081,7 @@ INSTRUCTION( skgz )
void cop400_cpu_device::skgbz(int bit) void cop400_cpu_device::skgbz(int bit)
{ {
if (!BIT(IN_G(), bit)) m_skip = 1; if (!BIT(IN_G(), bit)) m_skip = true;
} }
INSTRUCTION( skgbz0 ) { skgbz(0); } INSTRUCTION( skgbz0 ) { skgbz(0); }
@ -1111,7 +1111,7 @@ INSTRUCTION( skgbz3 ) { skgbz(3); }
void cop400_cpu_device::skmbz(int bit) void cop400_cpu_device::skmbz(int bit)
{ {
if (!BIT(RAM_R(B), bit)) m_skip = 1; if (!BIT(RAM_R(B), bit)) m_skip = true;
} }
INSTRUCTION( skmbz0 ) { skmbz(0); } INSTRUCTION( skmbz0 ) { skmbz(0); }
@ -1137,7 +1137,7 @@ INSTRUCTION( skt )
if (m_skt_latch) if (m_skt_latch)
{ {
m_skt_latch = 0; m_skt_latch = 0;
m_skip = 1; m_skip = true;
} }
} }

401
src/devices/cpu/cop400/cop424ds.cpp Normal file
View File

@ -0,0 +1,401 @@
// license:BSD-3-Clause
// copyright-holders:Curt Coder
/***************************************************************************
cop424ds.c
National Semiconductor COP424C/COP444C Emulator.
***************************************************************************/
#include "emu.h"
CPU_DISASSEMBLE(cop424)
{
uint8_t opcode = oprom[0];
uint8_t next_opcode = oprom[1];
uint16_t address;
uint32_t flags = 0;
int bytes = 1;
if ((opcode >= 0x80 && opcode <= 0xBE) || (opcode >= 0xC0 && opcode <= 0xFE))
{
int page = pc >> 6;
if (page == 2 || page == 3) //JP pages 2,3
{
address = (uint16_t)((pc & 0x780) | (opcode & 0x7F));
util::stream_format(stream, "JP %03x", address);
}
else
{
if ((opcode & 0xC0) == 0xC0) //JP other pages
{
address = (uint16_t)((pc & 0x7C0) | (opcode & 0x3F));
util::stream_format(stream, "JP %03x", address);
}
else //JSRP
{
address = (uint16_t)(0x80 | (opcode & 0x3F));
util::stream_format(stream, "JSRP %03x", address);
flags = DASMFLAG_STEP_OVER;
}
}
}
else if (opcode >= 0x08 && opcode <= 0x0F)
{
util::stream_format(stream, "LBI 0,%u", ((opcode & 0xF) + 1) & 0xF);
}
else if (opcode >= 0x18 && opcode <= 0x1F)
{
util::stream_format(stream, "LBI 1,%u", ((opcode & 0xF) + 1) & 0xF);
}
else if (opcode >= 0x28 && opcode <= 0x2F)
{
util::stream_format(stream, "LBI 2,%u", ((opcode & 0xF) + 1) & 0xF);
}
else if (opcode >= 0x38 && opcode <= 0x3F)
{
util::stream_format(stream, "LBI 3,%u", ((opcode & 0xF) + 1) & 0xF);
}
else if (opcode >= 0x51 && opcode <= 0x5F)
{
util::stream_format(stream, "AISC %u", opcode & 0xF);
}
else if (opcode >= 0x60 && opcode <= 0x67)
{
address = ((opcode & 0x07) << 8) | next_opcode;
util::stream_format(stream, "JMP %03x", address);
bytes = 2;
}
else if (opcode >= 0x68 && opcode <= 0x6f)
{
address = ((opcode & 0x07) << 8) | next_opcode;
util::stream_format(stream, "JSR %03x", address);
flags = DASMFLAG_STEP_OVER;
bytes = 2;
}
else if (opcode >= 0x70 && opcode <= 0x7F)
{
util::stream_format(stream, "STII %u", opcode & 0xF);
}
else
{
switch (opcode)
{
case 0:
util::stream_format(stream, "CLRA");
break;
case 1:
util::stream_format(stream, "SKMBZ 0");
break;
case 2:
util::stream_format(stream, "XOR");
break;
case 3:
util::stream_format(stream, "SKMBZ 2");
break;
case 4:
util::stream_format(stream, "XIS 0");
break;
case 5:
util::stream_format(stream, "LD 0");
break;
case 6:
util::stream_format(stream, "X 0");
break;
case 7:
util::stream_format(stream, "XDS 0");
break;
case 0x10:
util::stream_format(stream, "CASC");
break;
case 0x11:
util::stream_format(stream, "SKMBZ 1");
break;
case 0x12:
util::stream_format(stream, "XABR");
break;
case 0x13:
util::stream_format(stream, "SKMBZ 3");
break;
case 0x14:
util::stream_format(stream, "XIS 1");
break;
case 0x15:
util::stream_format(stream, "LD 1");
break;
case 0x16:
util::stream_format(stream, "X 1");
break;
case 0x17:
util::stream_format(stream, "XDS 1");
break;
case 0x20:
util::stream_format(stream, "SKC");
break;
case 0x21:
util::stream_format(stream, "SKE");
break;
case 0x22:
util::stream_format(stream, "SC");
break;
case 0x23:
bytes = 2;
if (next_opcode <= 0x7f)
{
address = (uint16_t)(next_opcode & 0x7F);
util::stream_format(stream, "LDD %u,%u", address >> 4, address & 0x0F);
}
else if (next_opcode >= 0x80)
{
address = (uint16_t)(next_opcode & 0x7f);
util::stream_format(stream, "XAD %u,%u", address >> 4, address & 0x0F);
}
break;
case 0x24:
util::stream_format(stream, "XIS 2");
break;
case 0x25:
util::stream_format(stream, "LD 2");
break;
case 0x26:
util::stream_format(stream, "X 2");
break;
case 0x27:
util::stream_format(stream, "XDS 2");
break;
case 0x30:
util::stream_format(stream, "ASC");
break;
case 0x31:
util::stream_format(stream, "ADD");
break;
case 0x32:
util::stream_format(stream, "RC");
break;
case 0x33:
bytes = 2;
if (next_opcode >= 0x50 && next_opcode <= 0x5F)
{
util::stream_format(stream, "OGI %u", next_opcode & 0xF);
}
else if (next_opcode >= 0x60 && next_opcode <= 0x6F)
{
util::stream_format(stream, "LEI %u", next_opcode & 0xF);
}
else if (next_opcode >= 0x80)
{
util::stream_format(stream, "LBI %u,%u", (next_opcode >> 4) & 0x07, next_opcode & 0xF);
}
else
{
switch (next_opcode)
{
case 0x01:
util::stream_format(stream, "SKGBZ 0");
break;
case 0x03:
util::stream_format(stream, "SKGBZ 2");
break;
case 0x11:
util::stream_format(stream, "SKGBZ 1");
break;
case 0x13:
util::stream_format(stream, "SKGBZ 3");
break;
case 0x21:
util::stream_format(stream, "SKGZ");
break;
case 0x28:
util::stream_format(stream, "ININ");
break;
case 0x29:
util::stream_format(stream, "INIL");
break;
case 0x2A:
util::stream_format(stream, "ING");
break;
case 0x2C:
util::stream_format(stream, "CQMA");
break;
case 0x2E:
util::stream_format(stream, "INL");
break;
case 0x2F:
util::stream_format(stream, "CTMA");
break;
case 0x38:
util::stream_format(stream, "HALT");
break;
case 0x39:
util::stream_format(stream, "IT");
break;
case 0x3A:
util::stream_format(stream, "OMG");
break;
case 0x3C:
util::stream_format(stream, "CAMQ");
break;
case 0x3E:
util::stream_format(stream, "OBD");
break;
case 0x3F:
util::stream_format(stream, "CAMT");
break;
default:
util::stream_format(stream, "Invalid");
break;
}
}
break;
case 0x34:
util::stream_format(stream, "XIS 3");
break;
case 0x35:
util::stream_format(stream, "LD 3");
break;
case 0x36:
util::stream_format(stream, "X 3");
break;
case 0x37:
util::stream_format(stream, "XDS 3");
break;
case 0x40:
util::stream_format(stream, "COMP");
break;
case 0x41:
util::stream_format(stream, "SKT");
break;
case 0x42:
util::stream_format(stream, "RMB 2");
break;
case 0x43:
util::stream_format(stream, "RMB 3");
break;
case 0x44:
util::stream_format(stream, "NOP");
break;
case 0x45:
util::stream_format(stream, "RMB 1");
break;
case 0x46:
util::stream_format(stream, "SMB 2");
break;
case 0x47:
util::stream_format(stream, "SMB 1");
break;
case 0x48:
util::stream_format(stream, "RET");
flags = DASMFLAG_STEP_OUT;
break;
case 0x49:
util::stream_format(stream, "RETSK");
flags = DASMFLAG_STEP_OUT;
break;
case 0x4A:
util::stream_format(stream, "ADT");
break;
case 0x4B:
util::stream_format(stream, "SMB 3");
break;
case 0x4C:
util::stream_format(stream, "RMB 0");
break;
case 0x4D:
util::stream_format(stream, "SMB 0");
break;
case 0x4E:
util::stream_format(stream, "CBA");
break;
case 0x4F:
util::stream_format(stream, "XAS");
break;
case 0x50:
util::stream_format(stream, "CAB");
break;
case 0xBF:
util::stream_format(stream, "LQID");
break;
case 0xFF:
util::stream_format(stream, "JID");
break;
default:
util::stream_format(stream, "Invalid");
break;
}
}
return bytes | flags | DASMFLAG_SUPPORTED;
}

19
src/devices/cpu/cop400/cop444ds.cpp
View File

@ -4,7 +4,7 @@
cop444ds.c cop444ds.c
National Semiconductor COP444 Emulator. National Semiconductor COP444L Emulator.
***************************************************************************/ ***************************************************************************/
@ -261,18 +261,6 @@ CPU_DISASSEMBLE(cop444)
util::stream_format(stream, "INL"); util::stream_format(stream, "INL");
break; break;
case 0x2F:
util::stream_format(stream, "CTMA");
break;
case 0x38:
util::stream_format(stream, "HALT");
break;
case 0x39:
util::stream_format(stream, "IT");
break;
case 0x3A: case 0x3A:
util::stream_format(stream, "OMG"); util::stream_format(stream, "OMG");
break; break;
@ -285,11 +273,6 @@ CPU_DISASSEMBLE(cop444)
util::stream_format(stream, "OBD"); util::stream_format(stream, "OBD");
break; break;
case 0x3F:
util::stream_format(stream, "CAMT");
break;
default: default:
util::stream_format(stream, "Invalid"); util::stream_format(stream, "Invalid");
break; break;

4
src/mame/drivers/hh_cop400.cpp
View File

@ -556,7 +556,7 @@ INPUT_PORTS_END
static MACHINE_CONFIG_START( einvaderc, einvaderc_state ) static MACHINE_CONFIG_START( einvaderc, einvaderc_state )
/* basic machine hardware */ /* basic machine hardware */
MCFG_CPU_ADD("maincpu", COP444, 1000000) // approximation - RC osc. R=47K, C=100pf MCFG_CPU_ADD("maincpu", COP444L, 1000000) // approximation - RC osc. R=47K, C=100pf
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed
MCFG_COP400_READ_IN_CB(IOPORT("IN.0")) MCFG_COP400_READ_IN_CB(IOPORT("IN.0"))
MCFG_COP400_WRITE_D_CB(WRITE8(einvaderc_state, write_d)) MCFG_COP400_WRITE_D_CB(WRITE8(einvaderc_state, write_d))
@ -846,7 +846,7 @@ INPUT_PORTS_END
static MACHINE_CONFIG_START( mdallas, mdallas_state ) static MACHINE_CONFIG_START( mdallas, mdallas_state )
/* basic machine hardware */ /* basic machine hardware */
MCFG_CPU_ADD("maincpu", COP444, 1000000) // approximation - RC osc. R=57K, C=101pf MCFG_CPU_ADD("maincpu", COP444L, 1000000) // approximation - RC osc. R=57K, C=101pf
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed
MCFG_COP400_WRITE_D_CB(WRITE8(mdallas_state, write_d)) MCFG_COP400_WRITE_D_CB(WRITE8(mdallas_state, write_d))
MCFG_COP400_WRITE_L_CB(WRITE8(mdallas_state, write_l)) MCFG_COP400_WRITE_L_CB(WRITE8(mdallas_state, write_l))

2
src/tools/unidasm.cpp
View File

@ -83,6 +83,7 @@ CPU_DISASSEMBLE( coldfire );
CPU_DISASSEMBLE( cop410 ); CPU_DISASSEMBLE( cop410 );
CPU_DISASSEMBLE( cop420 ); CPU_DISASSEMBLE( cop420 );
CPU_DISASSEMBLE( cop444 ); CPU_DISASSEMBLE( cop444 );
CPU_DISASSEMBLE( cop424 );
CPU_DISASSEMBLE( cp1610 ); CPU_DISASSEMBLE( cp1610 );
CPU_DISASSEMBLE( cquestlin ); CPU_DISASSEMBLE( cquestlin );
CPU_DISASSEMBLE( cquestrot ); CPU_DISASSEMBLE( cquestrot );
@ -251,6 +252,7 @@ static const dasm_table_entry dasm_table[] =
{ "cop410", _8bit, 0, CPU_DISASSEMBLE_NAME(cop410) }, { "cop410", _8bit, 0, CPU_DISASSEMBLE_NAME(cop410) },
{ "cop420", _8bit, 0, CPU_DISASSEMBLE_NAME(cop420) }, { "cop420", _8bit, 0, CPU_DISASSEMBLE_NAME(cop420) },
{ "cop444", _8bit, 0, CPU_DISASSEMBLE_NAME(cop444) }, { "cop444", _8bit, 0, CPU_DISASSEMBLE_NAME(cop444) },
{ "cop424", _8bit, 0, CPU_DISASSEMBLE_NAME(cop424) },
{ "cp1610", _16be, -1, CPU_DISASSEMBLE_NAME(cp1610) }, { "cp1610", _16be, -1, CPU_DISASSEMBLE_NAME(cp1610) },
{ "cquestlin", _64be, -3, CPU_DISASSEMBLE_NAME(cquestlin) }, { "cquestlin", _64be, -3, CPU_DISASSEMBLE_NAME(cquestlin) },
{ "cquestrot", _64be, -3, CPU_DISASSEMBLE_NAME(cquestrot) }, { "cquestrot", _64be, -3, CPU_DISASSEMBLE_NAME(cquestrot) },