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pc9801: if the grcg or egc is enabled then write to the planes in the currently selected vram bank

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This commit is contained in:
cracyc 2024-11-10 15:19:18 -06:00
parent 9812dbc7d3
commit 9ddaed51c2
2 changed files with 8 additions and 4 deletions
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3
src/mame/nec/pc9801.cpp
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@ -2027,6 +2027,9 @@ MACHINE_START_MEMBER(pc9801vm_state,pc9801rs)
save_item(NAME(m_egc.leftover));
save_item(NAME(m_egc.first));
save_item(NAME(m_egc.init));
save_item(NAME(m_grcg.mode));
save_item(NAME(m_vram_bank));
}
MACHINE_START_MEMBER(pc9801us_state,pc9801us)

9
src/mame/nec/pc9801_v.cpp
View File

@ -24,6 +24,7 @@ void pc9801_state::video_start()
std::fill(std::begin(m_ex_video_ff), std::end(m_ex_video_ff), 0);
std::fill(std::begin(m_video_ff), std::end(m_video_ff), 0);
save_pointer(NAME(m_video_ff), 8);
save_pointer(NAME(m_ex_video_ff), 128);
}
uint32_t pc9801_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
@ -579,7 +580,7 @@ uint16_t pc9801vm_state::upd7220_grcg_r(offs_t offset, uint16_t mem_mask)
{
int i;
offset &= 0x13fff;
offset = (offset & 0x3fff) + m_vram_bank * 0x10000;
res = 0;
for(i=0;i<4;i++)
{
@ -605,7 +606,7 @@ void pc9801vm_state::upd7220_grcg_w(offs_t offset, uint16_t data, uint16_t mem_m
{
int i;
uint8_t *vram = (uint8_t *)m_video_ram[1].target();
offset = (offset << 1) & 0x27fff;
offset = ((offset & 0x3fff) + m_vram_bank * 0x10000) << 1;
if(m_grcg.mode & 0x40) // RMW
{
@ -722,7 +723,7 @@ void pc9801vm_state::egc_blit_w(uint32_t offset, uint16_t data, uint16_t mem_mas
uint16_t mask = m_egc.regs[4] & mem_mask, out = 0;
bool dir = !(m_egc.regs[6] & 0x1000);
int dst_off = (m_egc.regs[6] >> 4) & 0xf, src_off = m_egc.regs[6] & 0xf;
offset &= 0x13fff;
offset = (offset & 0x3fff) + m_vram_bank * 0x10000;
if(!m_egc.init && (src_off > dst_off))
{
@ -819,7 +820,7 @@ void pc9801vm_state::egc_blit_w(uint32_t offset, uint16_t data, uint16_t mem_mas
uint16_t pc9801vm_state::egc_blit_r(uint32_t offset, uint16_t mem_mask)
{
uint32_t plane_off = offset & 0x13fff;
uint32_t plane_off = (offset & 0x3fff) + m_vram_bank * 0x10000;
if((m_egc.regs[2] & 0x300) == 0x100)
{
m_egc.pat[0] = m_video_ram[1][plane_off + 0x4000];