mirror of
https://github.com/holub/mame
synced 2025-04-18 22:49:58 +03:00
-More DRC fixes/improvements:
* cpu/uml.cpp: Handle some more cases where ROLAND can be turned into AND in the simplifier. * cpu/drcbearm.cpp, cpu/drcbex64.cpp: Fixed a number of cases where 4-byte operations wouldn't clear the upper half of the destination (there are plenty more of these caused by the simplifier that will be harder to fix). * cpu/drcbearm64.cpp: Fixed some cases where a conditional MOV could unexpectedly clear the upper bits of the destination. * cpu/drcbex64.cpp: Improved code generation for various arithmetic and logical operations. More AND/OR/XOR/ADD/ADDC operand combinations are optimised. Special cases of ROLAND/ROLINS are optimised. * cpu/drcbex64.cpp: Don't treat operands to FADD/FMUL as commutative. This isn't true when one is a NaN. -cpu/e132xs: Use osd_printf_error for diagnositc output, and make more local variables const.
This commit is contained in:
Vas Crabb
parent
a810611b06
commit
9e6036be2d
@ -420,8 +420,6 @@ private:
|
||||
|
||||
class be_parameter
|
||||
{
|
||||
static inline constexpr int REG_MAX = 30;
|
||||
|
||||
public:
|
||||
// parameter types
|
||||
enum be_parameter_type
|
||||
@ -436,8 +434,8 @@ private:
|
||||
|
||||
typedef uint64_t be_parameter_value;
|
||||
|
||||
be_parameter() : m_type(PTYPE_NONE), m_value(0) { }
|
||||
be_parameter(uint64_t val) : m_type(PTYPE_IMMEDIATE), m_value(val) { }
|
||||
be_parameter() : m_type(PTYPE_NONE), m_value(0), m_coldreg(false) { }
|
||||
be_parameter(uint64_t val) : m_type(PTYPE_IMMEDIATE), m_value(val), m_coldreg(false) { }
|
||||
be_parameter(drcbe_arm64 &drcbe, const uml::parameter ¶m, uint32_t allowed);
|
||||
be_parameter(const be_parameter ¶m) = default;
|
||||
|
||||
@ -461,6 +459,7 @@ private:
|
||||
bool is_memory() const { return (m_type == PTYPE_MEMORY); }
|
||||
|
||||
bool is_immediate_value(uint64_t value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
|
||||
bool is_cold_register() const { return m_coldreg; }
|
||||
|
||||
asmjit::a64::Vec get_register_float(uint32_t regsize) const;
|
||||
asmjit::a64::Gp get_register_int(uint32_t regsize) const;
|
||||
@ -468,10 +467,13 @@ private:
|
||||
asmjit::a64::Gp select_register(asmjit::a64::Gp const ®, uint32_t regsize) const;
|
||||
|
||||
private:
|
||||
be_parameter(be_parameter_type type, be_parameter_value value) : m_type(type), m_value(value) { }
|
||||
static inline constexpr int REG_MAX = 30;
|
||||
|
||||
be_parameter(be_parameter_type type, be_parameter_value value) : m_type(type), m_value(value), m_coldreg(false) { }
|
||||
|
||||
be_parameter_type m_type;
|
||||
be_parameter_value m_value;
|
||||
bool m_coldreg;
|
||||
};
|
||||
|
||||
struct near_state
|
||||
@ -619,7 +621,6 @@ private:
|
||||
void mov_param_imm(asmjit::a64::Assembler &a, uint32_t regsize, const be_parameter &dst, uint64_t src) const;
|
||||
void mov_param_param(asmjit::a64::Assembler &a, uint32_t regsize, const be_parameter &dst, const be_parameter &src) const;
|
||||
void mov_mem_param(asmjit::a64::Assembler &a, uint32_t regsize, void *dst, const be_parameter &src) const;
|
||||
void mov_r64_imm(asmjit::a64::Assembler &a, const asmjit::a64::Gp &dst, uint64_t const src) const;
|
||||
|
||||
void call_arm_addr(asmjit::a64::Assembler &a, const void *offs) const;
|
||||
|
||||
@ -766,9 +767,14 @@ drcbe_arm64::be_parameter::be_parameter(drcbe_arm64 &drcbe, const parameter &par
|
||||
assert(allowed & PTYPE_R);
|
||||
assert(allowed & PTYPE_M);
|
||||
if (int regnum = int_register_map[param.ireg() - REG_I0]; regnum != 0)
|
||||
{
|
||||
*this = make_ireg(regnum);
|
||||
}
|
||||
else
|
||||
{
|
||||
*this = make_memory(&drcbe.m_state.r[param.ireg() - REG_I0]);
|
||||
m_coldreg = true;
|
||||
}
|
||||
break;
|
||||
|
||||
// if a register maps to a register, keep it as a register; otherwise map it to memory
|
||||
@ -776,9 +782,14 @@ drcbe_arm64::be_parameter::be_parameter(drcbe_arm64 &drcbe, const parameter &par
|
||||
assert(allowed & PTYPE_F);
|
||||
assert(allowed & PTYPE_M);
|
||||
if (int regnum = float_register_map[param.freg() - REG_F0]; regnum != 0)
|
||||
{
|
||||
*this = make_freg(regnum);
|
||||
}
|
||||
else
|
||||
{
|
||||
*this = make_memory(&drcbe.m_state.f[param.freg() - REG_F0]);
|
||||
m_coldreg = true;
|
||||
}
|
||||
break;
|
||||
|
||||
// everything else is unexpected
|
||||
@ -1137,38 +1148,19 @@ void drcbe_arm64::emit_narrow_memwrite(asmjit::a64::Assembler &a, const be_param
|
||||
void drcbe_arm64::mov_reg_param(a64::Assembler &a, uint32_t regsize, const a64::Gp &dst, const be_parameter &src) const
|
||||
{
|
||||
if (src.is_immediate())
|
||||
get_imm_relative(a, select_register(dst, regsize), src.immediate());
|
||||
{
|
||||
get_imm_relative(a, select_register(dst, regsize), (regsize == 4) ? uint32_t(src.immediate()) : src.immediate());
|
||||
}
|
||||
else if (src.is_int_register() && dst.id() != src.ireg())
|
||||
{
|
||||
a.mov(select_register(dst, regsize), src.get_register_int(regsize));
|
||||
else if (src.is_memory())
|
||||
emit_ldr_mem(a, select_register(dst, regsize), src.memory());
|
||||
}
|
||||
|
||||
void drcbe_arm64::mov_mem_param(a64::Assembler &a, uint32_t regsize, void *dst, const be_parameter &src) const
|
||||
{
|
||||
const a64::Gp scratch = select_register(SCRATCH_REG2, regsize);
|
||||
|
||||
if (src.is_immediate_value(0))
|
||||
{
|
||||
emit_str_mem(a, select_register(a64::xzr, regsize), dst);
|
||||
}
|
||||
else if (src.is_immediate())
|
||||
{
|
||||
get_imm_relative(a, scratch.x(), src.immediate());
|
||||
emit_str_mem(a, scratch, dst);
|
||||
}
|
||||
else if (src.is_memory())
|
||||
{
|
||||
if (regsize == 4)
|
||||
emit_ldrsw_mem(a, scratch.x(), src.memory());
|
||||
if ((util::endianness::native == util::endianness::big) && (regsize == 4) && src.is_cold_register())
|
||||
emit_ldr_mem(a, select_register(dst, regsize), reinterpret_cast<uint8_t *>(src.memory()) + 4);
|
||||
else
|
||||
emit_ldr_mem(a, scratch.x(), src.memory());
|
||||
|
||||
emit_str_mem(a, scratch, dst);
|
||||
}
|
||||
else if (src.is_int_register())
|
||||
{
|
||||
emit_str_mem(a, src.get_register_int(regsize), dst);
|
||||
emit_ldr_mem(a, select_register(dst, regsize), src.memory());
|
||||
}
|
||||
}
|
||||
|
||||
@ -1177,13 +1169,48 @@ void drcbe_arm64::mov_param_reg(a64::Assembler &a, uint32_t regsize, const be_pa
|
||||
assert(!dst.is_immediate());
|
||||
|
||||
if (dst.is_memory())
|
||||
emit_str_mem(a, select_register(src, regsize), dst.memory());
|
||||
{
|
||||
if (dst.is_cold_register())
|
||||
emit_str_mem(a, src.x(), dst.memory());
|
||||
else
|
||||
emit_str_mem(a, select_register(src, regsize), dst.memory());
|
||||
}
|
||||
else if (dst.is_int_register() && src.id() != dst.ireg())
|
||||
{
|
||||
a.mov(dst.get_register_int(regsize), select_register(src, regsize));
|
||||
}
|
||||
}
|
||||
|
||||
void drcbe_arm64::mov_param_imm(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, uint64_t src) const
|
||||
{
|
||||
assert(!dst.is_immediate());
|
||||
|
||||
if (dst.is_memory())
|
||||
{
|
||||
const uint32_t movsize = dst.is_cold_register() ? 8 : regsize;
|
||||
|
||||
if (src == 0)
|
||||
{
|
||||
emit_str_mem(a, select_register(a64::xzr, movsize), dst.memory());
|
||||
}
|
||||
else
|
||||
{
|
||||
const a64::Gp scratch = select_register(SCRATCH_REG2, movsize);
|
||||
|
||||
get_imm_relative(a, scratch, (regsize == 4) ? uint32_t(src) : src);
|
||||
emit_str_mem(a, scratch, dst.memory());
|
||||
}
|
||||
}
|
||||
else if (dst.is_int_register())
|
||||
{
|
||||
a.mov(dst.get_register_int(regsize), src);
|
||||
}
|
||||
}
|
||||
|
||||
void drcbe_arm64::mov_param_param(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, const be_parameter &src) const
|
||||
{
|
||||
// FIXME: this won't clear upper bits of the output for a 4-byte move when the source is a register or immediate
|
||||
// need to fix affected cases (mov, sext), currently confounded by issues in the simplifier
|
||||
assert(!dst.is_immediate());
|
||||
|
||||
if (src.is_memory())
|
||||
@ -1208,27 +1235,31 @@ void drcbe_arm64::mov_param_param(a64::Assembler &a, uint32_t regsize, const be_
|
||||
}
|
||||
}
|
||||
|
||||
void drcbe_arm64::mov_param_imm(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, uint64_t src) const
|
||||
void drcbe_arm64::mov_mem_param(a64::Assembler &a, uint32_t regsize, void *dst, const be_parameter &src) const
|
||||
{
|
||||
assert(!dst.is_immediate());
|
||||
const a64::Gp scratch = select_register(SCRATCH_REG2, regsize);
|
||||
|
||||
if (dst.is_memory())
|
||||
if (src.is_immediate_value(0))
|
||||
{
|
||||
if (src == 0)
|
||||
{
|
||||
emit_str_mem(a, select_register(a64::xzr, regsize), dst.memory());
|
||||
}
|
||||
else
|
||||
{
|
||||
const a64::Gp scratch = select_register(SCRATCH_REG2, regsize);
|
||||
|
||||
get_imm_relative(a, scratch, src);
|
||||
emit_str_mem(a, scratch, dst.memory());
|
||||
}
|
||||
emit_str_mem(a, select_register(a64::xzr, regsize), dst);
|
||||
}
|
||||
else if (dst.is_int_register())
|
||||
else if (src.is_immediate())
|
||||
{
|
||||
a.mov(dst.get_register_int(regsize), src);
|
||||
get_imm_relative(a, scratch, (regsize == 4) ? uint32_t(src.immediate()) : src.immediate());
|
||||
emit_str_mem(a, scratch, dst);
|
||||
}
|
||||
else if (src.is_memory())
|
||||
{
|
||||
if ((util::endianness::native == util::endianness::big) && (regsize == 4) && src.is_cold_register())
|
||||
emit_ldr_mem(a, scratch, reinterpret_cast<uint8_t *>(src.memory()) + 4);
|
||||
else
|
||||
emit_ldr_mem(a, scratch, src.memory());
|
||||
|
||||
emit_str_mem(a, scratch, dst);
|
||||
}
|
||||
else if (src.is_int_register())
|
||||
{
|
||||
emit_str_mem(a, src.get_register_int(regsize), dst);
|
||||
}
|
||||
}
|
||||
|
||||
@ -2969,7 +3000,7 @@ void drcbe_arm64::op_mov(a64::Assembler &a, const uml::instruction &inst)
|
||||
be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
|
||||
|
||||
// decide whether a conditional select will be efficient
|
||||
bool usesel = dstp.is_int_register() && (srcp.is_int_register() || (srcp.is_immediate() && is_simple_mov_immediate(srcp.immediate(), inst.size())));
|
||||
bool usesel = dstp.is_int_register() && (((inst.size() == 8) && srcp.is_int_register()) || (srcp.is_immediate() && is_simple_mov_immediate(srcp.immediate(), inst.size())));
|
||||
switch (inst.condition())
|
||||
{
|
||||
case uml::COND_ALWAYS:
|
||||
@ -2996,11 +3027,11 @@ void drcbe_arm64::op_mov(a64::Assembler &a, const uml::instruction &inst)
|
||||
{
|
||||
const bool srczero = srcp.is_immediate_value(0);
|
||||
const bool srcone = srcp.is_immediate_value(1);
|
||||
const bool srcnegone = srcp.is_immediate_value(util::make_bitmask<uint64_t>(inst.size() * 8));
|
||||
const bool srcnegone = (inst.size() == 8) && srcp.is_immediate_value(uint64_t(int64_t(-1)));
|
||||
const bool srcspecial = srczero || srcone || srcnegone;
|
||||
|
||||
const a64::Gp dst = dstp.select_register(TEMP_REG1, inst.size());
|
||||
const a64::Gp src = srcspecial ? select_register(a64::xzr, inst.size()) : srcp.select_register(TEMP_REG2, inst.size());
|
||||
const a64::Gp dst = dstp.select_register(TEMP_REG1, 8);
|
||||
const a64::Gp src = srcspecial ? a64::Gp(a64::xzr) : srcp.select_register(TEMP_REG2, inst.size());
|
||||
|
||||
mov_reg_param(a, inst.size(), dst, dstp);
|
||||
if (!srcspecial)
|
||||
@ -3013,20 +3044,20 @@ void drcbe_arm64::op_mov(a64::Assembler &a, const uml::instruction &inst)
|
||||
if (m_carry_state == carry_state::CANONICAL)
|
||||
{
|
||||
if (srcone)
|
||||
a.csinc(dst, dst, src, ARM_CONDITION(inst.condition()));
|
||||
a.csinc(dst, dst, src.x(), ARM_CONDITION(inst.condition()));
|
||||
else if (srcnegone)
|
||||
a.csinv(dst, dst, src, ARM_CONDITION(inst.condition()));
|
||||
a.csinv(dst, dst, src.x(), ARM_CONDITION(inst.condition()));
|
||||
else
|
||||
a.csel(dst, src, dst, ARM_NOT_CONDITION(inst.condition()));
|
||||
a.csel(dst, src.x(), dst, ARM_NOT_CONDITION(inst.condition()));
|
||||
}
|
||||
else
|
||||
{
|
||||
if (srcone)
|
||||
a.csinc(dst, dst, src, ARM_NOT_CONDITION(inst.condition()));
|
||||
a.csinc(dst, dst, src.x(), ARM_NOT_CONDITION(inst.condition()));
|
||||
else if (srcnegone)
|
||||
a.csinv(dst, dst, src, ARM_NOT_CONDITION(inst.condition()));
|
||||
a.csinv(dst, dst, src.x(), ARM_NOT_CONDITION(inst.condition()));
|
||||
else
|
||||
a.csel(dst, src, dst, ARM_CONDITION(inst.condition()));
|
||||
a.csel(dst, src.x(), dst, ARM_CONDITION(inst.condition()));
|
||||
}
|
||||
break;
|
||||
case uml::COND_A:
|
||||
@ -3035,11 +3066,11 @@ void drcbe_arm64::op_mov(a64::Assembler &a, const uml::instruction &inst)
|
||||
[[fallthrough]];
|
||||
default:
|
||||
if (srcone)
|
||||
a.csinc(dst, dst, src, ARM_NOT_CONDITION(inst.condition()));
|
||||
a.csinc(dst, dst, src.x(), ARM_NOT_CONDITION(inst.condition()));
|
||||
else if (srcnegone)
|
||||
a.csinv(dst, dst, src, ARM_NOT_CONDITION(inst.condition()));
|
||||
a.csinv(dst, dst, src.x(), ARM_NOT_CONDITION(inst.condition()));
|
||||
else
|
||||
a.csel(dst, src, dst, ARM_CONDITION(inst.condition()));
|
||||
a.csel(dst, src.x(), dst, ARM_CONDITION(inst.condition()));
|
||||
}
|
||||
|
||||
mov_param_reg(a, inst.size(), dstp, dst);
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -6,10 +6,12 @@
|
||||
#pragma once
|
||||
|
||||
#include "32xsdasm.h"
|
||||
|
||||
#include "cpu/drcfe.h"
|
||||
#include "cpu/drcuml.h"
|
||||
#include "cpu/drcumlsh.h"
|
||||
|
||||
|
||||
/*
|
||||
A note about clock multipliers and dividers:
|
||||
|
||||
|
||||
@ -49,7 +49,7 @@ void hyperstone_device::generate_decode_const(drcuml_block &block, compiler_stat
|
||||
|
||||
void hyperstone_device::generate_decode_immediate_s(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
|
||||
{
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
switch (op & 0xf)
|
||||
{
|
||||
@ -85,7 +85,7 @@ void hyperstone_device::generate_decode_immediate_s(drcuml_block &block, compile
|
||||
|
||||
void hyperstone_device::generate_ignore_immediate_s(drcuml_block &block, const opcode_desc *desc)
|
||||
{
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
static const uint32_t offsets[16] = { 0, 4, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
|
||||
const uint8_t nybble = op & 0x0f;
|
||||
@ -95,7 +95,7 @@ void hyperstone_device::generate_ignore_immediate_s(drcuml_block &block, const o
|
||||
|
||||
void hyperstone_device::generate_decode_pcrel(drcuml_block &block, const opcode_desc *desc)
|
||||
{
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
int32_t offset;
|
||||
if (op & 0x80)
|
||||
@ -123,7 +123,7 @@ void hyperstone_device::generate_decode_pcrel(drcuml_block &block, const opcode_
|
||||
|
||||
void hyperstone_device::generate_ignore_pcrel(drcuml_block &block, const opcode_desc *desc)
|
||||
{
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
if (op & 0x80)
|
||||
{
|
||||
@ -275,14 +275,14 @@ void hyperstone_device::generate_trap_exception_or_int(drcuml_block &block)
|
||||
|
||||
void hyperstone_device::generate_int(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t addr)
|
||||
{
|
||||
printf("Unimplemented: generate_int (%08x)\n", desc->pc);
|
||||
osd_printf_error("Unimplemented: generate_int (%08x)\n", desc->pc);
|
||||
fflush(stdout);
|
||||
fatalerror(" ");
|
||||
}
|
||||
|
||||
void hyperstone_device::generate_exception(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t addr)
|
||||
{
|
||||
printf("Unimplemented: generate_exception (%08x)\n", desc->pc);
|
||||
osd_printf_error("Unimplemented: generate_exception (%08x)\n", desc->pc);
|
||||
fflush(stdout);
|
||||
fatalerror(" ");
|
||||
}
|
||||
@ -291,7 +291,7 @@ void hyperstone_device::generate_software(drcuml_block &block, compiler_state &c
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_6));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t src_code = op & 0xf;
|
||||
const uint32_t srcf_code = src_code + 1;
|
||||
@ -372,7 +372,7 @@ void hyperstone_device::generate_chk(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
generate_check_delay_pc(block, compiler, desc);
|
||||
|
||||
@ -427,7 +427,7 @@ void hyperstone_device::generate_movd(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
generate_check_delay_pc(block, compiler, desc);
|
||||
|
||||
@ -440,7 +440,7 @@ void hyperstone_device::generate_movd(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
if (SRC_GLOBAL && src_code < 2)
|
||||
{
|
||||
printf("Denoted PC or SR in RET instruction. PC = %08X\n", desc->pc);
|
||||
osd_printf_error("Denoted PC or SR in RET instruction. PC = %08X\n", desc->pc);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -607,7 +607,7 @@ void hyperstone_device::generate_divsu(drcuml_block &block, compiler_state &comp
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_36));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
const uint32_t dstf_code = dst_code + 1;
|
||||
@ -615,7 +615,7 @@ void hyperstone_device::generate_divsu(drcuml_block &block, compiler_state &comp
|
||||
|
||||
if ((SRC_GLOBAL == DST_GLOBAL && (src_code == dst_code || src_code == dstf_code)) || (SRC_GLOBAL && src_code < 2))
|
||||
{
|
||||
printf("Denoted the same register code or PC/SR as source in generate_divsu. PC = %08X\n", desc->pc);
|
||||
osd_printf_error("Denoted the same register code or PC/SR as source in generate_divsu. PC = %08X\n", desc->pc);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -698,7 +698,7 @@ void hyperstone_device::generate_xm(drcuml_block &block, compiler_state &compile
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
const uint32_t src_code = op & 0xf;
|
||||
|
||||
@ -787,7 +787,7 @@ void hyperstone_device::generate_mask(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t src_code = op & 0xf;
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
@ -846,7 +846,7 @@ void hyperstone_device::generate_sum(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t src_code = op & 0xf;
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
@ -918,7 +918,7 @@ void hyperstone_device::generate_sum(drcuml_block &block, compiler_state &compil
|
||||
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
|
||||
void hyperstone_device::generate_sums(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
|
||||
{
|
||||
printf("Unimplemented: generate_sums (%08x)\n", desc->pc);
|
||||
osd_printf_error("Unimplemented: generate_sums (%08x)\n", desc->pc);
|
||||
fflush(stdout);
|
||||
fatalerror(" ");
|
||||
}
|
||||
@ -929,7 +929,7 @@ void hyperstone_device::generate_cmp(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t src_code = op & 0xf;
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
@ -991,7 +991,7 @@ void hyperstone_device::generate_cmp(drcuml_block &block, compiler_state &compil
|
||||
|
||||
void hyperstone_device::generate_get_global_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
|
||||
{
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t src_code = op & 0xf;
|
||||
|
||||
int regular_load = compiler.m_labelnum++;
|
||||
@ -1026,7 +1026,7 @@ void hyperstone_device::generate_mov(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t src_code = op & 0xf;
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
@ -1093,7 +1093,7 @@ void hyperstone_device::generate_add(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t src_code = op & 0xf;
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
@ -1171,7 +1171,7 @@ void hyperstone_device::generate_add(drcuml_block &block, compiler_state &compil
|
||||
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
|
||||
void hyperstone_device::generate_adds(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
|
||||
{
|
||||
printf("Unimplemented: generate_adds (%08x)\n", desc->pc);
|
||||
osd_printf_error("Unimplemented: generate_adds (%08x)\n", desc->pc);
|
||||
fflush(stdout);
|
||||
fatalerror(" ");
|
||||
}
|
||||
@ -1182,7 +1182,7 @@ void hyperstone_device::generate_cmpb(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t src_code = op & 0xf;
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
@ -1224,7 +1224,7 @@ void hyperstone_device::generate_subc(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t src_code = op & 0xf;
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
@ -1312,7 +1312,7 @@ void hyperstone_device::generate_sub(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t src_code = op & 0xf;
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
@ -1403,7 +1403,7 @@ void hyperstone_device::generate_subs(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t src_code = op & 0xf;
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
@ -1492,7 +1492,7 @@ void hyperstone_device::generate_addc(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t src_code = op & 0xf;
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
@ -1585,7 +1585,7 @@ void hyperstone_device::generate_neg(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
generate_check_delay_pc(block, compiler, desc);
|
||||
|
||||
@ -1645,7 +1645,7 @@ void hyperstone_device::generate_neg(drcuml_block &block, compiler_state &compil
|
||||
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
|
||||
void hyperstone_device::generate_negs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
|
||||
{
|
||||
printf("Unimplemented: generate_negs (%08x)\n", desc->pc);
|
||||
osd_printf_error("Unimplemented: generate_negs (%08x)\n", desc->pc);
|
||||
fflush(stdout);
|
||||
fatalerror(" ");
|
||||
}
|
||||
@ -1656,7 +1656,7 @@ void hyperstone_device::generate_and(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
generate_check_delay_pc(block, compiler, desc);
|
||||
|
||||
@ -1719,7 +1719,7 @@ void hyperstone_device::generate_andn(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
generate_check_delay_pc(block, compiler, desc);
|
||||
|
||||
@ -1783,7 +1783,7 @@ void hyperstone_device::generate_or(drcuml_block &block, compiler_state &compile
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
generate_check_delay_pc(block, compiler, desc);
|
||||
|
||||
@ -1846,7 +1846,7 @@ void hyperstone_device::generate_xor(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
generate_check_delay_pc(block, compiler, desc);
|
||||
|
||||
@ -1909,7 +1909,7 @@ void hyperstone_device::generate_not(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
generate_check_delay_pc(block, compiler, desc);
|
||||
|
||||
@ -1961,7 +1961,7 @@ void hyperstone_device::generate_cmpi(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
if (IMM_LONG)
|
||||
@ -2018,7 +2018,7 @@ void hyperstone_device::generate_movi(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
const uint32_t src_code = op & 0xf;
|
||||
|
||||
@ -2091,7 +2091,7 @@ void hyperstone_device::generate_addi(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
const uint32_t src_code = op & 0xf;
|
||||
|
||||
@ -2171,7 +2171,7 @@ void hyperstone_device::generate_addi(drcuml_block &block, compiler_state &compi
|
||||
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
|
||||
void hyperstone_device::generate_addsi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
|
||||
{
|
||||
printf("Unimplemented: generate_addsi (%08x)\n", desc->pc);
|
||||
osd_printf_error("Unimplemented: generate_addsi (%08x)\n", desc->pc);
|
||||
fflush(stdout);
|
||||
fatalerror(" ");
|
||||
}
|
||||
@ -2182,7 +2182,7 @@ void hyperstone_device::generate_cmpbi(drcuml_block &block, compiler_state &comp
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
if (!IMM_LONG)
|
||||
@ -2238,9 +2238,10 @@ void hyperstone_device::generate_cmpbi(drcuml_block &block, compiler_state &comp
|
||||
generate_check_delay_pc(block, compiler, desc);
|
||||
}
|
||||
|
||||
int or_mask, done;
|
||||
const int or_mask = compiler.m_labelnum++;
|
||||
const int done = compiler.m_labelnum++;
|
||||
UML_TEST(block, I2, 0xff000000);
|
||||
UML_JMPc(block, uml::COND_Z, or_mask = compiler.m_labelnum++);
|
||||
UML_JMPc(block, uml::COND_Z, or_mask);
|
||||
UML_TEST(block, I2, 0x00ff0000);
|
||||
UML_JMPc(block, uml::COND_Z, or_mask);
|
||||
UML_TEST(block, I2, 0x0000ff00);
|
||||
@ -2248,7 +2249,7 @@ void hyperstone_device::generate_cmpbi(drcuml_block &block, compiler_state &comp
|
||||
UML_TEST(block, I2, 0x000000ff);
|
||||
UML_JMPc(block, uml::COND_Z, or_mask);
|
||||
UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK);
|
||||
UML_JMP(block, done = compiler.m_labelnum++);
|
||||
UML_JMP(block, done);
|
||||
|
||||
UML_LABEL(block, or_mask);
|
||||
UML_OR(block, DRC_SR, DRC_SR, Z_MASK);
|
||||
@ -2263,7 +2264,7 @@ void hyperstone_device::generate_andni(drcuml_block &block, compiler_state &comp
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
if (DRC_N_OP_MASK == 0x10f)
|
||||
@ -2325,7 +2326,7 @@ void hyperstone_device::generate_ori(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
if (IMM_LONG)
|
||||
@ -2388,7 +2389,7 @@ void hyperstone_device::generate_xori(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
if (IMM_LONG)
|
||||
@ -2451,7 +2452,7 @@ void hyperstone_device::generate_shrdi(drcuml_block &block, compiler_state &comp
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
@ -2500,7 +2501,7 @@ void hyperstone_device::generate_shrd(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t src_code = op & 0xf;
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
@ -2558,7 +2559,7 @@ void hyperstone_device::generate_shr(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
const uint32_t src_code = op & 0xf;
|
||||
@ -2607,7 +2608,7 @@ void hyperstone_device::generate_shri(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
@ -2662,7 +2663,7 @@ void hyperstone_device::generate_sardi(drcuml_block &block, compiler_state &comp
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
const uint32_t dstf_code = dst_code + 1;
|
||||
@ -2712,7 +2713,7 @@ void hyperstone_device::generate_sard(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t src_code = op & 0xf;
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
@ -2770,7 +2771,7 @@ void hyperstone_device::generate_sar(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
const uint32_t src_code = op & 0xf;
|
||||
@ -2812,7 +2813,7 @@ void hyperstone_device::generate_sari(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
@ -2872,7 +2873,7 @@ void hyperstone_device::generate_shldi(drcuml_block &block, compiler_state &comp
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
const uint32_t dstf_code = dst_code + 1;
|
||||
@ -2936,7 +2937,7 @@ void hyperstone_device::generate_shld(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t src_code = op & 0xf;
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
@ -3009,7 +3010,7 @@ void hyperstone_device::generate_shl(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
const uint32_t src_code = op & 0xf;
|
||||
@ -3072,7 +3073,7 @@ void hyperstone_device::generate_shli(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
|
||||
@ -3153,7 +3154,7 @@ void hyperstone_device::generate_testlz(drcuml_block &block, compiler_state &com
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
const uint32_t src_code = op & 0xf;
|
||||
@ -3177,7 +3178,7 @@ void hyperstone_device::generate_rol(drcuml_block &block, compiler_state &compil
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
const uint32_t src_code = op & 0xf;
|
||||
@ -3526,7 +3527,7 @@ void hyperstone_device::generate_ldxx2(drcuml_block &block, compiler_state &comp
|
||||
|
||||
if (DST_GLOBAL && dst_code < 2)
|
||||
{
|
||||
printf("Denoted PC or SR in hyperstone_ldxx2. PC = %08X\n", desc->pc);
|
||||
osd_printf_error("Denoted PC or SR in hyperstone_ldxx2. PC = %08X\n", desc->pc);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -3695,7 +3696,7 @@ void hyperstone_device::generate_ldxx2(drcuml_block &block, compiler_state &comp
|
||||
break;
|
||||
}
|
||||
case 2: // Reserved
|
||||
printf("Reserved instruction in generate_ldxx2. PC = %08X\n", desc->pc);
|
||||
osd_printf_error("Reserved instruction in generate_ldxx2. PC = %08X\n", desc->pc);
|
||||
break;
|
||||
case 3: // LDW.S
|
||||
{
|
||||
@ -3947,7 +3948,7 @@ void hyperstone_device::generate_stxx2(drcuml_block &block, compiler_state &comp
|
||||
|
||||
if (DST_GLOBAL && dst_code < 2)
|
||||
{
|
||||
printf("Denoted PC or SR in hyperstone_ldxx2. PC = %08X\n", desc->pc);
|
||||
osd_printf_error("Denoted PC or SR in hyperstone_ldxx2. PC = %08X\n", desc->pc);
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
return;
|
||||
}
|
||||
@ -4049,7 +4050,7 @@ void hyperstone_device::generate_stxx2(drcuml_block &block, compiler_state &comp
|
||||
UML_CALLH(block, *m_mem_write32);
|
||||
break;
|
||||
case 2: // Reserved
|
||||
printf("Executed Reserved instruction in hyperstone_stxx2. PC = %08X\n", desc->pc);
|
||||
osd_printf_error("Executed Reserved instruction in hyperstone_stxx2. PC = %08X\n", desc->pc);
|
||||
break;
|
||||
case 3: // STW.S
|
||||
{
|
||||
@ -4089,7 +4090,7 @@ void hyperstone_device::generate_mulsu(drcuml_block &block, compiler_state &comp
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_36));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
const uint32_t dst_code = (op & 0xf0) >> 4;
|
||||
const uint32_t dstf_code = dst_code + 1;
|
||||
@ -4097,7 +4098,7 @@ void hyperstone_device::generate_mulsu(drcuml_block &block, compiler_state &comp
|
||||
|
||||
if ((SRC_GLOBAL && src_code < 2) || (DST_GLOBAL && dst_code < 2))
|
||||
{
|
||||
printf("Denoted PC or SR in hyperstone_muls/u instruction. PC = %08X\n", desc->pc);
|
||||
osd_printf_error("Denoted PC or SR in hyperstone_muls/u instruction. PC = %08X\n", desc->pc);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -4187,7 +4188,7 @@ void hyperstone_device::generate_mul(drcuml_block &block, compiler_state &compil
|
||||
|
||||
if ((SRC_GLOBAL && src_code < 2) || (DST_GLOBAL && dst_code < 2))
|
||||
{
|
||||
printf("Denoted PC or SR in hyperstone_mul instruction. PC = %08X\n", desc->pc);
|
||||
osd_printf_error("Denoted PC or SR in hyperstone_mul instruction. PC = %08X\n", desc->pc);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -4279,7 +4280,7 @@ void hyperstone_device::generate_set(drcuml_block &block, compiler_state &compil
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("Used reserved N value (%d) in hyperstone_set. PC = %08X\n", n, desc->pc);
|
||||
osd_printf_error("Used reserved N value (%d) in hyperstone_set. PC = %08X\n", n, desc->pc);
|
||||
return;
|
||||
}
|
||||
}
|
||||
@ -4311,7 +4312,7 @@ void hyperstone_device::generate_set(drcuml_block &block, compiler_state &compil
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("Used reserved N value (%d) in hyperstone_set. PC = %08X\n", n, desc->pc);
|
||||
osd_printf_error("Used reserved N value (%d) in hyperstone_set. PC = %08X\n", n, desc->pc);
|
||||
return;
|
||||
}
|
||||
}
|
||||
@ -4380,7 +4381,7 @@ void hyperstone_device::generate_lddr(drcuml_block &block, compiler_state &compi
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
generate_check_delay_pc(block, compiler, desc);
|
||||
|
||||
@ -4867,7 +4868,7 @@ void hyperstone_device::generate_call(drcuml_block &block, compiler_state &compi
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
UML_ROLINS(block, DRC_SR, ((desc->length >> 1) << ILC_SHIFT), 0, ILC_MASK);
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
uint16_t imm_1 = m_pr16(desc->pc + 2);
|
||||
|
||||
int32_t extra_s = 0;
|
||||
@ -4956,7 +4957,7 @@ void hyperstone_device::generate_trap_op(drcuml_block &block, compiler_state &co
|
||||
false, false, false, false, true, false, true, false, true, false, true, false, true, false, true, false
|
||||
};
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
generate_check_delay_pc(block, compiler, desc);
|
||||
|
||||
@ -4982,7 +4983,7 @@ void hyperstone_device::generate_extend(drcuml_block &block, compiler_state &com
|
||||
{
|
||||
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
|
||||
|
||||
uint16_t op = desc->opptr.w[0];
|
||||
const uint16_t op = desc->opptr.w[0];
|
||||
|
||||
uint16_t func = m_pr16(desc->pc + 2);
|
||||
UML_ADD(block, DRC_PC, DRC_PC, 2);
|
||||
@ -5077,7 +5078,7 @@ void hyperstone_device::generate_extend(drcuml_block &block, compiler_state &com
|
||||
// signed half-word multiply/add, double word product sum
|
||||
case EHMACD:
|
||||
{
|
||||
printf("Unimplemented extended opcode, EHMACD, PC = %08x\n", desc->pc);
|
||||
osd_printf_error("Unimplemented extended opcode, EHMACD, PC = %08x\n", desc->pc);
|
||||
fatalerror(" ");
|
||||
break;
|
||||
}
|
||||
@ -5085,7 +5086,7 @@ void hyperstone_device::generate_extend(drcuml_block &block, compiler_state &com
|
||||
// half-word complex multiply
|
||||
case EHCMULD:
|
||||
{
|
||||
printf("Unimplemented extended opcode, EHCMULD, PC = %08x\n", desc->pc);
|
||||
osd_printf_error("Unimplemented extended opcode, EHCMULD, PC = %08x\n", desc->pc);
|
||||
fatalerror(" ");
|
||||
break;
|
||||
}
|
||||
@ -5093,7 +5094,7 @@ void hyperstone_device::generate_extend(drcuml_block &block, compiler_state &com
|
||||
// half-word complex multiply/add
|
||||
case EHCMACD:
|
||||
{
|
||||
printf("Unimplemented extended opcode, EHCMACD, PC = %08x\n", desc->pc);
|
||||
osd_printf_error("Unimplemented extended opcode, EHCMACD, PC = %08x\n", desc->pc);
|
||||
fatalerror(" ");
|
||||
break;
|
||||
}
|
||||
@ -5102,7 +5103,7 @@ void hyperstone_device::generate_extend(drcuml_block &block, compiler_state &com
|
||||
// Ls is not used and should denote the same register as Ld
|
||||
case EHCSUMD:
|
||||
{
|
||||
printf("Unimplemented extended opcode, EHCSUMD, PC = %08x\n", desc->pc);
|
||||
osd_printf_error("Unimplemented extended opcode, EHCSUMD, PC = %08x\n", desc->pc);
|
||||
fatalerror(" ");
|
||||
break;
|
||||
}
|
||||
@ -5111,7 +5112,7 @@ void hyperstone_device::generate_extend(drcuml_block &block, compiler_state &com
|
||||
// Ls is not used and should denote the same register as Ld
|
||||
case EHCFFTD:
|
||||
{
|
||||
printf("Unimplemented extended opcode, EHCFFTD, PC = %08x\n", desc->pc);
|
||||
osd_printf_error("Unimplemented extended opcode, EHCFFTD, PC = %08x\n", desc->pc);
|
||||
fatalerror(" ");
|
||||
break;
|
||||
}
|
||||
@ -5120,13 +5121,13 @@ void hyperstone_device::generate_extend(drcuml_block &block, compiler_state &com
|
||||
// Ls is not used and should denote the same register as Ld
|
||||
case EHCFFTSD:
|
||||
{
|
||||
printf("Unimplemented extended opcode, EHCFFTSD, PC = %08x\n", desc->pc);
|
||||
osd_printf_error("Unimplemented extended opcode, EHCFFTSD, PC = %08x\n", desc->pc);
|
||||
fatalerror(" ");
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
printf("Unknown extended opcode (%04x), PC = %08x\n", func, desc->pc);
|
||||
osd_printf_error("Unknown extended opcode (%04x), PC = %08x\n", func, desc->pc);
|
||||
fatalerror(" ");
|
||||
break;
|
||||
}
|
||||
@ -5135,14 +5136,14 @@ void hyperstone_device::generate_extend(drcuml_block &block, compiler_state &com
|
||||
|
||||
void hyperstone_device::generate_reserved(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
|
||||
{
|
||||
printf("Unimplemented: generate_reserved (%08x)\n", desc->pc);
|
||||
osd_printf_error("Unimplemented: generate_reserved (%08x)\n", desc->pc);
|
||||
fflush(stdout);
|
||||
fatalerror(" ");
|
||||
}
|
||||
|
||||
void hyperstone_device::generate_do(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
|
||||
{
|
||||
printf("Unimplemented: generate_do (%08x)\n", desc->pc);
|
||||
osd_printf_error("Unimplemented: generate_do (%08x)\n", desc->pc);
|
||||
fflush(stdout);
|
||||
fatalerror(" ");
|
||||
}
|
||||
|
||||
@ -441,7 +441,18 @@ void uml::instruction::simplify()
|
||||
else
|
||||
convert_to_mov_immediate(rotl_64(m_param[1].immediate(), m_param[2].immediate()) & m_param[3].immediate());
|
||||
}
|
||||
else if (m_param[2].is_immediate_value(0))
|
||||
else if (m_param[1].is_immediate() && m_param[2].is_immediate())
|
||||
{
|
||||
assert(m_size == 4 || m_size == 8);
|
||||
m_opcode = OP_AND;
|
||||
m_numparams = 3;
|
||||
if (m_size == 4)
|
||||
m_param[1] = parameter(rotl_32(m_param[1].immediate(), m_param[2].immediate()));
|
||||
else
|
||||
m_param[1] = parameter(rotl_64(m_param[1].immediate(), m_param[2].immediate()));
|
||||
m_param[2] = m_param[3];
|
||||
}
|
||||
else if (m_param[2].is_immediate_value(0) || m_param[3].is_immediate_value(0))
|
||||
{
|
||||
m_opcode = OP_AND;
|
||||
m_numparams = 3;
|
||||
|
||||
@ -12,28 +12,34 @@
|
||||
#include "tea1002.h"
|
||||
|
||||
|
||||
namespace {
|
||||
|
||||
//**************************************************************************
|
||||
// CONSTANTS
|
||||
//**************************************************************************
|
||||
|
||||
const float tea1002_device::m_luminance[] =
|
||||
const int s_tint = -6; // what is this based on?
|
||||
|
||||
const float s_luminance[] =
|
||||
{
|
||||
0, 22.5, 44, 66.5, 8.5, 31, 52.5, 100, // INV = 0
|
||||
75, 52.5, 31, 8.5, 66.5, 44, 22.5, 0 // INV = 1
|
||||
};
|
||||
|
||||
const int tea1002_device::m_phase[] =
|
||||
const int s_phase[] =
|
||||
{
|
||||
0, 103, 241, 167, 347, 61, 283, 0, // INV = 0
|
||||
0, 283, 61, 347, 167, 241, 103, 0 // INV = 1
|
||||
};
|
||||
|
||||
const int tea1002_device::m_amplitude[] =
|
||||
const int s_amplitude[] =
|
||||
{
|
||||
0, 48, 44, 33, 33, 44, 48, 0, // INV = 0
|
||||
0, 24, 22, 17, 17, 22, 24, 0 // INV = 1
|
||||
};
|
||||
|
||||
} // anonymous namespace
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// DEVICE DEFINITIONS
|
||||
@ -73,9 +79,9 @@ void tea1002_device::device_start()
|
||||
rgb_t tea1002_device::color(int index)
|
||||
{
|
||||
// calculate yuv
|
||||
double y = m_luminance[index] / 100;
|
||||
double u = cos((m_phase[index] + m_tint) * M_PI / 180) * m_amplitude[index] / 100;
|
||||
double v = sin((m_phase[index] + m_tint) * M_PI / 180) * m_amplitude[index] / 100;
|
||||
double y = s_luminance[index] / 100;
|
||||
double u = cos((s_phase[index] + s_tint) * M_PI / 180) * s_amplitude[index] / 100;
|
||||
double v = sin((s_phase[index] + s_tint) * M_PI / 180) * s_amplitude[index] / 100;
|
||||
|
||||
// and convert to rgb
|
||||
double r = y + v * 1.14;
|
||||
|
||||
@ -29,8 +29,6 @@
|
||||
// TYPE DEFINITIONS
|
||||
//**************************************************************************
|
||||
|
||||
// ======================> tea1002_device
|
||||
|
||||
class tea1002_device : public device_t
|
||||
{
|
||||
public:
|
||||
@ -42,15 +40,10 @@ public:
|
||||
protected:
|
||||
// device_t overrides
|
||||
virtual void device_start() override ATTR_COLD;
|
||||
|
||||
private:
|
||||
static const int m_tint = -6; // what is this based on?
|
||||
static const float m_luminance[16];
|
||||
static const int m_phase[16];
|
||||
static const int m_amplitude[16];
|
||||
};
|
||||
|
||||
// device type definition
|
||||
|
||||
// device type declaration
|
||||
DECLARE_DEVICE_TYPE(TEA1002, tea1002_device)
|
||||
|
||||
#endif // MAME_VIDEO_TEA1002_H
|
||||
|
||||
Loading…
Reference in New Issue
Block a user