mirror of
https://github.com/holub/mame
synced 2025-05-28 16:43:04 +03:00
hp_dio: add shared IRQ and DMA capabilities
This commit is contained in:
Sven Schnelle
parent
ad129a4673
commit
9e61e6a018
@ -8,6 +8,11 @@
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#include "emu.h"
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#include "hp_dio.h"
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#include "hp98543.h"
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#include "hp98544.h"
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#include "hp98603a.h"
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#include "hp98603b.h"
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#include "hp98644.h"
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//**************************************************************************
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// GLOBAL VARIABLES
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@ -96,11 +101,17 @@ dio16_device::dio16_device(const machine_config &mconfig, device_type type, cons
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device_t(mconfig, type, tag, owner, clock),
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m_maincpu(*this, finder_base::DUMMY_TAG),
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m_prgspace(nullptr),
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m_out_irq3_cb(*this),
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m_out_irq4_cb(*this),
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m_out_irq5_cb(*this),
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m_out_irq6_cb(*this)
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m_irq1_out_cb(*this),
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m_irq2_out_cb(*this),
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m_irq3_out_cb(*this),
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m_irq4_out_cb(*this),
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m_irq5_out_cb(*this),
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m_irq6_out_cb(*this),
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m_irq7_out_cb(*this),
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m_dmar0_out_cb(*this),
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m_dmar1_out_cb(*this)
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{
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std::fill(std::begin(m_cards), std::end(m_cards), nullptr);
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m_prgwidth = 0;
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}
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@ -110,13 +121,21 @@ dio16_device::dio16_device(const machine_config &mconfig, device_type type, cons
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void dio16_device::device_start()
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{
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m_out_irq3_cb.resolve_safe();
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m_out_irq4_cb.resolve_safe();
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m_out_irq5_cb.resolve_safe();
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m_out_irq6_cb.resolve_safe();
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m_irq1_out_cb.resolve_safe();
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m_irq2_out_cb.resolve_safe();
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m_irq3_out_cb.resolve_safe();
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m_irq4_out_cb.resolve_safe();
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m_irq5_out_cb.resolve_safe();
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m_irq6_out_cb.resolve_safe();
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m_irq7_out_cb.resolve_safe();
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m_dmar0_out_cb.resolve_safe();
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m_dmar1_out_cb.resolve_safe();
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m_prgspace = &m_maincpu->space(AS_PROGRAM);
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m_prgwidth = m_maincpu->space_config(AS_PROGRAM)->data_width();
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save_item(NAME(m_irq));
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save_item(NAME(m_dmar));
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}
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//-------------------------------------------------
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@ -127,25 +146,128 @@ void dio16_device::device_reset()
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{
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}
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void dio16_device::install_memory(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler)
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unsigned dio16_device::add_card(device_dio16_card_interface &card)
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{
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switch (m_prgwidth)
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{
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case 16:
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m_prgspace->install_readwrite_handler(start, end, rhandler, whandler);
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m_cards.push_back(&card);
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return m_bus_index++;
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}
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void dio16_device::set_irq(unsigned index, unsigned int level, int state)
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{
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bool const changed(bool(state) != BIT(m_irq[level], index));
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if (!changed)
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return;
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if (state)
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m_irq[level] |= (1 << index);
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else
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m_irq[level] &= ~(1 << index);
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if (m_bus_index != index) {
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switch (level) {
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case 0:
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m_irq1_out_cb(state);
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break;
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case 32:
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m_prgspace->install_readwrite_handler(start, end, rhandler, whandler, 0xffffffff);
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case 1:
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m_irq2_out_cb(state);
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break;
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default:
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fatalerror("DIO: Bus width %d not supported\n", m_prgwidth);
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case 2:
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m_irq3_out_cb(state);
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break;
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case 3:
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m_irq4_out_cb(state);
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break;
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case 4:
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m_irq5_out_cb(state);
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break;
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case 5:
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m_irq6_out_cb(state);
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break;
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case 6:
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m_irq7_out_cb(state);
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break;
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}
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}
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}
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void dio16_device::set_dmar(unsigned int index, unsigned int num, int state)
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{
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assert(num <= 1);
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bool const changed(bool(state) != BIT(m_dmar[num], index));
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if (!changed)
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return;
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if (state)
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m_dmar[num] |= (1 << index);
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else
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m_dmar[num] &= ~(1 << index);
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for (auto & card:m_cards) {
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if (card->get_index() == index)
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continue;
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switch (num) {
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case 0:
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card->dmar0_in(state);
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break;
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case 1:
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card->dmar1_in(state);
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break;
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}
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}
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}
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void dio16_device::dmack_w_out(int index, int channel, uint8_t val)
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{
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for (auto & card:m_cards) {
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if (card->get_index() == index)
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continue;
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card->dmack_w_in(channel, val);
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}
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}
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uint8_t dio16_device::dmack_r_out(int index, int channel)
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{
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uint8_t ret = 0xff;
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for (auto & card:m_cards) {
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if (card->get_index() == index)
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continue;
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ret &= card->dmack_r_in(channel);
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}
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return ret;
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}
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WRITE_LINE_MEMBER(dio16_device::reset_in)
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{
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for (auto & card:m_cards) {
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if (card->get_index() != m_bus_index)
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card->reset_in(state);
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}
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}
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void dio16_device::install_memory(offs_t start, offs_t end,
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read16_delegate rhandler,
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write16_delegate whandler) {
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switch (m_prgwidth) {
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case 16:
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m_prgspace->install_readwrite_handler(start, end, rhandler,
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whandler);
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break;
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case 32:
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m_prgspace->install_readwrite_handler(start, end, rhandler,
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whandler, 0xffffffff);
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break;
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default:
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fatalerror("DIO: Bus width %d not supported\n", m_prgwidth);
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}
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}
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void dio16_device::install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data)
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{
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m_prgspace->install_readwrite_bank(start, end, 0, tag );
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m_prgspace->install_readwrite_bank(start, end, 0, tag);
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machine().root_device().membank(m_prgspace->device().siblingtag(tag).c_str())->set_base(data);
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}
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@ -165,6 +287,10 @@ void dio16_device::unmap_rom(offs_t start, offs_t end)
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m_prgspace->unmap_read(start, end);
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}
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void device_dio16_card_interface::set_bus(dio16_device &bus)
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{
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m_index = (m_dio_dev = &bus)->add_card(*this);
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}
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//**************************************************************************
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// DEVICE DIO16 CARD INTERFACE
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@ -186,13 +312,10 @@ void device_dio16_card_interface::interface_pre_start()
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throw emu_fatalerror("device_dio16_card_interface: DIO bus not configured\n");
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}
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//**************************************************************************
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// DIO32 DEVICE
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//**************************************************************************
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dio32_device::dio32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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dio16_device(mconfig, DIO32, tag, owner, clock)
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{
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@ -203,7 +326,6 @@ void dio32_device::device_start()
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dio16_device::device_start();
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}
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//**************************************************************************
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// DEVICE DIO32 CARD INTERFACE
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//**************************************************************************
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@ -224,5 +346,15 @@ void device_dio32_card_interface::interface_pre_start()
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if (m_dio_dev && !dynamic_cast<dio32_device *>(m_dio_dev))
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throw emu_fatalerror("device_dio32_card_interface: DIO32 device %s (%s) in DIO16 slot %s\n", device().tag(), device().name(), m_dio_dev->name());
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}
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}
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} // namespace bus::hp_dio
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} // namespace bus
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void hpdio_cards(device_slot_interface & device)
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{
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device.option_add("hp98543", HPDIO_98543);
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device.option_add("hp98544", HPDIO_98544);
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device.option_add("hp98603a", HPDIO_98603A);
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device.option_add("hp98603b", HPDIO_98603B);
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device.option_add("hp98644", HPDIO_98644);
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}
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@ -23,22 +23,8 @@ namespace bus {
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// INTERFACE CONFIGURATION MACROS
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//**************************************************************************
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#define MCFG_DIO16_CPU(_cputag) \
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downcast<bus::hp_dio::dio16_device &>(*device).set_cputag(_cputag);
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#define MCFG_DIO32_CPU(_cputag) \
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downcast<bus::hp_dio::dio32_device &>(*device).set_cputag(_cputag);
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#define MCFG_ISA_OUT_IRQ3_CB(_devcb) \
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downcast<bus::hp_dio::dio16_device &>(*device).set_out_irq3_callback(DEVCB_##_devcb);
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#define MCFG_ISA_OUT_IRQ4_CB(_devcb) \
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downcast<bus::hp_dio::dio16_device &>(*device).set_out_irq4_callback(DEVCB_##_devcb);
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#define MCFG_ISA_OUT_IRQ5_CB(_devcb) \
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downcast<bus::hp_dio::dio16_device &>(*device).set_out_irq5_callback(DEVCB_##_devcb);
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#define MCFG_ISA_OUT_IRQ6_CB(_devcb) \
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downcast<bus::hp_dio::dio16_device &>(*device).set_out_irq6_callback(DEVCB_##_devcb);
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#define MCFG_DIO16_CPU(_cputag) downcast<bus::hp_dio::dio16_device &>(*device).set_cputag(_cputag);
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#define MCFG_DIO32_CPU(_cputag) downcast<bus::hp_dio::dio32_device &>(*device).set_cputag(_cputag);
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//**************************************************************************
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// TYPE DEFINITIONS
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@ -77,7 +63,6 @@ protected:
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required_device<dio16_device> m_dio;
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};
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class device_dio16_card_interface;
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// ======================> dio16_device
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class dio16_device : public device_t
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@ -86,11 +71,18 @@ public:
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// construction/destruction
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dio16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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// inline configuration
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template <typename T> void set_cputag(T &&tag) { m_maincpu.set_tag(std::forward<T>(tag)); }
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template <class Object> devcb_base &set_out_irq3_callback(Object &&cb) { return m_out_irq3_cb.set_callback(std::forward<Object>(cb)); }
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template <class Object> devcb_base &set_out_irq4_callback(Object &&cb) { return m_out_irq4_cb.set_callback(std::forward<Object>(cb)); }
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template <class Object> devcb_base &set_out_irq5_callback(Object &&cb) { return m_out_irq5_cb.set_callback(std::forward<Object>(cb)); }
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template <class Object> devcb_base &set_out_irq6_callback(Object &&cb) { return m_out_irq6_cb.set_callback(std::forward<Object>(cb)); }
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template<typename T> void set_cputag(T &&tag) { m_maincpu.set_tag(std::forward<T>(tag)); }
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// callback configuration
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auto dmar0_out_cb() { return m_dmar0_out_cb.bind(); }
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auto dmar1_out_cb() { return m_dmar1_out_cb.bind(); }
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auto irq1_out_cb() { return m_irq1_out_cb.bind(); }
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auto irq2_out_cb() { return m_irq2_out_cb.bind(); }
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auto irq3_out_cb() { return m_irq3_out_cb.bind(); }
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auto irq4_out_cb() { return m_irq4_out_cb.bind(); }
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auto irq5_out_cb() { return m_irq5_out_cb.bind(); }
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auto irq6_out_cb() { return m_irq6_out_cb.bind(); }
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auto irq7_out_cb() { return m_irq7_out_cb.bind(); }
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void install_memory(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler);
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@ -105,16 +97,44 @@ public:
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void unmap_rom(offs_t start, offs_t end);
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// IRQs 1, 2, and 7 are reserved for non-bus usage.
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DECLARE_WRITE_LINE_MEMBER( irq3_w ) { m_out_irq3_cb(state); }
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DECLARE_WRITE_LINE_MEMBER( irq4_w ) { m_out_irq4_cb(state); }
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DECLARE_WRITE_LINE_MEMBER( irq5_w ) { m_out_irq5_cb(state); }
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DECLARE_WRITE_LINE_MEMBER( irq6_w ) { m_out_irq6_cb(state); }
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// input lines
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DECLARE_WRITE_LINE_MEMBER(dmar0_in) { set_dmar(m_bus_index, 0, state); }
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DECLARE_WRITE_LINE_MEMBER(dmar1_in) { set_dmar(m_bus_index, 1, state); }
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DECLARE_WRITE_LINE_MEMBER(irq1_in) { set_irq(m_bus_index, 0, state); }
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DECLARE_WRITE_LINE_MEMBER(irq2_in) { set_irq(m_bus_index, 1, state); }
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DECLARE_WRITE_LINE_MEMBER(irq3_in) { set_irq(m_bus_index, 2, state); }
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DECLARE_WRITE_LINE_MEMBER(irq4_in) { set_irq(m_bus_index, 3, state); }
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DECLARE_WRITE_LINE_MEMBER(irq5_in) { set_irq(m_bus_index, 4, state); }
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DECLARE_WRITE_LINE_MEMBER(irq6_in) { set_irq(m_bus_index, 5, state); }
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DECLARE_WRITE_LINE_MEMBER(irq7_in) { set_irq(m_bus_index, 6, state); }
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DECLARE_WRITE_LINE_MEMBER(reset_in);
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// output lines
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DECLARE_READ_LINE_MEMBER(irq1_out) const { return (m_irq[0] & ~m_bus_index) ? 1 : 0; }
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DECLARE_READ_LINE_MEMBER(irq2_out) const { return (m_irq[1] & ~m_bus_index) ? 1 : 0; }
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DECLARE_READ_LINE_MEMBER(irq3_out) const { return (m_irq[2] & ~m_bus_index) ? 1 : 0; }
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DECLARE_READ_LINE_MEMBER(irq4_out) const { return (m_irq[3] & ~m_bus_index) ? 1 : 0; }
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DECLARE_READ_LINE_MEMBER(irq5_out) const { return (m_irq[4] & ~m_bus_index) ? 1 : 0; }
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DECLARE_READ_LINE_MEMBER(irq6_out) const { return (m_irq[5] & ~m_bus_index) ? 1 : 0; }
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DECLARE_READ_LINE_MEMBER(irq7_out) const { return (m_irq[6] & ~m_bus_index) ? 1 : 0; }
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DECLARE_READ_LINE_MEMBER(dmar0_out) const { return dmar0_r(); }
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DECLARE_READ_LINE_MEMBER(dmar1_out) const { return dmar1_r(); }
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bool dmar0_r() const { return (m_dmar[0] & ~m_bus_index) ? 1 : 0; }
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bool dmar1_r() const { return (m_dmar[1] & ~m_bus_index) ? 1 : 0; }
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uint8_t dmack_r_out(int index, int channel);
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void dmack_w_out(int index, int channel, uint8_t data);
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int m_prgwidth;
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unsigned add_card(device_dio16_card_interface & card);
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void set_irq(unsigned int index, unsigned int num, int state);
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void set_dmar(unsigned int index, unsigned int num, int state);
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protected:
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dio16_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
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void install_space(int spacenum, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
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// device-level overrides
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@ -123,14 +143,26 @@ protected:
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// internal state
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required_device<cpu_device> m_maincpu;
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std::list <device_dio16_card_interface *> m_cards;
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// address spaces
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address_space *m_prgspace;
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int m_bus_index;
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devcb_write_line m_out_irq3_cb;
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devcb_write_line m_out_irq4_cb;
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devcb_write_line m_out_irq5_cb;
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devcb_write_line m_out_irq6_cb;
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// packed line states
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u16 m_irq[7];
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u16 m_dmar[2];
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devcb_write_line m_irq1_out_cb;
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devcb_write_line m_irq2_out_cb;
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devcb_write_line m_irq3_out_cb;
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devcb_write_line m_irq4_out_cb;
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devcb_write_line m_irq5_out_cb;
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devcb_write_line m_irq6_out_cb;
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devcb_write_line m_irq7_out_cb;
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devcb_write_line m_dmar0_out_cb;
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devcb_write_line m_dmar1_out_cb;
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};
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// ======================> device_dio16_card_interface
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@ -145,20 +177,58 @@ public:
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virtual ~device_dio16_card_interface();
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device_dio16_card_interface *next() const { return m_next; }
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// inline configuration
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void set_diobus(dio16_device &dio_device) { m_dio_dev = &dio_device; }
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void set_diobus(dio16_device &dio_device) {
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m_dio_dev = &dio_device;
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m_index = m_dio_dev->add_card(*this);
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}
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protected:
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device_dio16_card_interface(const machine_config &mconfig, device_t &device);
|
||||
dio16_device &dio() { assert(m_dio_dev); return *m_dio_dev; }
|
||||
dio16_device &dio() {
|
||||
assert(m_dio_dev);
|
||||
return *m_dio_dev;
|
||||
}
|
||||
|
||||
virtual void interface_pre_start() override;
|
||||
|
||||
int get_index() { return m_index; };
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(irq1_out) { m_dio_dev->set_irq(m_index, 0, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(irq2_out) { m_dio_dev->set_irq(m_index, 1, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(irq3_out) { m_dio_dev->set_irq(m_index, 2, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(irq4_out) { m_dio_dev->set_irq(m_index, 3, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(irq5_out) { m_dio_dev->set_irq(m_index, 4, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(irq6_out) { m_dio_dev->set_irq(m_index, 5, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(irq7_out) { m_dio_dev->set_irq(m_index, 6, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(dmar0_out) { m_dio_dev->set_dmar(m_index, 0, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(dmar1_out) { m_dio_dev->set_dmar(m_index, 1, state); }
|
||||
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(irq1_in) {}
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(irq2_in) {}
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(irq3_in) {}
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(irq4_in) {}
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(irq5_in) {}
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(irq6_in) {}
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(irq7_in) {}
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(dmar0_in) {}
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(dmar1_in) {}
|
||||
|
||||
virtual uint8_t dmack_r_out(int channel) { return m_dio_dev->dmack_r_out(m_index, channel); }
|
||||
virtual void dmack_w_out(int channel, uint8_t data) { m_dio_dev->dmack_w_out(m_index, channel, data); }
|
||||
virtual uint8_t dmack_r_in(int channel) { return 0xff; }
|
||||
virtual void dmack_w_in(int channel, uint8_t data) {}
|
||||
|
||||
virtual DECLARE_WRITE_LINE_MEMBER(reset_in) {}
|
||||
|
||||
bool dmar0_r() const { return m_dio_dev->dmar0_r(); }
|
||||
bool dmar1_r() const { return m_dio_dev->dmar1_r(); }
|
||||
|
||||
dio16_device *m_dio_dev;
|
||||
|
||||
private:
|
||||
void set_bus(dio16_device & bus);
|
||||
device_dio16_card_interface *m_next;
|
||||
unsigned int m_index;
|
||||
};
|
||||
|
||||
class dio32_device;
|
||||
@ -184,8 +254,6 @@ protected:
|
||||
virtual void device_start() override;
|
||||
};
|
||||
|
||||
|
||||
|
||||
// ======================> dio32_device
|
||||
class dio32_device : public dio16_device
|
||||
{
|
||||
@ -200,8 +268,6 @@ protected:
|
||||
virtual void device_start() override;
|
||||
};
|
||||
|
||||
|
||||
|
||||
// ======================> device_dio32_card_interface
|
||||
|
||||
// class representing interface-specific live dio32 card
|
||||
@ -228,4 +294,6 @@ DECLARE_DEVICE_TYPE_NS(DIO32, bus::hp_dio, dio32_device)
|
||||
DECLARE_DEVICE_TYPE_NS(DIO32_SLOT, bus::hp_dio, dio32_slot_device)
|
||||
DECLARE_DEVICE_TYPE_NS(DIO16, bus::hp_dio, dio16_device)
|
||||
|
||||
void hpdio_cards(device_slot_interface &device);
|
||||
|
||||
#endif // MAME_BUS_HPDIO_HPDIO_H
|
||||
|
||||
Loading…
Reference in New Issue
Block a user