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(nw) icebox : last update for this cycle.
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@ -6,10 +6,10 @@ Nutting Icebox
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2018-08-19 Skeleton driver. It's all guesswork.
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2018-08-19 Skeleton driver. It's all guesswork.
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It's a case with many slots for daughter boards, and 2 floppy drives. It appears to be an "in-circuit emulator"
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It's a case with many slots for daughter boards, and 2 floppy drives. It's an "in-circuit emulator"
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for an unknown arcade board.
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for Bally / Astrocade development.
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The unit has 5 boards: 3 boards were photographed and are: a cpu board (Z80 and unmarked XTAL),
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The unit has 5 daughter boards: 3 boards were photographed and are: a cpu board (Z80 and unmarked XTAL),
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a RS232 board (2x 8251, 8 dipswitches connected to a BR1941L, 4.9152 XTAL),
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a RS232 board (2x 8251, 8 dipswitches connected to a BR1941L, 4.9152 XTAL),
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and a board covered with TTL.
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and a board covered with TTL.
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@ -25,14 +25,80 @@ Commands:
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Status:
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Status:
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- Machine boots up, you can enter commands.
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- Machine boots up, you can enter commands.
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- Disk track 00 can be read into memory, hangs when track 01 is requested.
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- Note that disk won't actually do anything until Z-80 IM0 is fixed.
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To Do:
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To Do:
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- Find out what ports E4-FF do.
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- Find out more what ports F2-FF do.
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- Hook up the floppy drives when the ports are identified.
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The floppy drives are a special type containing a FDC within. The FDC is a FD1771-B01 with a 4MHz XTAL.
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The floppy drives are a special type containing a FDC within. The FDC is a FD1771-B01 with a 4MHz XTAL.
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I suspect the drive issues a NMI when the internal DRQ asserts (code around F21C). Need to resolve how
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it handles writing data to 0000-up while keeping the NMI handler.
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NOTES FROM AL KOSSOW
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--------------------
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This is the Nutting Associates ICE box used for Bally arcade and Astrocade development.
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The games are written in "Terse", a dialect of FORTH with graphics and sound extensions.
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The game graphics and sound hardware were in a separate chassis connected through 50 pin ribbon cables.
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There is 64K of ram that can be mapped to the addresses used where the proms in the game would be.
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Development appeared to have started under CP/M, then they migrated to development in the Terse environment.
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The sector size also changed from 128 to 1024 bytes. For some reason, the hardware inverts the sector data.
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CP/M flipped the bits, Terse does not.
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There is a 122 pin backplane, and five cards. The bus buffers for the floppies and the external hardware
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are on the backplane. There is an I/O, memory mapper, dual 32k static ram, and CPU cards. The I/O card has
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a three byte FIFO and a buffer for forcing 00 onto the data bus, which appears to be related to handling
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breakpoints from looking at the code in ICE.ASM.
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The eprom dump is for booting Terse, and earlier version of the prom is documented in ICE.ASM which may be for CP/M
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The CPU card has 1K of ram, mapped to FC00. They must have moved the sector buffering to main RAM, since a
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1K sector obviously wouldn't fit.
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The crystal on the CPU is 9.8304MHz. It may be possible to alter the cpu speed. There is a FAST signal on the bp.
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I/O registers from the ICE.ASM listing
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CRTD E0 terminal uart data
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CRTS E1 terminal uart control
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LPTD E2 printer uart data
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LPTS E3 printer uart control
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DATA E4 1771 regs
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SECTOR E5
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TRACK E6
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COMMAND E7
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CENABE F0
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SELECT F1 bit 0 & 1 (select drive 0-3), bit 2 (enable floppy interrupt)
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FIFO F2 3 BYTE FIFO
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EXTL F8 These are probably for the mapping registers
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EXTH F9
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WPROTL FA
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WPROTH FB
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BADRH FC BASE ADR? breakpoint
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BADRL FD
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BTYPE FE
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MISC FF
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the 0 is forced onto the bus when bp signal IRESET/ is asserted. it appears to come from the CPU board (only
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the cpu and io board are connected to it)
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the box doesn't do remapping, it just has two 16 bit write-only registers that can unmap and write protect memory
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in 16 4k chunks, (extl,exth), (wprotl,wproth) .
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breakpoint (badrh, barl) specifies an adr to nmi on, with a 4 bit reference type in btype (wr, req, iorq, mreq)
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it looks like zeroing btype disables it.
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io port 0xff (misc) is on the I/O board.
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******************************************************************************************************************/
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******************************************************************************************************************/
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@ -41,8 +107,7 @@ it handles writing data to 0000-up while keeping the NMI handler.
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#include "machine/i8251.h"
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#include "machine/i8251.h"
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#include "machine/com8116.h"
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#include "machine/com8116.h"
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#include "bus/rs232/rs232.h"
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#include "bus/rs232/rs232.h"
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//#include "machine/wd_fdc.h"
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#include "machine/wd_fdc.h"
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#include "screen.h"
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class icebox_state : public driver_device
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class icebox_state : public driver_device
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@ -54,25 +119,35 @@ public:
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, m_uart0(*this, "uart0")
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, m_uart0(*this, "uart0")
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, m_uart1(*this, "uart1")
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, m_uart1(*this, "uart1")
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, m_brg(*this, "brg")
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, m_brg(*this, "brg")
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, m_fdc(*this, "fdc")
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, m_floppy0(*this, "fdc:0")
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, m_floppy1(*this, "fdc:1")
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{ }
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{ }
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void icebox(machine_config &config);
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void icebox(machine_config &config);
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private:
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private:
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DECLARE_WRITE_LINE_MEMBER(intrq_w);
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DECLARE_WRITE_LINE_MEMBER(drq_w);
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void mem_map(address_map &map);
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void mem_map(address_map &map);
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void io_map(address_map &map);
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void io_map(address_map &map);
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void machine_reset() override;
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void machine_reset() override;
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void port_f1_w(u8 data);
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u8 m_f1;
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_maincpu;
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required_device<i8251_device> m_uart0;
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required_device<i8251_device> m_uart0;
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required_device<i8251_device> m_uart1;
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required_device<i8251_device> m_uart1;
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required_device<com8116_device> m_brg;
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required_device<com8116_device> m_brg;
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required_device<fd1771_device> m_fdc;
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required_device<floppy_connector> m_floppy0;
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required_device<floppy_connector> m_floppy1;
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};
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};
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void icebox_state::mem_map(address_map &map)
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void icebox_state::mem_map(address_map &map)
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{
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{
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map(0x0000, 0x00ff).rom().region("maincpu", 0); // required for NMI handler and for initial boot
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map(0x0000, 0xefff).ram();
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map(0xf000, 0xfbff).rom().region("maincpu", 0);
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map(0xf000, 0xfbff).rom().region("maincpu", 0);
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map(0xfc00, 0xffff).ram();
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map(0xfc00, 0xffff).ram();
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}
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}
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@ -81,10 +156,14 @@ void icebox_state::io_map(address_map &map)
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{
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{
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map.global_mask(0xff);
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map.global_mask(0xff);
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map.unmap_value_high();
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map.unmap_value_high();
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map(0xe0, 0xe0).rw("uart0", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w));
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map(0xe0, 0xe0).rw(m_uart0, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w));
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map(0xe1, 0xe1).rw("uart0", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w));
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map(0xe1, 0xe1).rw(m_uart0, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w));
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map(0xe2, 0xe2).rw("uart1", FUNC(i8251_device::data_r), FUNC(i8251_device::data_w));
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map(0xe2, 0xe2).rw(m_uart1, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w));
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map(0xe3, 0xe3).rw("uart1", FUNC(i8251_device::status_r), FUNC(i8251_device::control_w));
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map(0xe3, 0xe3).rw(m_uart1, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w));
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map(0xe4, 0xe7).lrw8("fdc_usage",
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[this](offs_t offset) { return m_fdc->read(offset^3); },
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[this](offs_t offset, u8 data) { m_fdc->write(offset^3, data); });
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map(0xf1, 0xf1).lw8("port_F1", [this](u8 data) { port_f1_w(data); } );
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}
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}
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/* Input ports */
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/* Input ports */
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@ -129,13 +208,57 @@ void icebox_state::machine_reset()
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u8 data = ioport("BAUD")->read();
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u8 data = ioport("BAUD")->read();
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m_brg->write_str(data & 15); // Terminal
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m_brg->write_str(data & 15); // Terminal
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m_brg->write_stt((data >> 4) & 15); // Printer
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m_brg->write_stt((data >> 4) & 15); // Printer
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//m_maincpu->set_pc(0xf000);
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m_maincpu->set_pc(0xf000);
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m_f1 = 0;
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}
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}
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//static void xor100_floppies(device_slot_interface &device)
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void icebox_state::port_f1_w(u8 data)
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//{
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{
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// device.option_add("flop", FLOPPY_8_SSDD); // Pertec "iCOM FD5200"
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m_f1 = data;
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//}
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floppy_image_device *floppy = nullptr;
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switch (data & 7)
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{
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case 4:
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floppy = m_floppy0->get_device();
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break;
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case 5:
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floppy = m_floppy1->get_device();
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break;
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default:
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break;
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}
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m_fdc->set_floppy(floppy);
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if (floppy)
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{
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floppy->mon_w(0);
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floppy->ss_w(0); // side 0 ?
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}
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m_fdc->dden_w(1); // single density?
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}
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// Command complete: release CPU from halt, via IM0.
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WRITE_LINE_MEMBER(icebox_state::intrq_w)
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{
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if (BIT(m_f1, 2) && state)
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m_maincpu->set_input_line_and_vector(INPUT_LINE_IRQ0, HOLD_LINE, 0xc9);
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}
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// The next byte from floppy is available. Enable CPU so it can get the byte, via IM0.
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WRITE_LINE_MEMBER(icebox_state::drq_w)
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{
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if (BIT(m_f1, 2) && state)
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m_maincpu->set_input_line_and_vector(INPUT_LINE_IRQ0, HOLD_LINE, 0xc9);
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}
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static void floppies(device_slot_interface &device)
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{
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device.option_add("flop", FLOPPY_8_SSDD); // Pertec "iCOM FD5200"
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}
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static DEVICE_INPUT_DEFAULTS_START( terminal ) // we need to remove bit 7 which is on the last character of each message
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static DEVICE_INPUT_DEFAULTS_START( terminal ) // we need to remove bit 7 which is on the last character of each message
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DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_9600 )
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DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_9600 )
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@ -148,7 +271,7 @@ DEVICE_INPUT_DEFAULTS_END
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MACHINE_CONFIG_START(icebox_state::icebox)
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MACHINE_CONFIG_START(icebox_state::icebox)
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/* basic machine hardware */
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/* basic machine hardware */
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MCFG_DEVICE_ADD("maincpu",Z80, 2'000'000) // unknown crystal and clock
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MCFG_DEVICE_ADD("maincpu",Z80, 9'830'400 / 4) // unknown divisor
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MCFG_DEVICE_PROGRAM_MAP(mem_map)
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MCFG_DEVICE_PROGRAM_MAP(mem_map)
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MCFG_DEVICE_IO_MAP(io_map)
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MCFG_DEVICE_IO_MAP(io_map)
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@ -179,11 +302,13 @@ MACHINE_CONFIG_START(icebox_state::icebox)
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m_brg->ft_handler().set(m_uart1, FUNC(i8251_device::write_txc));
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m_brg->ft_handler().set(m_uart1, FUNC(i8251_device::write_txc));
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m_brg->ft_handler().append(m_uart1, FUNC(i8251_device::write_rxc));
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m_brg->ft_handler().append(m_uart1, FUNC(i8251_device::write_rxc));
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// MCFG_DEVICE_ADD("fdc", FD1771, 4_MHz_XTAL / 2)
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MCFG_DEVICE_ADD(m_fdc, FD1771, 4_MHz_XTAL / 2)
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// MCFG_FLOPPY_DRIVE_ADD("fdc:0", floppies, "flop", floppy_image_device::default_floppy_formats)
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MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(*this, icebox_state, intrq_w))
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// MCFG_FLOPPY_DRIVE_SOUND(true)
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MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(*this, icebox_state, drq_w))
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// MCFG_FLOPPY_DRIVE_ADD("fdc:1", floppies, "flop", floppy_image_device::default_floppy_formats)
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MCFG_FLOPPY_DRIVE_ADD(m_floppy0, floppies, "flop", floppy_image_device::default_floppy_formats)
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// MCFG_FLOPPY_DRIVE_SOUND(true)
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MCFG_FLOPPY_DRIVE_SOUND(true)
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MCFG_FLOPPY_DRIVE_ADD(m_floppy1, floppies, "flop", floppy_image_device::default_floppy_formats)
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MCFG_FLOPPY_DRIVE_SOUND(true)
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MACHINE_CONFIG_END
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MACHINE_CONFIG_END
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/* ROM definition */
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/* ROM definition */
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