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More memory system cleanup. Removed SMH_* macros entirely. In

Browse Source 
their place are a series of expanded macros and new memory
installation helpers. Some mappings below (not all are new):

   AM_READ(SMH_RAM)                       -> AM_READONLY
   AM_WRITE(SMH_RAM)                      -> AM_WRITEONLY
   AM_READWRITE(SMH_RAM, SMH_RAM)         -> AM_RAM
   AM_READ(rhandler) AM_WRITE(SMH_RAM)    -> AM_RAM_READ(rhandler)
   AM_READ(SMH_RAM) AM_WRITE(whandler)    -> AM_RAM_WRITE(whandler)
   AM_DEVREAD(tag, rhandler) AM_WRITE(SMH_RAM) 
                                  -> AM_RAM_DEVREAD(tag, rhandler)
   AM_READ(SMH_RAM) AM_DEVWRITE(tag, whandler) 
                                  -> AM_RAM_DEVWRITE(tag, whandler)

   AM_READ(SMH_ROM)                       -> AM_ROM
   AM_WRITE(SMH_ROM)                      -> (was a no-op)

   AM_READ(SMH_NOP)                       -> AM_READNOP
   AM_WRITE(SMH_NOP)                      -> AM_WRITENOP
   AM_READWRITE(SMH_NOP, SMH_NOP)         -> AM_NOP

For dynamic memory handler installation of the various types,
use the new functions:

   memory_unmap_read()
   memory_unmap_write()
   memory_unmap_readwrite() -- unmaps a section of address space

   memory_nop_read()
   memory_nop_write()
   memory_nop_readwrite() -- nops a section of address space

Cleaned up the internals of the address_map_entry structure, and
also normalized the way the address map macros work to remove a
lot of redundancy.
This commit is contained in:
Aaron Giles 2009-12-05 07:54:11 +00:00
parent 320793ee8f
commit 9eda9e163e
274 changed files with 1541 additions and 1423 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/emu/cpu/mips/psx.c
View File

@ -1311,7 +1311,8 @@ static void mips_update_scratchpad( const address_space *space )
}
else if( ( psxcpu->biu & BIU_DS ) == 0 )
{
memory_install_readwrite32_handler( space, 0x1f800000, 0x1f8003ff, 0, 0, psx_berr_r, (write32_space_func)SMH_NOP );
memory_install_read32_handler( space, 0x1f800000, 0x1f8003ff, 0, 0, psx_berr_r );
memory_nop_write( space, 0x1f800000, 0x1f8003ff, 0, 0 );
}
else
{

2
src/emu/cpu/tms7000/tms7000.c
View File

@ -135,7 +135,7 @@ static WRITE8_HANDLER( tms70x0_pf_w );
static ADDRESS_MAP_START(tms7000_mem, ADDRESS_SPACE_PROGRAM, 8)
AM_RANGE(0x0000, 0x007f) AM_READWRITE(tms7000_internal_r, tms7000_internal_w) /* tms7000 internal RAM */
AM_RANGE(0x0080, 0x00ff) AM_READWRITE(SMH_NOP, SMH_NOP) /* reserved */
AM_RANGE(0x0080, 0x00ff) AM_NOP /* reserved */
AM_RANGE(0x0100, 0x01ff) AM_READWRITE(tms70x0_pf_r, tms70x0_pf_w) /* tms7000 internal I/O ports */
ADDRESS_MAP_END

2
src/emu/debug/debugcmd.c
View File

@ -1786,7 +1786,7 @@ static void execute_cheatinit(running_machine *machine, int ref, int params, con
cheat_region[region_count].offset = memory_address_to_byte(space, entry->addrstart) & space->bytemask;
cheat_region[region_count].endoffset = memory_address_to_byte(space, entry->addrend) & space->bytemask;
cheat_region[region_count].share = entry->share;
cheat_region[region_count].disabled = (entry->write.shandler8 == SMH_RAM) ? FALSE : TRUE;
cheat_region[region_count].disabled = (entry->write.type == AMH_RAM) ? FALSE : TRUE;
/* disable double share regions */
if (entry->share != 0)

319
src/emu/memory.c
View File

@ -156,6 +156,20 @@ enum _read_or_write
};
typedef enum _read_or_write read_or_write;
/* static data access handler constants */
enum
{
STATIC_INVALID = 0, /* invalid - should never be used */
STATIC_BANK1 = 1, /* first memory bank */
STATIC_BANKMAX = 122, /* last memory bank */
STATIC_RAM, /* RAM - reads/writes map to dynamic banks */
STATIC_ROM, /* ROM - reads = RAM; writes = UNMAP */
STATIC_NOP, /* NOP - reads = unmapped value; writes = no-op */
STATIC_UNMAP, /* unmapped - same as NOP except we log errors */
STATIC_WATCHPOINT, /* watchpoint - used internally */
STATIC_COUNT /* total number of static handlers */
};
/***************************************************************************
@ -169,7 +183,6 @@ typedef enum _read_or_write read_or_write;
/* helper macros */
#define HANDLER_IS_RAM(h) ((FPTR)(h) == STATIC_RAM)
#define HANDLER_IS_ROM(h) ((FPTR)(h) == STATIC_ROM)
#define HANDLER_IS_NOP(h) ((FPTR)(h) == STATIC_NOP)
#define HANDLER_IS_BANK(h) ((FPTR)(h) >= STATIC_BANK1 && (FPTR)(h) <= STATIC_BANKMAX)
#define HANDLER_IS_STATIC(h) ((FPTR)(h) < STATIC_COUNT)
@ -210,7 +223,7 @@ struct _bank_info
UINT8 index; /* array index for this handler */
UINT8 read; /* is this bank used for reads? */
UINT8 write; /* is this bank used for writes? */
void * handler; /* SMH_BANK(n) handler for this bank */
void * handler; /* handler for this bank */
bank_reference * reflist; /* linked list of address spaces referencing this bank */
offs_t bytestart; /* byte-adjusted start offset */
offs_t byteend; /* byte-adjusted end offset */
@ -316,6 +329,7 @@ const char *const address_space_names[ADDRESS_SPACES] = { "program", "data", "I/
static void memory_init_spaces(running_machine *machine);
static void memory_init_preflight(running_machine *machine);
static void memory_init_populate(running_machine *machine);
static void memory_init_map_entry(address_space *space, const address_map_entry *entry, read_or_write readorwrite);
static void memory_init_allocate(running_machine *machine);
static void memory_init_locate(running_machine *machine);
static void memory_exit(running_machine *machine);
@ -814,10 +828,10 @@ void address_map_free(address_map *map)
{
address_map_entry *entry = map->entrylist;
map->entrylist = entry->next;
if (entry->read_devtag_string != NULL)
astring_free(entry->read_devtag_string);
if (entry->write_devtag_string != NULL)
astring_free(entry->write_devtag_string);
if (entry->read.derived_tag != NULL)
astring_free(entry->read.derived_tag);
if (entry->write.derived_tag != NULL)
astring_free(entry->write.derived_tag);
if (entry->region_string != NULL)
astring_free(entry->region_string);
free(entry);
@ -1396,6 +1410,22 @@ void _memory_install_bank_handler(const address_space *space, offs_t addrstart,
}
/*-------------------------------------------------
_memory_unmap - unmap a section of address
space
-------------------------------------------------*/
void _memory_unmap(const address_space *space, offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, UINT8 unmap_read, UINT8 unmap_write, UINT8 quiet)
{
address_space *spacerw = (address_space *)space;
if (unmap_read)
space_map_range(spacerw, ROW_READ, space->dbits, 0, addrstart, addrend, addrmask, addrmirror, (genf *)(quiet ? STATIC_NOP : STATIC_UNMAP), spacerw, "unmapped");
if (unmap_write)
space_map_range(spacerw, ROW_WRITE, space->dbits, 0, addrstart, addrend, addrmask, addrmirror, (genf *)(quiet ? STATIC_NOP : STATIC_UNMAP), spacerw, "unmapped");
}
/***************************************************************************
DEBUGGER HELPERS
@ -1676,7 +1706,7 @@ static void memory_init_preflight(running_machine *machine)
adjust_addresses(space, &entry->bytestart, &entry->byteend, &entry->bytemask, &entry->bytemirror);
/* if this is a ROM handler without a specified region, attach it to the implicit region */
if (space->spacenum == ADDRESS_SPACE_0 && HANDLER_IS_ROM(entry->read.generic) && entry->region == NULL)
if (space->spacenum == ADDRESS_SPACE_0 && entry->read.type == AMH_ROM && entry->region == NULL)
{
/* make sure it fits within the memory region before doing so, however */
if (entry->byteend < regionsize)
@ -1735,99 +1765,98 @@ static void memory_init_populate(running_machine *machine)
while (last_entry != space->map->entrylist)
{
const address_map_entry *entry;
read_handler rhandler;
write_handler whandler;
/* find the entry before the last one we processed */
for (entry = space->map->entrylist; entry->next != last_entry; entry = entry->next) ;
last_entry = entry;
rhandler = entry->read;
whandler = entry->write;
/* if we have a read port tag, look it up */
if (entry->read_porttag != NULL)
{
const input_port_config *port = input_port_by_tag(&machine->portlist, entry->read_porttag);
int bits = (entry->read_bits == 0) ? space->dbits : entry->read_bits;
genf *handler = NULL;
if (port == NULL)
fatalerror("Non-existent port referenced: '%s'\n", entry->read_porttag);
switch (bits)
{
case 8: handler = (genf *)input_port_read8; break;
case 16: handler = (genf *)input_port_read16; break;
case 32: handler = (genf *)input_port_read32; break;
case 64: handler = (genf *)input_port_read64; break;
}
space_map_range_private(space, ROW_READ, bits, entry->read_mask, entry->addrstart, entry->addrend, entry->addrmask, entry->addrmirror, handler, (void *)port, entry->read_porttag);
}
/* if we have a write port tag, look it up */
if (entry->write_porttag != NULL)
{
const input_port_config *port = input_port_by_tag(&machine->portlist, entry->write_porttag);
int bits = (entry->write_bits == 0) ? space->dbits : entry->write_bits;
genf *handler = NULL;
if (port == NULL)
fatalerror("Non-existent port referenced: '%s'\n", entry->write_porttag);
switch (bits)
{
case 8: handler = (genf *)input_port_write8; break;
case 16: handler = (genf *)input_port_write16; break;
case 32: handler = (genf *)input_port_write32; break;
case 64: handler = (genf *)input_port_write64; break;
}
space_map_range_private(space, ROW_WRITE, bits, entry->write_mask, entry->addrstart, entry->addrend, entry->addrmask, entry->addrmirror, handler, (void *)port, entry->write_porttag);
}
/* if we have a read bank tag, look it up */
if (entry->read_banktag != NULL)
{
void *handler = bank_find_or_allocate(space, entry->read_banktag, entry->addrstart, entry->addrend, ROW_READ);
space_map_range_private(space, ROW_READ, space->dbits, entry->read_mask, entry->addrstart, entry->addrend, entry->addrmask, entry->addrmirror, handler, space, entry->read_banktag);
}
/* if we have a write bank tag, look it up */
if (entry->write_banktag != NULL)
{
void *handler = bank_find_or_allocate(space, entry->write_banktag, entry->addrstart, entry->addrend, ROW_WRITE);
space_map_range_private(space, ROW_WRITE, space->dbits, entry->write_mask, entry->addrstart, entry->addrend, entry->addrmask, entry->addrmirror, handler, space, entry->write_banktag);
}
/* install the read handler if present */
if (rhandler.generic != NULL)
{
int bits = (entry->read_bits == 0) ? space->dbits : entry->read_bits;
void *object = space;
if (entry->read_devtag != NULL)
{
object = (void *)device_list_find_by_tag(&machine->config->devicelist, entry->read_devtag);
if (object == NULL)
fatalerror("Unidentified object in memory map: tag=%s\n", entry->read_devtag);
}
space_map_range_private(space, ROW_READ, bits, entry->read_mask, entry->addrstart, entry->addrend, entry->addrmask, entry->addrmirror, rhandler.generic, object, entry->read_name);
}
/* install the write handler if present */
if (whandler.generic != NULL)
{
int bits = (entry->write_bits == 0) ? space->dbits : entry->write_bits;
void *object = space;
if (entry->write_devtag != NULL)
{
object = (void *)device_list_find_by_tag(&machine->config->devicelist, entry->write_devtag);
if (object == NULL)
fatalerror("Unidentified object in memory map: tag=%s\n", entry->write_devtag);
}
space_map_range_private(space, ROW_WRITE, bits, entry->write_mask, entry->addrstart, entry->addrend, entry->addrmask, entry->addrmirror, whandler.generic, object, entry->write_name);
}
/* map both read and write halves */
memory_init_map_entry(space, entry, ROW_READ);
memory_init_map_entry(space, entry, ROW_WRITE);
}
}
}
/*-------------------------------------------------
memory_init_map_entry - map a single read or
write entry based on information from an
address map entry
-------------------------------------------------*/
static void memory_init_map_entry(address_space *space, const address_map_entry *entry, read_or_write readorwrite)
{
const map_handler_data *handler = (readorwrite == ROW_READ) ? &entry->read : &entry->write;
int bits = (handler->bits != 0) ? handler->bits : space->dbits;
genf *funcptr = handler->handler.generic;
const char *name = handler->name;
void *object = space;
/* based on the handler type, alter the bits, name, funcptr, and object */
switch (handler->type)
{
case AMH_NONE:
return;
case AMH_RAM:
bits = space->dbits;
name = "RAM";
funcptr = (genf *)STATIC_RAM;
break;
case AMH_ROM:
bits = space->dbits;
name = "ROM";
funcptr = (genf *)STATIC_ROM;
break;
case AMH_NOP:
bits = space->dbits;
name = "nop";
funcptr = (genf *)STATIC_NOP;
break;
case AMH_UNMAP:
bits = space->dbits;
name = "unmapped";
funcptr = (genf *)STATIC_NOP;
break;
case AMH_DEVICE_HANDLER:
object = (void *)device_list_find_by_tag(&space->machine->config->devicelist, handler->tag);
if (object == NULL)
fatalerror("Non-existent device '%s' referenced in memory map\n", handler->tag);
break;
case AMH_HANDLER:
break;
case AMH_PORT:
name = handler->tag;
switch (bits)
{
case 8: funcptr = (readorwrite == ROW_READ) ? (genf *)input_port_read8 : (genf *)input_port_write8; break;
case 16: funcptr = (readorwrite == ROW_READ) ? (genf *)input_port_read16 : (genf *)input_port_write16; break;
case 32: funcptr = (readorwrite == ROW_READ) ? (genf *)input_port_read32 : (genf *)input_port_write32; break;
case 64: funcptr = (readorwrite == ROW_READ) ? (genf *)input_port_read64 : (genf *)input_port_write64; break;
}
object = (void *)input_port_by_tag(&space->machine->portlist, handler->tag);
if (object == NULL)
fatalerror("Non-existent port '%s' referenced in memory map\n", handler->tag);
break;
case AMH_BANK:
bits = space->dbits;
name = handler->tag;
funcptr = (genf *)bank_find_or_allocate(space, handler->tag, entry->addrstart, entry->addrend, readorwrite);
break;
}
/* do the actual mapping */
space_map_range_private(space, readorwrite, bits, handler->mask, entry->addrstart, entry->addrend, entry->addrmask, entry->addrmirror, funcptr, object, name);
}
/*-------------------------------------------------
memory_init_allocate - allocate memory for
device address spaces
@ -2064,10 +2093,9 @@ static void memory_exit(running_machine *machine)
fatalerror("%s: %s included a mismatched address map (%s %d) for an existing map with %s %d!\n", driver->source_file, driver->name, #field, tmap.field, #field, map->field); \
} while (0)
#define check_entry_handler(handler) do { \
if (entry->handler.generic != NULL && entry->handler.generic != (genf *)SMH_RAM) \
fatalerror("%s: %s AM_RANGE(0x%x, 0x%x) %s handler already set!\n", driver->source_file, driver->name, entry->addrstart, entry->addrend, #handler); \
#define check_entry_handler(row) do { \
if (entry->row.type != AMH_NONE) \
fatalerror("%s: %s AM_RANGE(0x%x, 0x%x) %s handler already set!\n", driver->source_file, driver->name, entry->addrstart, entry->addrend, #row); \
} while (0)
#define check_entry_field(field) do { \
@ -2156,59 +2184,62 @@ static void map_detokenize(address_map *map, const game_driver *driver, const ch
case ADDRMAP_TOKEN_READ:
check_entry_handler(read);
TOKEN_UNGET_UINT32(tokens);
TOKEN_GET_UINT32_UNPACK3(tokens, entrytype, 8, entry->read_bits, 8, entry->read_mask, 8);
entry->read = TOKEN_GET_PTR(tokens, read);
entry->read_name = TOKEN_GET_STRING(tokens);
TOKEN_GET_UINT32_UNPACK4(tokens, entrytype, 8, entry->read.type, 8, entry->read.bits, 8, entry->read.mask, 8);
if (entry->read.type == AMH_HANDLER || entry->read.type == AMH_DEVICE_HANDLER)
{
entry->read.handler.read = TOKEN_GET_PTR(tokens, read);
entry->read.name = TOKEN_GET_STRING(tokens);
}
if (entry->read.type == AMH_DEVICE_HANDLER || entry->read.type == AMH_PORT || entry->read.type == AMH_BANK)
{
if (entry->read.derived_tag == NULL)
entry->read.derived_tag = astring_alloc();
entry->read.tag = device_inherit_tag(entry->read.derived_tag, devtag, TOKEN_GET_STRING(tokens));
}
break;
case ADDRMAP_TOKEN_WRITE:
check_entry_handler(write);
TOKEN_UNGET_UINT32(tokens);
TOKEN_GET_UINT32_UNPACK3(tokens, entrytype, 8, entry->write_bits, 8, entry->write_mask, 8);
entry->write = TOKEN_GET_PTR(tokens, write);
entry->write_name = TOKEN_GET_STRING(tokens);
TOKEN_GET_UINT32_UNPACK4(tokens, entrytype, 8, entry->write.type, 8, entry->write.bits, 8, entry->write.mask, 8);
if (entry->write.type == AMH_HANDLER || entry->write.type == AMH_DEVICE_HANDLER)
{
entry->write.handler.write = TOKEN_GET_PTR(tokens, write);
entry->write.name = TOKEN_GET_STRING(tokens);
}
if (entry->write.type == AMH_DEVICE_HANDLER || entry->write.type == AMH_PORT || entry->write.type == AMH_BANK)
{
if (entry->write.derived_tag == NULL)
entry->write.derived_tag = astring_alloc();
entry->write.tag = device_inherit_tag(entry->write.derived_tag, devtag, TOKEN_GET_STRING(tokens));
}
break;
case ADDRMAP_TOKEN_DEVICE_READ:
case ADDRMAP_TOKEN_READWRITE:
check_entry_handler(read);
TOKEN_UNGET_UINT32(tokens);
TOKEN_GET_UINT32_UNPACK3(tokens, entrytype, 8, entry->read_bits, 8, entry->read_mask, 8);
entry->read = TOKEN_GET_PTR(tokens, read);
entry->read_name = TOKEN_GET_STRING(tokens);
if (entry->read_devtag_string == NULL)
entry->read_devtag_string = astring_alloc();
entry->read_devtag = device_inherit_tag(entry->read_devtag_string, devtag, TOKEN_GET_STRING(tokens));
break;
case ADDRMAP_TOKEN_DEVICE_WRITE:
check_entry_handler(write);
TOKEN_UNGET_UINT32(tokens);
TOKEN_GET_UINT32_UNPACK3(tokens, entrytype, 8, entry->write_bits, 8, entry->write_mask, 8);
entry->write = TOKEN_GET_PTR(tokens, write);
entry->write_name = TOKEN_GET_STRING(tokens);
if (entry->write_devtag_string == NULL)
entry->write_devtag_string = astring_alloc();
entry->write_devtag = device_inherit_tag(entry->write_devtag_string, devtag, TOKEN_GET_STRING(tokens));
break;
case ADDRMAP_TOKEN_READ_PORT:
check_entry_field(read_porttag);
entry->read_porttag = TOKEN_GET_STRING(tokens);
break;
case ADDRMAP_TOKEN_WRITE_PORT:
check_entry_field(write_porttag);
entry->write_porttag = TOKEN_GET_STRING(tokens);
break;
case ADDRMAP_TOKEN_READ_BANK:
check_entry_field(read_banktag);
entry->read_banktag = TOKEN_GET_STRING(tokens);
break;
case ADDRMAP_TOKEN_WRITE_BANK:
check_entry_field(write_banktag);
entry->write_banktag = TOKEN_GET_STRING(tokens);
TOKEN_GET_UINT32_UNPACK4(tokens, entrytype, 8, entry->read.type, 8, entry->read.bits, 8, entry->read.mask, 8);
entry->write.type = entry->read.type;
entry->write.bits = entry->read.bits;
entry->write.mask = entry->read.mask;
if (entry->read.type == AMH_HANDLER || entry->read.type == AMH_DEVICE_HANDLER)
{
entry->read.handler.read = TOKEN_GET_PTR(tokens, read);
entry->read.name = TOKEN_GET_STRING(tokens);
entry->write.handler.write = TOKEN_GET_PTR(tokens, write);
entry->write.name = TOKEN_GET_STRING(tokens);
}
if (entry->read.type == AMH_DEVICE_HANDLER || entry->read.type == AMH_PORT || entry->read.type == AMH_BANK)
{
const char *basetag = TOKEN_GET_STRING(tokens);
if (entry->read.derived_tag == NULL)
entry->read.derived_tag = astring_alloc();
entry->read.tag = device_inherit_tag(entry->read.derived_tag, devtag, basetag);
if (entry->write.derived_tag == NULL)
entry->write.derived_tag = astring_alloc();
entry->write.tag = device_inherit_tag(entry->write.derived_tag, devtag, basetag);
}
break;
case ADDRMAP_TOKEN_REGION:
@ -2288,7 +2319,7 @@ static void space_map_range_private(address_space *space, read_or_write readorwr
{
/* translate ROM to RAM/UNMAP here */
if (HANDLER_IS_ROM(handler))
handler = (readorwrite == ROW_WRITE) ? (genf *)STATIC_UNMAP : (genf *)SMH_RAM;
handler = (readorwrite == ROW_WRITE) ? (genf *)STATIC_UNMAP : (genf *)STATIC_RAM;
/* assign banks for RAM/ROM areas */
if (HANDLER_IS_RAM(handler))
@ -2423,12 +2454,12 @@ static int space_needs_backing_store(const address_space *space, const address_m
return TRUE;
/* if we're writing to any sort of bank or RAM, then yes, we do need backing */
if (entry->write_banktag != NULL || (FPTR)entry->write.generic == STATIC_RAM)
if (entry->write.type == AMH_BANK || entry->write.type == AMH_RAM)
return TRUE;
/* if we're reading from RAM or from ROM outside of address space 0 or its region, then yes, we do need backing */
if ((FPTR)entry->read.generic == STATIC_RAM ||
((FPTR)entry->read.generic == STATIC_ROM && (space->spacenum != ADDRESS_SPACE_0 || entry->addrstart >= memory_region_length(space->machine, space->cpu->tag))))
if (entry->read.type == AMH_RAM ||
(entry->read.type == AMH_ROM && (space->spacenum != ADDRESS_SPACE_0 || entry->addrstart >= memory_region_length(space->machine, space->cpu->tag))))
return TRUE;
/* all other cases don't need backing */
@ -2444,7 +2475,7 @@ static int space_needs_backing_store(const address_space *space, const address_m
/*-------------------------------------------------
bank_find_or_allocate - allocate a new
bank, or find an existing one, and return the
SMH_BANK(n) handler
read/write handler
-------------------------------------------------*/
void *bank_find_or_allocate(const address_space *space, const char *tag, offs_t bytestart, offs_t byteend, read_or_write readorwrite)
@ -2495,7 +2526,7 @@ void *bank_find_or_allocate(const address_space *space, const char *tag, offs_t
/* populate it */
bank->index = banknum;
bank->handler = SMH_BANK(banknum);
bank->handler = (void *)(FPTR)(STATIC_BANK1 + banknum - 1);
bank->bytestart = bytestart;
bank->byteend = byteend;
bank->curentry = MAX_BANK_ENTRIES;

255
src/emu/memory.h
View File

@ -35,21 +35,20 @@ enum
};
/* static data access handler constants */
enum
/* address map handler types */
enum _map_handler_type
{
STATIC_INVALID = 0, /* invalid - should never be used */
STATIC_BANK1 = 1, /* first memory bank */
/* entries 1-96 are for fixed banks 1-96 specified by the driver */
/* entries 97-122 are for dynamically allocated internal banks */
STATIC_BANKMAX = 122, /* last memory bank */
STATIC_RAM, /* RAM - reads/writes map to dynamic banks */
STATIC_ROM, /* ROM - reads = RAM; writes = UNMAP */
STATIC_NOP, /* NOP - reads = unmapped value; writes = no-op */
STATIC_UNMAP, /* unmapped - same as NOP except we log errors */
STATIC_WATCHPOINT, /* watchpoint - used internally */
STATIC_COUNT /* total number of static handlers */
AMH_NONE = 0,
AMH_RAM,
AMH_ROM,
AMH_NOP,
AMH_UNMAP,
AMH_HANDLER,
AMH_DEVICE_HANDLER,
AMH_PORT,
AMH_BANK
};
typedef enum _map_handler_type map_handler_type;
/* address map tokens */
@ -69,12 +68,7 @@ enum
ADDRMAP_TOKEN_MIRROR,
ADDRMAP_TOKEN_READ,
ADDRMAP_TOKEN_WRITE,
ADDRMAP_TOKEN_DEVICE_READ,
ADDRMAP_TOKEN_DEVICE_WRITE,
ADDRMAP_TOKEN_READ_PORT,
ADDRMAP_TOKEN_WRITE_PORT,
ADDRMAP_TOKEN_READ_BANK,
ADDRMAP_TOKEN_WRITE_BANK,
ADDRMAP_TOKEN_READWRITE,
ADDRMAP_TOKEN_REGION,
ADDRMAP_TOKEN_SHARE,
ADDRMAP_TOKEN_BASEPTR,
@ -211,33 +205,33 @@ union _memory_handler
};
/* address map handler data */
typedef struct _map_handler_data map_handler_data;
struct _map_handler_data
{
map_handler_type type; /* type of the handler */
UINT8 bits; /* width of the handler in bits, or 0 for default */
UINT8 mask; /* mask for which lanes apply */
memory_handler handler; /* a memory handler */
const char * name; /* name of the handler */
const char * tag; /* tag pointing to a reference */
astring * derived_tag; /* string used to hold derived names */
};
/* address_map_entry is a linked list element describing one address range in a map */
typedef struct _address_map_entry address_map_entry;
struct _address_map_entry
{
address_map_entry * next; /* pointer to the next entry */
astring * read_devtag_string; /* string used to hold derived names */
astring * write_devtag_string;/* string used to hold derived names */
astring * region_string; /* string used to hold derived names */
offs_t addrstart; /* start address */
offs_t addrend; /* end address */
offs_t addrmirror; /* mirror bits */
offs_t addrmask; /* mask bits */
read_handler read; /* read handler callback */
UINT8 read_bits; /* bits for the read handler callback (0=default, 1=8, 2=16, 3=32) */
UINT8 read_mask; /* mask bits indicating which subunits to process */
const char * read_name; /* read handler callback name */
const char * read_devtag; /* read tag for the relevant device */
const char * read_porttag; /* tag for input port reading */
const char * write_porttag; /* tag for output port writing */
const char * read_banktag; /* tag for bank reading */
const char * write_banktag; /* tag for bank writing */
write_handler write; /* write handler callback */
UINT8 write_bits; /* bits for the write handler callback (0=default, 1=8, 2=16, 3=32) */
UINT8 write_mask; /* mask bits indicating which subunits to process */
const char * write_name; /* write handler callback name */
const char * write_devtag; /* read tag for the relevant device */
map_handler_data read; /* data for read handler */
map_handler_data write; /* data for write handler */
UINT32 share; /* index of a shared memory block */
void ** baseptr; /* receives pointer to memory (optional) */
size_t * sizeptr; /* receives size of area in bytes (optional) */
@ -448,14 +442,6 @@ union _addrmap64_token
#define WRITE64_DEVICE_HANDLER(name) void name(ATTR_UNUSED const device_config *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
/* static memory handler (SMH) macros that can be used in place of read/write handlers */
#define SMH_RAM ((void *)STATIC_RAM)
#define SMH_ROM ((void *)STATIC_ROM)
#define SMH_NOP ((void *)STATIC_NOP)
#define SMH_UNMAP ((void *)STATIC_UNMAP)
#define SMH_BANK(n) ((void *)(FPTR)(STATIC_BANK1 + (n) - 1))
/* helper macro for merging data with the memory mask */
#define COMBINE_DATA(varptr) (*(varptr) = (*(varptr) & ~mem_mask) | (data & mem_mask))
@ -508,6 +494,10 @@ union _addrmap64_token
_memory_install_port_handler(space, start, end, mask, mirror, rtag, NULL)
#define memory_install_read_bank_handler(space, start, end, mask, mirror, rtag) \
_memory_install_bank_handler(space, start, end, mask, mirror, rtag, NULL)
#define memory_unmap_read(space, start, end, mask, mirror) \
_memory_unmap(space, start, end, mask, mirror, TRUE, FALSE, FALSE)
#define memory_nop_read(space, start, end, mask, mirror) \
_memory_unmap(space, start, end, mask, mirror, TRUE, FALSE, TRUE)
/* wrappers for dynamic write handler installation */
#define memory_install_write_handler(space, start, end, mask, mirror, whandler) \
@ -536,6 +526,10 @@ union _addrmap64_token
_memory_install_port_handler(space, start, end, mask, mirror, NULL, wtag)
#define memory_install_write_bank_handler(space, start, end, mask, mirror, wtag) \
_memory_install_bank_handler(space, start, end, mask, mirror, NULL, wtag)
#define memory_unmap_write(space, start, end, mask, mirror) \
_memory_unmap(space, start, end, mask, mirror, FALSE, TRUE, FALSE)
#define memory_nop_write(space, start, end, mask, mirror) \
_memory_unmap(space, start, end, mask, mirror, FALSE, TRUE, TRUE)
/* wrappers for dynamic read/write handler installation */
#define memory_install_readwrite_handler(space, start, end, mask, mirror, rhandler, whandler) \
@ -564,6 +558,10 @@ union _addrmap64_token
_memory_install_port_handler(space, start, end, mask, mirror, rtag, wtag)
#define memory_install_readwrite_bank_handler(space, start, end, mask, mirror, tag) \
_memory_install_bank_handler(space, start, end, mask, mirror, tag, tag)
#define memory_unmap_readwrite(space, start, end, mask, mirror) \
_memory_unmap(space, start, end, mask, mirror, TRUE, TRUE, FALSE)
#define memory_nop_readwrite(space, start, end, mask, mirror) \
_memory_unmap(space, start, end, mask, mirror, TRUE, TRUE, TRUE)
/* macros for accessing bytes and words within larger chunks */
@ -669,110 +667,214 @@ union _addrmap64_token
#define AM_MIRROR(_mirror) \
TOKEN_UINT64_PACK2(ADDRMAP_TOKEN_MIRROR, 8, _mirror, 32),
/* space reads */
#define AM_READ(_handler) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_READ, 8, 0, 8, 0, 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READ, 8, AMH_HANDLER, 8, 0, 8, 0, 8), \
TOKEN_PTR(sread, _handler), \
TOKEN_STRING(#_handler),
#define AM_READ8(_handler, _unitmask) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_READ, 8, 8, 8, UNITMASK8(_unitmask), 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READ, 8, AMH_HANDLER, 8, 8, 8, UNITMASK8(_unitmask), 8), \
TOKEN_PTR(sread8, _handler), \
TOKEN_STRING(#_handler),
#define AM_READ16(_handler, _unitmask) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_READ, 8, 16, 8, UNITMASK16(_unitmask), 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READ, 8, AMH_HANDLER, 8, 16, 8, UNITMASK16(_unitmask), 8), \
TOKEN_PTR(sread16, _handler), \
TOKEN_STRING(#_handler),
#define AM_READ32(_handler, _unitmask) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_READ, 8, 32, 8, UNITMASK32(_unitmask), 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READ, 8, AMH_HANDLER, 8, 32, 8, UNITMASK32(_unitmask), 8), \
TOKEN_PTR(sread32, _handler), \
TOKEN_STRING(#_handler),
/* space writes */
#define AM_WRITE(_handler) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_WRITE, 8, 0, 8, 0, 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_WRITE, 8, AMH_HANDLER, 8, 0, 8, 0, 8), \
TOKEN_PTR(swrite, _handler), \
TOKEN_STRING(#_handler),
#define AM_WRITE8(_handler, _unitmask) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_WRITE, 8, 8, 8, UNITMASK8(_unitmask), 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_WRITE, 8, AMH_HANDLER, 8, 8, 8, UNITMASK8(_unitmask), 8), \
TOKEN_PTR(swrite8, _handler), \
TOKEN_STRING(#_handler),
#define AM_WRITE16(_handler, _unitmask) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_WRITE, 8, 16, 8, UNITMASK16(_unitmask), 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_WRITE, 8, AMH_HANDLER, 8, 16, 8, UNITMASK16(_unitmask), 8), \
TOKEN_PTR(swrite16, _handler), \
TOKEN_STRING(#_handler),
#define AM_WRITE32(_handler, _unitmask) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_WRITE, 8, 32, 8, UNITMASK32(_unitmask), 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_WRITE, 8, AMH_HANDLER, 8, 32, 8, UNITMASK32(_unitmask), 8), \
TOKEN_PTR(swrite32, _handler), \
TOKEN_STRING(#_handler),
/* space reads/writes */
#define AM_READWRITE(_rhandler, _whandler) \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READWRITE, 8, AMH_HANDLER, 8, 0, 8, 0, 8), \
TOKEN_PTR(sread, _rhandler), \
TOKEN_STRING(#_rhandler), \
TOKEN_PTR(swrite, _whandler), \
TOKEN_STRING(#_whandler),
#define AM_READWRITE8(_rhandler, _whandler, _unitmask) \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READWRITE, 8, AMH_HANDLER, 8, 8, 8, UNITMASK8(_unitmask), 8), \
TOKEN_PTR(sread8, _rhandler), \
TOKEN_STRING(#_rhandler), \
TOKEN_PTR(swrite8, _whandler), \
TOKEN_STRING(#_whandler),
#define AM_READWRITE16(_rhandler, _whandler, _unitmask) \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READWRITE, 8, AMH_HANDLER, 8, 16, 8, UNITMASK16(_unitmask), 8), \
TOKEN_PTR(sread16, _rhandler), \
TOKEN_STRING(#_rhandler), \
TOKEN_PTR(swrite16, _whandler), \
TOKEN_STRING(#_whandler),
#define AM_READWRITE32(_rhandler, _whandler, _unitmask) \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READWRITE, 8, AMH_HANDLER, 8, 32, 8, UNITMASK32(_unitmask), 8), \
TOKEN_PTR(sread32, _rhandler), \
TOKEN_STRING(#_rhandler), \
TOKEN_PTR(swrite32, _whandler), \
TOKEN_STRING(#_whandler),
/* device reads */
#define AM_DEVREAD(_tag, _handler) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_READ, 8, 0, 8, 0, 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READ, 8, AMH_DEVICE_HANDLER, 8, 0, 8, 0, 8), \
TOKEN_PTR(dread, _handler), \
TOKEN_STRING(#_handler), \
TOKEN_STRING(_tag),
#define AM_DEVREAD8(_tag, _handler, _unitmask) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_READ, 8, 8, 8, UNITMASK8(_unitmask), 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READ, 8, AMH_DEVICE_HANDLER, 8, 8, 8, UNITMASK8(_unitmask), 8), \
TOKEN_PTR(dread8, _handler), \
TOKEN_STRING(#_handler), \
TOKEN_STRING(_tag),
#define AM_DEVREAD16(_tag, _handler, _unitmask) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_READ, 8, 16, 8, UNITMASK16(_unitmask), 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READ, 8, AMH_DEVICE_HANDLER, 8, 16, 8, UNITMASK16(_unitmask), 8), \
TOKEN_PTR(dread16, _handler), \
TOKEN_STRING(#_handler), \
TOKEN_STRING(_tag),
#define AM_DEVREAD32(_tag, _handler, _unitmask) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_READ, 8, 32, 8, UNITMASK32(_unitmask), 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READ, 8, AMH_DEVICE_HANDLER, 8, 32, 8, UNITMASK32(_unitmask), 8), \
TOKEN_PTR(dread32, _handler), \
TOKEN_STRING(#_handler), \
TOKEN_STRING(_tag),
/* device writes */
#define AM_DEVWRITE(_tag, _handler) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_WRITE, 8, 0, 8, 0, 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_WRITE, 8, AMH_DEVICE_HANDLER, 8, 0, 8, 0, 8), \
TOKEN_PTR(dwrite, _handler), \
TOKEN_STRING(#_handler), \
TOKEN_STRING(_tag),
#define AM_DEVWRITE8(_tag, _handler, _unitmask) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_WRITE, 8, 8, 8, UNITMASK8(_unitmask), 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_WRITE, 8, AMH_DEVICE_HANDLER, 8, 8, 8, UNITMASK8(_unitmask), 8), \
TOKEN_PTR(dwrite8, _handler), \
TOKEN_STRING(#_handler), \
TOKEN_STRING(_tag),
#define AM_DEVWRITE16(_tag, _handler, _unitmask) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_WRITE, 8, 16, 8, UNITMASK16(_unitmask), 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_WRITE, 8, AMH_DEVICE_HANDLER, 8, 16, 8, UNITMASK16(_unitmask), 8), \
TOKEN_PTR(dwrite16, _handler), \
TOKEN_STRING(#_handler), \
TOKEN_STRING(_tag),
#define AM_DEVWRITE32(_tag, _handler, _unitmask) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_DEVICE_WRITE, 8, 32, 8, UNITMASK32(_unitmask), 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_WRITE, 8, AMH_DEVICE_HANDLER, 8, 32, 8, UNITMASK32(_unitmask), 8), \
TOKEN_PTR(dwrite32, _handler), \
TOKEN_STRING(#_handler), \
TOKEN_STRING(_tag),
/* device reads/writes */
#define AM_DEVREADWRITE(_tag, _rhandler, _whandler) \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READWRITE, 8, AMH_DEVICE_HANDLER, 8, 0, 8, 0, 8), \
TOKEN_PTR(dread, _rhandler), \
TOKEN_STRING(#_rhandler), \
TOKEN_PTR(dwrite, _whandler), \
TOKEN_STRING(#_whandler), \
TOKEN_STRING(_tag),
#define AM_DEVREADWRITE8(_tag, _rhandler, _whandler, _unitmask) \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READWRITE, 8, AMH_DEVICE_HANDLER, 8, 8, 8, UNITMASK8(_unitmask), 8), \
TOKEN_PTR(dread8, _rhandler), \
TOKEN_STRING(#_rhandler), \
TOKEN_PTR(dwrite8, _whandler), \
TOKEN_STRING(#_whandler), \
TOKEN_STRING(_tag),
#define AM_DEVREADWRITE16(_tag, _rhandler, _whandler, _unitmask) \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READWRITE, 8, AMH_DEVICE_HANDLER, 8, 16, 8, UNITMASK16(_unitmask), 8), \
TOKEN_PTR(dread16, _rhandler), \
TOKEN_STRING(#_rhandler), \
TOKEN_PTR(dwrite16, _whandler), \
TOKEN_STRING(#_whandler), \
TOKEN_STRING(_tag),
#define AM_DEVREADWRITE32(_tag, _rhandler, _whandler, _unitmask) \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READWRITE, 8, AMH_DEVICE_HANDLER, 8, 32, 8, UNITMASK32(_unitmask), 8), \
TOKEN_PTR(dread32, _rhandler), \
TOKEN_STRING(#_rhandler), \
TOKEN_PTR(dwrite32, _whandler), \
TOKEN_STRING(#_whandler), \
TOKEN_STRING(_tag),
/* special-case accesses */
#define AM_ROM \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READ, 8, AMH_ROM, 8, 0, 8, 0, 8),
#define AM_READONLY \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READ, 8, AMH_RAM, 8, 0, 8, 0, 8),
#define AM_WRITEONLY \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_WRITE, 8, AMH_RAM, 8, 0, 8, 0, 8),
#define AM_RAM \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READWRITE, 8, AMH_RAM, 8, 0, 8, 0, 8),
#define AM_UNMAP \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READWRITE, 8, AMH_UNMAP, 8, 0, 8, 0, 8),
#define AM_NOP \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READWRITE, 8, AMH_NOP, 8, 0, 8, 0, 8),
#define AM_READNOP \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READ, 8, AMH_NOP, 8, 0, 8, 0, 8),
#define AM_WRITENOP \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_WRITE, 8, AMH_NOP, 8, 0, 8, 0, 8),
/* port accesses */
#define AM_READ_PORT(_tag) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_READ_PORT, 8, 0, 8, 0, 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READ, 8, AMH_PORT, 8, 0, 8, 0, 8), \
TOKEN_STRING(_tag),
#define AM_WRITE_PORT(_tag) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_WRITE_PORT, 8, 0, 8, 0, 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_WRITE, 8, AMH_PORT, 8, 0, 8, 0, 8), \
TOKEN_STRING(_tag),
/* bank accesses */
#define AM_READ_BANK(_tag) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_READ_BANK, 8, 0, 8, 0, 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_READ, 8, AMH_BANK, 8, 0, 8, 0, 8), \
TOKEN_STRING(_tag),
#define AM_WRITE_BANK(_tag) \
TOKEN_UINT32_PACK3(ADDRMAP_TOKEN_WRITE_BANK, 8, 0, 8, 0, 8), \
TOKEN_UINT32_PACK4(ADDRMAP_TOKEN_WRITE, 8, AMH_BANK, 8, 0, 8, 0, 8), \
TOKEN_STRING(_tag),
/* attributes for accesses */
#define AM_REGION(_tag, _offs) \
TOKEN_UINT64_PACK2(ADDRMAP_TOKEN_REGION, 8, _offs, 32), \
TOKEN_STRING(_tag),
@ -802,28 +904,12 @@ union _addrmap64_token
/* common shortcuts */
#define AM_READWRITE(_read,_write) AM_READ(_read) AM_WRITE(_write)
#define AM_READWRITE8(_read,_write,_mask) AM_READ8(_read,_mask) AM_WRITE8(_write,_mask)
#define AM_READWRITE16(_read,_write,_mask) AM_READ16(_read,_mask) AM_WRITE16(_write,_mask)
#define AM_READWRITE32(_read,_write,_mask) AM_READ32(_read,_mask) AM_WRITE32(_write,_mask)
#define AM_DEVREADWRITE(_tag,_read,_write) AM_DEVREAD(_tag,_read) AM_DEVWRITE(_tag,_write)
#define AM_DEVREADWRITE8(_tag,_read,_write,_mask) AM_DEVREAD8(_tag,_read,_mask) AM_DEVWRITE8(_tag,_write,_mask)
#define AM_DEVREADWRITE16(_tag,_read,_write,_mask) AM_DEVREAD16(_tag,_read,_mask) AM_DEVWRITE16(_tag,_write,_mask)
#define AM_DEVREADWRITE32(_tag,_read,_write,_mask) AM_DEVREAD32(_tag,_read,_mask) AM_DEVWRITE32(_tag,_write,_mask)
#define AM_ROM AM_READ(SMH_ROM)
#define AM_ROMBANK(_bank) AM_READ_BANK(_bank)
#define AM_RAM AM_READWRITE(SMH_RAM, SMH_RAM)
#define AM_RAMBANK(_bank) AM_READ_BANK(_bank) AM_WRITE_BANK(_bank)
#define AM_RAM_WRITE(_write) AM_READWRITE(SMH_RAM, _write)
#define AM_WRITEONLY AM_WRITE(SMH_RAM)
#define AM_UNMAP AM_READWRITE(SMH_UNMAP, SMH_UNMAP)
#define AM_NOP AM_READWRITE(SMH_NOP, SMH_NOP)
#define AM_READNOP AM_READ(SMH_NOP)
#define AM_WRITENOP AM_WRITE(SMH_NOP)
#define AM_RAM_READ(_read) AM_READ(_read) AM_WRITEONLY
#define AM_RAM_WRITE(_write) AM_READONLY AM_WRITE(_write)
#define AM_RAM_DEVREAD(_tag, _read) AM_DEVREAD(_tag, _read) AM_WRITEONLY
#define AM_RAM_DEVWRITE(_tag, _write) AM_READONLY AM_DEVWRITE(_tag, _write)
#define AM_BASE_SIZE_MEMBER(_struct, _base, _size) AM_BASE_MEMBER(_struct, _base) AM_SIZE_MEMBER(_struct, _size)
#define AM_BASE_SIZE_GENERIC(_member) AM_BASE_GENERIC(_member) AM_SIZE_GENERIC(_member)
@ -939,6 +1025,9 @@ void _memory_install_port_handler(const address_space *space, offs_t addrstart,
/* install a new bank handler into the given address space */
void _memory_install_bank_handler(const address_space *space, offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, const char *rtag, const char *wtag) ATTR_NONNULL(1);
/* unmap a section of address space */
void _memory_unmap(const address_space *space, offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, UINT8 unmap_read, UINT8 unmap_write, UINT8 quiet) ATTR_NONNULL(1);
/* ----- debugger helpers ----- */

28
src/emu/validity.c
View File

@ -1325,7 +1325,7 @@ static int validate_devices(int drivnum, const machine_config *config, const inp
}
/* if this is a program space, auto-assign implicit ROM entries */
if ((FPTR)entry->read.generic == STATIC_ROM && entry->region == NULL)
if (entry->read.type == AMH_ROM && entry->region == NULL)
{
entry->region = device->tag;
entry->rgnoffs = entry->addrstart;
@ -1362,30 +1362,26 @@ static int validate_devices(int drivnum, const machine_config *config, const inp
}
/* make sure all devices exist */
if (entry->read_devtag != NULL && device_list_find_by_tag(&config->devicelist, entry->read_devtag) == NULL)
if ((entry->read.type == AMH_DEVICE_HANDLER && entry->read.tag != NULL && device_list_find_by_tag(&config->devicelist, entry->read.tag) == NULL) ||
(entry->write.type == AMH_DEVICE_HANDLER && entry->write.tag != NULL && device_list_find_by_tag(&config->devicelist, entry->write.tag) == NULL))
{
mame_printf_error("%s: %s device '%s' %s space memory map entry references nonexistant device '%s'\n", driver->source_file, driver->name, device->tag, address_space_names[spacenum], entry->read_devtag);
error = TRUE;
}
if (entry->write_devtag != NULL && device_list_find_by_tag(&config->devicelist, entry->write_devtag) == NULL)
{
mame_printf_error("%s: %s device '%s' %s space memory map entry references nonexistant device '%s'\n", driver->source_file, driver->name, device->tag, address_space_names[spacenum], entry->write_devtag);
mame_printf_error("%s: %s device '%s' %s space memory map entry references nonexistant device '%s'\n", driver->source_file, driver->name, device->tag, address_space_names[spacenum], entry->write.tag);
error = TRUE;
}
/* make sure ports exist */
if (entry->read_porttag != NULL && input_port_by_tag(portlist, entry->read_porttag) == NULL)
if ((entry->read.type == AMH_PORT && entry->read.tag != NULL && input_port_by_tag(portlist, entry->read.tag) == NULL) ||
(entry->write.type == AMH_PORT && entry->write.tag != NULL && input_port_by_tag(portlist, entry->write.tag) == NULL))
{
mame_printf_error("%s: %s device '%s' %s space memory map entry references nonexistant port tag '%s'\n", driver->source_file, driver->name, device->tag, address_space_names[spacenum], entry->read_porttag);
mame_printf_error("%s: %s device '%s' %s space memory map entry references nonexistant port tag '%s'\n", driver->source_file, driver->name, device->tag, address_space_names[spacenum], entry->read.tag);
error = TRUE;
}
/* make sure ports exist */
if (entry->write_porttag != NULL && input_port_by_tag(portlist, entry->write_porttag) == NULL)
{
mame_printf_error("%s: %s device '%s' %s space memory map entry references nonexistant port tag '%s'\n", driver->source_file, driver->name, device->tag, address_space_names[spacenum], entry->write_porttag);
error = TRUE;
}
/* validate bank tags */
if (entry->read.type == AMH_BANK)
error |= validate_tag(driver, "bank", entry->read.tag);
if (entry->write.type == AMH_BANK)
error |= validate_tag(driver, "bank", entry->write.tag);
}
/* release the address map */

2
src/emu/video/generic.c
View File

@ -307,7 +307,7 @@ equal to the size of normal spriteram.
Spriteram size _must_ be declared in the memory map:
{ 0x120000, 0x1207ff, SMH_BANK(2), &spriteram, &spriteram_size },
AM_RANGE(0x120000, 0x1207ff) AM_RAMBANK("sprites") AM_BASE_SIZE_GENERIC(spriteram)
Then the video driver must draw the sprites from the buffered_spriteram
pointer. The function buffer_spriteram_w() is used to simulate hardware

6
src/mame/audio/dcs.c
View File

@ -1114,8 +1114,8 @@ static void sdrc_remap_memory(running_machine *machine)
/* if SRAM disabled, clean it out */
if (SDRC_SM_EN == 0)
{
memory_install_readwrite32_handler(dcs.program, 0x0800, 0x3fff, 0, 0, (read32_space_func)SMH_UNMAP, (write32_space_func)SMH_UNMAP);
memory_install_readwrite16_handler(dcs.data, 0x0800, 0x37ff, 0, 0, (read16_space_func)SMH_UNMAP, (write16_space_func)SMH_UNMAP);
memory_unmap_readwrite(dcs.program, 0x0800, 0x3fff, 0, 0);
memory_unmap_readwrite(dcs.data, 0x0800, 0x37ff, 0, 0);
}
/* otherwise, map the SRAM */
@ -1140,7 +1140,7 @@ static void sdrc_remap_memory(running_machine *machine)
/* map 1: nothing from 0800-17ff, alternate RAM at 1800-27ff, same RAM at 2800-37ff */
else
{
memory_install_readwrite16_handler(dcs.data, 0x0800, 0x17ff, 0, 0, (read16_space_func)SMH_UNMAP, (write16_space_func)SMH_UNMAP);
memory_unmap_readwrite(dcs.data, 0x0800, 0x17ff, 0, 0);
memory_install_readwrite_bank_handler(dcs.data, 0x1800, 0x27ff, 0, 0, "bank23");
memory_install_readwrite_bank_handler(dcs.data, 0x2800, 0x37ff, 0, 0, "bank24");
memory_set_bankptr(machine, "bank23", dcs_sram + 0x3000);

6
src/mame/audio/exidy440.c
View File

@ -895,10 +895,10 @@ static ADDRESS_MAP_START( exidy440_audio_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_NOP
AM_RANGE(0x8000, 0x801f) AM_MIRROR(0x03e0) AM_READWRITE(m6844_r, m6844_w) AM_BASE(&m6844_data)
AM_RANGE(0x8400, 0x840f) AM_MIRROR(0x03f0) AM_RAM_WRITE(sound_volume_w) AM_BASE(&sound_volume)
AM_RANGE(0x8800, 0x8800) AM_MIRROR(0x03ff) AM_READWRITE(sound_command_r, SMH_NOP)
AM_RANGE(0x8800, 0x8800) AM_MIRROR(0x03ff) AM_READ(sound_command_r) AM_WRITENOP
AM_RANGE(0x8c00, 0x93ff) AM_NOP
AM_RANGE(0x9400, 0x9403) AM_MIRROR(0x03fc) AM_READWRITE(SMH_NOP, SMH_RAM) AM_BASE(&sound_banks)
AM_RANGE(0x9800, 0x9800) AM_MIRROR(0x03ff) AM_READWRITE(SMH_NOP, sound_interrupt_clear_w)
AM_RANGE(0x9400, 0x9403) AM_MIRROR(0x03fc) AM_READNOP AM_WRITEONLY AM_BASE(&sound_banks)
AM_RANGE(0x9800, 0x9800) AM_MIRROR(0x03ff) AM_READNOP AM_WRITE(sound_interrupt_clear_w)
AM_RANGE(0x9c00, 0x9fff) AM_NOP
AM_RANGE(0xa000, 0xbfff) AM_RAM
AM_RANGE(0xc000, 0xdfff) AM_NOP

16
src/mame/audio/jedi.c
View File

@ -179,15 +179,15 @@ static ADDRESS_MAP_START( audio_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0810, 0x081f) AM_MIRROR(0x07c0) AM_DEVREADWRITE("pokey2", pokey_r, pokey_w)
AM_RANGE(0x0820, 0x082f) AM_MIRROR(0x07c0) AM_DEVREADWRITE("pokey3", pokey_r, pokey_w)
AM_RANGE(0x0830, 0x083f) AM_MIRROR(0x07c0) AM_DEVREADWRITE("pokey4", pokey_r, pokey_w)
AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x00ff) AM_READWRITE(SMH_NOP, irq_ack_w)
AM_RANGE(0x1100, 0x1100) AM_MIRROR(0x00ff) AM_READWRITE(SMH_NOP, SMH_RAM) AM_BASE_MEMBER(jedi_state, speech_data)
AM_RANGE(0x1200, 0x13ff) AM_READWRITE(SMH_NOP, speech_strobe_w)
AM_RANGE(0x1400, 0x1400) AM_MIRROR(0x00ff) AM_READWRITE(SMH_NOP, audio_ack_latch_w)
AM_RANGE(0x1500, 0x1500) AM_MIRROR(0x00ff) AM_READWRITE(SMH_NOP, speech_reset_w)
AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x00ff) AM_READNOP AM_WRITE(irq_ack_w)
AM_RANGE(0x1100, 0x1100) AM_MIRROR(0x00ff) AM_READNOP AM_WRITEONLY AM_BASE_MEMBER(jedi_state, speech_data)
AM_RANGE(0x1200, 0x13ff) AM_READNOP AM_WRITE(speech_strobe_w)
AM_RANGE(0x1400, 0x1400) AM_MIRROR(0x00ff) AM_READNOP AM_WRITE(audio_ack_latch_w)
AM_RANGE(0x1500, 0x1500) AM_MIRROR(0x00ff) AM_READNOP AM_WRITE(speech_reset_w)
AM_RANGE(0x1600, 0x17ff) AM_NOP
AM_RANGE(0x1800, 0x1800) AM_MIRROR(0x03ff) AM_READWRITE(audio_latch_r, SMH_NOP)
AM_RANGE(0x1c00, 0x1c00) AM_MIRROR(0x03fe) AM_READWRITE(speech_ready_r, SMH_NOP)
AM_RANGE(0x1c01, 0x1c01) AM_MIRROR(0x03fe) AM_RAM_WRITE(SMH_NOP) AM_BASE_MEMBER(jedi_state, audio_comm_stat)
AM_RANGE(0x1800, 0x1800) AM_MIRROR(0x03ff) AM_READ(audio_latch_r) AM_WRITENOP
AM_RANGE(0x1c00, 0x1c00) AM_MIRROR(0x03fe) AM_READ(speech_ready_r) AM_WRITENOP
AM_RANGE(0x1c01, 0x1c01) AM_MIRROR(0x03fe) AM_READONLY AM_WRITENOP AM_BASE_MEMBER(jedi_state, audio_comm_stat)
AM_RANGE(0x2000, 0x7fff) AM_NOP
AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END

2
src/mame/audio/mcr.c
View File

@ -459,7 +459,7 @@ static ADDRESS_MAP_START( ssio_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xb000, 0xb000) AM_MIRROR(0x0ffc) AM_DEVWRITE("ssio.2", ay8910_address_w)
AM_RANGE(0xb001, 0xb001) AM_MIRROR(0x0ffc) AM_DEVREAD("ssio.2", ay8910_r)
AM_RANGE(0xb002, 0xb002) AM_MIRROR(0x0ffc) AM_DEVWRITE("ssio.2", ay8910_data_w)
AM_RANGE(0xc000, 0xcfff) AM_READWRITE(SMH_NOP, ssio_status_w)
AM_RANGE(0xc000, 0xcfff) AM_READNOP AM_WRITE(ssio_status_w)
AM_RANGE(0xd000, 0xdfff) AM_WRITENOP /* low bit controls yellow LED */
AM_RANGE(0xe000, 0xefff) AM_READ(ssio_irq_clear)
AM_RANGE(0xf000, 0xffff) AM_READ_PORT("SSIO.DIP") /* 6 DIP switches */

2
src/mame/audio/redalert.c
View File

@ -193,7 +193,7 @@ static ADDRESS_MAP_START( redalert_voice_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x7fff) AM_NOP
AM_RANGE(0x8000, 0x83ff) AM_MIRROR(0x3c00) AM_RAM
AM_RANGE(0xc000, 0xc000) AM_MIRROR(0x3fff) AM_READWRITE(soundlatch2_r, SMH_NOP)
AM_RANGE(0xc000, 0xc000) AM_MIRROR(0x3fff) AM_READ(soundlatch2_r) AM_WRITENOP
ADDRESS_MAP_END

2
src/mame/drivers/alg.c
View File

@ -210,7 +210,7 @@ static WRITE8_DEVICE_HANDLER( alg_cia_0_porta_w )
else
/* overlay enabled, map Amiga system ROM on 0x000000 */
memory_install_write16_handler(space, 0x000000, 0x07ffff, 0, 0, (write16_space_func)SMH_UNMAP);
memory_unmap_write(space, 0x000000, 0x07ffff, 0, 0);
}

4
src/mame/drivers/arcadia.c
View File

@ -75,7 +75,7 @@ static WRITE16_HANDLER( arcadia_multibios_change_game )
if (data == 0)
memory_install_read_bank_handler(space, 0x800000, 0x97ffff, 0, 0, "bank2");
else
memory_install_read16_handler(space, 0x800000, 0x97ffff, 0, 0, (read16_space_func)SMH_NOP);
memory_nop_read(space, 0x800000, 0x97ffff, 0, 0);
}
@ -107,7 +107,7 @@ static WRITE8_DEVICE_HANDLER( arcadia_cia_0_porta_w )
else
/* overlay enabled, map Amiga system ROM on 0x000000 */
memory_install_write16_handler(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, (write16_space_func)SMH_UNMAP);
memory_unmap_write(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0);
/* bit 2 = Power Led on Amiga */
set_led_status(device->machine, 0, (data & 2) ? 0 : 1);

2
src/mame/drivers/astrocde.c
View File

@ -448,7 +448,7 @@ static WRITE8_HANDLER( profpac_banksw_w )
memory_set_bankptr(space->machine, "bank2", memory_region(space->machine, "user2") + 0x4000 * bank);
}
else
memory_install_read8_handler(space, 0x4000, 0x7fff, 0, 0, (read8_space_func)SMH_UNMAP);
memory_unmap_read(space, 0x4000, 0x7fff, 0, 0);
}
}

2
src/mame/drivers/bfm_sc1.c
View File

@ -798,7 +798,7 @@ static ADDRESS_MAP_START( memmap, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x4000, 0x5FFF) AM_ROM // 8k ROM
AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK("bank1") // 8k paged ROM (4 pages)
AM_RANGE(0x8000, 0xFFFF) AM_RAM AM_WRITE(watchdog_w) // 32k ROM
AM_RANGE(0x8000, 0xFFFF) AM_RAM_WRITE(watchdog_w) // 32k ROM
ADDRESS_MAP_END

2
src/mame/drivers/canyon.c
View File

@ -115,7 +115,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0680, 0x0683) AM_WRITE(canyon_led_w)
AM_RANGE(0x0700, 0x0703) AM_DEVWRITE("discrete", canyon_attract_w)
AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(canyon_videoram_w) AM_BASE_MEMBER(canyon_state, videoram)
AM_RANGE(0x1000, 0x17ff) AM_READWRITE(canyon_switches_r, SMH_NOP) /* sloppy code writes here */
AM_RANGE(0x1000, 0x17ff) AM_READ(canyon_switches_r) AM_WRITENOP /* sloppy code writes here */
AM_RANGE(0x1800, 0x1fff) AM_READ(canyon_options_r)
AM_RANGE(0x2000, 0x3fff) AM_ROM
ADDRESS_MAP_END

22
src/mame/drivers/cave.c
View File

@ -471,7 +471,7 @@ static ADDRESS_MAP_START( dfeveron_map, ADDRESS_SPACE_PROGRAM, 16 )
/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0) // Layer 0
/**/AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1) // Layer 1
/**/AM_RANGE(0x708000, 0x708fff) AM_RAM AM_BASE_GENERIC(paletteram) AM_SIZE(&cave_paletteram_size) // Palette
/**/AM_RANGE(0x710000, 0x710bff) AM_READ(SMH_RAM) // ?
/**/AM_RANGE(0x710000, 0x710bff) AM_READONLY // ?
AM_RANGE(0x710c00, 0x710fff) AM_RAM // ?
AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r) // IRQ Cause
AM_RANGE(0x800000, 0x80007f) AM_WRITEONLY AM_BASE(&cave_videoregs) // Video Regs
@ -543,13 +543,13 @@ static ADDRESS_MAP_START( donpachi_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x200000, 0x207fff) AM_RAM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1) // Layer 1
AM_RANGE(0x300000, 0x307fff) AM_RAM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0) // Layer 0
AM_RANGE(0x400000, 0x407fff) AM_RAM_WRITE(cave_vram_2_8x8_w) AM_BASE(&cave_vram_2) // Layer 2
AM_RANGE(0x500000, 0x507fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) // Sprites
AM_RANGE(0x500000, 0x507fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) // Sprites
AM_RANGE(0x508000, 0x50ffff) AM_RAM AM_BASE(&cave_spriteram16_2) // Sprites?
/**/AM_RANGE(0x600000, 0x600005) AM_RAM AM_BASE(&cave_vctrl_1) // Layer 1 Control
/**/AM_RANGE(0x700000, 0x700005) AM_RAM AM_BASE(&cave_vctrl_0) // Layer 0 Control
/**/AM_RANGE(0x800000, 0x800005) AM_RAM AM_BASE(&cave_vctrl_2) // Layer 2 Control
AM_RANGE(0x900000, 0x90007f) AM_READWRITE(donpachi_videoregs_r, SMH_RAM) AM_BASE(&cave_videoregs) // Video Regs
/**/AM_RANGE(0xa08000, 0xa08fff) AM_RAM AM_BASE_GENERIC(paletteram) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0x900000, 0x90007f) AM_RAM_READ(donpachi_videoregs_r) AM_BASE(&cave_videoregs) // Video Regs
/**/AM_RANGE(0xa08000, 0xa08fff) AM_RAM AM_BASE_GENERIC(paletteram) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0xb00000, 0xb00003) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff) // M6295
AM_RANGE(0xb00010, 0xb00013) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff) //
AM_RANGE(0xb00020, 0xb0002f) AM_WRITE(NMK112_okibank_lsb_w) //
@ -737,15 +737,15 @@ static CUSTOM_INPUT( korokoro_hopper_r )
static ADDRESS_MAP_START( korokoro_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
// AM_RANGE(0x100000, 0x107fff) AM_READ(SMH_RAM) // Layer 0
// AM_RANGE(0x100000, 0x107fff) AM_READONLY // Layer 0
AM_RANGE(0x100000, 0x107fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0) // Layer 0
// AM_RANGE(0x140000, 0x140005) AM_READ(SMH_RAM) // Layer 0 Control
// AM_RANGE(0x140000, 0x140005) AM_READONLY // Layer 0 Control
AM_RANGE(0x140000, 0x140005) AM_WRITEONLY AM_BASE(&cave_vctrl_0) // Layer 0 Control
// AM_RANGE(0x180000, 0x187fff) AM_READ(SMH_RAM) // Sprites
// AM_RANGE(0x180000, 0x187fff) AM_READONLY // Sprites
AM_RANGE(0x180000, 0x187fff) AM_WRITEONLY AM_BASE_SIZE_GENERIC(spriteram) // Sprites
AM_RANGE(0x1c0000, 0x1c0007) AM_READ(cave_irq_cause_r) // IRQ Cause
AM_RANGE(0x1c0000, 0x1c007f) AM_WRITEONLY AM_BASE(&cave_videoregs) // Video Regs
// AM_RANGE(0x200000, 0x207fff) AM_READ(SMH_RAM) // Palette
// AM_RANGE(0x200000, 0x207fff) AM_READONLY // Palette
AM_RANGE(0x200000, 0x207fff) AM_WRITEONLY AM_BASE_GENERIC(paletteram) AM_SIZE(&cave_paletteram_size) // Palette
// AM_RANGE(0x240000, 0x240003) AM_DEVREAD8( "ymz", ymz280b_r, 0x00ff) // YMZ280
AM_RANGE(0x240000, 0x240003) AM_DEVWRITE8( "ymz", ymz280b_w, 0x00ff) // YMZ280
@ -849,16 +849,16 @@ static ADDRESS_MAP_START( pwrinst2_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x400000, 0x40ffff) AM_RAM // RAM
AM_RANGE(0x500000, 0x500001) AM_READ_PORT("IN0") // Inputs
AM_RANGE(0x500002, 0x500003) AM_READ_PORT("IN1") //
AM_RANGE(0x600000, 0x6fffff) AM_ROM AM_REGION("user1", 0) // extra data ROM space
AM_RANGE(0x600000, 0x6fffff) AM_ROM AM_REGION("user1", 0) // extra data ROM space
AM_RANGE(0x700000, 0x700001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
AM_RANGE(0x800000, 0x807fff) AM_RAM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2) // Layer 2
AM_RANGE(0x880000, 0x887fff) AM_RAM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0) // Layer 0
AM_RANGE(0x900000, 0x907fff) AM_RAM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1) // Layer 1
AM_RANGE(0x980000, 0x987fff) AM_RAM_WRITE(cave_vram_3_8x8_w) AM_BASE(&cave_vram_3) // Layer 3
AM_RANGE(0xa00000, 0xa07fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) // Sprites
AM_RANGE(0xa00000, 0xa07fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) // Sprites
AM_RANGE(0xa08000, 0xa0ffff) AM_RAM AM_BASE(&cave_spriteram16_2) // Sprites?
AM_RANGE(0xa10000, 0xa1ffff) AM_RAM // Sprites?
AM_RANGE(0xa80000, 0xa8007f) AM_READWRITE(donpachi_videoregs_r, SMH_RAM) AM_BASE(&cave_videoregs) // Video Regs
AM_RANGE(0xa80000, 0xa8007f) AM_RAM_READ(donpachi_videoregs_r) AM_BASE(&cave_videoregs) // Video Regs
/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM_WRITE(pwrinst2_vctrl_2_w) AM_BASE(&cave_vctrl_2) // Layer 2 Control
/**/AM_RANGE(0xb80000, 0xb80005) AM_RAM_WRITE(pwrinst2_vctrl_0_w) AM_BASE(&cave_vctrl_0) // Layer 0 Control
/**/AM_RANGE(0xc00000, 0xc00005) AM_RAM_WRITE(pwrinst2_vctrl_1_w) AM_BASE(&cave_vctrl_1) // Layer 1 Control

2
src/mame/drivers/cball.c
View File

@ -125,7 +125,7 @@ static ADDRESS_MAP_START( cpu_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x7fff)
AM_RANGE(0x0000, 0x03ff) AM_READ(cball_wram_r) AM_MASK(0x7f)
AM_RANGE(0x0400, 0x07ff) AM_READ(SMH_RAM)
AM_RANGE(0x0400, 0x07ff) AM_READONLY
AM_RANGE(0x1001, 0x1001) AM_READ_PORT("1001")
AM_RANGE(0x1003, 0x1003) AM_READ_PORT("1003")
AM_RANGE(0x1020, 0x1020) AM_READ_PORT("1020")

4
src/mame/drivers/cclimber.c
View File

@ -304,7 +304,7 @@ static ADDRESS_MAP_START( cannonb_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM
AM_RANGE(0x6000, 0x6bff) AM_RAM
AM_RANGE(0x8000, 0x83ff) AM_RAM
AM_RANGE(0x8800, 0x88ff) AM_READWRITE(SMH_NOP, SMH_RAM) AM_BASE(&cclimber_bigsprite_videoram) /* must not return what's written (game will reset after coin insert if it returns 0xff)*/
AM_RANGE(0x8800, 0x88ff) AM_READNOP AM_WRITEONLY AM_BASE(&cclimber_bigsprite_videoram) /* must not return what's written (game will reset after coin insert if it returns 0xff)*/
// AM_RANGE(0x8900, 0x8bff) AM_WRITEONLY /* not used, but initialized */
AM_RANGE(0x9000, 0x93ff) AM_MIRROR(0x0400) AM_RAM AM_BASE(&cclimber_videoram)
/* 9800-9bff and 9c00-9fff share the same RAM, interleaved */
@ -337,7 +337,7 @@ static ADDRESS_MAP_START( swimmer_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xa004, 0xa004) AM_WRITEONLY AM_BASE(&swimmer_palettebank)
AM_RANGE(0xa800, 0xa800) AM_READ_PORT("P1") AM_WRITE(swimmer_sh_soundlatch_w)
AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW1")
AM_RANGE(0xb800, 0xb800) AM_READ_PORT("DSW2") AM_WRITE(SMH_RAM) AM_BASE(&swimmer_background_color)
AM_RANGE(0xb800, 0xb800) AM_READ_PORT("DSW2") AM_WRITEONLY AM_BASE(&swimmer_background_color)
AM_RANGE(0xb880, 0xb880) AM_READ_PORT("SYSTEM")
AM_RANGE(0xc000, 0xc7ff) AM_RAM /* ??? used by Guzzler */
AM_RANGE(0xe000, 0xffff) AM_ROM /* Guzzler only */

12
src/mame/drivers/cischeat.c
View File

@ -239,7 +239,7 @@ static ADDRESS_MAP_START( bigrun_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x09c000, 0x09ffff) AM_WRITE(bigrun_paletteram16_w) AM_BASE_GENERIC(paletteram) // Palettes
AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram) // RAM
AM_RANGE(0x100000, 0x13ffff) AM_READWRITE(rom_1_r, SMH_ROM) // ROM
AM_RANGE(0x100000, 0x13ffff) AM_READ(rom_1_r) // ROM
ADDRESS_MAP_END
@ -300,7 +300,7 @@ static ADDRESS_MAP_START( cischeat_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(cischeat_paletteram16_w) AM_BASE_GENERIC(paletteram) // Palettes
AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram) // RAM
AM_RANGE(0x100000, 0x17ffff) AM_READWRITE(rom_1_r, SMH_ROM) // ROM
AM_RANGE(0x100000, 0x17ffff) AM_READ(rom_1_r) // ROM
ADDRESS_MAP_END
@ -354,7 +354,7 @@ static ADDRESS_MAP_START( f1gpstar_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(f1gpstar_paletteram16_w) AM_BASE_GENERIC(paletteram) // Palettes
AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram) // RAM
AM_RANGE(0x100000, 0x17ffff) AM_READWRITE(rom_1_r, SMH_ROM) // ROM
AM_RANGE(0x100000, 0x17ffff) AM_READ(rom_1_r) // ROM
ADDRESS_MAP_END
@ -380,7 +380,7 @@ static ADDRESS_MAP_START( f1gpstr2_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(f1gpstar_paletteram16_w) AM_BASE_GENERIC(paletteram) // Palettes
AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram) // RAM
AM_RANGE(0x100000, 0x17ffff) AM_READWRITE(rom_1_r, SMH_ROM) // ROM
AM_RANGE(0x100000, 0x17ffff) AM_READ(rom_1_r) // ROM
ADDRESS_MAP_END
@ -639,7 +639,7 @@ static ADDRESS_MAP_START( cischeat_map2, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE(&cischeat_roadram[0]) // Road RAM
AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM
AM_RANGE(0x100000, 0x100001) AM_WRITENOP // watchdog
AM_RANGE(0x200000, 0x23ffff) AM_READWRITE(rom_2_r, SMH_ROM) // ROM
AM_RANGE(0x200000, 0x23ffff) AM_READ(rom_2_r) // ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( cischeat_map3, ADDRESS_SPACE_PROGRAM, 16 )
@ -648,7 +648,7 @@ static ADDRESS_MAP_START( cischeat_map3, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE(&cischeat_roadram[1]) // Road RAM
AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM
AM_RANGE(0x100000, 0x100001) AM_WRITENOP // watchdog
AM_RANGE(0x200000, 0x23ffff) AM_READWRITE(rom_3_r, SMH_ROM) // ROM
AM_RANGE(0x200000, 0x23ffff) AM_READ(rom_3_r) // ROM
ADDRESS_MAP_END

2
src/mame/drivers/cloud9.c
View File

@ -319,7 +319,7 @@ static ADDRESS_MAP_START( cloud9_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x5900, 0x5903) AM_MIRROR(0x007c) AM_READ(leta_r)
AM_RANGE(0x5a00, 0x5a0f) AM_MIRROR(0x00f0) AM_DEVREADWRITE("pokey1", pokey_r, pokey_w)
AM_RANGE(0x5b00, 0x5b0f) AM_MIRROR(0x00f0) AM_DEVREADWRITE("pokey2", pokey_r, pokey_w)
AM_RANGE(0x5c00, 0x5cff) AM_MIRROR(0x0300) AM_READWRITE(nvram_r, SMH_RAM) AM_BASE(&nvram_stage) AM_SIZE_GENERIC(nvram)
AM_RANGE(0x5c00, 0x5cff) AM_MIRROR(0x0300) AM_RAM_READ(nvram_r) AM_BASE(&nvram_stage) AM_SIZE_GENERIC(nvram)
AM_RANGE(0x6000, 0xffff) AM_ROM
ADDRESS_MAP_END

2
src/mame/drivers/cojag.c
View File

@ -13,7 +13,7 @@
* Freeze
To do:
* map out unused RAM per-game via SMH_NOP/SMH_NOP
* map out unused RAM per-game via memory_nop_read/write
Note: There is believed to be a 68020 version of Maximum Force
(not confirmed or dumped)

2
src/mame/drivers/contra.c
View File

@ -89,7 +89,7 @@ static ADDRESS_MAP_START( contra_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1000, 0x1fff) AM_RAM
AM_RANGE(0x2000, 0x5fff) AM_READ(SMH_RAM)
AM_RANGE(0x2000, 0x5fff) AM_READONLY
AM_RANGE(0x2000, 0x23ff) AM_WRITE(contra_fg_cram_w) AM_BASE(&contra_fg_cram)
AM_RANGE(0x2400, 0x27ff) AM_WRITE(contra_fg_vram_w) AM_BASE(&contra_fg_vram)
AM_RANGE(0x2800, 0x2bff) AM_WRITE(contra_text_cram_w) AM_BASE(&contra_text_cram)

2
src/mame/drivers/cosmic.c
View File

@ -1620,7 +1620,7 @@ static DRIVER_INIT( nomnlnd )
{
const device_config *dac = devtag_get_device(machine, "dac");
memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5000, 0x5001, 0, 0, nomnlnd_port_0_1_r);
memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4800, 0x4800, 0, 0, (write8_space_func)SMH_NOP);
memory_nop_write(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4800, 0x4800, 0, 0);
memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4807, 0x4807, 0, 0, cosmic_background_enable_w);
memory_install_write8_device_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), dac, 0x480a, 0x480a, 0, 0, dac_w);
}

2
src/mame/drivers/cps1.c
View File

@ -8617,7 +8617,7 @@ static DRIVER_INIT( sf2ue )
{
/* This specific version of SF2 has the CPS-B custom mapped at a different address. */
/* The mapping is handled by a PAL on the B-board */
memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800140, 0x80017f, 0, 0, (read16_space_func)SMH_UNMAP, (write16_space_func)SMH_UNMAP);
memory_unmap_readwrite(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800140, 0x80017f, 0, 0);
memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8001c0, 0x8001ff, 0, 0, cps1_cps_b_r, cps1_cps_b_w);
DRIVER_INIT_CALL(cps1);

4
src/mame/drivers/cps3.c
View File

@ -2139,8 +2139,8 @@ static ADDRESS_MAP_START( cps3_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x03000000, 0x030003ff) AM_RAM // 'FRAM' (SFIII memory test mode ONLY)
// AM_RANGE(0x04000000, 0x0407dfff) AM_RAM AM_BASE(&cps3_spriteram)//AM_WRITE(SMH_RAM) // Sprite RAM (jojoba tests this size)
AM_RANGE(0x04000000, 0x0407ffff) AM_RAM AM_BASE(&cps3_spriteram)//AM_WRITE(SMH_RAM) // Sprite RAM
// AM_RANGE(0x04000000, 0x0407dfff) AM_RAM AM_BASE(&cps3_spriteram)//AM_WRITEONLY // Sprite RAM (jojoba tests this size)
AM_RANGE(0x04000000, 0x0407ffff) AM_RAM AM_BASE(&cps3_spriteram)//AM_WRITEONLY // Sprite RAM
AM_RANGE(0x04080000, 0x040bffff) AM_READWRITE(cps3_colourram_r, cps3_colourram_w) AM_BASE(&cps3_colourram) // Colour RAM (jojoba tests this size) 0x20000 colours?!

4
src/mame/drivers/cshooter.c
View File

@ -257,8 +257,8 @@ static READ8_HANDLER(pal_r)
static ADDRESS_MAP_START( cshooter_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xafff) AM_READ_BANK("bank1") AM_WRITE(SMH_RAM)
AM_RANGE(0xb000, 0xb0ff) AM_READ(SMH_RAM) // sound related ?
AM_RANGE(0x8000, 0xafff) AM_READ_BANK("bank1") AM_WRITEONLY
AM_RANGE(0xb000, 0xb0ff) AM_READONLY // sound related ?
AM_RANGE(0xc000, 0xc1ff) AM_WRITE(pal_w) AM_READ(pal_r) AM_BASE_GENERIC(paletteram)
AM_RANGE(0xc200, 0xc200) AM_READ_PORT("IN0")
AM_RANGE(0xc201, 0xc201) AM_READ_PORT("IN1")

2
src/mame/drivers/cubocd32.c
View File

@ -354,7 +354,7 @@ static WRITE32_HANDLER( aga_overlay_w )
memory_install_write_bank_handler(space, 0x000000, 0x1fffff, 0, 0, "bank1");
else
/* overlay enabled, map Amiga system ROM on 0x000000 */
memory_install_write32_handler(space, 0x000000, 0x1fffff, 0, 0, (write32_space_func)SMH_UNMAP);
memory_unmap_write(space, 0x000000, 0x1fffff, 0, 0);
}
}

4
src/mame/drivers/cyberbal.c
View File

@ -146,7 +146,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xff6000, 0xff6fff) AM_RAM_WRITE(atarigen_alpha_w) AM_SHARE(8) AM_BASE(&atarigen_alpha)
AM_RANGE(0xff7000, 0xff77ff) AM_RAM_WRITE(atarimo_0_spriteram_w) AM_SHARE(9) AM_BASE(&atarimo_0_spriteram)
AM_RANGE(0xff7800, 0xff9fff) AM_RAM AM_SHARE(10)
AM_RANGE(0xffa000, 0xffbfff) AM_RAM_WRITE(SMH_NOP) AM_SHARE(11)
AM_RANGE(0xffa000, 0xffbfff) AM_READONLY AM_WRITENOP AM_SHARE(11)
AM_RANGE(0xffc000, 0xffffff) AM_RAM AM_SHARE(12)
ADDRESS_MAP_END
@ -174,7 +174,7 @@ static ADDRESS_MAP_START( extra_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xff7000, 0xff77ff) AM_RAM_WRITE(atarimo_0_spriteram_w) AM_SHARE(9)
AM_RANGE(0xff7800, 0xff9fff) AM_RAM AM_SHARE(10)
AM_RANGE(0xffa000, 0xffbfff) AM_RAM AM_SHARE(11)
AM_RANGE(0xffc000, 0xffffff) AM_RAM_WRITE(SMH_NOP) AM_SHARE(12)
AM_RANGE(0xffc000, 0xffffff) AM_READONLY AM_WRITENOP AM_SHARE(12)
ADDRESS_MAP_END

8
src/mame/drivers/ddenlovr.c
View File

@ -1710,11 +1710,11 @@ static WRITE16_HANDLER( ddenlvrk_protection2_w )
static ADDRESS_MAP_START( ddenlvrk_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
AM_RANGE(0x100000, 0x100001) AM_READWRITE(ddenlvrk_protection1_r, SMH_RAM) AM_BASE(&ddenlvrk_protection1)
AM_RANGE(0x100000, 0x100001) AM_RAM_READ(ddenlvrk_protection1_r) AM_BASE(&ddenlvrk_protection1)
AM_RANGE(0x200000, 0x200001) AM_READWRITE(ddenlvrk_protection2_r, ddenlvrk_protection2_w) AM_BASE(&ddenlvrk_protection2)
AM_RANGE(0xd00000, 0xd003ff) AM_WRITE(ddenlovr_palette_w) // Palette
// AM_RANGE(0xd01000, 0xd017ff) SMH_RAM) // ? B0 on startup, then 00
// AM_RANGE(0xd01000, 0xd017ff) AM_RAM // ? B0 on startup, then 00
AM_RANGE(0xe00040, 0xe00047) AM_WRITE(ddenlovr16_palette_base_w)
AM_RANGE(0xe00048, 0xe0004f) AM_WRITE(ddenlovr16_palette_mask_w)
@ -1752,7 +1752,7 @@ static ADDRESS_MAP_START( ddenlovr_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x300000, 0x300001) AM_DEVWRITE("oki", ddenlovr_oki_bank_w)
AM_RANGE(0xd00000, 0xd003ff) AM_WRITE(ddenlovr_palette_w) // Palette
// AM_RANGE(0xd01000, 0xd017ff) SMH_RAM) // ? B0 on startup, then 00
// AM_RANGE(0xd01000, 0xd017ff) AM_RAM // ? B0 on startup, then 00
AM_RANGE(0xe00040, 0xe00047) AM_WRITE(ddenlovr16_palette_base_w)
AM_RANGE(0xe00048, 0xe0004f) AM_WRITE(ddenlovr16_palette_mask_w)
@ -8649,7 +8649,7 @@ static DRIVER_INIT( rongrong )
version of the game might be a bootleg with the protection
patched. (both sets need this)
*/
memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x60d4, 0x60d4, 0, 0, (read8_space_func)SMH_NOP);
memory_nop_read(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x60d4, 0x60d4, 0, 0);
}
/***************************************************************************

1
src/mame/drivers/ddrible.c
View File

@ -124,7 +124,6 @@ static ADDRESS_MAP_START( cpu0_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x7000, 0x7fff) AM_RAM AM_BASE_MEMBER(ddrible_state, spriteram_2) /* Object RAM 2 */
AM_RANGE(0x8000, 0x8000) AM_WRITE(ddrible_bankswitch_w) /* bankswitch control */
AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank1") /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM) /* ROM */
AM_RANGE(0xa000, 0xffff) AM_ROM /* ROM */
ADDRESS_MAP_END

4
src/mame/drivers/deco32.c
View File

@ -720,7 +720,7 @@ static ADDRESS_MAP_START( fghthist_map, ADDRESS_SPACE_PROGRAM, 32 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( fghthsta_memmap, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x000000, 0x0fffff) AM_ROM AM_WRITE(SMH_ROM)
AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_BASE(&deco32_ram)
AM_RANGE(0x140000, 0x140003) AM_WRITENOP /* VBL irq ack */
AM_RANGE(0x150000, 0x150003) AM_WRITE(fghthist_eeprom_w) /* Volume port/Eprom */
@ -803,7 +803,7 @@ static ADDRESS_MAP_START( lockload_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x128000, 0x12800f) AM_READWRITE(deco32_irq_controller_r, deco32_irq_controller_w)
AM_RANGE(0x130000, 0x131fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0x138000, 0x138003) AM_READWRITE(SMH_RAM, SMH_NOP) //palette dma complete in bit 0x8? ack? return 0 else tight loop
AM_RANGE(0x138000, 0x138003) AM_READONLY AM_WRITENOP //palette dma complete in bit 0x8? ack? return 0 else tight loop
AM_RANGE(0x138008, 0x13800b) AM_WRITE(deco32_palette_dma_w)
AM_RANGE(0x170000, 0x170007) AM_READ(lockload_gun_mirror_r) /* Not on Dragongun */

4
src/mame/drivers/deco_mlc.c
View File

@ -273,8 +273,8 @@ static ADDRESS_MAP_START( decomlc_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x0200078, 0x020007f) AM_READ(test2_r) AM_MIRROR(0xff000000)
AM_RANGE(0x0200000, 0x020007f) AM_WRITE(mlc_irq_w) AM_BASE(&irq_ram) AM_MIRROR(0xff000000)
AM_RANGE(0x0200080, 0x02000ff) AM_RAM AM_BASE(&mlc_clip_ram) AM_MIRROR(0xff000000)
AM_RANGE(0x0204000, 0x0206fff) AM_READWRITE(mlc_spriteram_r, SMH_RAM) AM_BASE_SIZE_GENERIC(spriteram) AM_MIRROR(0xff000000)
AM_RANGE(0x0280000, 0x029ffff) AM_READWRITE(mlc_vram_r, SMH_RAM) AM_BASE(&mlc_vram) AM_MIRROR(0xff000000)
AM_RANGE(0x0204000, 0x0206fff) AM_RAM_READ(mlc_spriteram_r) AM_BASE_SIZE_GENERIC(spriteram) AM_MIRROR(0xff000000)
AM_RANGE(0x0280000, 0x029ffff) AM_RAM_READ(mlc_vram_r) AM_BASE(&mlc_vram) AM_MIRROR(0xff000000)
AM_RANGE(0x0300000, 0x0307fff) AM_RAM_WRITE(avengrs_palette_w) AM_BASE_GENERIC(paletteram) AM_MIRROR(0xff000000)
AM_RANGE(0x0400000, 0x0400003) AM_READ_PORT("INPUTS") AM_MIRROR(0xff000000)
AM_RANGE(0x0440000, 0x044001f) AM_READ(test3_r) AM_MIRROR(0xff000000)

4
src/mame/drivers/dgpix.c
View File

@ -566,7 +566,7 @@ static DRIVER_INIT( xfiles )
rom[BYTE4_XOR_BE(0x3aa933)] = 0;
// protection related ?
// memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0c8b440, 0xf0c8b447, 0, 0, (read32_space_func)SMH_NOP );
// memory_nop_read(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0c8b440, 0xf0c8b447, 0, 0);
flash_roms = 2;
}
@ -586,7 +586,7 @@ static DRIVER_INIT( kdynastg )
rom[BYTE4_XOR_BE(0x3a45c9)] = 0;
// protection related ?
// memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x12341234, 0x12341243, 0, 0, (read32_space_func)SMH_NOP );
// memory_nop_read(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x12341234, 0x12341243, 0, 0);
flash_roms = 4;
}

2
src/mame/drivers/dmndrby.c
View File

@ -123,7 +123,7 @@ static ADDRESS_MAP_START( memmap, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc803, 0xc803) AM_READ_PORT("DSW2")
AM_RANGE(0xca00, 0xca00) AM_WRITENOP//(vblank_irq_w) //???
AM_RANGE(0xca01, 0xca01) AM_WRITENOP //watchdog
AM_RANGE(0xca02, 0xca02) AM_RAM AM_WRITE(dderby_sound_w)
AM_RANGE(0xca02, 0xca02) AM_RAM_WRITE(dderby_sound_w)
AM_RANGE(0xca03, 0xca03) AM_WRITENOP//(timer_irq_w) //???
AM_RANGE(0xcc00, 0xcc05) AM_RAM AM_BASE(&scroll_ram)
AM_RANGE(0xce08, 0xce1f) AM_RAM AM_BASE(&sprite_ram) // horse sprites

38
src/mame/drivers/dynax.c
View File

@ -542,8 +542,8 @@ static ADDRESS_MAP_START( hanamai_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE( 0x77, 0x77 ) AM_WRITE ( hanamai_layer_half_w ) // half of the interleaved layer to write to
AM_RANGE( 0x78, 0x79 ) AM_DEVREADWRITE("ymsnd", ym2203_r, ym2203_w ) // 2 x DSW
AM_RANGE( 0x7a, 0x7b ) AM_DEVWRITE ( "aysnd", ay8910_address_data_w ) // AY8910
// AM_RANGE( 0x7c, 0x7c ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x7d, 0x7d ) AM_WRITE ( SMH_NOP ) //
// AM_RANGE( 0x7c, 0x7c ) AM_WRITENOP // CRT Controller
// AM_RANGE( 0x7d, 0x7d ) AM_WRITENOP //
AM_RANGE( 0x7e, 0x7e ) AM_WRITE ( dynax_blit_romregion_w ) // Blitter ROM bank
ADDRESS_MAP_END
@ -551,8 +551,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( hnoridur_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE( 0x01, 0x07 ) AM_WRITE ( dynax_blitter_rev2_w ) // Blitter
// AM_RANGE( 0x10, 0x10 ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x11, 0x11 ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x10, 0x10 ) AM_WRITENOP // CRT Controller
// AM_RANGE( 0x11, 0x11 ) AM_WRITENOP // CRT Controller
AM_RANGE( 0x20, 0x20 ) AM_WRITE ( hanamai_keyboard_w ) // keyboard row select
AM_RANGE( 0x21, 0x21 ) AM_READ_PORT ( "COINS" ) // Coins
AM_RANGE( 0x22, 0x22 ) AM_READ ( hanamai_keyboard_1_r ) // P2
@ -577,7 +577,7 @@ static ADDRESS_MAP_START( hnoridur_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE( 0x50, 0x50 ) AM_WRITE ( dynax_extra_scrollx_w ) // screen scroll X
AM_RANGE( 0x51, 0x51 ) AM_WRITE ( dynax_extra_scrolly_w ) // screen scroll Y
AM_RANGE( 0x54, 0x54 ) AM_WRITE ( hnoridur_rombank_w ) // BANK ROM Select
AM_RANGE( 0x55, 0x55 ) AM_WRITE ( SMH_NOP ) // ? VBlank IRQ Ack
AM_RANGE( 0x55, 0x55 ) AM_WRITENOP // ? VBlank IRQ Ack
AM_RANGE( 0x56, 0x56 ) AM_WRITE ( dynax_vblank_ack_w ) // VBlank IRQ Ack
AM_RANGE( 0x57, 0x57 ) AM_READ ( ret_ff ) // ?
AM_RANGE( 0x60, 0x60 ) AM_WRITE ( dynax_flipscreen_w ) // Flip Screen
@ -632,8 +632,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( hjingi_io_map, ADDRESS_SPACE_IO, 8 ) ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE( 0x01, 0x07 ) AM_WRITE ( dynax_blitter_rev2_w ) // Blitter
// AM_RANGE( 0x10, 0x10 ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x11, 0x11 ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x10, 0x10 ) AM_WRITENOP // CRT Controller
// AM_RANGE( 0x11, 0x11 ) AM_WRITENOP // CRT Controller
AM_RANGE( 0x20, 0x20 ) AM_WRITE ( hanamai_keyboard_w ) // keyboard row select
AM_RANGE( 0x21, 0x21 ) AM_READ_PORT ( "COINS" ) // Coins
@ -810,8 +810,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( mcnpshnt_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE( 0x01, 0x07 ) AM_WRITE ( dynax_blitter_rev2_w ) // Blitter
// AM_RANGE( 0x10, 0x10 ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x11, 0x11 ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x10, 0x10 ) AM_WRITENOP // CRT Controller
// AM_RANGE( 0x11, 0x11 ) AM_WRITENOP // CRT Controller
AM_RANGE( 0x20, 0x20 ) AM_WRITE ( hanamai_keyboard_w ) // keyboard row select
AM_RANGE( 0x21, 0x21 ) AM_READ_PORT ( "COINS" ) // Coins
AM_RANGE( 0x22, 0x22 ) AM_READ ( hanamai_keyboard_1_r ) // P2
@ -849,8 +849,8 @@ static ADDRESS_MAP_START( sprtmtch_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE( 0x01, 0x07 ) AM_WRITE ( dynax_blitter_rev2_w ) // Blitter
AM_RANGE( 0x10, 0x11 ) AM_DEVREADWRITE("ymsnd", ym2203_r, ym2203_w ) // 2 x DSW
// AM_RANGE( 0x12, 0x12 ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x13, 0x13 ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x12, 0x12 ) AM_WRITENOP // CRT Controller
// AM_RANGE( 0x13, 0x13 ) AM_WRITENOP // CRT Controller
AM_RANGE( 0x20, 0x20 ) AM_READ_PORT ( "P1" ) // P1
AM_RANGE( 0x21, 0x21 ) AM_READ_PORT ( "P2" ) // P2
AM_RANGE( 0x22, 0x22 ) AM_READ_PORT ( "COINS" ) // Coins
@ -886,8 +886,8 @@ static ADDRESS_MAP_START( mjfriday_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE( 0x15, 0x15 ) AM_WRITE ( dynax_coincounter_1_w ) //
AM_RANGE( 0x16, 0x17 ) AM_WRITE ( mjdialq2_layer_enable_w ) // Layers Enable
AM_RANGE( 0x41, 0x47 ) AM_WRITE ( dynax_blitter_rev2_w ) // Blitter
// AM_RANGE( 0x50, 0x50 ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x51, 0x51 ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x50, 0x50 ) AM_WRITENOP // CRT Controller
// AM_RANGE( 0x51, 0x51 ) AM_WRITENOP // CRT Controller
AM_RANGE( 0x60, 0x60 ) AM_WRITE ( hanamai_keyboard_w ) // keyboard row select
AM_RANGE( 0x61, 0x61 ) AM_READ_PORT ( "COINS" ) // Coins
AM_RANGE( 0x62, 0x62 ) AM_READ ( hanamai_keyboard_1_r ) // P2
@ -895,7 +895,7 @@ static ADDRESS_MAP_START( mjfriday_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE( 0x64, 0x64 ) AM_READ_PORT ( "DSW0" ) // DSW
AM_RANGE( 0x67, 0x67 ) AM_READ_PORT ( "DSW1" ) // DSW
AM_RANGE( 0x70, 0x71 ) AM_DEVWRITE ( "ymsnd", ym2413_w ) //
// AM_RANGE( 0x80, 0x80 ) AM_WRITE ( SMH_NOP ) // IRQ ack?
// AM_RANGE( 0x80, 0x80 ) AM_WRITENOP // IRQ ack?
ADDRESS_MAP_END
@ -913,7 +913,7 @@ static ADDRESS_MAP_START( nanajign_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE( 0x14, 0x14 ) AM_READ_PORT ( "DSW0" ) // DSW1
AM_RANGE( 0x15, 0x15 ) AM_READ_PORT ( "DSW1" ) // DSW2
AM_RANGE( 0x16, 0x16 ) AM_READ_PORT ( "DSW2" ) // DSW3
// AM_RANGE( 0x20, 0x21 ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x20, 0x21 ) AM_WRITENOP // CRT Controller
AM_RANGE( 0x31, 0x37 ) AM_WRITE ( dynax_blitter_rev2_w ) // Blitter
AM_RANGE( 0x40, 0x40 ) AM_WRITE ( dynax_coincounter_0_w ) // Coin Counter
AM_RANGE( 0x50, 0x50 ) AM_WRITE ( dynax_flipscreen_w ) // Flip Screen
@ -974,7 +974,7 @@ static WRITE8_HANDLER( jantouki_rombank_w )
static ADDRESS_MAP_START( jantouki_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
// AM_RANGE( 0x40, 0x41 ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x40, 0x41 ) AM_WRITENOP // CRT Controller
AM_RANGE( 0x48, 0x48 ) AM_WRITE ( jantouki_rombank_w ) // BANK ROM Select
AM_RANGE( 0x49, 0x49 ) AM_WRITE ( jantouki_soundlatch_w ) // To Sound CPU
AM_RANGE( 0x4a, 0x4a ) AM_READ ( jantouki_soundlatch_ack_r ) // Soundlatch status
@ -1073,8 +1073,8 @@ static ADDRESS_MAP_START( mjelctrn_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE( 0x08, 0x08 ) AM_DEVWRITE( "aysnd", ay8910_data_w ) // AY8910
AM_RANGE( 0x0a, 0x0a ) AM_DEVWRITE( "aysnd", ay8910_address_w ) //
AM_RANGE( 0x11, 0x12 ) AM_WRITE ( mjelctrn_blitter_ack_w ) //?
// AM_RANGE( 0x20, 0x20 ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x21, 0x21 ) AM_WRITE ( SMH_NOP ) // CRT Controller
// AM_RANGE( 0x20, 0x20 ) AM_WRITENOP // CRT Controller
// AM_RANGE( 0x21, 0x21 ) AM_WRITENOP // CRT Controller
AM_RANGE( 0x40, 0x40 ) AM_WRITE ( dynax_coincounter_0_w ) // Coin Counters
AM_RANGE( 0x41, 0x41 ) AM_WRITE ( dynax_coincounter_1_w ) //
AM_RANGE( 0x60, 0x60 ) AM_WRITE ( dynax_extra_scrollx_w ) // screen scroll X
@ -1503,7 +1503,7 @@ static ADDRESS_MAP_START( tenkai_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE( 0x10068, 0x10068 ) AM_WRITE( yarunara_layer_half2_w ) //
AM_RANGE( 0x1006c, 0x1006c ) AM_WRITE( tenkai_6c_w ) // ?
AM_RANGE( 0x10070, 0x10070 ) AM_WRITE( tenkai_70_w ) // ?
AM_RANGE( 0x1007c, 0x1007c ) AM_WRITE( SMH_NOP ) // IRQ Ack? (0,2)
AM_RANGE( 0x1007c, 0x1007c ) AM_WRITENOP // IRQ Ack? (0,2)
AM_RANGE( 0x100c0, 0x100c0 ) AM_WRITE( tenkai_ipsel_w )
AM_RANGE( 0x100c1, 0x100c1 ) AM_WRITE( tenkai_ip_w )
AM_RANGE( 0x100c2, 0x100c3 ) AM_READ ( tenkai_ip_r )

12
src/mame/drivers/enigma2.c
View File

@ -442,13 +442,13 @@ static ADDRESS_MAP_START( engima2_main_cpu_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_ROM AM_WRITENOP
AM_RANGE(0x2000, 0x3fff) AM_MIRROR(0x4000) AM_RAM AM_BASE_MEMBER(enigma2_state, videoram)
AM_RANGE(0x4000, 0x4fff) AM_ROM AM_WRITENOP
AM_RANGE(0x5000, 0x57ff) AM_READWRITE(dip_switch_r, SMH_NOP)
AM_RANGE(0x5000, 0x57ff) AM_READ(dip_switch_r) AM_WRITENOP
AM_RANGE(0x5800, 0x5800) AM_MIRROR(0x07f8) AM_NOP
AM_RANGE(0x5801, 0x5801) AM_MIRROR(0x07f8) AM_READ_PORT("IN0") AM_WRITENOP
AM_RANGE(0x5802, 0x5802) AM_MIRROR(0x07f8) AM_READ_PORT("IN1") AM_WRITENOP
AM_RANGE(0x5803, 0x5803) AM_MIRROR(0x07f8) AM_READWRITE(SMH_NOP, sound_data_w)
AM_RANGE(0x5803, 0x5803) AM_MIRROR(0x07f8) AM_READNOP AM_WRITE(sound_data_w)
AM_RANGE(0x5804, 0x5804) AM_MIRROR(0x07f8) AM_NOP
AM_RANGE(0x5805, 0x5805) AM_MIRROR(0x07f8) AM_READWRITE(SMH_NOP, enigma2_flip_screen_w)
AM_RANGE(0x5805, 0x5805) AM_MIRROR(0x07f8) AM_READNOP AM_WRITE(enigma2_flip_screen_w)
AM_RANGE(0x5806, 0x5807) AM_MIRROR(0x07f8) AM_NOP
ADDRESS_MAP_END
@ -457,7 +457,7 @@ static ADDRESS_MAP_START( engima2a_main_cpu_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_ROM AM_WRITENOP
AM_RANGE(0x2000, 0x3fff) AM_MIRROR(0x4000) AM_RAM AM_BASE_MEMBER(enigma2_state, videoram)
AM_RANGE(0x4000, 0x4fff) AM_ROM AM_WRITENOP
AM_RANGE(0x5000, 0x57ff) AM_READWRITE(dip_switch_r, SMH_NOP)
AM_RANGE(0x5000, 0x57ff) AM_READ(dip_switch_r) AM_WRITENOP
AM_RANGE(0x5800, 0x5fff) AM_NOP
ADDRESS_MAP_END
@ -467,9 +467,9 @@ static ADDRESS_MAP_START( engima2a_main_cpu_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x00, 0x00) AM_NOP
AM_RANGE(0x01, 0x01) AM_READ_PORT("IN0") AM_WRITENOP
AM_RANGE(0x02, 0x02) AM_READ_PORT("IN1") AM_WRITENOP
AM_RANGE(0x03, 0x03) AM_READWRITE(SMH_NOP, sound_data_w)
AM_RANGE(0x03, 0x03) AM_READNOP AM_WRITE(sound_data_w)
AM_RANGE(0x04, 0x04) AM_NOP
AM_RANGE(0x05, 0x05) AM_READWRITE(SMH_NOP, enigma2_flip_screen_w)
AM_RANGE(0x05, 0x05) AM_READNOP AM_WRITE(enigma2_flip_screen_w)
AM_RANGE(0x06, 0x07) AM_NOP
ADDRESS_MAP_END

2
src/mame/drivers/eolith.c
View File

@ -1029,7 +1029,7 @@ static DRIVER_INIT( hidctch2 )
static DRIVER_INIT( hidctch3 )
{
memory_install_write32_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0xfc200000, 0xfc200003, 0, 0, (write32_space_func)SMH_NOP); // this generates pens vibration
memory_nop_write(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0xfc200000, 0xfc200003, 0, 0); // this generates pens vibration
// It is not clear why the first reads are needed too

2
src/mame/drivers/espial.c
View File

@ -95,7 +95,7 @@ static ADDRESS_MAP_START( espial_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x7100, 0x7100) AM_WRITE(zodiac_master_interrupt_enable_w)
AM_RANGE(0x7200, 0x7200) AM_WRITE(espial_flipscreen_w)
AM_RANGE(0x8000, 0x801f) AM_RAM AM_BASE_MEMBER(espial_state, spriteram_1)
AM_RANGE(0x8020, 0x803f) AM_READ(SMH_RAM)
AM_RANGE(0x8020, 0x803f) AM_READONLY
AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(espial_videoram_w) AM_BASE_MEMBER(espial_state, videoram)
AM_RANGE(0x8800, 0x880f) AM_WRITEONLY AM_BASE_MEMBER(espial_state, spriteram_3)
AM_RANGE(0x8c00, 0x8fff) AM_RAM_WRITE(espial_attributeram_w) AM_BASE_MEMBER(espial_state, attributeram)

4
src/mame/drivers/exidy440.c
View File

@ -479,10 +479,10 @@ static ADDRESS_MAP_START( exidy440_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2c00, 0x2dff) AM_READWRITE(exidy440_paletteram_r, exidy440_paletteram_w)
AM_RANGE(0x2e00, 0x2e1f) AM_RAM_WRITE(sound_command_w)
AM_RANGE(0x2e20, 0x2e3f) AM_READWRITE(exidy440_input_port_3_r, exidy440_input_port_3_w)
AM_RANGE(0x2e40, 0x2e5f) AM_READWRITE(SMH_NOP, exidy440_coin_counter_w) /* read: clear coin counters I/O2 */
AM_RANGE(0x2e40, 0x2e5f) AM_READNOP AM_WRITE(exidy440_coin_counter_w) /* read: clear coin counters I/O2 */
AM_RANGE(0x2e60, 0x2e7f) AM_READ_PORT("IN1") AM_WRITENOP
AM_RANGE(0x2e80, 0x2e9f) AM_READ_PORT("IN2") AM_WRITENOP
AM_RANGE(0x2ea0, 0x2ebf) AM_READWRITE(sound_command_ack_r, SMH_NOP)
AM_RANGE(0x2ea0, 0x2ebf) AM_READ(sound_command_ack_r) AM_WRITENOP
AM_RANGE(0x2ec0, 0x2eff) AM_NOP
AM_RANGE(0x3000, 0x3fff) AM_RAM
AM_RANGE(0x4000, 0x7fff) AM_READ_BANK("bank1") AM_WRITE(bankram_w)

2
src/mame/drivers/exprraid.c
View File

@ -18,7 +18,7 @@ Main CPU: ( DECO CPU-16 )
2100-2100 Sound latch write
2800-2801 Protection
3800-3800 VBlank ( bootleg 1 only )
4000-ffff SMH_ROM
4000-ffff ROM
ffc0-ffc0 VBlank ( bootleg 2 only )
Sound Cpu: ( 6809 )

4
src/mame/drivers/f1gp.c
View File

@ -115,7 +115,7 @@ static ADDRESS_MAP_START( f1gp_cpu1_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xfff006, 0xfff007) AM_READ_PORT("DSW2")
AM_RANGE(0xfff008, 0xfff009) AM_READ(command_pending_r)
AM_RANGE(0xfff008, 0xfff009) AM_WRITE(sound_command_w)
AM_RANGE(0xfff040, 0xfff05f) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_ctrl)
AM_RANGE(0xfff040, 0xfff05f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)
AM_RANGE(0xfff050, 0xfff051) AM_READ_PORT("DSW3")
ADDRESS_MAP_END
@ -135,7 +135,7 @@ static ADDRESS_MAP_START( f1gp2_cpu1_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xfff006, 0xfff007) AM_READ_PORT("DSW2")
AM_RANGE(0xfff008, 0xfff009) AM_READWRITE(command_pending_r, sound_command_w)
AM_RANGE(0xfff00a, 0xfff00b) AM_READ_PORT("DSW3")
AM_RANGE(0xfff020, 0xfff02f) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_ctrl)
AM_RANGE(0xfff020, 0xfff02f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)
AM_RANGE(0xfff044, 0xfff047) AM_WRITE(f1gp_fgscroll_w)
ADDRESS_MAP_END

10
src/mame/drivers/fantland.c
View File

@ -125,7 +125,7 @@ static ADDRESS_MAP_START( fantland_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE( 0x00000, 0x07fff ) AM_RAM
AM_RANGE( 0x08000, 0x7ffff ) AM_ROM
AM_RANGE( 0xa2000, 0xa21ff ) AM_READWRITE( SMH_RAM, paletteram16_xRRRRRGGGGGBBBBB_word_w ) AM_BASE_GENERIC( paletteram )
AM_RANGE( 0xa2000, 0xa21ff ) AM_RAM_WRITE( paletteram16_xRRRRRGGGGGBBBBB_word_w ) AM_BASE_GENERIC( paletteram )
AM_RANGE( 0xa3000, 0xa3001 ) AM_READ_PORT("a3000") AM_WRITE( fantland_nmi_enable_16_w )
AM_RANGE( 0xa3002, 0xa3003 ) AM_READ_PORT("a3002") AM_WRITE( fantland_soundlatch_16_w )
@ -145,7 +145,7 @@ static ADDRESS_MAP_START( galaxygn_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE( 0x00000, 0x07fff ) AM_RAM
AM_RANGE( 0x10000, 0x2ffff ) AM_ROM
AM_RANGE( 0x52000, 0x521ff ) AM_READWRITE( SMH_RAM, paletteram_xRRRRRGGGGGBBBBB_le_w ) AM_BASE_GENERIC( paletteram )
AM_RANGE( 0x52000, 0x521ff ) AM_RAM_WRITE( paletteram_xRRRRRGGGGGBBBBB_le_w ) AM_BASE_GENERIC( paletteram )
AM_RANGE( 0x53000, 0x53000 ) AM_READ_PORT("P1") AM_WRITE( fantland_nmi_enable_w )
AM_RANGE( 0x53001, 0x53001 ) AM_READ_PORT("P2")
@ -239,7 +239,7 @@ static ADDRESS_MAP_START( borntofi_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE( 0x00000, 0x07fff ) AM_RAM
AM_RANGE( 0x10000, 0x2ffff ) AM_ROM
AM_RANGE( 0x52000, 0x521ff ) AM_READWRITE( SMH_RAM, paletteram_xRRRRRGGGGGBBBBB_le_w ) AM_BASE_GENERIC( paletteram )
AM_RANGE( 0x52000, 0x521ff ) AM_RAM_WRITE( paletteram_xRRRRRGGGGGBBBBB_le_w ) AM_BASE_GENERIC( paletteram )
AM_RANGE( 0x53000, 0x53001 ) AM_READWRITE( borntofi_inputs_r, borntofi_nmi_enable_w )
AM_RANGE( 0x53002, 0x53002 ) AM_READ_PORT( "DSW" ) AM_WRITE( fantland_soundlatch_w )
AM_RANGE( 0x53003, 0x53003 ) AM_READ_PORT( "Controls" )
@ -421,8 +421,8 @@ static ADDRESS_MAP_START( wheelrun_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8000, 0x87ff) AM_RAM
AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ymsnd", ym3526_r, ym3526_w )
AM_RANGE(0xb000, 0xb000) AM_WRITE( SMH_NOP ) // on a car crash / hit
AM_RANGE(0xc000, 0xc000) AM_WRITE( SMH_NOP ) // ""
AM_RANGE(0xb000, 0xb000) AM_WRITENOP // on a car crash / hit
AM_RANGE(0xc000, 0xc000) AM_WRITENOP // ""
AM_RANGE(0xd000, 0xd000) AM_READ( soundlatch_r ) // during NMI
ADDRESS_MAP_END

17
src/mame/drivers/fastfred.c
View File

@ -186,7 +186,7 @@ static ADDRESS_MAP_START( jumpcoas_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xd040, 0xd05f) AM_RAM AM_BASE(&fastfred_spriteram) AM_SIZE(&fastfred_spriteram_size)
AM_RANGE(0xd060, 0xd3ff) AM_RAM
AM_RANGE(0xd800, 0xdbff) AM_MIRROR(0x400) AM_RAM_WRITE(fastfred_videoram_w) AM_BASE(&fastfred_videoram)
AM_RANGE(0xe000, 0xe000) AM_WRITE(SMH_RAM) AM_BASE(&fastfred_background_color)
AM_RANGE(0xe000, 0xe000) AM_WRITEONLY AM_BASE(&fastfred_background_color)
AM_RANGE(0xe800, 0xe800) AM_READ_PORT("DSW1")
AM_RANGE(0xe801, 0xe801) AM_READ_PORT("DSW2")
AM_RANGE(0xe802, 0xe802) AM_READ_PORT("BUTTONS")
@ -202,7 +202,7 @@ static ADDRESS_MAP_START( jumpcoas_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xf116, 0xf116) AM_WRITE(fastfred_flip_screen_x_w)
AM_RANGE(0xf117, 0xf117) AM_WRITE(fastfred_flip_screen_y_w)
//AM_RANGE(0xf800, 0xf800) AM_READ(watchdog_reset_r) // Why doesn't this work???
AM_RANGE(0xf800, 0xf801) AM_DEVREADWRITE("ay8910.1", SMH_NOP, ay8910_address_data_w)
AM_RANGE(0xf800, 0xf801) AM_READNOP AM_DEVWRITE("ay8910.1", ay8910_address_data_w)
ADDRESS_MAP_END
@ -230,14 +230,14 @@ static ADDRESS_MAP_START( imago_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xf007, 0xf007) AM_WRITE(fastfred_flip_screen_y_w)
AM_RANGE(0xf400, 0xf400) AM_WRITENOP // writes 0 or 2
AM_RANGE(0xf401, 0xf401) AM_WRITE(imago_sprites_bank_w)
AM_RANGE(0xf800, 0xf800) AM_READWRITE(SMH_NOP, soundlatch_w)
AM_RANGE(0xf800, 0xf800) AM_READNOP AM_WRITE(soundlatch_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x2000, 0x23ff) AM_RAM
AM_RANGE(0x3000, 0x3000) AM_READWRITE(soundlatch_r, interrupt_enable_w)
AM_RANGE(0x4000, 0x4000) AM_WRITE(SMH_RAM) // Reset PSG's
AM_RANGE(0x4000, 0x4000) AM_WRITEONLY // Reset PSG's
AM_RANGE(0x5000, 0x5001) AM_DEVWRITE("ay8910.1", ay8910_address_data_w)
AM_RANGE(0x6000, 0x6001) AM_DEVWRITE("ay8910.2", ay8910_address_data_w)
AM_RANGE(0x7000, 0x7000) AM_READNOP // only for Imago, read but not used
@ -965,19 +965,22 @@ static DRIVER_INIT( flyboyb )
static DRIVER_INIT( fastfred )
{
memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0, fastfred_custom_io_r, (write8_space_func)SMH_NOP);
memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0, fastfred_custom_io_r);
memory_nop_write(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0);
fastfred_hardware_type = 1;
}
static DRIVER_INIT( jumpcoas )
{
memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0, jumpcoas_custom_io_r, (write8_space_func)SMH_NOP);
memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0, jumpcoas_custom_io_r);
memory_nop_write(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0);
fastfred_hardware_type = 0;
}
static DRIVER_INIT( boggy84 )
{
memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0, jumpcoas_custom_io_r, (write8_space_func)SMH_NOP);
memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0, jumpcoas_custom_io_r);
memory_nop_write(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0);
fastfred_hardware_type = 2;
}

4
src/mame/drivers/finalizr.c
View File

@ -101,10 +101,10 @@ static WRITE8_HANDLER( i8039_T0_w )
}
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0001, 0x0001) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(finalizr_state, scroll)
AM_RANGE(0x0001, 0x0001) AM_WRITEONLY AM_BASE_MEMBER(finalizr_state, scroll)
AM_RANGE(0x0003, 0x0003) AM_WRITE(finalizr_videoctrl_w)
AM_RANGE(0x0004, 0x0004) AM_WRITE(finalizr_flipscreen_w)
// AM_RANGE(0x0020, 0x003f) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(finalizr_state, scroll)
// AM_RANGE(0x0020, 0x003f) AM_WRITEONLY AM_BASE_MEMBER(finalizr_state, scroll)
AM_RANGE(0x0800, 0x0800) AM_READ_PORT("DSW3")
AM_RANGE(0x0808, 0x0808) AM_READ_PORT("DSW2")
AM_RANGE(0x0810, 0x0810) AM_READ_PORT("SYSTEM")

4
src/mame/drivers/firefox.c
View File

@ -452,9 +452,9 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8)
AM_RANGE(0x0000, 0x0fff) AM_RAM
AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(tileram_w) AM_BASE(&tileram)
AM_RANGE(0x2000, 0x27ff) AM_RAM AM_BASE_GENERIC(spriteram)
AM_RANGE(0x2800, 0x2aff) AM_READWRITE(SMH_RAM, sprite_palette_w) AM_BASE(&sprite_palette)
AM_RANGE(0x2800, 0x2aff) AM_RAM_WRITE(sprite_palette_w) AM_BASE(&sprite_palette)
AM_RANGE(0x2b00, 0x2b00) AM_MIRROR(0x04ff) AM_WRITE(firefox_objram_bank_w)
AM_RANGE(0x2c00, 0x2eff) AM_READWRITE(SMH_RAM, tile_palette_w) AM_BASE(&tile_palette)
AM_RANGE(0x2c00, 0x2eff) AM_RAM_WRITE(tile_palette_w) AM_BASE(&tile_palette)
AM_RANGE(0x3000, 0x3fff) AM_ROMBANK("bank1")
AM_RANGE(0x4000, 0x40ff) AM_READWRITE(nvram_r, nvram_w) /* NOVRAM */
AM_RANGE(0x4100, 0x4100) AM_MIRROR(0x00f8) AM_READ_PORT("rdin0") /* RDIN0 */

34
src/mame/drivers/firetrk.c
View File

@ -323,23 +323,23 @@ static ADDRESS_MAP_START( firetrk_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x3fff)
AM_RANGE(0x0000, 0x00ff) AM_MIRROR(0x0700) AM_RAM AM_BASE(&firetrk_alpha_num_ram)
AM_RANGE(0x0800, 0x08ff) AM_MIRROR(0x0700) AM_RAM AM_BASE(&firetrk_playfield_ram)
AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_scroll_y)
AM_RANGE(0x1020, 0x1020) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_scroll_x)
AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_scroll_y)
AM_RANGE(0x1020, 0x1020) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_scroll_x)
AM_RANGE(0x1040, 0x1040) AM_MIRROR(0x001f) AM_WRITE(crash_reset_w)
AM_RANGE(0x1060, 0x1060) AM_MIRROR(0x001f) AM_DEVWRITE("discrete", firetrk_skid_reset_w)
AM_RANGE(0x1080, 0x1080) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_car_rot)
AM_RANGE(0x1080, 0x1080) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_car_rot)
AM_RANGE(0x10a0, 0x10a0) AM_MIRROR(0x001f) AM_WRITE(steer_reset_w)
AM_RANGE(0x10c0, 0x10c0) AM_MIRROR(0x001f) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x10e0, 0x10e0) AM_MIRROR(0x001f) AM_WRITE(blink_on_w) AM_BASE(&firetrk_blink)
AM_RANGE(0x1400, 0x1400) AM_MIRROR(0x001f) AM_DEVWRITE("discrete", firetrk_motor_snd_w)
AM_RANGE(0x1420, 0x1420) AM_MIRROR(0x001f) AM_DEVWRITE("discrete", firetrk_crash_snd_w)
AM_RANGE(0x1440, 0x1440) AM_MIRROR(0x001f) AM_DEVWRITE("discrete", firetrk_skid_snd_w)
AM_RANGE(0x1460, 0x1460) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_drone_x)
AM_RANGE(0x1480, 0x1480) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_drone_y)
AM_RANGE(0x14a0, 0x14a0) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_drone_rot)
AM_RANGE(0x1460, 0x1460) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_drone_x)
AM_RANGE(0x1480, 0x1480) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_drone_y)
AM_RANGE(0x14a0, 0x14a0) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_drone_rot)
AM_RANGE(0x14c0, 0x14c0) AM_MIRROR(0x001f) AM_WRITE(firetrk_output_w)
AM_RANGE(0x14e0, 0x14e0) AM_MIRROR(0x001f) AM_DEVWRITE("discrete", firetrk_xtndply_w)
AM_RANGE(0x1800, 0x1807) AM_MIRROR(0x03f8) AM_READWRITE(firetrk_input_r, SMH_NOP)
AM_RANGE(0x1800, 0x1807) AM_MIRROR(0x03f8) AM_READ(firetrk_input_r) AM_WRITENOP
AM_RANGE(0x1c00, 0x1c03) AM_MIRROR(0x03fc) AM_READ(firetrk_dip_r)
AM_RANGE(0x2000, 0x3fff) AM_ROM
ADDRESS_MAP_END
@ -348,11 +348,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( superbug_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x1fff)
AM_RANGE(0x0000, 0x00ff) AM_RAM
AM_RANGE(0x0100, 0x0100) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_scroll_y)
AM_RANGE(0x0120, 0x0120) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_scroll_x)
AM_RANGE(0x0100, 0x0100) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_scroll_y)
AM_RANGE(0x0120, 0x0120) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_scroll_x)
AM_RANGE(0x0140, 0x0140) AM_MIRROR(0x001f) AM_WRITE(crash_reset_w)
AM_RANGE(0x0160, 0x0160) AM_MIRROR(0x001f) AM_DEVWRITE("discrete", firetrk_skid_reset_w)
AM_RANGE(0x0180, 0x0180) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_car_rot)
AM_RANGE(0x0180, 0x0180) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_car_rot)
AM_RANGE(0x01a0, 0x01a0) AM_MIRROR(0x001f) AM_WRITE(steer_reset_w)
AM_RANGE(0x01c0, 0x01c0) AM_MIRROR(0x001f) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x01e0, 0x01e0) AM_MIRROR(0x001f) AM_WRITE(blink_on_w) AM_BASE(&firetrk_blink)
@ -373,23 +373,23 @@ static ADDRESS_MAP_START( montecar_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x3fff)
AM_RANGE(0x0000, 0x00ff) AM_MIRROR(0x0700) AM_RAM AM_BASE(&firetrk_alpha_num_ram)
AM_RANGE(0x0800, 0x08ff) AM_MIRROR(0x0700) AM_RAM AM_BASE(&firetrk_playfield_ram)
AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_scroll_y)
AM_RANGE(0x1020, 0x1020) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_scroll_x)
AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_scroll_y)
AM_RANGE(0x1020, 0x1020) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_scroll_x)
AM_RANGE(0x1040, 0x1040) AM_MIRROR(0x001f) AM_WRITE(montecar_drone_reset_w)
AM_RANGE(0x1060, 0x1060) AM_MIRROR(0x001f) AM_WRITE(montecar_car_reset_w)
AM_RANGE(0x1080, 0x1080) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_car_rot)
AM_RANGE(0x1080, 0x1080) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_car_rot)
AM_RANGE(0x10a0, 0x10a0) AM_MIRROR(0x001f) AM_WRITE(steer_reset_w)
AM_RANGE(0x10c0, 0x10c0) AM_MIRROR(0x001f) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x10e0, 0x10e0) AM_MIRROR(0x001f) AM_DEVWRITE("discrete", montecar_skid_reset_w)
AM_RANGE(0x1400, 0x1400) AM_MIRROR(0x001f) AM_DEVWRITE("discrete", firetrk_motor_snd_w)
AM_RANGE(0x1420, 0x1420) AM_MIRROR(0x001f) AM_DEVWRITE("discrete", firetrk_crash_snd_w)
AM_RANGE(0x1440, 0x1440) AM_MIRROR(0x001f) AM_DEVWRITE("discrete", firetrk_skid_snd_w)
AM_RANGE(0x1460, 0x1460) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_drone_x)
AM_RANGE(0x1480, 0x1480) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_drone_y)
AM_RANGE(0x14a0, 0x14a0) AM_MIRROR(0x001f) AM_WRITE(SMH_RAM) AM_BASE(&firetrk_drone_rot)
AM_RANGE(0x1460, 0x1460) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_drone_x)
AM_RANGE(0x1480, 0x1480) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_drone_y)
AM_RANGE(0x14a0, 0x14a0) AM_MIRROR(0x001f) AM_WRITEONLY AM_BASE(&firetrk_drone_rot)
AM_RANGE(0x14c0, 0x14c0) AM_MIRROR(0x001f) AM_WRITE(montecar_output_1_w)
AM_RANGE(0x14e0, 0x14e0) AM_MIRROR(0x001f) AM_WRITE(montecar_output_2_w)
AM_RANGE(0x1800, 0x1807) AM_MIRROR(0x03f8) AM_READWRITE(montecar_input_r, SMH_NOP)
AM_RANGE(0x1800, 0x1807) AM_MIRROR(0x03f8) AM_READ(montecar_input_r) AM_WRITENOP
AM_RANGE(0x1c00, 0x1c03) AM_MIRROR(0x03fc) AM_READ(montecar_dip_r)
AM_RANGE(0x2000, 0x3fff) AM_ROM
ADDRESS_MAP_END

2
src/mame/drivers/fitfight.c
View File

@ -198,7 +198,7 @@ static ADDRESS_MAP_START( bbprot_main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xb08000, 0xb0bfff) AM_RAM_WRITE(fof_mid_tileram_w) AM_BASE_MEMBER(fitfight_state, fof_mid_tileram)
AM_RANGE(0xb0c000, 0xb0ffff) AM_RAM_WRITE(fof_txt_tileram_w) AM_BASE_MEMBER(fitfight_state, fof_txt_tileram)
AM_RANGE(0xc00000, 0xc00fff) AM_READ(SMH_RAM)
AM_RANGE(0xc00000, 0xc00fff) AM_READONLY
AM_RANGE(0xc00000, 0xc03fff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0xd00000, 0xd007ff) AM_RAM AM_BASE_MEMBER(fitfight_state, spriteram)

10
src/mame/drivers/flstory.c
View File

@ -88,7 +88,7 @@ static ADDRESS_MAP_START( flstory_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xd804, 0xd804) AM_READ_PORT("P1")
AM_RANGE(0xd805, 0xd805) AM_READ(flstory_mcu_status_r)
AM_RANGE(0xd806, 0xd806) AM_READ_PORT("P2")
// AM_RANGE(0xda00, 0xda00) AM_WRITE(SMH_RAM)
// AM_RANGE(0xda00, 0xda00) AM_WRITEONLY
AM_RANGE(0xdc00, 0xdc9f) AM_RAM AM_BASE_SIZE_MEMBER(flstory_state, spriteram, spriteram_size)
AM_RANGE(0xdca0, 0xdcbf) AM_RAM_WRITE(flstory_scrlram_w) AM_BASE_MEMBER(flstory_state, scrlram)
AM_RANGE(0xdcc0, 0xdcff) AM_RAM /* unknown */
@ -114,7 +114,7 @@ static ADDRESS_MAP_START( onna34ro_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xd804, 0xd804) AM_READ_PORT("P1")
AM_RANGE(0xd805, 0xd805) AM_READ(onna34ro_mcu_status_r)
AM_RANGE(0xd806, 0xd806) AM_READ_PORT("P2")
// AM_RANGE(0xda00, 0xda00) AM_WRITE(SMH_RAM)
// AM_RANGE(0xda00, 0xda00) AM_WRITEONLY
AM_RANGE(0xdc00, 0xdc9f) AM_RAM AM_BASE_SIZE_MEMBER(flstory_state, spriteram, spriteram_size)
AM_RANGE(0xdca0, 0xdcbf) AM_RAM_WRITE(flstory_scrlram_w) AM_BASE_MEMBER(flstory_state, scrlram)
AM_RANGE(0xdcc0, 0xdcff) AM_RAM /* unknown */
@ -137,7 +137,7 @@ static ADDRESS_MAP_START( victnine_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc800, 0xcfff) AM_RAM /* unknown */
AM_RANGE(0xd000, 0xd000) AM_READWRITE(victnine_mcu_r, victnine_mcu_w)
AM_RANGE(0xd001, 0xd001) AM_WRITENOP /* watchdog? */
AM_RANGE(0xd002, 0xd002) AM_READWRITE(SMH_NOP, SMH_NOP) /* unknown read & coin lock out? */
AM_RANGE(0xd002, 0xd002) AM_NOP /* unknown read & coin lock out? */
AM_RANGE(0xd400, 0xd400) AM_READWRITE(from_snd_r, sound_command_w)
AM_RANGE(0xd401, 0xd401) AM_READ(snd_flag_r)
AM_RANGE(0xd403, 0xd403) AM_READNOP /* unknown */
@ -149,7 +149,7 @@ static ADDRESS_MAP_START( victnine_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xd805, 0xd805) AM_READ_PORT("EXTRA_P1") /* also mcu */
AM_RANGE(0xd806, 0xd806) AM_READ_PORT("P2")
AM_RANGE(0xd807, 0xd807) AM_READ_PORT("EXTRA_P2")
// AM_RANGE(0xda00, 0xda00) AM_WRITE(SMH_RAM)
// AM_RANGE(0xda00, 0xda00) AM_WRITEONLY
AM_RANGE(0xdc00, 0xdc9f) AM_RAM AM_BASE_SIZE_MEMBER(flstory_state, spriteram, spriteram_size)
AM_RANGE(0xdca0, 0xdcbf) AM_RAM_WRITE(flstory_scrlram_w) AM_BASE_MEMBER(flstory_state, scrlram)
AM_RANGE(0xdce0, 0xdce0) AM_READWRITE(victnine_gfxctrl_r, victnine_gfxctrl_w)
@ -239,7 +239,7 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xcc00, 0xcc00) AM_DEVWRITE("msm", sound_control_0_w)
AM_RANGE(0xce00, 0xce00) AM_DEVWRITE("msm", sound_control_1_w)
AM_RANGE(0xd800, 0xd800) AM_READWRITE(soundlatch_r, to_main_w)
AM_RANGE(0xda00, 0xda00) AM_READWRITE(SMH_NOP, nmi_enable_w) /* unknown read*/
AM_RANGE(0xda00, 0xda00) AM_READNOP AM_WRITE(nmi_enable_w) /* unknown read*/
AM_RANGE(0xdc00, 0xdc00) AM_WRITE(nmi_disable_w)
AM_RANGE(0xde00, 0xde00) AM_READNOP AM_DEVWRITE("dac", dac_w) /* signed 8-bit DAC & unknown read */
AM_RANGE(0xe000, 0xefff) AM_ROM /* space for diagnostics ROM */

2
src/mame/drivers/flyball.c
View File

@ -252,7 +252,7 @@ static ADDRESS_MAP_START( flyball_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0900, 0x0900) AM_WRITE(flyball_potmask_w)
AM_RANGE(0x0a00, 0x0a07) AM_WRITE(flyball_misc_w)
AM_RANGE(0x0b00, 0x0b00) AM_READ(flyball_input_r)
AM_RANGE(0x0d00, 0x0eff) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(flyball_state, playfield_ram)
AM_RANGE(0x0d00, 0x0eff) AM_WRITEONLY AM_BASE_MEMBER(flyball_state, playfield_ram)
AM_RANGE(0x1000, 0x1fff) AM_ROM AM_BASE_MEMBER(flyball_state, rombase) /* program */
ADDRESS_MAP_END

2
src/mame/drivers/foodf.c
View File

@ -220,7 +220,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x018000, 0x018fff) AM_MIRROR(0x3e3000) AM_RAM
AM_RANGE(0x01c000, 0x01c0ff) AM_MIRROR(0x3e3f00) AM_RAM AM_BASE_GENERIC(spriteram)
AM_RANGE(0x800000, 0x8007ff) AM_MIRROR(0x03f800) AM_RAM_WRITE(atarigen_playfield_w) AM_BASE(&atarigen_playfield)
AM_RANGE(0x900000, 0x9001ff) AM_MIRROR(0x03fe00) AM_READWRITE(nvram_r, SMH_RAM) AM_BASE_SIZE_GENERIC(nvram)
AM_RANGE(0x900000, 0x9001ff) AM_MIRROR(0x03fe00) AM_RAM_READ(nvram_r) AM_BASE_SIZE_GENERIC(nvram)
AM_RANGE(0x940000, 0x940007) AM_MIRROR(0x023ff8) AM_READ(analog_r)
AM_RANGE(0x944000, 0x944007) AM_MIRROR(0x023ff8) AM_WRITE(analog_w)
AM_RANGE(0x948000, 0x948001) AM_MIRROR(0x023ffe) AM_READ_PORT("SYSTEM") AM_WRITE(digital_w)

2
src/mame/drivers/fromanc2.c
View File

@ -387,7 +387,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( fromanc2_sound_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READWRITE(soundlatch_r, SMH_NOP) // snd cmd (1P) / ?
AM_RANGE(0x00, 0x00) AM_READ(soundlatch_r) AM_WRITENOP // snd cmd (1P) / ?
AM_RANGE(0x04, 0x04) AM_READ(soundlatch2_r) // snd cmd (2P)
AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE("ymsnd", ym2610_r, ym2610_w)
AM_RANGE(0x0c, 0x0c) AM_READ(fromanc2_sndcpu_nmi_clr)

2
src/mame/drivers/funkyjet.c
View File

@ -110,7 +110,7 @@ static ADDRESS_MAP_START( funkyjet_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x180000, 0x1807ff) AM_READWRITE(deco16_146_funkyjet_prot_r, deco16_146_funkyjet_prot_w) AM_BASE(&deco16_prot_ram)
AM_RANGE(0x184000, 0x184001) AM_WRITENOP
AM_RANGE(0x188000, 0x188001) AM_WRITENOP
AM_RANGE(0x300000, 0x30000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
AM_RANGE(0x300000, 0x30000f) AM_WRITEONLY AM_BASE(&deco16_pf12_control)
AM_RANGE(0x320000, 0x321fff) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
AM_RANGE(0x322000, 0x323fff) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
AM_RANGE(0x340000, 0x340bff) AM_RAM AM_BASE(&deco16_pf1_rowscroll)

4
src/mame/drivers/fuukifg2.c
View File

@ -130,9 +130,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( fuuki16_sound_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(fuuki16_sound_rombank_w) // ROM Bank
AM_RANGE(0x11, 0x11) AM_READWRITE(soundlatch_r, SMH_NOP) // From Main CPU / ? To Main CPU ?
AM_RANGE(0x11, 0x11) AM_READ(soundlatch_r) AM_WRITENOP // From Main CPU / ? To Main CPU ?
AM_RANGE(0x20, 0x20) AM_DEVWRITE("oki", fuuki16_oki_banking_w) // Oki Banking
AM_RANGE(0x30, 0x30) AM_WRITE(SMH_NOP) // ? In the NMI routine
AM_RANGE(0x30, 0x30) AM_WRITENOP // ? In the NMI routine
AM_RANGE(0x40, 0x41) AM_DEVWRITE("ym1", ym2203_w)
AM_RANGE(0x50, 0x51) AM_DEVREADWRITE("ym2", ym3812_r, ym3812_w)
AM_RANGE(0x60, 0x60) AM_DEVREAD("oki", okim6295_r) // M6295

4
src/mame/drivers/fuukifg3.c
View File

@ -255,9 +255,9 @@ static ADDRESS_MAP_START( fuuki32_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x903fe0, 0x903fff) AM_READWRITE(snd_020_r, snd_020_w) // Shared with Z80
// AM_RANGE(0x903fe0, 0x903fe3) AM_READ(fuuki32_sound_command_r) // Shared with Z80
// AM_RANGE(0x903fe4, 0x903fff) AM_READ(SMH_RAM) // ??
// AM_RANGE(0x903fe4, 0x903fff) AM_READONLY // ??
AM_RANGE(0xa00000, 0xa00003) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(fuuki32_state, tilebank)
AM_RANGE(0xa00000, 0xa00003) AM_WRITEONLY AM_BASE_MEMBER(fuuki32_state, tilebank)
ADDRESS_MAP_END

6
src/mame/drivers/gaelco.c
View File

@ -142,7 +142,7 @@ static ADDRESS_MAP_START( maniacsq_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_ROM /* ROM */
AM_RANGE(0x100000, 0x101fff) AM_RAM_WRITE(gaelco_vram_w) AM_BASE_MEMBER(gaelco_state, videoram) /* Video RAM */
AM_RANGE(0x102000, 0x103fff) AM_RAM /* Screen RAM */
AM_RANGE(0x108000, 0x108007) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(gaelco_state, vregs) /* Video Registers */
AM_RANGE(0x108000, 0x108007) AM_WRITEONLY AM_BASE_MEMBER(gaelco_state, vregs) /* Video Registers */
// AM_RANGE(0x10800c, 0x10800d) AM_WRITE(watchdog_reset_w) /* INT 6 ACK/Watchdog timer */
AM_RANGE(0x200000, 0x2007ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram) /* Palette */
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE_MEMBER(gaelco_state, spriteram) /* Sprite RAM */
@ -159,7 +159,7 @@ static ADDRESS_MAP_START( squash_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_ROM /* ROM */
AM_RANGE(0x100000, 0x101fff) AM_RAM_WRITE(gaelco_vram_encrypted_w) AM_BASE_MEMBER(gaelco_state, videoram) /* Video RAM */
AM_RANGE(0x102000, 0x103fff) AM_RAM_WRITE(gaelco_encrypted_w) AM_BASE_MEMBER(gaelco_state, screen) /* Screen RAM */
AM_RANGE(0x108000, 0x108007) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(gaelco_state, vregs) /* Video Registers */
AM_RANGE(0x108000, 0x108007) AM_WRITEONLY AM_BASE_MEMBER(gaelco_state, vregs) /* Video Registers */
// AM_RANGE(0x10800c, 0x10800d) AM_WRITE(watchdog_reset_w) /* INT 6 ACK/Watchdog timer */
AM_RANGE(0x200000, 0x2007ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram) /* Palette */
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE_MEMBER(gaelco_state, spriteram) /* Sprite RAM */
@ -176,7 +176,7 @@ static ADDRESS_MAP_START( thoop_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_ROM /* ROM */
AM_RANGE(0x100000, 0x101fff) AM_RAM_WRITE(thoop_vram_encrypted_w) AM_BASE_MEMBER(gaelco_state, videoram) /* Video RAM */
AM_RANGE(0x102000, 0x103fff) AM_RAM_WRITE(thoop_encrypted_w) AM_BASE_MEMBER(gaelco_state, screen) /* Screen RAM */
AM_RANGE(0x108000, 0x108007) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(gaelco_state, vregs) /* Video Registers */
AM_RANGE(0x108000, 0x108007) AM_WRITEONLY AM_BASE_MEMBER(gaelco_state, vregs) /* Video Registers */
// AM_RANGE(0x10800c, 0x10800d) AM_WRITE(watchdog_reset_w) /* INT 6 ACK/Watchdog timer */
AM_RANGE(0x200000, 0x2007ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram) /* Palette */
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE_MEMBER(gaelco_state, spriteram) /* Sprite RAM */

6
src/mame/drivers/gaelco2.c
View File

@ -219,8 +219,8 @@ static ADDRESS_MAP_START( bang_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x202890, 0x2028ff) AM_DEVREADWRITE("gaelco", gaelcosnd_r, gaelcosnd_w) AM_BASE(&gaelco_sndregs) /* Sound Registers */
AM_RANGE(0x200000, 0x20ffff) AM_RAM_WRITE(gaelco2_vram_w) AM_BASE_SIZE_GENERIC(spriteram) /* Video RAM */
AM_RANGE(0x210000, 0x211fff) AM_RAM_WRITE(gaelco2_palette_w) AM_BASE_GENERIC(paletteram) /* Palette */
AM_RANGE(0x218004, 0x218009) AM_READ(SMH_RAM) /* Video Registers */
AM_RANGE(0x218004, 0x218007) AM_WRITE(SMH_RAM) AM_BASE(&gaelco2_vregs) /* Video Registers */
AM_RANGE(0x218004, 0x218009) AM_READONLY /* Video Registers */
AM_RANGE(0x218004, 0x218007) AM_WRITEONLY AM_BASE(&gaelco2_vregs) /* Video Registers */
AM_RANGE(0x218008, 0x218009) AM_WRITENOP /* CLR INT Video */
AM_RANGE(0x300000, 0x300001) AM_READ_PORT("P1")
AM_RANGE(0x300002, 0x300003) AM_READNOP /* Random number generator? */
@ -643,7 +643,7 @@ static ADDRESS_MAP_START( touchgo_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x300004, 0x300005) AM_READ_PORT("IN2") /* COINSW + Input 3P */
AM_RANGE(0x300006, 0x300007) AM_READ_PORT("IN3") /* SERVICESW + Input 4P */
AM_RANGE(0x500000, 0x50001f) AM_WRITE(touchgo_coin_w) /* Coin counters */
AM_RANGE(0xfefffa, 0xfefffb) AM_READWRITE(dallas_kludge_r, SMH_RAM) /* DS5002FP related patch */
AM_RANGE(0xfefffa, 0xfefffb) AM_RAM_READ(dallas_kludge_r) /* DS5002FP related patch */
AM_RANGE(0xfe0000, 0xfeffff) AM_RAM /* Work RAM */
ADDRESS_MAP_END

146
src/mame/drivers/gal3.c
View File

@ -365,14 +365,14 @@ static ADDRESS_MAP_START( cpu_mst_map, ADDRESS_SPACE_PROGRAM, 32 )
/// AM_RANGE(0x40000000, 0x4000ffff) AM_WRITE() //
AM_RANGE(0x44000000, 0x44000003) AM_READ_PORT("DSW_CPU_mst" )
AM_RANGE(0x44800000, 0x44800003) AM_READ(led_mst_r) AM_WRITE(led_mst_w) //LEDs
AM_RANGE(0x48000000, 0x48000003) AM_READ(SMH_NOP) //irq1 v-blank ack
AM_RANGE(0x48000000, 0x48000003) AM_READNOP //irq1 v-blank ack
AM_RANGE(0x4c000000, 0x4c000003) AM_READNOP //irq3 ack
AM_RANGE(0x60000000, 0x60007fff) AM_READ(shareram0_r) AM_WRITE(shareram0_w) AM_BASE(&mpSharedRAM0) //CRAM
AM_RANGE(0x60010000, 0x60017fff) AM_READ(shareram0_r) AM_WRITE(shareram0_w) //Mirror
AM_RANGE(0x80000000, 0x8007ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //512K Local RAM
AM_RANGE(0x80000000, 0x8007ffff) AM_RAM //512K Local RAM
/// AM_RANGE(0xc0000000, 0xc000000b) AM_WRITENOP //upload?
AM_RANGE(0xc000000c, 0xc000000f) AM_READNOP //irq2 ack
/// AM_RANGE(0xd8000000, 0xd800000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) // protection or 68681?
/// AM_RANGE(0xd8000000, 0xd800000f) AM_RAM // protection or 68681?
AM_RANGE(0xf2800000, 0xf2800fff) AM_READWRITE(rso_r, rso_w) //RSO PCB
ADDRESS_MAP_END
@ -381,14 +381,14 @@ static ADDRESS_MAP_START( cpu_slv_map, ADDRESS_SPACE_PROGRAM, 32 )
/// AM_RANGE(0x40000000, 0x4000ffff) AM_WRITE() //
AM_RANGE(0x44000000, 0x44000003) AM_READ_PORT("DSW_CPU_slv" )
AM_RANGE(0x44800000, 0x44800003) AM_READ(led_slv_r) AM_WRITE(led_slv_w) //LEDs
AM_RANGE(0x48000000, 0x48000003) AM_READ(SMH_NOP) //irq1 ack
AM_RANGE(0x48000000, 0x48000003) AM_READNOP //irq1 ack
/// AM_RANGE(0x50000000, 0x50000003) AM_READ() AM_WRITE()
/// AM_RANGE(0x54000000, 0x54000003) AM_READ() AM_WRITE()
AM_RANGE(0x60000000, 0x60007fff) AM_READ(shareram0_r) AM_WRITE(shareram0_w)
AM_RANGE(0x60010000, 0x60017fff) AM_READ(shareram0_r) AM_WRITE(shareram0_w)
AM_RANGE(0x80000000, 0x8007ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //512K Local RAM
AM_RANGE(0x80000000, 0x8007ffff) AM_RAM //512K Local RAM
AM_RANGE(0xf1200000, 0xf120ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //DSP RAM
AM_RANGE(0xf1200000, 0xf120ffff) AM_RAM //DSP RAM
/// AM_RANGE(0xf1400000, 0xf1400003) AM_WRITE(pointram_control_w)
/// AM_RANGE(0xf1440000, 0xf1440003) AM_READWRITE(pointram_data_r,pointram_data_w)
/// AM_RANGE(0x440002, 0x47ffff) AM_WRITENOP /* (frame buffer?) */
@ -398,96 +398,96 @@ static ADDRESS_MAP_START( cpu_slv_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0xf1740000, 0xf175ffff) AM_READWRITE(paletteram32_r,paletteram32_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0xf1760000, 0xf1760003) AM_READWRITE(namcos21_video_enable_r,namcos21_video_enable_w)
AM_RANGE(0xf2200000, 0xf220ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
AM_RANGE(0xf2700000, 0xf270ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //AM_READWRITE(namco_obj16_r,namco_obj16_w)
AM_RANGE(0xf2720000, 0xf2720007) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //AM_READWRITE(namco_spritepos16_r,namco_spritepos16_w)
AM_RANGE(0xf2740000, 0xf275ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //AM_READWRITE(paletteram16_r,paletteram16_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0xf2760000, 0xf2760003) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //AM_READWRITE(namcos21_video_enable_r,namcos21_video_enable_w)
AM_RANGE(0xf2200000, 0xf220ffff) AM_RAM
AM_RANGE(0xf2700000, 0xf270ffff) AM_RAM //AM_READWRITE(namco_obj16_r,namco_obj16_w)
AM_RANGE(0xf2720000, 0xf2720007) AM_RAM //AM_READWRITE(namco_spritepos16_r,namco_spritepos16_w)
AM_RANGE(0xf2740000, 0xf275ffff) AM_RAM //AM_READWRITE(paletteram16_r,paletteram16_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0xf2760000, 0xf2760003) AM_RAM //AM_READWRITE(namcos21_video_enable_r,namcos21_video_enable_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( rs_cpu_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //64K working RAM
AM_RANGE(0x100000, 0x10ffff) AM_RAM //64K working RAM
/// AM_RANGE(0x180000, 0x183fff) AM_RAM //Nvram
AM_RANGE(0x1c0000, 0x1c0001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //148?
AM_RANGE(0x1c2000, 0x1c2001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x1c4000, 0x1c4001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x1c6000, 0x1c6001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x1c8000, 0x1c8001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x1ca000, 0x1ca001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x1cc000, 0x1cc001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x1ce000, 0x1ce001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x1d2000, 0x1d2001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x1d4000, 0x1d4001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x1d6000, 0x1d6001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x1de000, 0x1de001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x1e4000, 0x1e4001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x1e6000, 0x1e6001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x1c0000, 0x1c0001) AM_RAM //148?
AM_RANGE(0x1c2000, 0x1c2001) AM_RAM //?
AM_RANGE(0x1c4000, 0x1c4001) AM_RAM //?
AM_RANGE(0x1c6000, 0x1c6001) AM_RAM //?
AM_RANGE(0x1c8000, 0x1c8001) AM_RAM //?
AM_RANGE(0x1ca000, 0x1ca001) AM_RAM //?
AM_RANGE(0x1cc000, 0x1cc001) AM_RAM //?
AM_RANGE(0x1ce000, 0x1ce001) AM_RAM //?
AM_RANGE(0x1d2000, 0x1d2001) AM_RAM //?
AM_RANGE(0x1d4000, 0x1d4001) AM_RAM //?
AM_RANGE(0x1d6000, 0x1d6001) AM_RAM //?
AM_RANGE(0x1de000, 0x1de001) AM_RAM //?
AM_RANGE(0x1e4000, 0x1e4001) AM_RAM //?
AM_RANGE(0x1e6000, 0x1e6001) AM_RAM //?
AM_RANGE(0x200000, 0x200001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x200000, 0x200001) AM_RAM //?
AM_RANGE(0x2c0000, 0x2c0001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x2c0800, 0x2c0801) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x2c1000, 0x2c1001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x2c1800, 0x2c1801) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x2c2000, 0x2c2001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x2c2800, 0x2c2801) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x2c3000, 0x2c3001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x2c3800, 0x2c3801) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x2c4000, 0x2c4001) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x2c0000, 0x2c0001) AM_RAM //?
AM_RANGE(0x2c0800, 0x2c0801) AM_RAM //?
AM_RANGE(0x2c1000, 0x2c1001) AM_RAM //?
AM_RANGE(0x2c1800, 0x2c1801) AM_RAM //?
AM_RANGE(0x2c2000, 0x2c2001) AM_RAM //?
AM_RANGE(0x2c2800, 0x2c2801) AM_RAM //?
AM_RANGE(0x2c3000, 0x2c3001) AM_RAM //?
AM_RANGE(0x2c3800, 0x2c3801) AM_RAM //?
AM_RANGE(0x2c4000, 0x2c4001) AM_RAM //?
AM_RANGE(0x300000, 0x300fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&rsoSharedRAM) //shared RAM
AM_RANGE(0x300000, 0x300fff) AM_RAM AM_BASE(&rsoSharedRAM) //shared RAM
AM_RANGE(0x400000, 0x400017) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //MC68681?
AM_RANGE(0x480000, 0x480017) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x500000, 0x500017) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x580000, 0x580017) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x600000, 0x600017) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x680000, 0x680017) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x400000, 0x400017) AM_RAM //MC68681?
AM_RANGE(0x480000, 0x480017) AM_RAM //?
AM_RANGE(0x500000, 0x500017) AM_RAM //?
AM_RANGE(0x580000, 0x580017) AM_RAM //?
AM_RANGE(0x600000, 0x600017) AM_RAM //?
AM_RANGE(0x680000, 0x680017) AM_RAM //?
AM_RANGE(0x800000, 0x80000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x840000, 0x843fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //8 bit, 139 SCI RAM?
AM_RANGE(0x880000, 0x88000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x8c0000, 0x8c3fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //8 bit
AM_RANGE(0x900000, 0x90000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x940000, 0x943fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //8 bit
AM_RANGE(0x980000, 0x98000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0x9c0000, 0x9c3fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //8 bit
AM_RANGE(0xa00000, 0xa0000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0xa40000, 0xa43fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //8 bit
AM_RANGE(0xa80000, 0xa8000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0xac0000, 0xac3fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //8 bit
AM_RANGE(0xb00000, 0xb0000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0xb40000, 0xb43fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //8 bit
AM_RANGE(0xb80000, 0xb8000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0xbc0000, 0xbc3fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //8 bit
AM_RANGE(0xc00000, 0xc0000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //?
AM_RANGE(0xc40000, 0xc43fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //8 bit
AM_RANGE(0x800000, 0x80000f) AM_RAM //?
AM_RANGE(0x840000, 0x843fff) AM_RAM //8 bit, 139 SCI RAM?
AM_RANGE(0x880000, 0x88000f) AM_RAM //?
AM_RANGE(0x8c0000, 0x8c3fff) AM_RAM //8 bit
AM_RANGE(0x900000, 0x90000f) AM_RAM //?
AM_RANGE(0x940000, 0x943fff) AM_RAM //8 bit
AM_RANGE(0x980000, 0x98000f) AM_RAM //?
AM_RANGE(0x9c0000, 0x9c3fff) AM_RAM //8 bit
AM_RANGE(0xa00000, 0xa0000f) AM_RAM //?
AM_RANGE(0xa40000, 0xa43fff) AM_RAM //8 bit
AM_RANGE(0xa80000, 0xa8000f) AM_RAM //?
AM_RANGE(0xac0000, 0xac3fff) AM_RAM //8 bit
AM_RANGE(0xb00000, 0xb0000f) AM_RAM //?
AM_RANGE(0xb40000, 0xb43fff) AM_RAM //8 bit
AM_RANGE(0xb80000, 0xb8000f) AM_RAM //?
AM_RANGE(0xbc0000, 0xbc3fff) AM_RAM //8 bit
AM_RANGE(0xc00000, 0xc0000f) AM_RAM //?
AM_RANGE(0xc40000, 0xc43fff) AM_RAM //8 bit
/// AM_RANGE(0xc44000, 0xffffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) /////////////
/// AM_RANGE(0xc44000, 0xffffff) AM_RAM /////////////
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_cpu_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
AM_RANGE(0x080000, 0x08ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
/// AM_RANGE(0x0c0000, 0x0cffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //00, 20, 30, 40, 50
/// AM_RANGE(0x100000, 0x10000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
AM_RANGE(0x110000, 0x113fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
/// AM_RANGE(0x120000, 0x120003) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //2ieme byte
/// AM_RANGE(0x200000, 0x20017f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //C140
AM_RANGE(0x080000, 0x08ffff) AM_RAM
/// AM_RANGE(0x0c0000, 0x0cffff) AM_RAM //00, 20, 30, 40, 50
/// AM_RANGE(0x100000, 0x10000f) AM_RAM
AM_RANGE(0x110000, 0x113fff) AM_RAM
/// AM_RANGE(0x120000, 0x120003) AM_RAM //2ieme byte
/// AM_RANGE(0x200000, 0x20017f) AM_RAM //C140
AM_RANGE(0x200000, 0x2037ff) AM_DEVREADWRITE8("c140_16a", c140_r, c140_w, 0x00ff) //C140///////////
/// AM_RANGE(0x201000, 0x20117f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //C140
/// AM_RANGE(0x202000, 0x20217f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //C140
/// AM_RANGE(0x203000, 0x20317f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) //C140
/// AM_RANGE(0x201000, 0x20117f) AM_RAM //C140
/// AM_RANGE(0x202000, 0x20217f) AM_RAM //C140
/// AM_RANGE(0x203000, 0x20317f) AM_RAM //C140
AM_RANGE(0x204000, 0x2047ff) AM_DEVREADWRITE8("c140_16g", c140_r, c140_w, 0x00ff) //C140
/// AM_RANGE(0x090000, 0xffffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
/// AM_RANGE(0x090000, 0xffffff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( psn_b1_cpu_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x040000, 0xffffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
AM_RANGE(0x040000, 0xffffff) AM_RAM
ADDRESS_MAP_END
static INPUT_PORTS_START( gal3 )

16
src/mame/drivers/galaga.c
View File

@ -950,7 +950,7 @@ static ADDRESS_MAP_START( bosco_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8000, 0x8fff) AM_READWRITE(bosco_videoram_r, bosco_videoram_w) AM_BASE(&bosco_videoram) /* + sprite registers */
AM_RANGE(0x9000, 0x90ff) AM_DEVREADWRITE("06xx_1", namco_06xx_data_r, namco_06xx_data_w)
AM_RANGE(0x9100, 0x9100) AM_DEVREADWRITE("06xx_1", namco_06xx_ctrl_r, namco_06xx_ctrl_w)
AM_RANGE(0x9800, 0x980f) AM_WRITE(SMH_RAM) AM_SHARE(2) AM_BASE(&bosco_radarattr)
AM_RANGE(0x9800, 0x980f) AM_WRITEONLY AM_SHARE(2) AM_BASE(&bosco_radarattr)
AM_RANGE(0x9810, 0x9810) AM_WRITE(bosco_scrollx_w)
AM_RANGE(0x9820, 0x9820) AM_WRITE(bosco_scrolly_w)
AM_RANGE(0x9830, 0x9830) AM_WRITE(bosco_starcontrol_w)
@ -1019,24 +1019,24 @@ ADDRESS_MAP_END
/* bootleg 4th CPU replacing the 5xXX chips */
static ADDRESS_MAP_START( galaga_mem4, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_READWRITE(SMH_ROM, SMH_ROM)
AM_RANGE(0x1000, 0x107f) AM_READWRITE(SMH_RAM, SMH_RAM)
AM_RANGE(0x0000, 0x0fff) AM_ROM
AM_RANGE(0x1000, 0x107f) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( battles_mem4, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM)
AM_RANGE(0x0000, 0x0fff) AM_ROM
AM_RANGE(0x4000, 0x4003) AM_READ(battles_input_port_r)
AM_RANGE(0x4001, 0x4001) AM_WRITE(battles_CPU4_coin_w)
AM_RANGE(0x5000, 0x5000) AM_WRITE(battles_noise_sound_w)
AM_RANGE(0x6000, 0x6000) AM_READWRITE(battles_customio3_r, battles_customio3_w)
AM_RANGE(0x7000, 0x7000) AM_READWRITE(battles_customio_data3_r, battles_customio_data3_w)
AM_RANGE(0x8000, 0x80ff) AM_READWRITE(SMH_RAM, SMH_RAM)
AM_RANGE(0x8000, 0x80ff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( dzigzag_mem4, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_READWRITE(SMH_ROM, SMH_ROM)
AM_RANGE(0x1000, 0x107f) AM_READWRITE(SMH_RAM, SMH_RAM)
AM_RANGE(0x4000, 0x4007) AM_READ(SMH_RAM) // dip switches? bits 0 & 1 used
AM_RANGE(0x0000, 0x0fff) AM_ROM
AM_RANGE(0x1000, 0x107f) AM_RAM
AM_RANGE(0x4000, 0x4007) AM_READONLY // dip switches? bits 0 & 1 used
ADDRESS_MAP_END

28
src/mame/drivers/galaxian.c
View File

@ -2430,9 +2430,9 @@ static void unmap_galaxian_sound(running_machine *machine, offs_t base)
{
const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
memory_install_write8_handler(space, base + 0x0004, base + 0x0007, 0, 0x07f8, (write8_space_func)SMH_UNMAP);
memory_install_write8_handler(space, base + 0x0800, base + 0x0807, 0, 0x07f8, (write8_space_func)SMH_UNMAP);
memory_install_write8_handler(space, base + 0x1800, base + 0x1800, 0, 0x07ff, (write8_space_func)SMH_UNMAP);
memory_unmap_write(space, base + 0x0004, base + 0x0007, 0, 0x07f8);
memory_unmap_write(space, base + 0x0800, base + 0x0807, 0, 0x07f8);
memory_unmap_write(space, base + 0x1800, base + 0x1800, 0, 0x07ff);
}
@ -2457,7 +2457,7 @@ static DRIVER_INIT( nolock )
DRIVER_INIT_CALL(galaxian);
/* ...but coin lockout disabled/disconnected */
memory_install_write8_handler(space, 0x6002, 0x6002, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
memory_unmap_write(space, 0x6002, 0x6002, 0, 0x7f8);
}
@ -2469,7 +2469,7 @@ static DRIVER_INIT( azurian )
common_init(machine, scramble_draw_bullet, galaxian_draw_background, NULL, NULL);
/* coin lockout disabled */
memory_install_write8_handler(space, 0x6002, 0x6002, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
memory_unmap_write(space, 0x6002, 0x6002, 0, 0x7f8);
}
@ -2710,7 +2710,7 @@ static DRIVER_INIT( zigzag )
zigzag_bankswap_w(space, 0, 0);
/* coin lockout disabled */
memory_install_write8_handler(space, 0x6002, 0x6002, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
memory_unmap_write(space, 0x6002, 0x6002, 0, 0x7f8);
/* remove the galaxian sound hardware */
unmap_galaxian_sound(machine, 0x6000);
@ -2736,7 +2736,7 @@ static DRIVER_INIT( checkman )
common_init(machine, galaxian_draw_bullet, galaxian_draw_background, mooncrst_extend_tile_info, mooncrst_extend_sprite_info);
/* move the interrupt enable from $b000 to $b001 */
memory_install_write8_handler(space, 0xb000, 0xb000, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
memory_unmap_write(space, 0xb000, 0xb000, 0, 0x7f8);
memory_install_write8_handler(space, 0xb001, 0xb001, 0, 0x7f8, irq_enable_w);
/* attach the sound command handler */
@ -2786,7 +2786,7 @@ static DRIVER_INIT( dingoe )
common_init(machine, galaxian_draw_bullet, galaxian_draw_background, mooncrst_extend_tile_info, mooncrst_extend_sprite_info);
/* move the interrupt enable from $b000 to $b001 */
memory_install_write8_handler(space, 0xb000, 0xb000, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
memory_unmap_write(space, 0xb000, 0xb000, 0, 0x7f8);
memory_install_write8_handler(space, 0xb001, 0xb001, 0, 0x7f8, irq_enable_w);
/* attach the sound command handler */
@ -2870,7 +2870,7 @@ static DRIVER_INIT( scorpnmc )
common_init(machine, galaxian_draw_bullet, galaxian_draw_background, batman2_extend_tile_info, upper_extend_sprite_info);
/* move the interrupt enable from $b000 to $b001 */
memory_install_write8_handler(space, 0xb000, 0xb000, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
memory_unmap_write(space, 0xb000, 0xb000, 0, 0x7f8);
memory_install_write8_handler(space, 0xb001, 0xb001, 0, 0x7f8, irq_enable_w);
/* extra ROM */
@ -2882,7 +2882,7 @@ static DRIVER_INIT( scorpnmc )
memory_set_bankptr(machine, "bank2", auto_alloc_array(machine, UINT8, 0x800));
/* doesn't appear to use original RAM */
memory_install_readwrite8_handler(space, 0x8000, 0x87ff, 0, 0, (read8_space_func)SMH_UNMAP, (write8_space_func)SMH_UNMAP);
memory_unmap_readwrite(space, 0x8000, 0x87ff, 0, 0);
}
@ -2901,7 +2901,7 @@ static DRIVER_INIT( theend )
common_init(machine, theend_draw_bullet, galaxian_draw_background, NULL, NULL);
/* coin counter on the upper bit of port C */
memory_install_write8_handler(space, 0x6802, 0x6802, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
memory_unmap_write(space, 0x6802, 0x6802, 0, 0x7f8);
}
@ -2923,7 +2923,7 @@ static DRIVER_INIT( explorer )
memory_install_write8_handler(space, 0x7000, 0x7000, 0, 0x7ff, watchdog_reset_w);
/* I/O appears to be direct, not via PPIs */
memory_install_readwrite8_handler(space, 0x8000, 0xffff, 0, 0, (read8_space_func)SMH_UNMAP, (write8_space_func)SMH_UNMAP);
memory_unmap_readwrite(space, 0x8000, 0xffff, 0, 0);
memory_install_read_port_handler(space, 0x8000, 0x8000, 0, 0xffc, "IN0");
memory_install_read_port_handler(space, 0x8001, 0x8001, 0, 0xffc, "IN1");
memory_install_read_port_handler(space, 0x8002, 0x8002, 0, 0xffc, "IN2");
@ -2953,7 +2953,7 @@ static DRIVER_INIT( atlantis )
common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL);
/* watchdog is at $7800? (or is it just disabled?) */
memory_install_read8_handler(space, 0x7000, 0x7000, 0, 0x7ff, (read8_space_func)SMH_UNMAP);
memory_unmap_read(space, 0x7000, 0x7000, 0, 0x7ff);
memory_install_read8_handler(space, 0x7800, 0x7800, 0, 0x7ff, watchdog_reset_r);
}
@ -3050,7 +3050,7 @@ static DRIVER_INIT( scorpion )
memory_set_bankptr(machine, "bank1", memory_region(machine, "maincpu") + 0x5800);
/* no background related */
// memory_install_write8_handler(space, 0x6803, 0x6803, 0, 0, (write8_space_func)SMH_NOP);
// memory_nop_write(space, 0x6803, 0x6803, 0, 0);
memory_install_read8_handler(cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM), 0x3000, 0x3000, 0, 0, scorpion_digitalker_intr_r);
/*

16
src/mame/drivers/galaxold.c
View File

@ -596,8 +596,8 @@ static ADDRESS_MAP_START( dkongjrm_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x7000, 0x7fff) AM_ROM
AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
AM_RANGE(0x9800, 0x983f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
AM_RANGE(0x9840, 0x987f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
AM_RANGE(0x98c0, 0x98ff) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram2) AM_SIZE(&galaxold_spriteram2_size)
AM_RANGE(0x9840, 0x987f) AM_WRITEONLY AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
AM_RANGE(0x98c0, 0x98ff) AM_WRITEONLY AM_BASE(&galaxold_spriteram2) AM_SIZE(&galaxold_spriteram2_size)
AM_RANGE(0xa000, 0xa0ff) AM_READ_PORT("IN0")
AM_RANGE(0xa003, 0xa003) AM_WRITE(galaxold_coin_counter_w)
//AM_RANGE(0xa004, 0xa007) AM_WRITE(galaxian_lfo_freq_w)
@ -622,7 +622,7 @@ static ADDRESS_MAP_START( ozon1_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x4800, 0x4bff) AM_READWRITE(galaxold_videoram_r, galaxold_videoram_w) AM_BASE(&galaxold_videoram)
AM_RANGE(0x4c00, 0x4fff) AM_WRITE(galaxold_videoram_w)
AM_RANGE(0x5000, 0x503f) AM_RAM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
AM_RANGE(0x5040, 0x505f) AM_RAM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
AM_RANGE(0x5040, 0x505f) AM_RAM AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
AM_RANGE(0x6801, 0x6801) AM_WRITENOP //continuosly 0 and 1
AM_RANGE(0x6802, 0x6802) AM_WRITE(galaxold_coin_counter_w)
AM_RANGE(0x6806, 0x6806) AM_WRITENOP //only one 0 at reset
@ -641,7 +641,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( drivfrcg, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_ROM
AM_RANGE(0x1480, 0x14bf) AM_MIRROR(0x6000) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
AM_RANGE(0x14c0, 0x14ff) AM_MIRROR(0x6000) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
AM_RANGE(0x14c0, 0x14ff) AM_MIRROR(0x6000) AM_WRITEONLY AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
AM_RANGE(0x1500, 0x1500) AM_MIRROR(0x6000) AM_READ_PORT("IN0")
AM_RANGE(0x1503, 0x1503) AM_MIRROR(0x6000) AM_WRITE(galaxold_coin_counter_w)
AM_RANGE(0x1580, 0x1580) AM_MIRROR(0x6000) AM_READ_PORT("IN1")
@ -681,7 +681,7 @@ static ADDRESS_MAP_START( bongo, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xb004, 0xb004) AM_WRITE(galaxold_stars_enable_w)
AM_RANGE(0xb006, 0xb006) AM_WRITE(galaxold_flip_screen_x_w)
AM_RANGE(0xb007, 0xb007) AM_WRITE(galaxold_flip_screen_y_w)
AM_RANGE(0xb800, 0xb800) AM_READWRITE(watchdog_reset_r, SMH_NOP)
AM_RANGE(0xb800, 0xb800) AM_READ(watchdog_reset_r) AM_WRITENOP
ADDRESS_MAP_END
static ADDRESS_MAP_START( bongo_io, ADDRESS_SPACE_IO, 8 )
@ -694,7 +694,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( hunchbkg, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x0fff) AM_ROM
AM_RANGE(0x1480, 0x14bf) AM_MIRROR(0x6000) AM_RAM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
AM_RANGE(0x14c0, 0x14ff) AM_MIRROR(0x6000) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
AM_RANGE(0x14c0, 0x14ff) AM_MIRROR(0x6000) AM_WRITEONLY AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
AM_RANGE(0x1500, 0x1500) AM_MIRROR(0x6000) AM_READ_PORT("IN0")
AM_RANGE(0x1503, 0x1503) AM_MIRROR(0x6000) AM_WRITE(galaxold_coin_counter_w)
AM_RANGE(0x1580, 0x1580) AM_MIRROR(0x6000) AM_READ_PORT("IN1")
@ -706,7 +706,7 @@ static ADDRESS_MAP_START( hunchbkg, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1604, 0x1604) AM_MIRROR(0x6000) AM_WRITENOP
AM_RANGE(0x1606, 0x1606) AM_MIRROR(0x6000) AM_WRITE(galaxold_flip_screen_x_w)
AM_RANGE(0x1607, 0x1607) AM_MIRROR(0x6000) AM_WRITE(galaxold_flip_screen_y_w)
AM_RANGE(0x1680, 0x1680) AM_MIRROR(0x6000) AM_READ(SMH_NOP) AM_DEVWRITE(GAL_AUDIO, galaxian_pitch_w)
AM_RANGE(0x1680, 0x1680) AM_MIRROR(0x6000) AM_READNOP AM_DEVWRITE(GAL_AUDIO, galaxian_pitch_w)
AM_RANGE(0x1800, 0x1bff) AM_MIRROR(0x6000) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
AM_RANGE(0x1c00, 0x1fff) AM_MIRROR(0x6000) AM_RAM
AM_RANGE(0x2000, 0x2fff) AM_ROM
@ -726,7 +726,7 @@ static ADDRESS_MAP_START( harem_cpu1, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x4000, 0x47ff) AM_RAM
AM_RANGE(0x4800, 0x4fff) AM_READWRITE(galaxold_videoram_r, galaxold_videoram_w) AM_BASE(&galaxold_videoram)
AM_RANGE(0x5000, 0x5000) AM_WRITENOP
AM_RANGE(0x5800, 0x5800) AM_READWRITE(SMH_NOP, interrupt_enable_w)
AM_RANGE(0x5800, 0x5800) AM_READNOP AM_WRITE(interrupt_enable_w)
AM_RANGE(0x5801, 0x5807) AM_WRITENOP
AM_RANGE(0x6101, 0x6101) AM_READ_PORT("IN0")
AM_RANGE(0x6102, 0x6102) AM_READ_PORT("IN1")

2
src/mame/drivers/galivan.c
View File

@ -1030,7 +1030,7 @@ static DRIVER_INIT( youmab )
memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x81, 0x81, 0, 0, youmab_81_w); // ?? often, alternating values
memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x84, 0x84, 0, 0, youmab_84_w); // ?? often, sequence..
memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd800, 0xd81f, 0, 0, (write8_space_func)SMH_NOP); // scrolling isn't here..
memory_nop_write(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd800, 0xd81f, 0, 0); // scrolling isn't here..
memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x8a, 0x8a, 0, 0, youmab_8a_r); // ???

4
src/mame/drivers/galpani2.c
View File

@ -363,14 +363,14 @@ static ADDRESS_MAP_START( galpani2_mem2, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x100000, 0x13ffff) AM_RAM AM_BASE(&galpani2_ram2) // Work RAM
AM_RANGE(0x400000, 0x4fffff) AM_RAM_WRITE(galpani2_bg15_w) AM_BASE(&galpani2_bg15) // bg15
AM_RANGE(0x500000, 0x5fffff) AM_RAM // bg15
AM_RANGE(0x600000, 0x600001) AM_READWRITE(SMH_NOP, SMH_NOP ) // ? 0 at startup only
AM_RANGE(0x600000, 0x600001) AM_NOP // ? 0 at startup only
AM_RANGE(0x640000, 0x640001) AM_WRITENOP // ? 0 at startup only
AM_RANGE(0x680000, 0x680001) AM_WRITENOP // ? 0 at startup only
AM_RANGE(0x6c0000, 0x6c0001) AM_WRITENOP // ? 0 at startup only
AM_RANGE(0x700000, 0x700001) AM_WRITENOP // Watchdog
// AM_RANGE(0x740000, 0x740001) AM_WRITENOP // ? Reset mcu
AM_RANGE(0x780000, 0x780001) AM_WRITE8(galpani2_mcu_nmi2_w, 0x00ff) // ? 0 -> 1 -> 0 (lev 5)
AM_RANGE(0x7c0000, 0x7c0001) AM_WRITE(SMH_RAM) AM_BASE(&galpani2_rombank ) // Rom Bank
AM_RANGE(0x7c0000, 0x7c0001) AM_WRITEONLY AM_BASE(&galpani2_rombank ) // Rom Bank
AM_RANGE(0x800000, 0xffffff) AM_READ(galpani2_bankedrom_r ) // Banked ROM
ADDRESS_MAP_END

8
src/mame/drivers/galpani3.c
View File

@ -820,7 +820,7 @@ static ADDRESS_MAP_START( galpani3_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x17ffff) AM_ROM
AM_RANGE(0x200000, 0x20ffff) AM_RAM // area [B] - Work RAM
AM_RANGE(0x280000, 0x287fff) AM_RAM AM_WRITE(paletteram16_xGGGGGRRRRRBBBBB_word_w) AM_BASE_GENERIC(paletteram) // area [A] - palette for sprites
AM_RANGE(0x280000, 0x287fff) AM_RAM_WRITE(paletteram16_xGGGGGRRRRRBBBBB_word_w) AM_BASE_GENERIC(paletteram) // area [A] - palette for sprites
AM_RANGE(0x300000, 0x303fff) AM_RAM_WRITE(galpani3_suprnova_sprite32_w) AM_BASE(&galpani3_spriteram)
AM_RANGE(0x380000, 0x38003f) AM_RAM_WRITE(galpani3_suprnova_sprite32regs_w) AM_BASE(&galpani3_sprregs)
@ -845,7 +845,7 @@ static ADDRESS_MAP_START( galpani3_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x800c18, 0x800c1b) AM_WRITE(galpani3_regs1_address_w) // ROM address of RLE data, in bytes
AM_RANGE(0x800c1e, 0x800c1f) AM_WRITE(galpani3_regs1_go_w) // ?
AM_RANGE(0x800c00, 0x800c1f) AM_READ(galpani3_regs1_r)// ? R layer regs ? see subroutine $3a03e
AM_RANGE(0x880000, 0x8801ff) AM_RAM AM_WRITE(galpani3_framebuffer1_palette_w) AM_BASE(&galpani3_framebuffer1_palette) // palette
AM_RANGE(0x880000, 0x8801ff) AM_RAM_WRITE(galpani3_framebuffer1_palette_w) AM_BASE(&galpani3_framebuffer1_palette) // palette
AM_RANGE(0x900000, 0x97ffff) AM_RAM AM_BASE(&galpani3_framebuffer1)// area [D] - R area ? odd bytes only, initialized 00..ff,00..ff,...
// GRAP2 2?
@ -860,7 +860,7 @@ static ADDRESS_MAP_START( galpani3_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xa00c00, 0xa00c1f) AM_READ(galpani3_regs2_r) // ? G layer regs ? see subroutine $3a03e
AM_RANGE(0xa00c18, 0xa00c1b) AM_WRITE(galpani3_regs2_address_w) // ROM address of RLE data, in bytes
AM_RANGE(0xa00c1e, 0xa00c1f) AM_WRITE(galpani3_regs2_go_w) // ?
AM_RANGE(0xa80000, 0xa801ff) AM_RAM AM_WRITE(galpani3_framebuffer2_palette_w) AM_BASE(&galpani3_framebuffer2_palette) // palette
AM_RANGE(0xa80000, 0xa801ff) AM_RAM_WRITE(galpani3_framebuffer2_palette_w) AM_BASE(&galpani3_framebuffer2_palette) // palette
AM_RANGE(0xb00000, 0xb7ffff) AM_RAM AM_BASE(&galpani3_framebuffer2) // area [E] - G area ? odd bytes only, initialized 00..ff,00..ff,...
// GRAP2 3?
@ -875,7 +875,7 @@ static ADDRESS_MAP_START( galpani3_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xc00c18, 0xc00c1b) AM_WRITE(galpani3_regs3_address_w) // ROM address of RLE data, in bytes
AM_RANGE(0xc00c1e, 0xc00c1f) AM_WRITE(galpani3_regs3_go_w) // ?
AM_RANGE(0xc00c00, 0xc00c1f) AM_READ(galpani3_regs3_r) // ? B layer regs ? see subroutine $3a03e
AM_RANGE(0xc80000, 0xc801ff) AM_RAM AM_WRITE(galpani3_framebuffer3_palette_w) AM_BASE(&galpani3_framebuffer3_palette) // palette
AM_RANGE(0xc80000, 0xc801ff) AM_RAM_WRITE(galpani3_framebuffer3_palette_w) AM_BASE(&galpani3_framebuffer3_palette) // palette
AM_RANGE(0xd00000, 0xd7ffff) AM_RAM AM_BASE(&galpani3_framebuffer3) // area [F] - B area ? odd bytes only, initialized 00..ff,00..ff,...
// ?? priority / alpha buffer?

4
src/mame/drivers/galspnbl.c
View File

@ -59,7 +59,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xa80020, 0xa80021) AM_READ_PORT("SYSTEM") AM_WRITENOP /* w - could be watchdog, but causes resets when picture is shown */
AM_RANGE(0xa80030, 0xa80031) AM_READ_PORT("DSW1") AM_WRITENOP /* w - irq ack? */
AM_RANGE(0xa80040, 0xa80041) AM_READ_PORT("DSW2")
AM_RANGE(0xa80050, 0xa80051) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(galspnbl_state, scroll) /* ??? */
AM_RANGE(0xa80050, 0xa80051) AM_WRITEONLY AM_BASE_MEMBER(galspnbl_state, scroll) /* ??? */
ADDRESS_MAP_END
static ADDRESS_MAP_START( audio_map, ADDRESS_SPACE_PROGRAM, 8 )
@ -67,7 +67,7 @@ static ADDRESS_MAP_START( audio_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xf000, 0xf7ff) AM_RAM
AM_RANGE(0xf800, 0xf800) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
AM_RANGE(0xf810, 0xf811) AM_DEVWRITE("ymsnd", ym3812_w)
AM_RANGE(0xfc00, 0xfc00) AM_READWRITE(SMH_NOP, SMH_NOP) /* irq ack ?? */
AM_RANGE(0xfc00, 0xfc00) AM_NOP /* irq ack ?? */
AM_RANGE(0xfc20, 0xfc20) AM_READ(soundlatch_r)
ADDRESS_MAP_END

2
src/mame/drivers/ginganin.c
View File

@ -147,7 +147,7 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1800, 0x1800) AM_READ(soundlatch_r)
AM_RANGE(0x2000, 0x2001) AM_DEVWRITE("ymsnd", y8950_w)
AM_RANGE(0x2800, 0x2801) AM_DEVWRITE("aysnd", ay8910_address_data_w)
AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
AM_RANGE(0x4000, 0xffff) AM_ROM
ADDRESS_MAP_END

2
src/mame/drivers/glass.c
View File

@ -96,7 +96,7 @@ static ADDRESS_MAP_START( glass_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_ROM /* ROM */
AM_RANGE(0x100000, 0x101fff) AM_RAM_WRITE(glass_vram_w) AM_BASE(&glass_videoram) /* Video RAM */
AM_RANGE(0x102000, 0x102fff) AM_RAM /* Extra Video RAM */
AM_RANGE(0x108000, 0x108007) AM_WRITE(SMH_RAM) AM_BASE(&glass_vregs) /* Video Registers */
AM_RANGE(0x108000, 0x108007) AM_WRITEONLY AM_BASE(&glass_vregs) /* Video Registers */
AM_RANGE(0x108008, 0x108009) AM_WRITE(clr_int_w) /* CLR INT Video */
AM_RANGE(0x200000, 0x2007ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram) /* Palette */
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&glass_spriteram) /* Sprite RAM */

4
src/mame/drivers/goindol.c
View File

@ -95,9 +95,9 @@ static ADDRESS_MAP_START( goindol_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc800, 0xc800) AM_READNOP AM_WRITE(soundlatch_w) // watchdog?
AM_RANGE(0xc810, 0xc810) AM_WRITE(goindol_bankswitch_w)
AM_RANGE(0xc820, 0xc820) AM_READ_PORT("DIAL")
AM_RANGE(0xc820, 0xd820) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(goindol_state, fg_scrolly)
AM_RANGE(0xc820, 0xd820) AM_WRITEONLY AM_BASE_MEMBER(goindol_state, fg_scrolly)
AM_RANGE(0xc830, 0xc830) AM_READ_PORT("P1")
AM_RANGE(0xc830, 0xd830) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(goindol_state, fg_scrollx)
AM_RANGE(0xc830, 0xd830) AM_WRITEONLY AM_BASE_MEMBER(goindol_state, fg_scrollx)
AM_RANGE(0xc834, 0xc834) AM_READ_PORT("P2")
AM_RANGE(0xd000, 0xd03f) AM_RAM AM_BASE_SIZE_MEMBER(goindol_state, spriteram, spriteram_size)
AM_RANGE(0xd040, 0xd7ff) AM_RAM

96
src/mame/drivers/goldstar.c
View File

@ -168,11 +168,11 @@ static ADDRESS_MAP_START( goldstar_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xb7ff) AM_ROM
AM_RANGE(0xb800, 0xbfff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
AM_RANGE(0xc000, 0xc7ff) AM_ROM
AM_RANGE(0xc800, 0xcfff) AM_RAM AM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0xd800, 0xd9ff) AM_RAM AM_WRITE( goldstar_reel1_ram_w ) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xe000, 0xe1ff) AM_RAM AM_WRITE( goldstar_reel2_ram_w ) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xe800, 0xe9ff) AM_RAM AM_WRITE( goldstar_reel3_ram_w ) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0xd800, 0xd9ff) AM_RAM_WRITE( goldstar_reel1_ram_w ) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xe000, 0xe1ff) AM_RAM_WRITE( goldstar_reel2_ram_w ) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xe800, 0xe9ff) AM_RAM_WRITE( goldstar_reel3_ram_w ) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0xf040, 0xf07f) AM_RAM AM_BASE(&goldstar_reel1_scroll)
AM_RANGE(0xf080, 0xf0bf) AM_RAM AM_BASE(&goldstar_reel2_scroll)
AM_RANGE(0xf0c0, 0xf0ff) AM_RAM AM_BASE(&goldstar_reel3_scroll)
@ -191,7 +191,7 @@ static ADDRESS_MAP_START( goldstar_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xf840, 0xf840) AM_DEVWRITE("aysnd", ay8910_address_w)
AM_RANGE(0xfa00, 0xfa00) AM_WRITE(goldstar_fa00_w)
AM_RANGE(0xfb00, 0xfb00) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
AM_RANGE(0xfd00, 0xfdff) AM_READWRITE(SMH_RAM,paletteram_BBGGGRRR_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0xfd00, 0xfdff) AM_RAM_WRITE(paletteram_BBGGGRRR_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0xfe00, 0xfe00) AM_READWRITE(protection_r,protection_w)
ADDRESS_MAP_END
@ -211,11 +211,11 @@ static ADDRESS_MAP_START( ncb3_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xb7ff) AM_ROM
AM_RANGE(0xb800, 0xbfff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
AM_RANGE(0xc000, 0xc7ff) AM_ROM
AM_RANGE(0xc800, 0xcfff) AM_RAM AM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0xd800, 0xd9ff) AM_RAM AM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xe000, 0xe1ff) AM_RAM AM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xe800, 0xe9ff) AM_RAM AM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0xd800, 0xd9ff) AM_RAM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xe000, 0xe1ff) AM_RAM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xe800, 0xe9ff) AM_RAM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0xf040, 0xf07f) AM_RAM AM_BASE(&goldstar_reel1_scroll)
AM_RANGE(0xf080, 0xf0bf) AM_RAM AM_BASE(&goldstar_reel2_scroll)
AM_RANGE(0xf100, 0xf17f) AM_RAM AM_BASE(&goldstar_reel3_scroll) // moved compared to goldstar
@ -285,12 +285,12 @@ static ADDRESS_MAP_START( cm_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0xe800, 0xefff) AM_RAM AM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0xf000, 0xf1ff) AM_RAM AM_WRITE( goldstar_reel1_ram_w ) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xf200, 0xf3ff) AM_RAM AM_WRITE( goldstar_reel2_ram_w ) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xf400, 0xf5ff) AM_RAM AM_WRITE( goldstar_reel3_ram_w ) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0xf000, 0xf1ff) AM_RAM_WRITE( goldstar_reel1_ram_w ) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xf200, 0xf3ff) AM_RAM_WRITE( goldstar_reel2_ram_w ) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xf400, 0xf5ff) AM_RAM_WRITE( goldstar_reel3_ram_w ) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0xf600, 0xf7ff) AM_RAM
AM_RANGE(0xf800, 0xf87f) AM_RAM AM_BASE(&goldstar_reel1_scroll)
@ -307,12 +307,12 @@ static ADDRESS_MAP_START( nfm_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xd800, 0xdfff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0xe800, 0xefff) AM_RAM AM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0xf000, 0xf1ff) AM_RAM AM_WRITE( goldstar_reel1_ram_w ) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xf200, 0xf3ff) AM_RAM AM_WRITE( goldstar_reel2_ram_w ) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xf400, 0xf5ff) AM_RAM AM_WRITE( goldstar_reel3_ram_w ) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0xf000, 0xf1ff) AM_RAM_WRITE( goldstar_reel1_ram_w ) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xf200, 0xf3ff) AM_RAM_WRITE( goldstar_reel2_ram_w ) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xf400, 0xf5ff) AM_RAM_WRITE( goldstar_reel3_ram_w ) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0xf600, 0xf7ff) AM_RAM
AM_RANGE(0xf800, 0xf87f) AM_RAM AM_BASE(&goldstar_reel1_scroll)
@ -381,11 +381,11 @@ static WRITE8_HANDLER( lucky8_outport_w )
static ADDRESS_MAP_START( lucky8_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
AM_RANGE(0x8800, 0x8fff) AM_RAM AM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0x9000, 0x97ff) AM_RAM AM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0x9800, 0x99ff) AM_RAM AM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xa000, 0xa1ff) AM_RAM AM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xa800, 0xa9ff) AM_RAM AM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0x9800, 0x99ff) AM_RAM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xa000, 0xa1ff) AM_RAM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xa800, 0xa9ff) AM_RAM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0xb040, 0xb07f) AM_RAM AM_BASE(&goldstar_reel1_scroll)
AM_RANGE(0xb080, 0xb0bf) AM_RAM AM_BASE(&goldstar_reel2_scroll)
AM_RANGE(0xb100, 0xb17f) AM_RAM AM_BASE(&goldstar_reel3_scroll)
@ -403,11 +403,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( kkojnoli_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x87ff) AM_RAM /* definitelly no NVRAM */
AM_RANGE(0x8800, 0x8fff) AM_RAM AM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0x9000, 0x97ff) AM_RAM AM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0x9800, 0x99ff) AM_RAM AM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xa000, 0xa1ff) AM_RAM AM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xa800, 0xa9ff) AM_RAM AM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0x9800, 0x99ff) AM_RAM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xa000, 0xa1ff) AM_RAM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xa800, 0xa9ff) AM_RAM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0xb040, 0xb07f) AM_RAM AM_BASE(&goldstar_reel1_scroll)
AM_RANGE(0xb080, 0xb0bf) AM_RAM AM_BASE(&goldstar_reel2_scroll)
AM_RANGE(0xb100, 0xb17f) AM_RAM AM_BASE(&goldstar_reel3_scroll)
@ -442,11 +442,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( ladylinr_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
AM_RANGE(0x8800, 0x8fff) AM_RAM AM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0x9000, 0x97ff) AM_RAM AM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0x9800, 0x99ff) AM_RAM AM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xa000, 0xa1ff) AM_RAM AM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xa800, 0xa9ff) AM_RAM AM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0x9800, 0x99ff) AM_RAM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xa000, 0xa1ff) AM_RAM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xa800, 0xa9ff) AM_RAM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0xb040, 0xb07f) AM_RAM AM_BASE(&goldstar_reel1_scroll)
AM_RANGE(0xb080, 0xb0bf) AM_RAM AM_BASE(&goldstar_reel2_scroll)
AM_RANGE(0xb100, 0xb17f) AM_RAM AM_BASE(&goldstar_reel3_scroll)
@ -463,11 +463,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( wcat3_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
AM_RANGE(0x8800, 0x8fff) AM_RAM AM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0x9000, 0x97ff) AM_RAM AM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0x9800, 0x99ff) AM_RAM AM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xa000, 0xa1ff) AM_RAM AM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xa800, 0xa9ff) AM_RAM AM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0x9800, 0x99ff) AM_RAM_WRITE(goldstar_reel1_ram_w) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xa000, 0xa1ff) AM_RAM_WRITE(goldstar_reel2_ram_w) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xa800, 0xa9ff) AM_RAM_WRITE(goldstar_reel3_ram_w) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0xb040, 0xb07f) AM_RAM AM_BASE(&goldstar_reel1_scroll)
AM_RANGE(0xb080, 0xb0bf) AM_RAM AM_BASE(&goldstar_reel2_scroll)
AM_RANGE(0xb100, 0xb17f) AM_RAM AM_BASE(&goldstar_reel3_scroll)
@ -493,19 +493,19 @@ static READ8_HANDLER( unkch_unk_r )
// scrolling is wrong / different
static ADDRESS_MAP_START( unkch_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x9fff) AM_ROM
AM_RANGE(0xc000, 0xc1ff) AM_READWRITE(SMH_RAM,paletteram_xBBBBBGGGGGRRRRR_split1_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0xc800, 0xc9ff) AM_READWRITE(SMH_RAM,paletteram_xBBBBBGGGGGRRRRR_split2_w) AM_BASE_GENERIC(paletteram2)
AM_RANGE(0xc000, 0xc1ff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_split1_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0xc800, 0xc9ff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_split2_w) AM_BASE_GENERIC(paletteram2)
AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
AM_RANGE(0xd800, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0xe800, 0xefff) AM_RAM AM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_BASE_GENERIC(videoram)
AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_BASE_GENERIC(colorram)
AM_RANGE(0xf000, 0xf1ff) AM_RAM AM_WRITE( goldstar_reel1_ram_w ) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xf200, 0xf3ff) AM_RAM AM_WRITE( goldstar_reel2_ram_w ) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xf400, 0xf5ff) AM_RAM AM_WRITE( goldstar_reel3_ram_w ) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0xf000, 0xf1ff) AM_RAM_WRITE( goldstar_reel1_ram_w ) AM_BASE(&goldstar_reel1_ram)
AM_RANGE(0xf200, 0xf3ff) AM_RAM_WRITE( goldstar_reel2_ram_w ) AM_BASE(&goldstar_reel2_ram)
AM_RANGE(0xf400, 0xf5ff) AM_RAM_WRITE( goldstar_reel3_ram_w ) AM_BASE(&goldstar_reel3_ram)
AM_RANGE(0xf600, 0xf7ff) AM_RAM
AM_RANGE(0xf800, 0xf87f) AM_RAM AM_BASE(&goldstar_reel1_scroll)

2
src/mame/drivers/gotya.c
View File

@ -47,7 +47,7 @@ static ADDRESS_MAP_START( gotya_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6002, 0x6002) AM_READ_PORT("DSW")
AM_RANGE(0x6004, 0x6004) AM_WRITE(gotya_video_control_w)
AM_RANGE(0x6005, 0x6005) AM_WRITE(gotya_soundlatch_w)
AM_RANGE(0x6006, 0x6006) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(gotya_state, scroll)
AM_RANGE(0x6006, 0x6006) AM_WRITEONLY AM_BASE_MEMBER(gotya_state, scroll)
AM_RANGE(0x6007, 0x6007) AM_WRITE(watchdog_reset_w)
AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(gotya_videoram_w) AM_BASE_MEMBER(gotya_state, videoram)
AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(gotya_colorram_w) AM_BASE_MEMBER(gotya_state, colorram)

2
src/mame/drivers/gyruss.c
View File

@ -157,7 +157,7 @@ static ADDRESS_MAP_START( main_cpu1_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc0e0, 0xc0e0) AM_READ_PORT("DSW1")
AM_RANGE(0xc100, 0xc100) AM_READ_PORT("DSW3") AM_WRITE(soundlatch_w)
AM_RANGE(0xc180, 0xc180) AM_WRITE(interrupt_enable_w)
AM_RANGE(0xc185, 0xc185) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(gyruss_state, flipscreen)
AM_RANGE(0xc185, 0xc185) AM_WRITEONLY AM_BASE_MEMBER(gyruss_state, flipscreen)
ADDRESS_MAP_END
static ADDRESS_MAP_START( main_cpu2_map, ADDRESS_SPACE_PROGRAM, 8 )

2
src/mame/drivers/higemaru.c
View File

@ -38,7 +38,7 @@ static ADDRESS_MAP_START( higemaru_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xc803, 0xc804) AM_DEVWRITE("ay2", ay8910_address_data_w)
AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(higemaru_videoram_w) AM_BASE_MEMBER(higemaru_state, videoram)
AM_RANGE(0xd400, 0xd7ff) AM_RAM_WRITE(higemaru_colorram_w) AM_BASE_MEMBER(higemaru_state, colorram)
AM_RANGE(0xd880, 0xd9ff) AM_RAM_WRITE(SMH_RAM) AM_BASE_SIZE_MEMBER(higemaru_state, spriteram, spriteram_size)
AM_RANGE(0xd880, 0xd9ff) AM_RAM AM_BASE_SIZE_MEMBER(higemaru_state, spriteram, spriteram_size)
AM_RANGE(0xe000, 0xefff) AM_RAM
ADDRESS_MAP_END

4
src/mame/drivers/himesiki.c
View File

@ -111,8 +111,8 @@ static ADDRESS_MAP_START( himesiki_prm0, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x9fff) AM_RAM
AM_RANGE(0xa000, 0xa7ff) AM_RAM AM_BASE_MEMBER(himesiki_state, spriteram)
AM_RANGE(0xa800, 0xafff) AM_RAM AM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0xb000, 0xbfff) AM_RAM AM_WRITE(himesiki_bg_ram_w) AM_BASE_MEMBER(himesiki_state, bg_ram)
AM_RANGE(0xa800, 0xafff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0xb000, 0xbfff) AM_RAM_WRITE(himesiki_bg_ram_w) AM_BASE_MEMBER(himesiki_state, bg_ram)
AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bank1")
ADDRESS_MAP_END

2
src/mame/drivers/homedata.c
View File

@ -606,7 +606,7 @@ static ADDRESS_MAP_START( reikaids_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x7801, 0x7801) AM_READ_PORT("IN0")
AM_RANGE(0x7802, 0x7802) AM_READ_PORT("IN1")
AM_RANGE(0x7803, 0x7803) AM_READ(reikaids_io_r) // coin, blitter, upd7807
AM_RANGE(0x7ff0, 0x7ffd) AM_WRITE(SMH_RAM) AM_BASE(&homedata_vreg)
AM_RANGE(0x7ff0, 0x7ffd) AM_WRITEONLY AM_BASE(&homedata_vreg)
AM_RANGE(0x7ffe, 0x7ffe) AM_WRITE(reikaids_blitter_bank_w)
AM_RANGE(0x7fff, 0x7fff) AM_WRITE(reikaids_blitter_start_w)
AM_RANGE(0x8000, 0x8000) AM_WRITE(bankswitch_w)

2
src/mame/drivers/hshavoc.c
View File

@ -220,7 +220,7 @@ static DRIVER_INIT(hshavoc)
{
const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
memory_install_write16_handler(space, 0x200000, 0x201fff, 0, 0, (write16_space_func) SMH_NOP);
memory_nop_write(space, 0x200000, 0x201fff, 0, 0);
}
DRIVER_INIT_CALL(megadriv);

2
src/mame/drivers/hyhoo.c
View File

@ -70,7 +70,7 @@ static ADDRESS_MAP_START( hyhoo_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x90, 0x97) AM_WRITE(hyhoo_blitter_w)
AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r, nb1413m3_inputportsel_w)
AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r, nb1413m3_sndrombank1_w)
AM_RANGE(0xc0, 0xcf) AM_WRITE(SMH_RAM) AM_BASE(&hyhoo_clut)
AM_RANGE(0xc0, 0xcf) AM_WRITEONLY AM_BASE(&hyhoo_clut)
AM_RANGE(0xd0, 0xd0) AM_READNOP AM_DEVWRITE("dac", DAC_WRITE) // unknown read
AM_RANGE(0xe0, 0xe0) AM_WRITE(hyhoo_romsel_w)
AM_RANGE(0xe0, 0xe1) AM_READ(nb1413m3_gfxrom_r)

8
src/mame/drivers/hyprduel.c
View File

@ -432,7 +432,7 @@ static ADDRESS_MAP_START( hyprduel_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x420000, 0x43ffff) AM_RAM_WRITE(hyprduel_vram_1_w) AM_BASE(&hyprduel_vram_1) /* Layer 1 */
AM_RANGE(0x440000, 0x45ffff) AM_RAM_WRITE(hyprduel_vram_2_w) AM_BASE(&hyprduel_vram_2) /* Layer 2 */
AM_RANGE(0x460000, 0x46ffff) AM_READ(hyprduel_bankedrom_r) /* Banked ROM */
AM_RANGE(0x470000, 0x473fff) AM_RAM AM_WRITE(hyprduel_paletteram_w) AM_BASE_GENERIC(paletteram) /* Palette */
AM_RANGE(0x470000, 0x473fff) AM_RAM_WRITE(hyprduel_paletteram_w) AM_BASE_GENERIC(paletteram) /* Palette */
AM_RANGE(0x474000, 0x474fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) /* Sprites */
AM_RANGE(0x475000, 0x477fff) AM_RAM /* only used memory test */
AM_RANGE(0x478000, 0x4787ff) AM_RAM AM_BASE(&hyprduel_tiletable) AM_SIZE(&hyprduel_tiletable_size) /* Tiles Set */
@ -460,7 +460,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( hyprduel_map2, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x003fff) AM_RAM AM_SHARE(1) /* shadow ($c00000 - $c03fff : vector) */
AM_RANGE(0x004000, 0x007fff) AM_RAM AM_WRITENOP AM_SHARE(3) /* shadow ($fe4000 - $fe7fff : read only) */
AM_RANGE(0x004000, 0x007fff) AM_READONLY AM_WRITENOP AM_SHARE(3) /* shadow ($fe4000 - $fe7fff : read only) */
AM_RANGE(0x400000, 0x400003) AM_DEVREADWRITE8("ymsnd", ym2151_r, ym2151_w, 0x00ff )
AM_RANGE(0x400004, 0x400005) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)
AM_RANGE(0x800000, 0x800001) AM_NOP
@ -479,7 +479,7 @@ static ADDRESS_MAP_START( magerror_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x820000, 0x83ffff) AM_RAM_WRITE(hyprduel_vram_1_w) AM_BASE(&hyprduel_vram_1) /* Layer 1 */
AM_RANGE(0x840000, 0x85ffff) AM_RAM_WRITE(hyprduel_vram_2_w) AM_BASE(&hyprduel_vram_2) /* Layer 2 */
AM_RANGE(0x860000, 0x86ffff) AM_READ(hyprduel_bankedrom_r) /* Banked ROM */
AM_RANGE(0x870000, 0x873fff) AM_RAM AM_WRITE(hyprduel_paletteram_w) AM_BASE_GENERIC(paletteram) /* Palette */
AM_RANGE(0x870000, 0x873fff) AM_RAM_WRITE(hyprduel_paletteram_w) AM_BASE_GENERIC(paletteram) /* Palette */
AM_RANGE(0x874000, 0x874fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) /* Sprites */
AM_RANGE(0x875000, 0x877fff) AM_RAM /* only used memory test */
AM_RANGE(0x878000, 0x8787ff) AM_RAM AM_BASE(&hyprduel_tiletable) AM_SIZE(&hyprduel_tiletable_size) /* Tiles Set */
@ -506,7 +506,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( magerror_map2, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x003fff) AM_RAM AM_SHARE(1) /* shadow ($c00000 - $c03fff : vector) */
AM_RANGE(0x004000, 0x007fff) AM_RAM AM_WRITENOP AM_SHARE(3) /* shadow ($fe4000 - $fe7fff : read only) */
AM_RANGE(0x004000, 0x007fff) AM_READONLY AM_WRITENOP AM_SHARE(3) /* shadow ($fe4000 - $fe7fff : read only) */
AM_RANGE(0x400000, 0x400003) AM_NOP
AM_RANGE(0x800000, 0x800003) AM_READNOP AM_DEVWRITE8("ymsnd", ym2413_w, 0x00ff)
AM_RANGE(0x800004, 0x800005) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)

2
src/mame/drivers/igs017.c
View File

@ -1094,7 +1094,7 @@ static ADDRESS_MAP_START( iqblocka_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE( 0x0000, 0x003f ) AM_RAM // internal regs
AM_RANGE( 0x1000, 0x17ff ) AM_RAM AM_BASE_GENERIC( spriteram )
AM_RANGE( 0x1800, 0x1bff ) AM_READWRITE( SMH_RAM, paletteram_xRRRRRGGGGGBBBBB_le_w ) AM_BASE_GENERIC(paletteram)
AM_RANGE( 0x1800, 0x1bff ) AM_RAM_WRITE( paletteram_xRRRRRGGGGGBBBBB_le_w ) AM_BASE_GENERIC(paletteram)
AM_RANGE( 0x1c00, 0x1fff ) AM_RAM
// AM_RANGE(0x200a, 0x200a) AM_WRITENOP

2
src/mame/drivers/ikki.c
View File

@ -55,7 +55,7 @@ static ADDRESS_MAP_START( ikki_cpu1, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xe005, 0xe005) AM_READ_PORT("P2")
AM_RANGE(0xe008, 0xe008) AM_WRITE(ikki_scrn_ctrl_w)
AM_RANGE(0xe009, 0xe009) AM_WRITE(ikki_coin_counters)
AM_RANGE(0xe00a, 0xe00b) AM_WRITE(SMH_RAM) AM_BASE(&ikki_scroll)
AM_RANGE(0xe00a, 0xe00b) AM_WRITEONLY AM_BASE(&ikki_scroll)
ADDRESS_MAP_END
static ADDRESS_MAP_START( ikki_cpu2, ADDRESS_SPACE_PROGRAM, 8 )

14
src/mame/drivers/imolagp.c
View File

@ -321,8 +321,8 @@ static ADDRESS_MAP_START( readport_master, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( imolagp_master, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
AM_RANGE(0x2000, 0x23ff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x2000, 0x23ff) AM_RAM
AM_RANGE(0x2800, 0x2800) AM_READ_PORT("2800") /* gas */
AM_RANGE(0x2802, 0x2802) AM_READ(steerlatch_r) AM_WRITENOP
/* AM_RANGE(0x2803, 0x2803) ? */
@ -346,11 +346,11 @@ static ADDRESS_MAP_START( readport_slave, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_END
static ADDRESS_MAP_START( imolagp_slave, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x03ff) AM_READ(SMH_ROM)
AM_RANGE(0x0800, 0x0bff) AM_READ(SMH_ROM)
AM_RANGE(0x1000, 0x13ff) AM_READ(SMH_ROM)
AM_RANGE(0x1c00, 0x3fff) AM_READ(SMH_ROM)
AM_RANGE(0x4000, 0x43ff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&slave_workram)
AM_RANGE(0x0000, 0x03ff) AM_ROM
AM_RANGE(0x0800, 0x0bff) AM_ROM
AM_RANGE(0x1000, 0x13ff) AM_ROM
AM_RANGE(0x1c00, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x43ff) AM_RAM AM_BASE(&slave_workram)
AM_RANGE(0x9fff, 0xa000) AM_READ(receive_data_r)
AM_RANGE(0xc000, 0xffff) AM_WRITE(screenram_w)
ADDRESS_MAP_END

2
src/mame/drivers/inufuku.c
View File

@ -183,7 +183,7 @@ static ADDRESS_MAP_START( inufuku_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x280000, 0x280001) AM_WRITE(inufuku_soundcommand_w) // sound command
AM_RANGE(0x300000, 0x301fff) AM_RAM_WRITE(paletteram16_xGGGGGBBBBBRRRRR_word_w) AM_BASE_GENERIC(paletteram) // palette ram
AM_RANGE(0x380000, 0x3801ff) AM_WRITE(SMH_RAM) AM_BASE(&inufuku_bg_rasterram) // bg raster ram
AM_RANGE(0x380000, 0x3801ff) AM_WRITEONLY AM_BASE(&inufuku_bg_rasterram) // bg raster ram
AM_RANGE(0x400000, 0x401fff) AM_READWRITE(inufuku_bg_videoram_r, inufuku_bg_videoram_w) AM_BASE(&inufuku_bg_videoram) // bg ram
AM_RANGE(0x402000, 0x403fff) AM_READWRITE(inufuku_text_videoram_r, inufuku_text_videoram_w) AM_BASE(&inufuku_text_videoram) // text ram
AM_RANGE(0x580000, 0x580fff) AM_RAM AM_BASE(&inufuku_spriteram1) AM_SIZE(&inufuku_spriteram1_size) // sprite table + sprite attribute

2
src/mame/drivers/irobot.c
View File

@ -134,7 +134,7 @@ static ADDRESS_MAP_START( irobot_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1300, 0x13ff) AM_READ(irobot_control_r)
AM_RANGE(0x1400, 0x143f) AM_READWRITE(quad_pokey_r, quad_pokey_w)
AM_RANGE(0x1800, 0x18ff) AM_WRITE(irobot_paletteram_w)
AM_RANGE(0x1900, 0x19ff) AM_WRITE(SMH_RAM) /* Watchdog reset */
AM_RANGE(0x1900, 0x19ff) AM_WRITEONLY /* Watchdog reset */
AM_RANGE(0x1a00, 0x1a00) AM_WRITE(irobot_clearfirq_w)
AM_RANGE(0x1b00, 0x1bff) AM_WRITE(irobot_control_w)
AM_RANGE(0x1c00, 0x1fff) AM_RAM AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram)

13
src/mame/drivers/itech32.c
View File

@ -1039,7 +1039,7 @@ AM_RANGE(0x000c00, 0x007fff) AM_MIRROR(0x40000) AM_READWRITE(test2_r, test2_w)
AM_RANGE(0x084000, 0x084003) AM_READWRITE(sound_data32_r, sound_data32_w)
// AM_RANGE(0x086000, 0x08623f) AM_RAM -- networking -- first 0x40 bytes = our data, next 0x40*8 bytes = their data, r/w on IRQ2
AM_RANGE(0x088000, 0x088003) AM_READ(drivedge_steering_r)
AM_RANGE(0x08a000, 0x08a003) AM_READWRITE(drivedge_gas_r, SMH_NOP)
AM_RANGE(0x08a000, 0x08a003) AM_READ(drivedge_gas_r) AM_WRITENOP
AM_RANGE(0x08c000, 0x08c003) AM_READ_PORT("8c000")
AM_RANGE(0x08e000, 0x08e003) AM_READ_PORT("8e000") AM_WRITENOP
AM_RANGE(0x100000, 0x10000f) AM_WRITE(drivedge_zbuf_control_w) AM_BASE(&drivedge_zbuf_control)
@ -1085,8 +1085,8 @@ static ADDRESS_MAP_START( itech020_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x580000, 0x59ffff) AM_RAM_WRITE(itech020_paletteram_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0x600000, 0x603fff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
/* ? */ AM_RANGE(0x61ff00, 0x61ffff) AM_WRITENOP /* Unknown Writes */
AM_RANGE(0x680000, 0x680003) AM_READWRITE(itech020_prot_result_r, SMH_NOP)
/* ! */ AM_RANGE(0x680800, 0x68083f) AM_RAM_WRITE(SMH_NOP) /* Serial DUART Channel A/B & Top LED sign - To Do! */
AM_RANGE(0x680000, 0x680003) AM_READ(itech020_prot_result_r) AM_WRITENOP
/* ! */ AM_RANGE(0x680800, 0x68083f) AM_READONLY AM_WRITENOP /* Serial DUART Channel A/B & Top LED sign - To Do! */
AM_RANGE(0x700000, 0x700003) AM_WRITE(itech020_plane_w)
AM_RANGE(0x800000, 0xbfffff) AM_ROM AM_REGION("user1", 0) AM_BASE((UINT32 **)&main_rom)
ADDRESS_MAP_END
@ -1119,7 +1119,7 @@ static ADDRESS_MAP_START( sound_020_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0800, 0x083f) AM_MIRROR(0x80) AM_DEVREADWRITE("ensoniq", es5506_r, es5506_w)
AM_RANGE(0x0c00, 0x0c00) AM_WRITE(sound_bank_w)
AM_RANGE(0x1400, 0x1400) AM_WRITE(firq_clear_w)
AM_RANGE(0x1800, 0x1800) AM_READWRITE(sound_data_buffer_r, SMH_NOP)
AM_RANGE(0x1800, 0x1800) AM_READ(sound_data_buffer_r) AM_WRITENOP
AM_RANGE(0x2000, 0x3fff) AM_RAM
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM
@ -3939,8 +3939,9 @@ static DRIVER_INIT( wcbowl )
memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x680000, 0x680001, 0, 0, trackball_r);
memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x578000, 0x57ffff, 0, 0, (read16_space_func)SMH_NOP);
memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x680080, 0x680081, 0, 0, wcbowl_prot_result_r, (write16_space_func)SMH_NOP);
memory_nop_read(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x578000, 0x57ffff, 0, 0);
memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x680080, 0x680081, 0, 0, wcbowl_prot_result_r);
memory_nop_write(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x680080, 0x680081, 0, 0);
}

4
src/mame/drivers/itech8.c
View File

@ -930,7 +930,7 @@ static ADDRESS_MAP_START( gtg2_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0120, 0x0120) AM_READ_PORT("60") AM_WRITE(itech8_page_w)
AM_RANGE(0x0140, 0x015f) AM_WRITE(itech8_palette_w)
AM_RANGE(0x0140, 0x0140) AM_READ_PORT("80")
AM_RANGE(0x0160, 0x0160) AM_WRITE(SMH_RAM) AM_BASE(&itech8_grom_bank)
AM_RANGE(0x0160, 0x0160) AM_WRITEONLY AM_BASE(&itech8_grom_bank)
AM_RANGE(0x0180, 0x019f) AM_READWRITE(itech8_blitter_r, blitter_w)
AM_RANGE(0x01c0, 0x01c0) AM_WRITE(gtg2_sound_data_w)
AM_RANGE(0x01e0, 0x01e0) AM_WRITE(tms34061_latch_w)
@ -2664,7 +2664,7 @@ static DRIVER_INIT( grmatch )
{
memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0160, 0x0160, 0, 0, grmatch_palette_w);
memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0180, 0x0180, 0, 0, grmatch_xscroll_w);
memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01e0, 0x01ff, 0, 0, (write8_space_func)SMH_UNMAP);
memory_unmap_write(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01e0, 0x01ff, 0, 0);
}

2
src/mame/drivers/jack.c
View File

@ -1425,7 +1425,7 @@ static DRIVER_INIT( striv )
memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xcfff, 0, 0, striv_question_r);
// Nop out unused sprites writes
memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xb000, 0xb0ff, 0, 0, (write8_space_func)SMH_NOP);
memory_nop_write(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xb000, 0xb0ff, 0, 0);
timer_rate = 128;
}

2
src/mame/drivers/jackal.c
View File

@ -118,7 +118,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( slave_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x2000, 0x2001) AM_DEVREADWRITE("ymsnd", ym2151_r, ym2151_w)
AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(SMH_RAM) AM_BASE_GENERIC(paletteram) // self test only checks 0x4000-0x423f, 007327 should actually go up to 4fff
AM_RANGE(0x4000, 0x43ff) AM_RAM AM_BASE_GENERIC(paletteram) // self test only checks 0x4000-0x423f, 007327 should actually go up to 4fff
AM_RANGE(0x6000, 0x605f) AM_RAM // SOUND RAM (Self test check 0x6000-605f, 0x7c00-0x7fff)
AM_RANGE(0x6060, 0x7fff) AM_RAM AM_SHARE(1)
AM_RANGE(0x8000, 0xffff) AM_ROM

2
src/mame/drivers/jalmah.c
View File

@ -943,7 +943,7 @@ static ADDRESS_MAP_START( urashima, ADDRESS_SPACE_PROGRAM, 16 )
// AM_RANGE(0x098000, 0x09bfff) AM_RAM_WRITE(urashima_sc2_vram_w) AM_BASE(&sc2_vram)/*unused*/
/*$9c000-$9cfff Video Registers*/
/**/AM_RANGE(0x09c000, 0x09dfff) AM_WRITE(urashima_vregs_w)
/**///AM_RANGE(0x09c480, 0x09c49f) AM_READ(SMH_RAM) AM_WRITE(urashima_sc2vregs_w)
/**///AM_RANGE(0x09c480, 0x09c49f) AM_RAM_WRITE(urashima_sc2vregs_w)
AM_RANGE(0x09e000, 0x0a1fff) AM_RAM_WRITE(urashima_sc3_vram_w) AM_BASE(&sc3_vram)
AM_RANGE(0x0f0000, 0x0f0fff) AM_RAM AM_BASE(&jm_shared_ram)/*shared with MCU*/
AM_RANGE(0x0f1000, 0x0fffff) AM_RAM /*Work Ram*/

4
src/mame/drivers/jchan.c
View File

@ -533,8 +533,8 @@ static ADDRESS_MAP_START( jchan_sub, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x600000, 0x60001f) AM_RAM_WRITE(kaneko16_layers_0_regs_w) AM_BASE(&kaneko16_layers_0_regs) // Layers 0 Regs
/* background prites */
AM_RANGE(0x700000, 0x703fff) AM_RAM AM_BASE(&jchan_spriteram_2) AM_WRITE(jchan_suprnova_sprite32_2_w)
AM_RANGE(0x780000, 0x78003f) AM_RAM AM_BASE(&jchan_sprregs_2) AM_WRITE(jchan_suprnova_sprite32regs_2_w)
AM_RANGE(0x700000, 0x703fff) AM_RAM_WRITE(jchan_suprnova_sprite32_2_w) AM_BASE(&jchan_spriteram_2)
AM_RANGE(0x780000, 0x78003f) AM_RAM_WRITE(jchan_suprnova_sprite32regs_2_w) AM_BASE(&jchan_sprregs_2)
AM_RANGE(0x800000, 0x800003) AM_DEVWRITE8("ymz", ymz280b_w, 0x00ff) // sound

34
src/mame/drivers/jedi.c
View File

@ -273,29 +273,29 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0c00, 0x0c00) AM_MIRROR(0x03fe) AM_READ_PORT("0c00") AM_WRITENOP
AM_RANGE(0x0c01, 0x0c01) AM_MIRROR(0x03fe) AM_READ_PORT("0c01") AM_WRITENOP
AM_RANGE(0x1000, 0x13ff) AM_NOP
AM_RANGE(0x1400, 0x1400) AM_MIRROR(0x03ff) AM_READWRITE(jedi_audio_ack_latch_r, SMH_NOP)
AM_RANGE(0x1800, 0x1800) AM_MIRROR(0x03ff) AM_READWRITE(a2d_data_r, SMH_NOP)
AM_RANGE(0x1c00, 0x1c01) AM_MIRROR(0x007f) AM_READWRITE(SMH_NOP, nvram_enable_w)
AM_RANGE(0x1c80, 0x1c82) AM_MIRROR(0x0078) AM_READWRITE(SMH_NOP, a2d_select_w)
AM_RANGE(0x1400, 0x1400) AM_MIRROR(0x03ff) AM_READ(jedi_audio_ack_latch_r) AM_WRITENOP
AM_RANGE(0x1800, 0x1800) AM_MIRROR(0x03ff) AM_READ(a2d_data_r) AM_WRITENOP
AM_RANGE(0x1c00, 0x1c01) AM_MIRROR(0x007f) AM_READNOP AM_WRITE(nvram_enable_w)
AM_RANGE(0x1c80, 0x1c82) AM_MIRROR(0x0078) AM_READNOP AM_WRITE(a2d_select_w)
AM_RANGE(0x1c83, 0x1c87) AM_MIRROR(0x0078) AM_NOP
AM_RANGE(0x1d00, 0x1d00) AM_MIRROR(0x007f) AM_READWRITE(SMH_NOP, SMH_NOP) /* write: NVRAM store */
AM_RANGE(0x1d80, 0x1d80) AM_MIRROR(0x007f) AM_READWRITE(SMH_NOP, watchdog_reset_w)
AM_RANGE(0x1e00, 0x1e00) AM_MIRROR(0x007f) AM_READWRITE(SMH_NOP, main_irq_ack_w)
AM_RANGE(0x1e80, 0x1e81) AM_MIRROR(0x0078) AM_READWRITE(SMH_NOP, jedi_coin_counter_w)
AM_RANGE(0x1e82, 0x1e83) AM_MIRROR(0x0078) AM_READWRITE(SMH_NOP, SMH_NOP) /* write: LED control - not used */
AM_RANGE(0x1e84, 0x1e84) AM_MIRROR(0x0078) AM_READWRITE(SMH_NOP, SMH_RAM) AM_BASE_MEMBER(jedi_state, foreground_bank)
AM_RANGE(0x1d00, 0x1d00) AM_MIRROR(0x007f) AM_NOP /* write: NVRAM store */
AM_RANGE(0x1d80, 0x1d80) AM_MIRROR(0x007f) AM_READNOP AM_WRITE(watchdog_reset_w)
AM_RANGE(0x1e00, 0x1e00) AM_MIRROR(0x007f) AM_READNOP AM_WRITE(main_irq_ack_w)
AM_RANGE(0x1e80, 0x1e81) AM_MIRROR(0x0078) AM_READNOP AM_WRITE(jedi_coin_counter_w)
AM_RANGE(0x1e82, 0x1e83) AM_MIRROR(0x0078) AM_NOP /* write: LED control - not used */
AM_RANGE(0x1e84, 0x1e84) AM_MIRROR(0x0078) AM_READNOP AM_WRITEONLY AM_BASE_MEMBER(jedi_state, foreground_bank)
AM_RANGE(0x1e85, 0x1e85) AM_MIRROR(0x0078) AM_NOP
AM_RANGE(0x1e86, 0x1e86) AM_MIRROR(0x0078) AM_READWRITE(SMH_NOP, jedi_audio_reset_w)
AM_RANGE(0x1e87, 0x1e87) AM_MIRROR(0x0078) AM_READWRITE(SMH_NOP, SMH_RAM) AM_BASE_MEMBER(jedi_state, video_off)
AM_RANGE(0x1f00, 0x1f00) AM_MIRROR(0x007f) AM_READWRITE(SMH_NOP, jedi_audio_latch_w)
AM_RANGE(0x1f80, 0x1f80) AM_MIRROR(0x007f) AM_READWRITE(SMH_NOP, rom_banksel_w)
AM_RANGE(0x1e86, 0x1e86) AM_MIRROR(0x0078) AM_READNOP AM_WRITE(jedi_audio_reset_w)
AM_RANGE(0x1e87, 0x1e87) AM_MIRROR(0x0078) AM_READNOP AM_WRITEONLY AM_BASE_MEMBER(jedi_state, video_off)
AM_RANGE(0x1f00, 0x1f00) AM_MIRROR(0x007f) AM_READNOP AM_WRITE(jedi_audio_latch_w)
AM_RANGE(0x1f80, 0x1f80) AM_MIRROR(0x007f) AM_READNOP AM_WRITE(rom_banksel_w)
AM_RANGE(0x2000, 0x27ff) AM_RAM AM_BASE_MEMBER(jedi_state, backgroundram)
AM_RANGE(0x2800, 0x2fff) AM_RAM AM_BASE_MEMBER(jedi_state, paletteram)
AM_RANGE(0x3000, 0x37bf) AM_RAM AM_BASE_MEMBER(jedi_state, foregroundram)
AM_RANGE(0x37c0, 0x3bff) AM_RAM AM_BASE_MEMBER(jedi_state, spriteram)
AM_RANGE(0x3c00, 0x3c01) AM_MIRROR(0x00fe) AM_READWRITE(SMH_NOP, jedi_vscroll_w)
AM_RANGE(0x3d00, 0x3d01) AM_MIRROR(0x00fe) AM_READWRITE(SMH_NOP, jedi_hscroll_w)
AM_RANGE(0x3e00, 0x3e00) AM_MIRROR(0x01ff) AM_WRITE(SMH_RAM) AM_BASE_MEMBER(jedi_state, smoothing_table)
AM_RANGE(0x3c00, 0x3c01) AM_MIRROR(0x00fe) AM_READNOP AM_WRITE(jedi_vscroll_w)
AM_RANGE(0x3d00, 0x3d01) AM_MIRROR(0x00fe) AM_READNOP AM_WRITE(jedi_hscroll_w)
AM_RANGE(0x3e00, 0x3e00) AM_MIRROR(0x01ff) AM_WRITEONLY AM_BASE_MEMBER(jedi_state, smoothing_table)
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END

4
src/mame/drivers/jongkyo.c
View File

@ -193,8 +193,8 @@ static WRITE8_HANDLER( unknown_w )
}
static ADDRESS_MAP_START( jongkyo_memmap, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM) AM_WRITE(videoram2_w) // wrong, this doesn't seem to be video ram on write..
AM_RANGE(0x4000, 0x6bff) AM_READ(SMH_ROM) // fixed rom
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_WRITE(videoram2_w) // wrong, this doesn't seem to be video ram on write..
AM_RANGE(0x4000, 0x6bff) AM_ROM // fixed rom
AM_RANGE(0x6c00, 0x6fff) AM_ROMBANK("bank1") // banked (8 banks)
AM_RANGE(0x7000, 0x77ff) AM_RAM
AM_RANGE(0x8000, 0xffff) AM_RAM AM_BASE_GENERIC(videoram)

2
src/mame/drivers/junofrst.c
View File

@ -187,7 +187,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x802c, 0x802c) AM_READ_PORT("DSW1")
AM_RANGE(0x8030, 0x8030) AM_WRITE(interrupt_enable_w)
AM_RANGE(0x8031, 0x8032) AM_WRITE(junofrst_coin_counter_w)
AM_RANGE(0x8033, 0x8033) AM_WRITE(SMH_RAM) AM_BASE(&tutankhm_scroll) /* not used in Juno */
AM_RANGE(0x8033, 0x8033) AM_WRITEONLY AM_BASE(&tutankhm_scroll) /* not used in Juno */
AM_RANGE(0x8034, 0x8035) AM_WRITE(flip_screen_w)
AM_RANGE(0x8040, 0x8040) AM_WRITE(junofrst_sh_irqtrigger_w)
AM_RANGE(0x8050, 0x8050) AM_WRITE(soundlatch_w)

22
src/mame/drivers/kaneko16.c
View File

@ -411,20 +411,20 @@ static ADDRESS_MAP_START( bakubrkr, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x40001e, 0x40001f) AM_DEVWRITE("oki", bakubrkr_oki_bank_sw) // OKI bank Switch
AM_RANGE(0x400200, 0x40021f) AM_DEVREADWRITE("ay2", kaneko16_YM2149_r,kaneko16_YM2149_w) // Sound
AM_RANGE(0x400400, 0x400401) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff) //
AM_RANGE(0x500000, 0x500fff) AM_READWRITE(SMH_RAM,kaneko16_vram_1_w) AM_BASE(&kaneko16_vram_1) // Layers 0
AM_RANGE(0x501000, 0x501fff) AM_READWRITE(SMH_RAM,kaneko16_vram_0_w) AM_BASE(&kaneko16_vram_0) //
AM_RANGE(0x500000, 0x500fff) AM_RAM_WRITE(kaneko16_vram_1_w) AM_BASE(&kaneko16_vram_1) // Layers 0
AM_RANGE(0x501000, 0x501fff) AM_RAM_WRITE(kaneko16_vram_0_w) AM_BASE(&kaneko16_vram_0) //
AM_RANGE(0x502000, 0x502fff) AM_RAM AM_BASE(&kaneko16_vscroll_1) //
AM_RANGE(0x503000, 0x503fff) AM_RAM AM_BASE(&kaneko16_vscroll_0) //
AM_RANGE(0x580000, 0x580fff) AM_READWRITE(SMH_RAM,kaneko16_vram_3_w) AM_BASE(&kaneko16_vram_3) // Layers 1
AM_RANGE(0x581000, 0x581fff) AM_READWRITE(SMH_RAM,kaneko16_vram_2_w) AM_BASE(&kaneko16_vram_2) //
AM_RANGE(0x580000, 0x580fff) AM_RAM_WRITE(kaneko16_vram_3_w) AM_BASE(&kaneko16_vram_3) // Layers 1
AM_RANGE(0x581000, 0x581fff) AM_RAM_WRITE(kaneko16_vram_2_w) AM_BASE(&kaneko16_vram_2) //
AM_RANGE(0x582000, 0x582fff) AM_RAM AM_BASE(&kaneko16_vscroll_3) //
AM_RANGE(0x583000, 0x583fff) AM_RAM AM_BASE(&kaneko16_vscroll_2) //
AM_RANGE(0x600000, 0x601fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) // Sprites
AM_RANGE(0x700000, 0x700fff) AM_READWRITE(SMH_RAM,paletteram16_xGGGGGRRRRRBBBBB_word_w) AM_BASE_GENERIC(paletteram) // Palette
AM_RANGE(0x800000, 0x80001f) AM_READWRITE(SMH_RAM,kaneko16_layers_0_regs_w) AM_BASE(&kaneko16_layers_0_regs) // Layers 0 Regs
AM_RANGE(0x900000, 0x90001f) AM_READWRITE(SMH_RAM,kaneko16_sprites_regs_w) AM_BASE(&kaneko16_sprites_regs ) // Sprites Regs
AM_RANGE(0x700000, 0x700fff) AM_RAM_WRITE(paletteram16_xGGGGGRRRRRBBBBB_word_w) AM_BASE_GENERIC(paletteram) // Palette
AM_RANGE(0x800000, 0x80001f) AM_RAM_WRITE(kaneko16_layers_0_regs_w) AM_BASE(&kaneko16_layers_0_regs) // Layers 0 Regs
AM_RANGE(0x900000, 0x90001f) AM_RAM_WRITE(kaneko16_sprites_regs_w) AM_BASE(&kaneko16_sprites_regs ) // Sprites Regs
AM_RANGE(0xa80000, 0xa80001) AM_READ(watchdog_reset16_r) // Watchdog
AM_RANGE(0xb00000, 0xb0001f) AM_READWRITE(SMH_RAM,kaneko16_layers_1_regs_w) AM_BASE(&kaneko16_layers_1_regs) // Layers 1 Regs
AM_RANGE(0xb00000, 0xb0001f) AM_RAM_WRITE(kaneko16_layers_1_regs_w) AM_BASE(&kaneko16_layers_1_regs) // Layers 1 Regs
AM_RANGE(0xd00000, 0xd00001) AM_WRITE(kaneko16_eeprom_w) // EEPROM
AM_RANGE(0xe00000, 0xe00001) AM_READ_PORT("P1")
AM_RANGE(0xe00002, 0xe00003) AM_READ_PORT("P2")
@ -454,7 +454,7 @@ static ADDRESS_MAP_START( blazeon, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xc00004, 0xc00005) AM_READ_PORT("UNK")
AM_RANGE(0xc00006, 0xc00007) AM_READ_PORT("SYSTEM")
AM_RANGE(0xd00000, 0xd00001) AM_WRITE(kaneko16_coin_lockout_w) // Coin Lockout
AM_RANGE(0xe00000, 0xe00001) AM_READWRITE(SMH_NOP, kaneko16_soundlatch_w) // Read = IRQ Ack ?
AM_RANGE(0xe00000, 0xe00001) AM_READNOP AM_WRITE(kaneko16_soundlatch_w) // Read = IRQ Ack ?
AM_RANGE(0xe40000, 0xe40001) AM_READNOP // IRQ Ack ?
// AM_RANGE(0xe80000, 0xe80001) AM_READNOP // IRQ Ack ?
AM_RANGE(0xec0000, 0xec0001) AM_READNOP // Lev 4 IRQ Ack ?
@ -825,7 +825,7 @@ static WRITE16_HANDLER( brapboys_oki_bank_w )
static ADDRESS_MAP_START( shogwarr, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_BASE(&kaneko16_mainram) // Work RAM
AM_RANGE(0x200000, 0x20ffff) AM_READWRITE(SMH_RAM,calc3_mcu_ram_w) AM_BASE(&kaneko16_mcu_ram) // Shared With MCU
AM_RANGE(0x200000, 0x20ffff) AM_RAM_WRITE(calc3_mcu_ram_w) AM_BASE(&kaneko16_mcu_ram) // Shared With MCU
AM_RANGE(0x280000, 0x280001) AM_WRITE(calc3_mcu_com0_w)
AM_RANGE(0x290000, 0x290001) AM_WRITE(calc3_mcu_com1_w)
AM_RANGE(0x2b0000, 0x2b0001) AM_WRITE(calc3_mcu_com2_w)
@ -836,7 +836,7 @@ static ADDRESS_MAP_START( shogwarr, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x480000, 0x480001) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff)
AM_RANGE(0x580000, 0x581fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) // Sprites
AM_RANGE(0x600000, 0x600fff) AM_RAM_WRITE(kaneko16_vram_1_w) AM_BASE(&kaneko16_vram_1) // Layers 0
AM_RANGE(0x601000, 0x601fff) AM_READWRITE(SMH_RAM,kaneko16_vram_0_w) AM_BASE(&kaneko16_vram_0)
AM_RANGE(0x601000, 0x601fff) AM_RAM_WRITE(kaneko16_vram_0_w) AM_BASE(&kaneko16_vram_0)
AM_RANGE(0x602000, 0x602fff) AM_RAM AM_BASE(&kaneko16_vscroll_1)
AM_RANGE(0x603000, 0x603fff) AM_RAM AM_BASE(&kaneko16_vscroll_0)
AM_RANGE(0x800000, 0x80000f) AM_RAM_WRITE(kaneko16_layers_0_regs_w) AM_BASE(&kaneko16_layers_0_regs) // Layers 0 Regs

6
src/mame/drivers/kickgoal.c
View File

@ -510,9 +510,9 @@ static ADDRESS_MAP_START( kickgoal_program_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0xa00000, 0xa03fff) AM_RAM_WRITE(kickgoal_fgram_w) AM_BASE(&kickgoal_fgram) /* FG Layer */
AM_RANGE(0xa04000, 0xa07fff) AM_RAM_WRITE(kickgoal_bgram_w) AM_BASE(&kickgoal_bgram) /* Higher BG Layer */
AM_RANGE(0xa08000, 0xa0bfff) AM_RAM_WRITE(kickgoal_bg2ram_w) AM_BASE(&kickgoal_bg2ram) /* Lower BG Layer */
AM_RANGE(0xa0c000, 0xa0ffff) AM_RAM_WRITE(SMH_RAM) // more tilemap?
AM_RANGE(0xa10000, 0xa1000f) AM_WRITE(SMH_RAM) AM_BASE(&kickgoal_scrram) /* Scroll Registers */
AM_RANGE(0xb00000, 0xb007ff) AM_WRITE(SMH_RAM) AM_BASE_SIZE_GENERIC(spriteram) /* Sprites */
AM_RANGE(0xa0c000, 0xa0ffff) AM_RAM // more tilemap?
AM_RANGE(0xa10000, 0xa1000f) AM_WRITEONLY AM_BASE(&kickgoal_scrram) /* Scroll Registers */
AM_RANGE(0xb00000, 0xb007ff) AM_WRITEONLY AM_BASE_SIZE_GENERIC(spriteram) /* Sprites */
AM_RANGE(0xc00000, 0xc007ff) AM_RAM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE_GENERIC(paletteram) /* Palette */ // actionhw reads this
AM_RANGE(0xff0000, 0xffffff) AM_RAM
ADDRESS_MAP_END

2
src/mame/drivers/konamigv.c
View File

@ -636,7 +636,7 @@ static DRIVER_INIT( btchamp )
intelflash_init( machine, 0, FLASH_SHARP_LH28F400, NULL );
memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f680080, 0x1f68008f, 0, 0, btc_trackball_r, btc_trackball_w );
memory_install_write32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f6800e0, 0x1f6800e3, 0, 0, (write32_space_func)SMH_NOP );
memory_nop_write ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f6800e0, 0x1f6800e3, 0, 0 );
memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f380000, 0x1f3fffff, 0, 0, btcflash_r, btcflash_w );
DRIVER_INIT_CALL(konamigv);

2
src/mame/drivers/konamigx.c
View File

@ -1342,7 +1342,7 @@ static WRITE16_HANDLER(tms57002_control_word_w)
/* 68000 memory handling */
static ADDRESS_MAP_START( gxsndmap, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_BASE(&gx_sndram)
AM_RANGE(0x200000, 0x2004ff) AM_READWRITE(dual539_r, dual539_w)
AM_RANGE(0x300000, 0x300001) AM_READWRITE(tms57002_data_word_r, tms57002_data_word_w)

2
src/mame/drivers/kyugo.c
View File

@ -64,7 +64,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8000, 0x87ff) AM_RAM_WRITE(kyugo_bgvideoram_w) AM_BASE(&kyugo_bgvideoram)
AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(kyugo_bgattribram_w) AM_BASE(&kyugo_bgattribram)
AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(kyugo_fgvideoram_w) AM_BASE(&kyugo_fgvideoram)
AM_RANGE(0x9800, 0x9fff) AM_READWRITE(kyugo_spriteram_2_r, SMH_RAM) AM_BASE(&kyugo_spriteram_2)
AM_RANGE(0x9800, 0x9fff) AM_RAM_READ(kyugo_spriteram_2_r) AM_BASE(&kyugo_spriteram_2)
AM_RANGE(0xa000, 0xa7ff) AM_RAM AM_BASE(&kyugo_spriteram_1)
AM_RANGE(0xa800, 0xa800) AM_WRITE(kyugo_scroll_x_lo_w)
AM_RANGE(0xb000, 0xb000) AM_WRITE(kyugo_gfxctrl_w)

6
src/mame/drivers/ladybug.c
View File

@ -90,7 +90,7 @@ WRITE8_HANDLER( sraider_misc_w );
static ADDRESS_MAP_START( ladybug_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM
AM_RANGE(0x6000, 0x6fff) AM_RAM
AM_RANGE(0x7000, 0x73ff) AM_WRITE(SMH_RAM) AM_BASE_SIZE_GENERIC(spriteram)
AM_RANGE(0x7000, 0x73ff) AM_WRITEONLY AM_BASE_SIZE_GENERIC(spriteram)
AM_RANGE(0x8000, 0x8fff) AM_READNOP
AM_RANGE(0x9000, 0x9000) AM_READ_PORT("IN0")
AM_RANGE(0x9001, 0x9001) AM_READ_PORT("IN1")
@ -108,7 +108,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sraider_cpu1_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x5fff) AM_ROM
AM_RANGE(0x6000, 0x6fff) AM_RAM
AM_RANGE(0x7000, 0x73ff) AM_WRITE(SMH_RAM) AM_BASE_SIZE_GENERIC(spriteram)
AM_RANGE(0x7000, 0x73ff) AM_WRITEONLY AM_BASE_SIZE_GENERIC(spriteram)
AM_RANGE(0x8005, 0x8005) AM_READ(sraider_8005_r) // protection check?
AM_RANGE(0x8006, 0x8006) AM_WRITE(sraider_sound_low_w)
AM_RANGE(0x8007, 0x8007) AM_WRITE(sraider_sound_high_w)
@ -128,7 +128,7 @@ static ADDRESS_MAP_START( sraider_cpu2_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8000, 0x8000) AM_READ(sraider_sound_low_r)
AM_RANGE(0xa000, 0xa000) AM_READ(sraider_sound_high_r)
AM_RANGE(0xc000, 0xc000) AM_READNOP //some kind of sync
AM_RANGE(0xe000, 0xe0ff) AM_WRITE(SMH_RAM) AM_BASE(&sraider_grid_data)
AM_RANGE(0xe000, 0xe0ff) AM_WRITEONLY AM_BASE(&sraider_grid_data)
AM_RANGE(0xe800, 0xe800) AM_WRITE(sraider_io_w)
ADDRESS_MAP_END

18
src/mame/drivers/lasso.c
View File

@ -85,7 +85,7 @@ static ADDRESS_MAP_START( lasso_main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0c00, 0x0c7f) AM_RAM AM_BASE(&lasso_spriteram) AM_SIZE(&lasso_spriteram_size)
AM_RANGE(0x1000, 0x17ff) AM_RAM AM_SHARE(1)
AM_RANGE(0x1800, 0x1800) AM_WRITE(sound_command_w)
AM_RANGE(0x1801, 0x1801) AM_WRITE(SMH_RAM) AM_BASE(&lasso_back_color)
AM_RANGE(0x1801, 0x1801) AM_WRITEONLY AM_BASE(&lasso_back_color)
AM_RANGE(0x1802, 0x1802) AM_WRITE(lasso_video_control_w)
AM_RANGE(0x1804, 0x1804) AM_READ_PORT("1804")
AM_RANGE(0x1805, 0x1805) AM_READ_PORT("1805")
@ -98,7 +98,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( lasso_audio_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x01ff) AM_RAM
AM_RANGE(0x5000, 0x7fff) AM_ROM
AM_RANGE(0xb000, 0xb000) AM_WRITE(SMH_RAM) AM_BASE(&lasso_chip_data)
AM_RANGE(0xb000, 0xb000) AM_WRITEONLY AM_BASE(&lasso_chip_data)
AM_RANGE(0xb001, 0xb001) AM_WRITE(sound_select_w)
AM_RANGE(0xb004, 0xb004) AM_READ(sound_status_r)
AM_RANGE(0xb005, 0xb005) AM_READ(soundlatch_r)
@ -121,7 +121,7 @@ static ADDRESS_MAP_START( chameleo_main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1000, 0x107f) AM_RAM AM_BASE(&lasso_spriteram) AM_SIZE(&lasso_spriteram_size)
AM_RANGE(0x1080, 0x10ff) AM_RAM
AM_RANGE(0x1800, 0x1800) AM_WRITE(sound_command_w)
AM_RANGE(0x1801, 0x1801) AM_WRITE(SMH_RAM) AM_BASE(&lasso_back_color)
AM_RANGE(0x1801, 0x1801) AM_WRITEONLY AM_BASE(&lasso_back_color)
AM_RANGE(0x1802, 0x1802) AM_WRITE(lasso_video_control_w)
AM_RANGE(0x1804, 0x1804) AM_READ_PORT("1804")
AM_RANGE(0x1805, 0x1805) AM_READ_PORT("1805")
@ -136,7 +136,7 @@ static ADDRESS_MAP_START( chameleo_audio_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x01ff) AM_RAM
AM_RANGE(0x1000, 0x1fff) AM_ROM
AM_RANGE(0x6000, 0x7fff) AM_ROM
AM_RANGE(0xb000, 0xb000) AM_WRITE(SMH_RAM) AM_BASE(&lasso_chip_data)
AM_RANGE(0xb000, 0xb000) AM_WRITEONLY AM_BASE(&lasso_chip_data)
AM_RANGE(0xb001, 0xb001) AM_WRITE(sound_select_w)
AM_RANGE(0xb004, 0xb004) AM_READ(sound_status_r)
AM_RANGE(0xb005, 0xb005) AM_READ(soundlatch_r)
@ -150,14 +150,14 @@ static ADDRESS_MAP_START( wwjgtin_main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(lasso_colorram_w) AM_BASE(&lasso_colorram)
AM_RANGE(0x1000, 0x10ff) AM_RAM AM_BASE(&lasso_spriteram) AM_SIZE(&lasso_spriteram_size)
AM_RANGE(0x1800, 0x1800) AM_WRITE(sound_command_w)
AM_RANGE(0x1801, 0x1801) AM_WRITE(SMH_RAM) AM_BASE(&lasso_back_color)
AM_RANGE(0x1801, 0x1801) AM_WRITEONLY AM_BASE(&lasso_back_color)
AM_RANGE(0x1802, 0x1802) AM_WRITE(wwjgtin_video_control_w )
AM_RANGE(0x1804, 0x1804) AM_READ_PORT("1804")
AM_RANGE(0x1805, 0x1805) AM_READ_PORT("1805")
AM_RANGE(0x1806, 0x1806) AM_READ_PORT("1806")
AM_RANGE(0x1807, 0x1807) AM_READ_PORT("1807")
AM_RANGE(0x1c00, 0x1c03) AM_WRITE(SMH_RAM) AM_BASE(&wwjgtin_last_colors)
AM_RANGE(0x1c04, 0x1c07) AM_WRITE(SMH_RAM) AM_BASE(&wwjgtin_track_scroll)
AM_RANGE(0x1c00, 0x1c03) AM_WRITEONLY AM_BASE(&wwjgtin_last_colors)
AM_RANGE(0x1c04, 0x1c07) AM_WRITEONLY AM_BASE(&wwjgtin_track_scroll)
AM_RANGE(0x4000, 0xbfff) AM_ROM
AM_RANGE(0xc000, 0xffff) AM_ROM AM_REGION("maincpu", 0x8000)
ADDRESS_MAP_END
@ -166,7 +166,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( wwjgtin_audio_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x01ff) AM_RAM
AM_RANGE(0x4000, 0x7fff) AM_MIRROR(0x8000) AM_ROM
AM_RANGE(0xb000, 0xb000) AM_WRITE(SMH_RAM) AM_BASE(&lasso_chip_data)
AM_RANGE(0xb000, 0xb000) AM_WRITEONLY AM_BASE(&lasso_chip_data)
AM_RANGE(0xb001, 0xb001) AM_WRITE(sound_select_w)
AM_RANGE(0xb003, 0xb003) AM_DEVWRITE("dac", dac_w)
AM_RANGE(0xb004, 0xb004) AM_READ(sound_status_r)
@ -203,7 +203,7 @@ static ADDRESS_MAP_START( pinbo_audio_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x02, 0x02) AM_DEVREAD("ay1", ay8910_r)
AM_RANGE(0x04, 0x05) AM_DEVWRITE("ay2", ay8910_address_data_w)
AM_RANGE(0x06, 0x06) AM_DEVREAD("ay2", ay8910_r)
AM_RANGE(0x08, 0x08) AM_READWRITE(soundlatch_r, SMH_NOP) /* ??? */
AM_RANGE(0x08, 0x08) AM_READ(soundlatch_r) AM_WRITENOP /* ??? */
AM_RANGE(0x14, 0x14) AM_WRITENOP /* ??? */
ADDRESS_MAP_END

2
src/mame/drivers/lastfght.c
View File

@ -358,7 +358,7 @@ static ADDRESS_MAP_START( lastfght_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE( 0x600002, 0x600003 ) AM_READWRITE( lastfght_sound_r, lastfght_sound_w )
AM_RANGE( 0x600006, 0x600007 ) AM_WRITE( lastfght_blit_w )
AM_RANGE( 0x600008, 0x600009 ) AM_WRITE( colordac_w )
AM_RANGE( 0x60000a, 0x60000b ) AM_WRITE( SMH_NOP ) // colordac?
AM_RANGE( 0x60000a, 0x60000b ) AM_WRITENOP // colordac?
AM_RANGE( 0x800000, 0x800001 ) AM_WRITE( lastfght_sx_w )
AM_RANGE( 0x800002, 0x800003 ) AM_WRITE( lastfght_sd_w )

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