mirror of
https://github.com/holub/mame
synced 2025-04-24 17:30:55 +03:00
-oric, pet, prodigy, rmnimbus, ssystem3, swtpc09, swyft, sym1, trvquest, tv950, vectrex, victor9k, wicat: [Ryan Holtz]
* Removed MACHINE_CONFIG and MCFG usage where possible.
This commit is contained in:
mooglyguy
parent
749e47c09f
commit
9ee8cf454c
@ -273,18 +273,6 @@ void cbm_iec_slot_device::device_start()
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if (dev) bus->add_device(this, get_card_device());
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}
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/*template <typename T>
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void cbm_iec_slot_device::add(machine_config &config, T &&_bus_tag, const char *_default_drive)
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{
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add_slot(config, "iec4", 4, nullptr);
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add_slot(config, "iec8", 8, _default_drive);
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add_slot(config, "iec9", 9, nullptr);
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add_slot(config, "iec10", 10, nullptr);
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add_slot(config, "iec11", 11, nullptr);
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CBM_IEC(config, std::forward<T>(_bus_tag), 0);
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}*/
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void cbm_iec_slot_device::add_slot(machine_config &config, const char *_tag, int _address, const char *_def_slot)
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{
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cbm_iec_slot_device &slot(CBM_IEC_SLOT(config, _tag, 0));
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@ -197,6 +197,16 @@ public:
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class generic_cartslot_device : public generic_slot_device
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{
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public:
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template <typename T>
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generic_cartslot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *intf, const char *exts)
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: generic_cartslot_device(mconfig, tag, owner, (uint32_t)0)
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{
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opts(*this);
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set_fixed(false);
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set_interface(intf);
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set_extensions(exts);
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}
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generic_cartslot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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virtual iodevice_t image_type() const override { return IO_CARTSLOT; }
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@ -93,6 +93,13 @@ void ieee488_slot_device::device_start()
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}
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void ieee488_slot_device::add_cbm_slot(machine_config &config, const char *_tag, int _address, const char *_def_slot)
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{
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ieee488_slot_device &slot(IEEE488_SLOT(config, _tag, 0));
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cbm_ieee488_devices(slot);
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slot.set_default_option(_def_slot);
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slot.set_address(_address);
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}
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//**************************************************************************
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// LIVE DEVICE
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@ -208,6 +208,8 @@ private:
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uint8_t m_dio;
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};
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DECLARE_DEVICE_TYPE(IEEE488, ieee488_device)
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// ======================> ieee488_slot_device
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@ -218,6 +220,20 @@ public:
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// construction/destruction
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ieee488_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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static void add_cbm_slot(machine_config &config, const char *_tag, int _address, const char *_def_slot);
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static void add_cbm_defaults(machine_config &config, const char *_default_drive)
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{
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add_cbm_slot(config, "ieee4", 4, nullptr);
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add_cbm_slot(config, "ieee8", 8, _default_drive);
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add_cbm_slot(config, "ieee9", 9, nullptr);
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add_cbm_slot(config, "ieee10", 10, nullptr);
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add_cbm_slot(config, "ieee11", 11, nullptr);
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add_cbm_slot(config, "ieee12", 12, nullptr);
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add_cbm_slot(config, "ieee13", 13, nullptr);
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add_cbm_slot(config, "ieee14", 14, nullptr);
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add_cbm_slot(config, "ieee15", 15, nullptr);
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}
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void set_address(int address) { m_address = address; }
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int get_address() { return m_address; }
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@ -228,6 +244,8 @@ protected:
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int m_address;
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};
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DECLARE_DEVICE_TYPE(IEEE488_SLOT, ieee488_slot_device)
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// ======================> device_ieee488_interface
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@ -263,11 +281,6 @@ private:
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};
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// device type definition
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DECLARE_DEVICE_TYPE(IEEE488, ieee488_device)
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DECLARE_DEVICE_TYPE(IEEE488_SLOT, ieee488_slot_device)
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void cbm_ieee488_devices(device_slot_interface &device);
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void hp_ieee488_devices(device_slot_interface &device);
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void remote488_devices(device_slot_interface &device);
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@ -7,11 +7,11 @@
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DEFINE_DEVICE_TYPE(ORICEXT_CONNECTOR, oricext_connector, "oricext_connector", "ORIC extension connector")
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oricext_connector::oricext_connector(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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device_t(mconfig, ORICEXT_CONNECTOR, tag, owner, clock),
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device_slot_interface(mconfig, *this),
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irq_handler(*this),
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cputag(nullptr)
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oricext_connector::oricext_connector(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: device_t(mconfig, ORICEXT_CONNECTOR, tag, owner, clock)
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, device_slot_interface(mconfig, *this)
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, irq_handler(*this)
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, cputag(nullptr)
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{
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}
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@ -13,23 +13,28 @@
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#include "cpu/m6502/m6502.h"
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#define MCFG_ORICEXT_ADD(_tag, _slot_intf, _def_slot, _cputag, _irq) \
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MCFG_DEVICE_ADD(_tag, ORICEXT_CONNECTOR, 0) \
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MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
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downcast<oricext_connector *>(device)->set_cputag(_cputag); \
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downcast<oricext_connector &>(*device).set_irq_handler(DEVCB_##_irq);
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class oricext_device;
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class oricext_connector: public device_t, public device_slot_interface
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{
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public:
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template <typename T>
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oricext_connector(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt, const char *cputag)
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: oricext_connector(mconfig, tag, owner, (uint32_t)0)
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{
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option_reset();
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opts(*this);
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set_default_option(dflt);
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set_fixed(false);
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set_cputag(cputag);
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}
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oricext_connector(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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virtual ~oricext_connector();
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void set_cputag(const char *tag);
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template <class Object> devcb_base &set_irq_handler(Object &&cb) { return irq_handler.set_callback(std::forward<Object>(cb)); }
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auto irq_callback() { return irq_handler.bind(); }
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void irq_w(int state);
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protected:
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@ -54,7 +54,16 @@ class device_pet_datassette_port_interface;
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class pet_datassette_port_device : public device_t, public device_slot_interface
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{
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public:
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// construction/destruction
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template <typename T>
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pet_datassette_port_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt)
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: pet_datassette_port_device(mconfig, tag, owner, 0)
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{
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option_reset();
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opts(*this);
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set_default_option(dflt);
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set_fixed(false);
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}
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pet_datassette_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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virtual ~pet_datassette_port_device();
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@ -50,7 +50,16 @@ class pet_expansion_slot_device : public device_t,
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public device_slot_interface
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{
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public:
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// construction/destruction
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template <typename T>
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pet_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&opts, const char *dflt)
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: pet_expansion_slot_device(mconfig, tag, owner, clock)
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{
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option_reset();
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opts(*this);
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set_default_option(dflt);
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set_fixed(false);
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}
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pet_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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virtual ~pet_expansion_slot_device();
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@ -59,6 +68,9 @@ public:
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m_write_dma.set_callback(std::forward<Write>(wr));
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}
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auto dma_read_callback() { return m_read_dma.bind(); }
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auto dma_write_callback() { return m_write_dma.bind(); }
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// computer interface
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int norom_r(address_space &space, offs_t offset, int sel);
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uint8_t read(address_space &space, offs_t offset, uint8_t data, int &sel);
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@ -70,6 +70,17 @@ public:
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template <class Object> devcb_base &set_output_line_8_callback(Object &&cb) { return m_output_line_8_cb.set_callback(std::forward<Object>(cb)); }
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template <class Object> devcb_base &set_output_line_9_callback(Object &&cb) { return m_output_line_9_cb.set_callback(std::forward<Object>(cb)); }
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auto output_line0_callback() { return m_output_line_0_cb.bind(); }
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auto output_line1_callback() { return m_output_line_1_cb.bind(); }
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auto output_line2_callback() { return m_output_line_2_cb.bind(); }
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auto output_line3_callback() { return m_output_line_3_cb.bind(); }
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auto output_line4_callback() { return m_output_line_4_cb.bind(); }
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auto output_line5_callback() { return m_output_line_5_cb.bind(); }
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auto output_line6_callback() { return m_output_line_6_cb.bind(); }
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auto output_line7_callback() { return m_output_line_7_cb.bind(); }
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auto output_line8_callback() { return m_output_line_8_cb.bind(); }
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auto output_line9_callback() { return m_output_line_9_cb.bind(); }
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uint16_t read();
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void write(uint8_t data);
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@ -87,6 +87,11 @@ public:
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template <class Object> devcb_base &set_tbre_wr_callback(Object &&cb) { return m_write_tbre.set_callback(std::forward<Object>(cb)); }
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template <class Object> devcb_base &set_tre_wr_callback(Object &&cb) { return m_write_tre.set_callback(std::forward<Object>(cb)); }
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auto tro_callback() { return m_write_tro.bind(); }
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auto dr_callback() { return m_write_dr.bind(); }
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auto tbre_callback() { return m_write_tbre.bind(); }
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auto tre_callback() { return m_write_tre.bind(); }
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DECLARE_READ8_MEMBER( read ) { return m_rbr; }
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DECLARE_WRITE8_MEMBER( write );
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@ -92,6 +92,15 @@ public:
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template <class Object> devcb_base &set_bkdet_callback(Object &&cb) { return m_write_bkdet.set_callback(std::forward<Object>(cb)); }
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template <class Object> devcb_base &set_xsync_callback(Object &&cb) { return m_write_xsync.set_callback(std::forward<Object>(cb)); }
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auto txd_handler() { return m_write_txd.bind(); }
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auto rxrdy_handler() { return m_write_rxrdy.bind(); }
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auto txrdy_handler() { return m_write_txrdy.bind(); }
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auto rts_handler() { return m_write_rts.bind(); }
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auto dtr_handler() { return m_write_dtr.bind(); }
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auto txemt_dschg_handler() { return m_write_txemt_dschg.bind(); }
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auto bkdet_handler() { return m_write_bkdet.bind(); }
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auto xsync_handler() { return m_write_xsync.bind(); }
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DECLARE_READ8_MEMBER( read );
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DECLARE_WRITE8_MEMBER( write );
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@ -75,6 +75,11 @@ public:
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template <class Object> devcb_base &set_sm_dtr_wr_callback(Object &&cb) { return m_write_sm_dtr.set_callback(std::forward<Object>(cb)); }
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template <class Object> devcb_base &set_tuf_wr_callback(Object &&cb) { return m_write_tuf.set_callback(std::forward<Object>(cb)); }
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auto tx_data_callback() { return m_write_tx_data.bind(); }
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auto irq_callback() { return m_write_irq.bind(); }
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auto sm_dtr_callback() { return m_write_sm_dtr.bind(); }
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auto tuf_callback() { return m_write_tuf.bind(); }
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DECLARE_READ8_MEMBER( read );
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DECLARE_WRITE8_MEMBER( write );
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@ -284,7 +284,7 @@ class netlist_mame_analog_input_device : public device_t, public netlist_mame_su
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public:
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// construction/destruction
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netlist_mame_analog_input_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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netlist_mame_analog_input_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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void set_name(const char *param_name) { m_param_name = param_name; }
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@ -323,7 +323,7 @@ public:
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typedef device_delegate<void (const double, const attotime &)> output_delegate;
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// construction/destruction
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netlist_mame_analog_output_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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netlist_mame_analog_output_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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void set_params(const char *in_name, output_delegate &&adelegate);
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@ -347,9 +347,17 @@ public:
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typedef device_delegate<void(const int, const attotime &)> output_delegate;
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// construction/destruction
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netlist_mame_logic_output_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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netlist_mame_logic_output_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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void set_params(const char *in_name, output_delegate &&adelegate);
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template <class FunctionClass> void set_params(const char *in_name, void (FunctionClass::*callback)(const int, const attotime &), const char *name)
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{
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set_params(in_name, output_delegate(callback, name, nullptr, static_cast<FunctionClass *>(nullptr)));
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}
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template <class FunctionClass> void set_params(const char *in_name, const char *devname, void (FunctionClass::*callback)(const int, const attotime &), const char *name)
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{
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set_params(in_name, output_delegate(callback, name, devname, static_cast<FunctionClass *>(nullptr)));
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}
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protected:
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// device-level overrides
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@ -369,7 +377,7 @@ class netlist_mame_int_input_device : public device_t, public netlist_mame_sub_i
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{
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public:
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// construction/destruction
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netlist_mame_int_input_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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netlist_mame_int_input_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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void set_params(const char *param_name, const uint32_t mask, const uint32_t shift);
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@ -403,7 +411,7 @@ class netlist_mame_logic_input_device : public device_t, public netlist_mame_sub
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{
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public:
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// construction/destruction
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netlist_mame_logic_input_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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netlist_mame_logic_input_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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void set_params(const char *param_name, const uint32_t shift);
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@ -435,7 +443,7 @@ class netlist_mame_ram_pointer_device : public device_t, public netlist_mame_sub
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{
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public:
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// construction/destruction
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netlist_mame_ram_pointer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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netlist_mame_ram_pointer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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uint8_t* ptr() const { return m_data; }
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@ -460,7 +468,7 @@ class netlist_mame_stream_input_device : public device_t, public netlist_mame_su
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{
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public:
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// construction/destruction
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netlist_mame_stream_input_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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netlist_mame_stream_input_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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void set_params(int channel, const char *param_name);
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@ -481,7 +489,7 @@ class netlist_mame_stream_output_device : public device_t, public netlist_mame_s
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{
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public:
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// construction/destruction
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netlist_mame_stream_output_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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netlist_mame_stream_output_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
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void set_params(int channel, const char *out_name);
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@ -37,23 +37,6 @@
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#include "screen.h"
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//***************************************************************************
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// DEVICE CONFIGURATION MACROS
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//***************************************************************************
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#define MCFG_MOS656X_ATTACK_UFO_ADD(_tag, _screen_tag, _clock, _videoram_map, _colorram_map) \
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MCFG_SCREEN_ADD(_screen_tag, RASTER) \
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MCFG_SCREEN_REFRESH_RATE(MOS6560_VRETRACERATE) \
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MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) \
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MCFG_SCREEN_SIZE((MOS6560_XSIZE + 7) & ~7, MOS6560_YSIZE) \
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MCFG_SCREEN_VISIBLE_AREA(0, 23*8 - 1, 0, 22*8 - 1) \
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MCFG_SCREEN_UPDATE_DEVICE(_tag, mos6560_device, screen_update) \
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MCFG_DEVICE_ADD(_tag, MOS656X_ATTACK_UFO, _clock) \
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MCFG_VIDEO_SET_SCREEN(_screen_tag) \
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MCFG_DEVICE_ADDRESS_MAP(0, _videoram_map) \
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MCFG_DEVICE_ADDRESS_MAP(1, _colorram_map)
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//**************************************************************************
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// MACROS / CONSTANTS
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//**************************************************************************
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@ -72,6 +72,8 @@ public:
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, m_bank_e000_w(*this, "bank_e000_w")
|
||||
, m_bank_f800_w(*this, "bank_f800_w")
|
||||
, m_config(*this, "CONFIG")
|
||||
, m_kbd_row(*this, "ROW%u", 0U)
|
||||
, m_tape_timer(nullptr)
|
||||
{ }
|
||||
|
||||
DECLARE_INPUT_CHANGED_MEMBER(nmi_pressed);
|
||||
@ -82,18 +84,18 @@ public:
|
||||
DECLARE_WRITE_LINE_MEMBER(via_irq_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(ext_irq_w);
|
||||
DECLARE_WRITE8_MEMBER(psg_a_w);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(update_tape);
|
||||
TIMER_CALLBACK_MEMBER(update_tape);
|
||||
|
||||
virtual void machine_start() override;
|
||||
virtual void video_start() override;
|
||||
uint32_t screen_update_oric(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
DECLARE_WRITE_LINE_MEMBER(vblank_w);
|
||||
|
||||
void oric(machine_config &config);
|
||||
void oric(machine_config &config, bool add_ext = true);
|
||||
void prav8d(machine_config &config);
|
||||
void oric_mem(address_map &map);
|
||||
protected:
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<m6502_device> m_maincpu;
|
||||
required_device<palette_device> m_palette;
|
||||
required_device<ay8910_device> m_psg;
|
||||
required_device<centronics_device> m_centronics;
|
||||
@ -109,7 +111,9 @@ protected:
|
||||
optional_memory_bank m_bank_e000_w;
|
||||
optional_memory_bank m_bank_f800_w;
|
||||
required_ioport m_config;
|
||||
ioport_port *m_kbd_row[8];
|
||||
required_ioport_array<8> m_kbd_row;
|
||||
|
||||
emu_timer *m_tape_timer;
|
||||
|
||||
int m_blink_counter;
|
||||
uint8_t m_pattr;
|
||||
@ -366,7 +370,7 @@ WRITE8_MEMBER(oric_state::psg_a_w)
|
||||
update_keyboard();
|
||||
}
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(oric_state::update_tape)
|
||||
TIMER_CALLBACK_MEMBER(oric_state::update_tape)
|
||||
{
|
||||
if(!m_config->read())
|
||||
m_via->write_cb1(m_cassette->input() > 0.0038);
|
||||
@ -394,11 +398,8 @@ void oric_state::machine_start_common()
|
||||
m_via_irq = false;
|
||||
m_ext_irq = false;
|
||||
|
||||
for(int i=0; i<8; i++) {
|
||||
char name[10];
|
||||
sprintf(name, "ROW%d", i);
|
||||
m_kbd_row[i] = machine().root_device().ioport(name);
|
||||
}
|
||||
if (!m_tape_timer)
|
||||
m_tape_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(oric_state::update_tape), this));
|
||||
}
|
||||
|
||||
void oric_state::machine_start()
|
||||
@ -776,56 +777,68 @@ static INPUT_PORTS_START(telstrat)
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
MACHINE_CONFIG_START(oric_state::oric)
|
||||
void oric_state::oric(machine_config &config, bool add_ext)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("maincpu", M6502, 12_MHz_XTAL / 12)
|
||||
MCFG_DEVICE_PROGRAM_MAP(oric_mem)
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(60))
|
||||
M6502(config, m_maincpu, 12_MHz_XTAL / 12);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &oric_state::oric_mem);
|
||||
|
||||
config.m_minimum_quantum = attotime::from_hz(60);
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_RAW_PARAMS(12_MHz_XTAL / 2, 64*6, 0, 40*6, 312, 0, 28*8) // 260 lines in 60 Hz mode
|
||||
MCFG_SCREEN_UPDATE_DRIVER(oric_state, screen_update_oric)
|
||||
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, oric_state, vblank_w))
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_raw(12_MHz_XTAL / 2, 64*6, 0, 40*6, 312, 0, 28*8); // 260 lines in 60 Hz mode
|
||||
screen.set_screen_update(FUNC(oric_state::screen_update_oric));
|
||||
screen.screen_vblank().set(FUNC(oric_state::vblank_w));
|
||||
|
||||
MCFG_PALETTE_ADD_3BIT_RGB("palette")
|
||||
PALETTE(config, m_palette, 8);
|
||||
m_palette->set_init("palette", FUNC(palette_device::palette_init_3bit_rgb));
|
||||
|
||||
/* sound hardware */
|
||||
SPEAKER(config, "mono").front_center();
|
||||
WAVE(config, "wave", "cassette").add_route(ALL_OUTPUTS, "mono", 0.25);
|
||||
MCFG_DEVICE_ADD("ay8912", AY8912, 12_MHz_XTAL / 12)
|
||||
MCFG_AY8910_OUTPUT_TYPE(AY8910_DISCRETE_OUTPUT)
|
||||
MCFG_AY8910_RES_LOADS(4700, 4700, 4700)
|
||||
MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(*this, oric_state, psg_a_w))
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
||||
|
||||
AY8912(config, m_psg, 12_MHz_XTAL / 12);
|
||||
m_psg->set_flags(AY8910_DISCRETE_OUTPUT);
|
||||
m_psg->set_resistors_load(4700, 4700, 4700);
|
||||
m_psg->port_a_write_callback().set(FUNC(oric_state::psg_a_w));
|
||||
m_psg->add_route(ALL_OUTPUTS, "mono", 0.25);
|
||||
|
||||
/* printer */
|
||||
MCFG_DEVICE_ADD(m_centronics, CENTRONICS, centronics_devices, "printer")
|
||||
MCFG_CENTRONICS_ACK_HANDLER(WRITELINE("via6522", via6522_device, write_ca1))
|
||||
MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics")
|
||||
CENTRONICS(config, m_centronics, centronics_devices, "printer");
|
||||
m_centronics->ack_handler().set(m_via, FUNC(via6522_device::write_ca1));
|
||||
|
||||
OUTPUT_LATCH(config, m_cent_data_out);
|
||||
m_cent_data_out->bit_handler<0>().set(m_centronics, FUNC(centronics_device::write_data0));
|
||||
m_cent_data_out->bit_handler<1>().set(m_centronics, FUNC(centronics_device::write_data1));
|
||||
m_cent_data_out->bit_handler<2>().set(m_centronics, FUNC(centronics_device::write_data2));
|
||||
m_cent_data_out->bit_handler<3>().set(m_centronics, FUNC(centronics_device::write_data3));
|
||||
m_cent_data_out->bit_handler<4>().set(m_centronics, FUNC(centronics_device::write_data4));
|
||||
m_cent_data_out->bit_handler<5>().set(m_centronics, FUNC(centronics_device::write_data5));
|
||||
m_cent_data_out->bit_handler<6>().set(m_centronics, FUNC(centronics_device::write_data6));
|
||||
m_cent_data_out->bit_handler<7>().set(m_centronics, FUNC(centronics_device::write_data7));
|
||||
|
||||
/* cassette */
|
||||
MCFG_CASSETTE_ADD( "cassette" )
|
||||
MCFG_CASSETTE_FORMATS(oric_cassette_formats)
|
||||
MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED)
|
||||
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("tape_timer", oric_state, update_tape, attotime::from_hz(4800))
|
||||
CASSETTE(config, m_cassette, 0);
|
||||
m_cassette->set_formats(oric_cassette_formats);
|
||||
m_cassette->set_default_state((cassette_state)(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED));
|
||||
|
||||
/* via */
|
||||
MCFG_DEVICE_ADD("via6522", VIA6522, 12_MHz_XTAL / 12)
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, oric_state, via_a_w))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, oric_state, via_b_w))
|
||||
MCFG_VIA6522_CA2_HANDLER(WRITELINE(*this, oric_state, via_ca2_w))
|
||||
MCFG_VIA6522_CB2_HANDLER(WRITELINE(*this, oric_state, via_cb2_w))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, oric_state, via_irq_w))
|
||||
VIA6522(config, m_via, 12_MHz_XTAL / 12);
|
||||
m_via->writepa_handler().set(FUNC(oric_state::via_a_w));
|
||||
m_via->writepb_handler().set(FUNC(oric_state::via_b_w));
|
||||
m_via->ca2_handler().set(FUNC(oric_state::via_ca2_w));
|
||||
m_via->cb2_handler().set(FUNC(oric_state::via_cb2_w));
|
||||
m_via->irq_handler().set(FUNC(oric_state::via_irq_w));
|
||||
|
||||
/* extension port */
|
||||
MCFG_ORICEXT_ADD( "ext", oricext_intf, nullptr, "maincpu", WRITELINE(*this, oric_state, ext_irq_w))
|
||||
MACHINE_CONFIG_END
|
||||
ORICEXT_CONNECTOR(config, "ext", oricext_intf, nullptr, "maincpu").irq_callback().set(FUNC(oric_state::ext_irq_w));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(oric_state::prav8d)
|
||||
oric(config);
|
||||
MACHINE_CONFIG_END
|
||||
void oric_state::prav8d(machine_config &config)
|
||||
{
|
||||
oric(config, true);
|
||||
}
|
||||
|
||||
FLOPPY_FORMATS_MEMBER( telestrat_state::floppy_formats )
|
||||
FLOPPY_ORIC_DSK_FORMAT
|
||||
@ -836,40 +849,36 @@ static void telestrat_floppies(device_slot_interface &device)
|
||||
device.option_add("3dsdd", FLOPPY_3_DSDD);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(telestrat_state::telstrat)
|
||||
oric(config);
|
||||
MCFG_DEVICE_MODIFY( "maincpu" )
|
||||
MCFG_DEVICE_PROGRAM_MAP(telestrat_mem)
|
||||
void telestrat_state::telstrat(machine_config &config)
|
||||
{
|
||||
oric(config, false);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &telestrat_state::telestrat_mem);
|
||||
|
||||
/* acia */
|
||||
MCFG_DEVICE_ADD("acia", MOS6551, 0)
|
||||
MCFG_MOS6551_XTAL(1.8432_MHz_XTAL)
|
||||
MCFG_MOS6551_IRQ_HANDLER(WRITELINE(*this, telestrat_state, acia_irq_w))
|
||||
mos6551_device &acia(MOS6551(config, "acia", 0));
|
||||
acia.set_xtal(1.8432_MHz_XTAL);
|
||||
acia.irq_handler().set(FUNC(telestrat_state::acia_irq_w));
|
||||
|
||||
/* via */
|
||||
MCFG_DEVICE_ADD("via6522_2", VIA6522, 12_MHz_XTAL / 12)
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, telestrat_state, via2_a_w))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, telestrat_state, via2_b_w))
|
||||
MCFG_VIA6522_CA2_HANDLER(WRITELINE(*this, telestrat_state, via2_ca2_w))
|
||||
MCFG_VIA6522_CB2_HANDLER(WRITELINE(*this, telestrat_state, via2_cb2_w))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, telestrat_state, via2_irq_w))
|
||||
VIA6522(config, m_via2, 12_MHz_XTAL / 12);
|
||||
m_via2->writepa_handler().set(FUNC(telestrat_state::via2_a_w));
|
||||
m_via2->writepb_handler().set(FUNC(telestrat_state::via2_b_w));
|
||||
m_via2->ca2_handler().set(FUNC(telestrat_state::via2_ca2_w));
|
||||
m_via2->cb2_handler().set(FUNC(telestrat_state::via2_cb2_w));
|
||||
m_via2->irq_handler().set(FUNC(telestrat_state::via2_irq_w));
|
||||
|
||||
/* microdisc */
|
||||
MCFG_DEVICE_ADD("fdc", FD1793, 8_MHz_XTAL / 8)
|
||||
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(*this, telestrat_state, fdc_irq_w))
|
||||
MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(*this, telestrat_state, fdc_drq_w))
|
||||
MCFG_WD_FDC_HLD_CALLBACK(WRITELINE(*this, telestrat_state, fdc_hld_w))
|
||||
MCFG_WD_FDC_FORCE_READY
|
||||
FD1793(config, m_fdc, 8_MHz_XTAL / 8);
|
||||
m_fdc->intrq_wr_callback().set(FUNC(telestrat_state::fdc_irq_w));
|
||||
m_fdc->drq_wr_callback().set(FUNC(telestrat_state::fdc_drq_w));
|
||||
m_fdc->hld_wr_callback().set(FUNC(telestrat_state::fdc_hld_w));
|
||||
m_fdc->set_force_ready(true);
|
||||
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:0", telestrat_floppies, "3dsdd", telestrat_state::floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:1", telestrat_floppies, nullptr, telestrat_state::floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:2", telestrat_floppies, nullptr, telestrat_state::floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:3", telestrat_floppies, nullptr, telestrat_state::floppy_formats)
|
||||
|
||||
// [RH] 30 August 2016: Based on the French Wikipedia page for the Oric, it does not appear
|
||||
// that the Telestrat supported the same expansions as the Oric-1 and Atmos.
|
||||
MCFG_DEVICE_REMOVE("ext")
|
||||
MACHINE_CONFIG_END
|
||||
FLOPPY_CONNECTOR(config, "fdc:0", telestrat_floppies, "3dsdd", telestrat_state::floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fdc:1", telestrat_floppies, nullptr, telestrat_state::floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fdc:2", telestrat_floppies, nullptr, telestrat_state::floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fdc:3", telestrat_floppies, nullptr, telestrat_state::floppy_formats);
|
||||
}
|
||||
|
||||
|
||||
ROM_START(oric1)
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -170,7 +170,7 @@ private:
|
||||
|
||||
void maincpu_map(address_map &map);
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<m6502_device> m_maincpu;
|
||||
required_device<ttl74145_device> m_74145;
|
||||
uint8_t m_segments;
|
||||
uint8_t m_digit_cache[4];
|
||||
@ -641,37 +641,39 @@ static INPUT_PORTS_START( prodigy )
|
||||
PORT_BIT(0xc00, 0x00, IPT_UNUSED )
|
||||
INPUT_PORTS_END
|
||||
|
||||
MACHINE_CONFIG_START(prodigy_state::prodigy)
|
||||
void prodigy_state::prodigy(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("maincpu", M6502, XTAL(2'000'000))
|
||||
MCFG_DEVICE_PROGRAM_MAP(maincpu_map)
|
||||
M6502(config, m_maincpu, XTAL(2'000'000));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &prodigy_state::maincpu_map);
|
||||
config.set_default_layout(layout_prodigy);
|
||||
|
||||
MCFG_DEVICE_ADD("io_74145", TTL74145, 0)
|
||||
TTL74145(config, m_74145, 0);
|
||||
|
||||
MCFG_DEVICE_ADD("via", VIA6522, XTAL(2'000'000))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, prodigy_state, irq_handler));
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, prodigy_state, via_pa_w))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, prodigy_state, via_pb_w))
|
||||
MCFG_VIA6522_READPA_HANDLER(READ8(*this, prodigy_state, via_pa_r))
|
||||
MCFG_VIA6522_READPB_HANDLER(READ8(*this, prodigy_state, via_pb_r))
|
||||
MCFG_VIA6522_CB1_HANDLER(WRITELINE(*this, prodigy_state, via_cb1_w))
|
||||
MCFG_VIA6522_CB2_HANDLER(WRITELINE(*this, prodigy_state, via_cb2_w))
|
||||
VIA6522(config, m_via, XTAL(2'000'000));
|
||||
m_via->irq_handler().set(FUNC(prodigy_state::irq_handler));
|
||||
m_via->writepa_handler().set(FUNC(prodigy_state::via_pa_w));
|
||||
m_via->writepb_handler().set(FUNC(prodigy_state::via_pb_w));
|
||||
m_via->readpa_handler().set(FUNC(prodigy_state::via_pa_r));
|
||||
m_via->readpb_handler().set(FUNC(prodigy_state::via_pb_r));
|
||||
m_via->cb1_handler().set(FUNC(prodigy_state::via_cb1_w));
|
||||
m_via->cb2_handler().set(FUNC(prodigy_state::via_cb2_w));
|
||||
|
||||
MCFG_DEVICE_ADD(NETLIST_TAG, NETLIST_CPU, XTAL(2'000'000) * 30)
|
||||
MCFG_NETLIST_SETUP(prodigy)
|
||||
NETLIST_CPU(config, m_bcd, XTAL(2'000'000) * 30);
|
||||
m_bcd->set_constructor(netlist_prodigy);
|
||||
|
||||
MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cb1", "cb1.IN", 0)
|
||||
MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cb2", "cb2.IN", 0)
|
||||
MCFG_NETLIST_LOGIC_OUTPUT(NETLIST_TAG, "bcd_bit0", "bcd_bit0", prodigy_state, bcd_bit0_cb, "")
|
||||
MCFG_NETLIST_LOGIC_OUTPUT(NETLIST_TAG, "bcd_bit1", "bcd_bit1", prodigy_state, bcd_bit1_cb, "")
|
||||
MCFG_NETLIST_LOGIC_OUTPUT(NETLIST_TAG, "bcd_bit2", "bcd_bit2", prodigy_state, bcd_bit2_cb, "")
|
||||
MCFG_NETLIST_LOGIC_OUTPUT(NETLIST_TAG, "bcd_bit3", "bcd_bit3", prodigy_state, bcd_bit3_cb, "")
|
||||
MCFG_NETLIST_LOGIC_OUTPUT(NETLIST_TAG, "bcd_bit4", "bcd_bit4", prodigy_state, bcd_bit4_cb, "")
|
||||
MCFG_NETLIST_LOGIC_OUTPUT(NETLIST_TAG, "bcd_bit5", "bcd_bit5", prodigy_state, bcd_bit5_cb, "")
|
||||
MCFG_NETLIST_LOGIC_OUTPUT(NETLIST_TAG, "bcd_bit6", "bcd_bit6", prodigy_state, bcd_bit6_cb, "")
|
||||
MCFG_NETLIST_LOGIC_OUTPUT(NETLIST_TAG, "bcd_bit7", "bcd_bit7", prodigy_state, bcd_bit7_cb, "")
|
||||
MACHINE_CONFIG_END
|
||||
NETLIST_LOGIC_INPUT(config, m_cb1); m_cb1->set_params("cb1.IN", 0);
|
||||
NETLIST_LOGIC_INPUT(config, m_cb2); m_cb2->set_params("cb2.IN", 0);
|
||||
|
||||
NETLIST_LOGIC_OUTPUT(config, "bcd:bcd_bit0").set_params("bcd_bit0", FUNC(prodigy_state::bcd_bit0_cb));
|
||||
NETLIST_LOGIC_OUTPUT(config, "bcd:bcd_bit1").set_params("bcd_bit1", FUNC(prodigy_state::bcd_bit1_cb));
|
||||
NETLIST_LOGIC_OUTPUT(config, "bcd:bcd_bit2").set_params("bcd_bit2", FUNC(prodigy_state::bcd_bit2_cb));
|
||||
NETLIST_LOGIC_OUTPUT(config, "bcd:bcd_bit3").set_params("bcd_bit3", FUNC(prodigy_state::bcd_bit3_cb));
|
||||
NETLIST_LOGIC_OUTPUT(config, "bcd:bcd_bit4").set_params("bcd_bit4", FUNC(prodigy_state::bcd_bit4_cb));
|
||||
NETLIST_LOGIC_OUTPUT(config, "bcd:bcd_bit5").set_params("bcd_bit5", FUNC(prodigy_state::bcd_bit5_cb));
|
||||
NETLIST_LOGIC_OUTPUT(config, "bcd:bcd_bit6").set_params("bcd_bit6", FUNC(prodigy_state::bcd_bit6_cb));
|
||||
NETLIST_LOGIC_OUTPUT(config, "bcd:bcd_bit7").set_params("bcd_bit7", FUNC(prodigy_state::bcd_bit7_cb));
|
||||
}
|
||||
|
||||
/*
|
||||
* 6522 VIA init sequence
|
||||
|
||||
@ -105,109 +105,126 @@ void rmnimbus_state::nimbus_iocpu_io(address_map &map)
|
||||
map(0x00000, 0x000FF).rw(FUNC(rmnimbus_state::nimbus_pc8031_iou_r), FUNC(rmnimbus_state::nimbus_pc8031_iou_w));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(rmnimbus_state::nimbus)
|
||||
void rmnimbus_state::nimbus(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD(m_maincpu, I80186, 16000000) // the cpu is a 10Mhz part but the serial clocks are wrong unless it runs at 8Mhz
|
||||
MCFG_DEVICE_PROGRAM_MAP(nimbus_mem)
|
||||
MCFG_DEVICE_IO_MAP(nimbus_io)
|
||||
MCFG_80186_IRQ_SLAVE_ACK(READ8(*this, rmnimbus_state, cascade_callback))
|
||||
MCFG_80186_TMROUT0_HANDLER(WRITELINE(Z80SIO_TAG, z80dart_device, rxca_w))
|
||||
MCFG_80186_TMROUT1_HANDLER(WRITELINE(Z80SIO_TAG, z80dart_device, rxtxcb_w))
|
||||
I80186(config, m_maincpu, 16000000); // the cpu is a 10Mhz part but the serial clocks are wrong unless it runs at 8Mhz
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &rmnimbus_state::nimbus_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &rmnimbus_state::nimbus_io);
|
||||
m_maincpu->read_slave_ack_callback().set(FUNC(rmnimbus_state::cascade_callback));
|
||||
m_maincpu->tmrout0_handler().set(Z80SIO_TAG, FUNC(z80dart_device::rxca_w));
|
||||
m_maincpu->tmrout1_handler().set(Z80SIO_TAG, FUNC(z80dart_device::rxtxcb_w));
|
||||
|
||||
MCFG_DEVICE_ADD(IOCPU_TAG, I8031, 11059200)
|
||||
MCFG_DEVICE_PROGRAM_MAP(nimbus_iocpu_mem)
|
||||
MCFG_DEVICE_IO_MAP(nimbus_iocpu_io)
|
||||
MCFG_MCS51_PORT_P1_IN_CB(READ8(*this, rmnimbus_state, nimbus_pc8031_port1_r))
|
||||
MCFG_MCS51_PORT_P1_OUT_CB(WRITE8(*this, rmnimbus_state, nimbus_pc8031_port1_w))
|
||||
MCFG_MCS51_PORT_P3_IN_CB(READ8(*this, rmnimbus_state, nimbus_pc8031_port3_r))
|
||||
MCFG_MCS51_PORT_P3_OUT_CB(WRITE8(*this, rmnimbus_state, nimbus_pc8031_port3_w))
|
||||
I8031(config, m_iocpu, 11059200);
|
||||
m_iocpu->set_addrmap(AS_PROGRAM, &rmnimbus_state::nimbus_iocpu_mem);
|
||||
m_iocpu->set_addrmap(AS_IO, &rmnimbus_state::nimbus_iocpu_io);
|
||||
m_iocpu->port_in_cb<1>().set(FUNC(rmnimbus_state::nimbus_pc8031_port1_r));
|
||||
m_iocpu->port_out_cb<1>().set(FUNC(rmnimbus_state::nimbus_pc8031_port1_w));
|
||||
m_iocpu->port_in_cb<3>().set(FUNC(rmnimbus_state::nimbus_pc8031_port3_r));
|
||||
m_iocpu->port_out_cb<3>().set(FUNC(rmnimbus_state::nimbus_pc8031_port3_w));
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_RAW_PARAMS(4.433619_MHz_XTAL * 2,650,0,640,260,0,250)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(rmnimbus_state, screen_update_nimbus)
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_raw(4.433619_MHz_XTAL * 2, 650, 0, 640, 260, 0, 250);
|
||||
m_screen->set_screen_update(FUNC(rmnimbus_state::screen_update_nimbus));
|
||||
//MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_SCANLINE)
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
m_screen->set_palette(m_palette);
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 16)
|
||||
PALETTE(config, m_palette, 16);
|
||||
|
||||
/* Backing storage */
|
||||
MCFG_DEVICE_ADD(FDC_TAG, WD2793, 1000000)
|
||||
MCFG_WD_FDC_FORCE_READY
|
||||
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(*this, rmnimbus_state,nimbus_fdc_intrq_w))
|
||||
MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(*this, rmnimbus_state,nimbus_fdc_drq_w))
|
||||
MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":0", rmnimbus_floppies, "35dd", isa8_fdc_device::floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":1", rmnimbus_floppies, "35dd", isa8_fdc_device::floppy_formats)
|
||||
WD2793(config, m_fdc, 1000000);
|
||||
m_fdc->set_force_ready(true);
|
||||
m_fdc->intrq_wr_callback().set(FUNC(rmnimbus_state::nimbus_fdc_intrq_w));
|
||||
m_fdc->drq_wr_callback().set(FUNC(rmnimbus_state::nimbus_fdc_drq_w));
|
||||
FLOPPY_CONNECTOR(config, FDC_TAG":0", rmnimbus_floppies, "35dd", isa8_fdc_device::floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, FDC_TAG":1", rmnimbus_floppies, "35dd", isa8_fdc_device::floppy_formats);
|
||||
|
||||
MCFG_DEVICE_ADD(SCSIBUS_TAG, SCSI_PORT, 0)
|
||||
MCFG_SCSI_DATA_INPUT_BUFFER("scsi_data_in")
|
||||
MCFG_SCSI_MSG_HANDLER(WRITELINE(*this, rmnimbus_state, write_scsi_msg))
|
||||
MCFG_SCSI_BSY_HANDLER(WRITELINE(*this, rmnimbus_state, write_scsi_bsy))
|
||||
MCFG_SCSI_IO_HANDLER(WRITELINE(*this, rmnimbus_state, write_scsi_io))
|
||||
MCFG_SCSI_CD_HANDLER(WRITELINE(*this, rmnimbus_state, write_scsi_cd))
|
||||
MCFG_SCSI_REQ_HANDLER(WRITELINE(*this, rmnimbus_state, write_scsi_req))
|
||||
SCSI_PORT(config, m_scsibus);
|
||||
m_scsibus->set_data_input_buffer("scsi_data_in");
|
||||
m_scsibus->msg_handler().set(FUNC(rmnimbus_state::write_scsi_msg));
|
||||
m_scsibus->bsy_handler().set(FUNC(rmnimbus_state::write_scsi_bsy));
|
||||
m_scsibus->io_handler().set(FUNC(rmnimbus_state::write_scsi_io));
|
||||
m_scsibus->cd_handler().set(FUNC(rmnimbus_state::write_scsi_cd));
|
||||
m_scsibus->req_handler().set(FUNC(rmnimbus_state::write_scsi_req));
|
||||
|
||||
MCFG_SCSIDEV_ADD(SCSIBUS_TAG ":" SCSI_PORT_DEVICE1, "harddisk", SCSIHD, SCSI_ID_0)
|
||||
MCFG_SCSIDEV_ADD(SCSIBUS_TAG ":" SCSI_PORT_DEVICE2, "harddisk", SCSIHD, SCSI_ID_1)
|
||||
MCFG_SCSIDEV_ADD(SCSIBUS_TAG ":" SCSI_PORT_DEVICE3, "harddisk", ACB4070, SCSI_ID_2)
|
||||
MCFG_SCSIDEV_ADD(SCSIBUS_TAG ":" SCSI_PORT_DEVICE4, "harddisk", S1410, SCSI_ID_3)
|
||||
m_scsibus->set_slot_device(1, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_0));
|
||||
m_scsibus->set_slot_device(2, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_1));
|
||||
m_scsibus->set_slot_device(3, "harddisk", ACB4070, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_2));
|
||||
m_scsibus->set_slot_device(4, "harddisk", S1410, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_3));
|
||||
|
||||
MCFG_SCSI_OUTPUT_LATCH_ADD("scsi_data_out", SCSIBUS_TAG)
|
||||
MCFG_DEVICE_ADD("scsi_data_in", INPUT_BUFFER, 0)
|
||||
OUTPUT_LATCH(config, m_scsi_data_out);
|
||||
m_scsi_data_out->bit_handler<0>().set(m_scsibus, FUNC(scsi_port_device::write_data0));
|
||||
m_scsi_data_out->bit_handler<1>().set(m_scsibus, FUNC(scsi_port_device::write_data1));
|
||||
m_scsi_data_out->bit_handler<2>().set(m_scsibus, FUNC(scsi_port_device::write_data2));
|
||||
m_scsi_data_out->bit_handler<3>().set(m_scsibus, FUNC(scsi_port_device::write_data3));
|
||||
m_scsi_data_out->bit_handler<4>().set(m_scsibus, FUNC(scsi_port_device::write_data4));
|
||||
m_scsi_data_out->bit_handler<5>().set(m_scsibus, FUNC(scsi_port_device::write_data5));
|
||||
m_scsi_data_out->bit_handler<6>().set(m_scsibus, FUNC(scsi_port_device::write_data6));
|
||||
m_scsi_data_out->bit_handler<7>().set(m_scsibus, FUNC(scsi_port_device::write_data7));
|
||||
|
||||
MCFG_DEVICE_ADD("scsi_ctrl_out", OUTPUT_LATCH, 0)
|
||||
MCFG_OUTPUT_LATCH_BIT0_HANDLER(WRITELINE(SCSIBUS_TAG, scsi_port_device, write_rst))
|
||||
MCFG_OUTPUT_LATCH_BIT1_HANDLER(WRITELINE(SCSIBUS_TAG, scsi_port_device, write_sel))
|
||||
MCFG_OUTPUT_LATCH_BIT2_HANDLER(WRITELINE(*this, rmnimbus_state, write_scsi_iena))
|
||||
INPUT_BUFFER(config, m_scsi_data_in);
|
||||
|
||||
MCFG_RAM_ADD(RAM_TAG)
|
||||
MCFG_RAM_DEFAULT_SIZE("1536K")
|
||||
MCFG_RAM_EXTRA_OPTIONS("128K,256K,384K,512K,640K,1024K")
|
||||
OUTPUT_LATCH(config, m_scsi_ctrl_out);
|
||||
m_scsi_ctrl_out->bit_handler<0>().set(m_scsibus, FUNC(scsi_port_device::write_rst));
|
||||
m_scsi_ctrl_out->bit_handler<1>().set(m_scsibus, FUNC(scsi_port_device::write_sel));
|
||||
m_scsi_ctrl_out->bit_handler<2>().set(FUNC(rmnimbus_state::write_scsi_iena));
|
||||
|
||||
RAM(config, m_ram);
|
||||
m_ram->set_default_size("1536K");
|
||||
m_ram->set_extra_options("128K,256K,384K,512K,640K,1024K");
|
||||
|
||||
/* Peripheral chips */
|
||||
MCFG_DEVICE_ADD(Z80SIO_TAG, Z80SIO2, 4000000)
|
||||
MCFG_Z80DART_OUT_TXDB_CB(WRITELINE("rs232b", rs232_port_device, write_txd))
|
||||
MCFG_Z80DART_OUT_DTRB_CB(WRITELINE("rs232b", rs232_port_device, write_dtr))
|
||||
MCFG_Z80DART_OUT_RTSB_CB(WRITELINE("rs232b", rs232_port_device, write_rts))
|
||||
MCFG_Z80DART_OUT_INT_CB(WRITELINE(*this, rmnimbus_state, sio_interrupt))
|
||||
Z80SIO2(config, m_z80sio, 4000000);
|
||||
m_z80sio->out_txdb_callback().set("rs232b", FUNC(rs232_port_device::write_txd));
|
||||
m_z80sio->out_dtrb_callback().set("rs232b", FUNC(rs232_port_device::write_dtr));
|
||||
m_z80sio->out_rtsb_callback().set("rs232b", FUNC(rs232_port_device::write_rts));
|
||||
m_z80sio->out_int_callback().set(FUNC(rmnimbus_state::sio_interrupt));
|
||||
|
||||
MCFG_DEVICE_ADD("rs232a", RS232_PORT, keyboard, "rmnkbd")
|
||||
MCFG_RS232_RXD_HANDLER(WRITELINE(Z80SIO_TAG, z80dart_device, rxa_w))
|
||||
rs232_port_device &rs232a(RS232_PORT(config, "rs232a", keyboard, "rmnkbd"));
|
||||
rs232a.rxd_handler().set(Z80SIO_TAG, FUNC(z80dart_device::rxa_w));
|
||||
|
||||
MCFG_DEVICE_ADD("rs232b", RS232_PORT, default_rs232_devices, nullptr)
|
||||
MCFG_RS232_RXD_HANDLER(WRITELINE(Z80SIO_TAG, z80dart_device, rxb_w))
|
||||
MCFG_RS232_DCD_HANDLER(WRITELINE(Z80SIO_TAG, z80dart_device, dcdb_w))
|
||||
MCFG_RS232_RI_HANDLER(WRITELINE(Z80SIO_TAG, z80dart_device, rib_w))
|
||||
MCFG_RS232_CTS_HANDLER(WRITELINE(Z80SIO_TAG, z80dart_device, ctsb_w))
|
||||
rs232_port_device &rs232b(RS232_PORT(config, "rs232b", default_rs232_devices, nullptr));
|
||||
rs232b.rxd_handler().set(Z80SIO_TAG, FUNC(z80dart_device::rxb_w));
|
||||
rs232b.dcd_handler().set(Z80SIO_TAG, FUNC(z80dart_device::dcdb_w));
|
||||
rs232b.ri_handler().set(Z80SIO_TAG, FUNC(z80dart_device::rib_w));
|
||||
rs232b.cts_handler().set(Z80SIO_TAG, FUNC(z80dart_device::ctsb_w));
|
||||
|
||||
MCFG_DEVICE_ADD(ER59256_TAG, EEPROM_SERIAL_93C06_16BIT)
|
||||
EEPROM_SERIAL_93C06_16BIT(config, m_eeprom);
|
||||
|
||||
MCFG_DEVICE_ADD(VIA_TAG, VIA6522, 1000000)
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8("cent_data_out", output_latch_device, bus_w))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, rmnimbus_state,nimbus_via_write_portb))
|
||||
MCFG_VIA6522_CA2_HANDLER(WRITELINE(m_centronics, centronics_device, write_strobe))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(m_maincpu, i80186_cpu_device, int3_w))
|
||||
VIA6522(config, m_via, 1000000);
|
||||
m_via->writepa_handler().set("cent_data_out", FUNC(output_latch_device::bus_w));
|
||||
m_via->writepb_handler().set(FUNC(rmnimbus_state::nimbus_via_write_portb));
|
||||
m_via->ca2_handler().set(m_centronics, FUNC(centronics_device::write_strobe));
|
||||
m_via->irq_handler().set(m_maincpu, FUNC(i80186_cpu_device::int3_w));
|
||||
|
||||
CENTRONICS(config, m_centronics, centronics_devices, "printer");
|
||||
m_centronics->ack_handler().set(m_via, FUNC(via6522_device::write_ca1)).invert();
|
||||
|
||||
MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics")
|
||||
output_latch_device ¢_data(OUTPUT_LATCH(config, "cent_data_out"));
|
||||
cent_data.bit_handler<0>().set(m_centronics, FUNC(centronics_device::write_data0));
|
||||
cent_data.bit_handler<1>().set(m_centronics, FUNC(centronics_device::write_data1));
|
||||
cent_data.bit_handler<2>().set(m_centronics, FUNC(centronics_device::write_data2));
|
||||
cent_data.bit_handler<3>().set(m_centronics, FUNC(centronics_device::write_data3));
|
||||
cent_data.bit_handler<4>().set(m_centronics, FUNC(centronics_device::write_data4));
|
||||
cent_data.bit_handler<5>().set(m_centronics, FUNC(centronics_device::write_data5));
|
||||
cent_data.bit_handler<6>().set(m_centronics, FUNC(centronics_device::write_data6));
|
||||
cent_data.bit_handler<7>().set(m_centronics, FUNC(centronics_device::write_data7));
|
||||
|
||||
/* sound hardware */
|
||||
SPEAKER(config, MONO_TAG).front_center();
|
||||
MCFG_DEVICE_ADD(AY8910_TAG, AY8910, 2000000)
|
||||
MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(*this, rmnimbus_state, nimbus_sound_ay8910_porta_w))
|
||||
MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(*this, rmnimbus_state, nimbus_sound_ay8910_portb_w))
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS,MONO_TAG, 0.75)
|
||||
ay8910_device &ay8910(AY8910(config, AY8910_TAG, 2000000));
|
||||
ay8910.port_a_write_callback().set(FUNC(rmnimbus_state::nimbus_sound_ay8910_porta_w));
|
||||
ay8910.port_b_write_callback().set(FUNC(rmnimbus_state::nimbus_sound_ay8910_portb_w));
|
||||
ay8910.add_route(ALL_OUTPUTS, MONO_TAG, 0.75);
|
||||
|
||||
MCFG_DEVICE_ADD(MSM5205_TAG, MSM5205, 384000)
|
||||
MCFG_MSM5205_VCLK_CB(WRITELINE(*this, rmnimbus_state, nimbus_msm5205_vck)) /* VCK function */
|
||||
MCFG_MSM5205_PRESCALER_SELECTOR(S48_4B) /* 8 kHz */
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, MONO_TAG, 0.75)
|
||||
msm5205_device &msm5205(MSM5205(config, MSM5205_TAG, 384000));
|
||||
msm5205.vck_callback().set(FUNC(rmnimbus_state::nimbus_msm5205_vck)); /* VCK function */
|
||||
msm5205.set_prescaler_selector(msm5205_device::S48_4B); /* 8 kHz */
|
||||
msm5205.add_route(ALL_OUTPUTS, MONO_TAG, 0.75);
|
||||
|
||||
/* Software list */
|
||||
MCFG_SOFTWARE_LIST_ADD("disk_list","nimbus")
|
||||
MACHINE_CONFIG_END
|
||||
SOFTWARE_LIST(config, "disk_list").set_type("nimbus", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
}
|
||||
|
||||
|
||||
ROM_START( nimbus )
|
||||
|
||||
@ -38,7 +38,6 @@ backup of playfield rom and picture/description of its board
|
||||
#include "emu.h"
|
||||
#include "includes/ssystem3.h"
|
||||
|
||||
#include "cpu/m6502/m6502.h"
|
||||
#include "screen.h"
|
||||
|
||||
|
||||
@ -282,32 +281,33 @@ static INPUT_PORTS_START( ssystem3 )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
|
||||
MACHINE_CONFIG_START(ssystem3_state::ssystem3)
|
||||
void ssystem3_state::ssystem3(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("maincpu", M6502, 1000000)
|
||||
MCFG_DEVICE_PROGRAM_MAP(ssystem3_map)
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(60))
|
||||
M6502(config, m_maincpu, 1000000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &ssystem3_state::ssystem3_map);
|
||||
|
||||
config.m_minimum_quantum = attotime::from_hz(60);
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", LCD)
|
||||
MCFG_SCREEN_REFRESH_RATE(LCD_FRAMES_PER_SECOND)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
|
||||
MCFG_SCREEN_SIZE(728, 437)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 728-1, 0, 437-1)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(ssystem3_state, screen_update_ssystem3)
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD));
|
||||
screen.set_refresh_hz(LCD_FRAMES_PER_SECOND);
|
||||
screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
|
||||
screen.set_size(728, 437);
|
||||
screen.set_visarea(0, 728-1, 0, 437-1);
|
||||
screen.set_screen_update(FUNC(ssystem3_state::screen_update_ssystem3));
|
||||
screen.set_palette(m_palette);
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 242 + 32768)
|
||||
MCFG_PALETTE_INIT_OWNER(ssystem3_state, ssystem3)
|
||||
PALETTE(config, m_palette, 242 + 32768);
|
||||
m_palette->set_init(FUNC(ssystem3_state::palette_init));
|
||||
|
||||
/* via */
|
||||
MCFG_DEVICE_ADD("via6522_0", VIA6522, 1000000)
|
||||
MCFG_VIA6522_READPA_HANDLER(READ8(*this, ssystem3_state,ssystem3_via_read_a))
|
||||
MCFG_VIA6522_READPB_HANDLER(READ8(*this, ssystem3_state,ssystem3_via_read_b))
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, ssystem3_state,ssystem3_via_write_a))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, ssystem3_state,ssystem3_via_write_b))
|
||||
MACHINE_CONFIG_END
|
||||
VIA6522(config, m_via6522_0, 1000000);
|
||||
m_via6522_0->readpa_handler().set(FUNC(ssystem3_state::ssystem3_via_read_a));
|
||||
m_via6522_0->readpb_handler().set(FUNC(ssystem3_state::ssystem3_via_read_b));
|
||||
m_via6522_0->writepa_handler().set(FUNC(ssystem3_state::ssystem3_via_write_a));
|
||||
m_via6522_0->writepb_handler().set(FUNC(ssystem3_state::ssystem3_via_write_b));
|
||||
}
|
||||
|
||||
|
||||
ROM_START(ssystem3)
|
||||
|
||||
@ -165,31 +165,32 @@ static void swtpc09_floppies(device_slot_interface &device)
|
||||
|
||||
/* Machine driver */
|
||||
/* MPU09, MPID, MPS2 DMF2 */
|
||||
MACHINE_CONFIG_START(swtpc09_state::swtpc09_base)
|
||||
void swtpc09_state::swtpc09_base(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("maincpu", MC6809, 4_MHz_XTAL)
|
||||
MCFG_DEVICE_PROGRAM_MAP(mp09_mem)
|
||||
MC6809(config, m_maincpu, 4_MHz_XTAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &swtpc09_state::mp09_mem);
|
||||
|
||||
MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0)
|
||||
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
|
||||
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
|
||||
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
|
||||
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
|
||||
ADDRESS_MAP_BANK(config, m_bankdev, 0);
|
||||
m_bankdev->set_endianness(ENDIANNESS_BIG);
|
||||
m_bankdev->set_data_width(8);
|
||||
m_bankdev->set_addr_width(20);
|
||||
m_bankdev->set_addrmap(AS_PROGRAM, &swtpc09_state::flex_dmf2_mem);
|
||||
|
||||
MCFG_DEVICE_ADD("pia", PIA6821, 0)
|
||||
MCFG_PIA_READPA_HANDLER(READ8(*this, swtpc09_state, pia0_a_r))
|
||||
MCFG_PIA_READPA_HANDLER(READ8(*this, swtpc09_state, pia0_ca1_r))
|
||||
MCFG_PIA_IRQA_HANDLER(WRITELINE(*this, swtpc09_state, pia0_irq_a))
|
||||
PIA6821(config, m_pia, 0);
|
||||
m_pia->readpa_handler().set(FUNC(swtpc09_state::pia0_a_r));
|
||||
m_pia->readca1_handler().set(FUNC(swtpc09_state::pia0_ca1_r));
|
||||
m_pia->irqa_handler().set(FUNC(swtpc09_state::pia0_irq_a));
|
||||
|
||||
MCFG_DEVICE_ADD("ptm", PTM6840, 2000000)
|
||||
MCFG_PTM6840_EXTERNAL_CLOCKS(50, 0, 50)
|
||||
MCFG_PTM6840_O1_CB(WRITELINE(*this, swtpc09_state, ptm_o1_callback))
|
||||
MCFG_PTM6840_O3_CB(WRITELINE(*this, swtpc09_state, ptm_o3_callback))
|
||||
MCFG_PTM6840_IRQ_CB(WRITELINE(*this, swtpc09_state, ptm_irq))
|
||||
PTM6840(config, m_ptm, 2000000);
|
||||
m_ptm->set_external_clocks(50, 0, 50);
|
||||
m_ptm->o1_callback().set(FUNC(swtpc09_state::ptm_o1_callback));
|
||||
m_ptm->o3_callback().set(FUNC(swtpc09_state::ptm_o3_callback));
|
||||
m_ptm->irq_callback().set(FUNC(swtpc09_state::ptm_irq));
|
||||
|
||||
MCFG_DEVICE_ADD("rs232", RS232_PORT, default_rs232_devices, "terminal")
|
||||
MCFG_RS232_RXD_HANDLER(WRITELINE("acia", acia6850_device, write_rxd))
|
||||
MCFG_RS232_CTS_HANDLER(WRITELINE("acia", acia6850_device, write_cts))
|
||||
rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, "terminal"));
|
||||
rs232.rxd_handler().set(m_acia, FUNC(acia6850_device::write_rxd));
|
||||
rs232.cts_handler().set(m_acia, FUNC(acia6850_device::write_cts));
|
||||
|
||||
ACIA6850(config, m_acia, 0);
|
||||
m_acia->txd_handler().set("rs232", FUNC(rs232_port_device::write_txd));
|
||||
@ -200,27 +201,27 @@ MACHINE_CONFIG_START(swtpc09_state::swtpc09_base)
|
||||
m_brg->out_f1_cb().set(m_acia, FUNC(acia6850_device::write_txc));
|
||||
m_brg->out_f1_cb().append(m_acia, FUNC(acia6850_device::write_rxc));
|
||||
|
||||
MCFG_DEVICE_ADD("fdc", FD1793, 1_MHz_XTAL)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:0", swtpc09_floppies, "dd", swtpc09_state::floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:1", swtpc09_floppies, "dd", swtpc09_state::floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:2", swtpc09_floppies, "dd", swtpc09_state::floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:3", swtpc09_floppies, "dd", swtpc09_state::floppy_formats)
|
||||
MACHINE_CONFIG_END
|
||||
FD1793(config, m_fdc, 1_MHz_XTAL);
|
||||
FLOPPY_CONNECTOR(config, "fdc:0", swtpc09_floppies, "dd", swtpc09_state::floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fdc:1", swtpc09_floppies, "dd", swtpc09_state::floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fdc:2", swtpc09_floppies, "dd", swtpc09_state::floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fdc:3", swtpc09_floppies, "dd", swtpc09_state::floppy_formats);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(swtpc09_state::swtpc09)
|
||||
void swtpc09_state::swtpc09(machine_config &config)
|
||||
{
|
||||
swtpc09_base(config);
|
||||
MCFG_DEVICE_MODIFY("fdc")
|
||||
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(*this, swtpc09_state, fdc_intrq_w))
|
||||
MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(*this, swtpc09_state, fdc_drq_w))
|
||||
MACHINE_CONFIG_END
|
||||
m_fdc->intrq_wr_callback().set(FUNC(swtpc09_state::fdc_intrq_w));
|
||||
m_fdc->drq_wr_callback().set(FUNC(swtpc09_state::fdc_drq_w));
|
||||
}
|
||||
|
||||
/* MPU09, MPID, MPS2 DC4 PIAIDE*/
|
||||
MACHINE_CONFIG_START(swtpc09_state::swtpc09i)
|
||||
void swtpc09_state::swtpc09i(machine_config &config)
|
||||
{
|
||||
swtpc09_base(config);
|
||||
MCFG_DEVICE_MODIFY("bankdev")
|
||||
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
|
||||
m_bankdev->set_addrmap(AS_PROGRAM, swtpc09_state::flex_dc4_piaide_mem);
|
||||
|
||||
MCFG_DEVICE_ADD("piaide", PIA6821, 0)
|
||||
PIA6821(config, "piaide", 0);
|
||||
|
||||
/* old start to adding ide support, needs major updating */
|
||||
/* this is to support an add on card driving IDE from a PIA */
|
||||
@ -228,39 +229,34 @@ MACHINE_CONFIG_START(swtpc09_state::swtpc09i)
|
||||
// MCFG_IDE_CONTROLLER_ADD("ide", nullptr)
|
||||
// MCFG_IDE_CONTROLLER_REGIONS("harddisk", nullptr)
|
||||
// MCFG_IDE_CONTROLLER_ADD( "ide", ide_intf, "hdd", nullptr, false ) /* FIXME */ bebox
|
||||
MACHINE_CONFIG_END
|
||||
}
|
||||
|
||||
|
||||
MACHINE_CONFIG_START(swtpc09_state::swtpc09u)
|
||||
void swtpc09_state::swtpc09u(machine_config &config)
|
||||
{
|
||||
swtpc09(config);
|
||||
MCFG_DEVICE_MODIFY("bankdev")
|
||||
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
|
||||
MACHINE_CONFIG_END
|
||||
m_bankdev->set_addrmap(AS_PROGRAM, &swtpc09_state::uniflex_dmf2_mem);
|
||||
}
|
||||
|
||||
|
||||
/* MPU09, MPID, MPS2 DMF3 */
|
||||
MACHINE_CONFIG_START(swtpc09_state::swtpc09d3)
|
||||
void swtpc09_state::swtpc09d3(machine_config &config)
|
||||
{
|
||||
swtpc09_base(config);
|
||||
MCFG_DEVICE_MODIFY("maincpu")
|
||||
MCFG_DEVICE_CLOCK(8_MHz_XTAL)
|
||||
|
||||
MCFG_DEVICE_MODIFY("pia")
|
||||
MCFG_DEVICE_CLOCK(2000000)
|
||||
|
||||
MCFG_DEVICE_MODIFY("bankdev")
|
||||
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
|
||||
m_maincpu->set_clock(8_MHz_XTAL);
|
||||
m_pia->set_clock(2000000);
|
||||
m_bankdev->set_addrmap(AS_PROGRAM, &swtpc09_state::uniflex_dmf3_mem);
|
||||
|
||||
/* video hardware */
|
||||
MCFG_DEVICE_MODIFY("acia")
|
||||
MCFG_ACIA6850_IRQ_HANDLER(INPUTLINE("maincpu", M6809_IRQ_LINE))
|
||||
m_acia->irq_handler().set_inputline(m_maincpu, M6809_IRQ_LINE);
|
||||
|
||||
MCFG_DEVICE_ADD("via", VIA6522, 4_MHz_XTAL / 4)
|
||||
MCFG_VIA6522_READPA_HANDLER(READ8(*this, swtpc09_state, dmf3_via_read_porta))
|
||||
MCFG_VIA6522_READPB_HANDLER(READ8(*this, swtpc09_state, dmf3_via_read_portb))
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, swtpc09_state, dmf3_via_write_porta))
|
||||
//MCFG_VIA6522_CA1_HANDLER(WRITELINE(*this, swtpc09_state, dmf3_via_write_ca1))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, swtpc09_state, dmf3_via_irq))
|
||||
MACHINE_CONFIG_END
|
||||
via6522_device &via(VIA6522(config, "via", 4_MHz_XTAL / 4));
|
||||
via.readpa_handler().set(FUNC(swtpc09_state::dmf3_via_read_porta));
|
||||
via.readpb_handler().set(FUNC(swtpc09_state::dmf3_via_read_portb));
|
||||
via.writepa_handler().set(FUNC(swtpc09_state::dmf3_via_write_porta));
|
||||
//via.ca1_handler().set(FUNC(swtpc09_state::dmf3_via_write_ca1));
|
||||
via.irq_handler().set(FUNC(swtpc09_state::dmf3_via_irq));
|
||||
}
|
||||
|
||||
|
||||
/* ROM definition */
|
||||
|
||||
@ -327,7 +327,7 @@ public:
|
||||
void swyft(machine_config &config);
|
||||
|
||||
private:
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<m68008_device> m_maincpu;
|
||||
optional_device<centronics_device> m_ctx;
|
||||
optional_device<output_latch_device> m_ctx_data_out;
|
||||
required_device<acia6850_device> m_acia6850;
|
||||
@ -751,49 +751,48 @@ WRITE_LINE_MEMBER( swyft_state::write_acia_clock )
|
||||
m_acia6850->write_rxc(state);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(swyft_state::swyft)
|
||||
|
||||
void swyft_state::swyft(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("maincpu",M68008, XTAL(15'897'600)/2) //MC68008P8, Y1=15.8976Mhz, clock GUESSED at Y1 / 2
|
||||
MCFG_DEVICE_PROGRAM_MAP(swyft_mem)
|
||||
M68008(config, m_maincpu, XTAL(15'897'600)/2); //MC68008P8, Y1=15.8976Mhz, clock GUESSED at Y1 / 2
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &swyft_state::swyft_mem);
|
||||
|
||||
MCFG_MACHINE_START_OVERRIDE(swyft_state,swyft)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(swyft_state,swyft)
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_RAW_PARAMS(15.8976_MHz_XTAL / 2, 500, 0, 320, 265, 0, 242) // total guess
|
||||
MCFG_SCREEN_UPDATE_DRIVER(swyft_state, screen_update_swyft)
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
|
||||
MCFG_PALETTE_ADD_MONOCHROME("palette")
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(swyft_state,swyft)
|
||||
|
||||
MCFG_DEVICE_ADD("acia6850", ACIA6850, 0)
|
||||
/* video hardware */
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_raw(15.8976_MHz_XTAL / 2, 500, 0, 320, 265, 0, 242); // total guess
|
||||
screen.set_screen_update(FUNC(swyft_state::screen_update_swyft));
|
||||
screen.set_palette("palette");
|
||||
|
||||
PALETTE(config, "palette", 2).set_init("palette", FUNC(palette_device::palette_init_monochrome));
|
||||
|
||||
ACIA6850(config, m_acia6850, 0);
|
||||
// acia rx and tx clocks come from one of the VIA pins and are tied together, fix this below? acia e clock comes from 68008
|
||||
MCFG_DEVICE_ADD("acia_clock", CLOCK, (XTAL(15'897'600)/2)/5) // out e clock from 68008, ~ 10in clocks per out clock
|
||||
MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(*this, swyft_state, write_acia_clock))
|
||||
clock_device &acia_clock(CLOCK(config, "acia_clock", (XTAL(15'897'600)/2)/5)); // out e clock from 68008, ~ 10in clocks per out clock
|
||||
acia_clock.signal_handler().set(FUNC(swyft_state::write_acia_clock));
|
||||
|
||||
MCFG_DEVICE_ADD("via6522_0", VIA6522, (XTAL(15'897'600)/2)/5) // out e clock from 68008
|
||||
MCFG_VIA6522_READPA_HANDLER(READ8(*this, swyft_state, via0_pa_r))
|
||||
MCFG_VIA6522_READPB_HANDLER(READ8(*this, swyft_state, via0_pb_r))
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, swyft_state, via0_pa_w))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, swyft_state, via0_pb_w))
|
||||
MCFG_VIA6522_CB1_HANDLER(WRITELINE(*this, swyft_state, via0_cb1_w))
|
||||
MCFG_VIA6522_CA2_HANDLER(WRITELINE(*this, swyft_state, via0_ca2_w))
|
||||
MCFG_VIA6522_CB2_HANDLER(WRITELINE(*this, swyft_state, via0_cb2_w))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE("viairq", input_merger_device, in_w<0>))
|
||||
via6522_device &via0(VIA6522(config, "via6522_0", (XTAL(15'897'600)/2)/5)); // out e clock from 68008
|
||||
via0.readpa_handler().set(FUNC(swyft_state::via0_pa_r));
|
||||
via0.readpb_handler().set(FUNC(swyft_state::via0_pb_r));
|
||||
via0.writepa_handler().set(FUNC(swyft_state::via0_pa_w));
|
||||
via0.writepb_handler().set(FUNC(swyft_state::via0_pb_w));
|
||||
via0.cb1_handler().set(FUNC(swyft_state::via0_cb1_w));
|
||||
via0.ca2_handler().set(FUNC(swyft_state::via0_ca2_w));
|
||||
via0.cb2_handler().set(FUNC(swyft_state::via0_cb2_w));
|
||||
via0.irq_handler().set("viairq", FUNC(input_merger_device::in_w<0>));
|
||||
|
||||
MCFG_DEVICE_ADD("via6522_1", VIA6522, (XTAL(15'897'600)/2)/5) // out e clock from 68008
|
||||
MCFG_VIA6522_READPA_HANDLER(READ8(*this, swyft_state, via1_pa_r))
|
||||
MCFG_VIA6522_READPB_HANDLER(READ8(*this, swyft_state, via1_pb_r))
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, swyft_state, via1_pa_w))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, swyft_state, via1_pb_w))
|
||||
MCFG_VIA6522_CB1_HANDLER(WRITELINE(*this, swyft_state, via1_cb1_w))
|
||||
MCFG_VIA6522_CA2_HANDLER(WRITELINE(*this, swyft_state, via1_ca2_w))
|
||||
MCFG_VIA6522_CB2_HANDLER(WRITELINE(*this, swyft_state, via1_cb2_w))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE("viairq", input_merger_device, in_w<1>))
|
||||
via6522_device &via1(VIA6522(config, "via6522_1", (XTAL(15'897'600)/2)/5)); // out e clock from 68008
|
||||
via1.readpa_handler().set(FUNC(swyft_state::via1_pa_r));
|
||||
via1.readpb_handler().set(FUNC(swyft_state::via1_pb_r));
|
||||
via1.writepa_handler().set(FUNC(swyft_state::via1_pa_w));
|
||||
via1.writepb_handler().set(FUNC(swyft_state::via1_pb_w));
|
||||
via1.cb1_handler().set(FUNC(swyft_state::via1_cb1_w));
|
||||
via1.ca2_handler().set(FUNC(swyft_state::via1_ca2_w));
|
||||
via1.cb2_handler().set(FUNC(swyft_state::via1_cb2_w));
|
||||
via1.irq_handler().set("viairq", FUNC(input_merger_device::in_w<1>));
|
||||
|
||||
input_merger_device &viairq(INPUT_MERGER_ANY_HIGH(config, "viairq"));
|
||||
viairq.output_handler().set_inputline("maincpu", M68K_IRQ_2);
|
||||
@ -807,7 +806,7 @@ MACHINE_CONFIG_START(swyft_state::swyft)
|
||||
m_bitlatch->q_out_cb<5>().set(FUNC(swyft_state::bitlatch_q_w<5>));
|
||||
m_bitlatch->q_out_cb<6>().set(FUNC(swyft_state::bitlatch_q_w<6>));
|
||||
m_bitlatch->q_out_cb<7>().set(FUNC(swyft_state::bitlatch_q_w<7>));
|
||||
MACHINE_CONFIG_END
|
||||
}
|
||||
|
||||
/* ROM definition */
|
||||
ROM_START( swyft )
|
||||
|
||||
@ -86,7 +86,7 @@ private:
|
||||
|
||||
void sym1_map(address_map &map);
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<m6502_device> m_maincpu;
|
||||
required_device<ram_device> m_ram;
|
||||
required_device<ttl74145_device> m_ttl74145;
|
||||
required_device<rs232_port_device> m_crt;
|
||||
@ -327,56 +327,53 @@ void sym1_state::sym1_map(address_map &map)
|
||||
// MACHINE DRIVERS
|
||||
//**************************************************************************
|
||||
|
||||
MACHINE_CONFIG_START(sym1_state::sym1)
|
||||
void sym1_state::sym1(machine_config &config)
|
||||
{
|
||||
// basic machine hardware
|
||||
MCFG_DEVICE_ADD("maincpu", M6502, SYM1_CLOCK)
|
||||
MCFG_DEVICE_PROGRAM_MAP(sym1_map)
|
||||
M6502(config, m_maincpu, SYM1_CLOCK);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &sym1_state::sym1_map);
|
||||
|
||||
config.set_default_layout(layout_sym1);
|
||||
|
||||
// sound hardware
|
||||
SPEAKER(config, "mono").front_center();
|
||||
MCFG_DEVICE_ADD("speaker", SPEAKER_SOUND)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
|
||||
SPEAKER_SOUND(config, "speaker").add_route(ALL_OUTPUTS, "mono", 1.0);
|
||||
|
||||
// devices
|
||||
MCFG_DEVICE_ADD("riot", MOS6532_NEW, SYM1_CLOCK)
|
||||
MCFG_MOS6530n_IN_PA_CB(READ8(*this, sym1_state, riot_a_r))
|
||||
MCFG_MOS6530n_OUT_PA_CB(WRITE8(*this, sym1_state, riot_a_w))
|
||||
MCFG_MOS6530n_IN_PB_CB(READ8(*this, sym1_state, riot_b_r))
|
||||
MCFG_MOS6530n_OUT_PB_CB(WRITE8(*this, sym1_state, riot_b_w))
|
||||
mos6532_new_device &riot(MOS6532_NEW(config, "riot", SYM1_CLOCK));
|
||||
riot.pa_rd_callback().set(FUNC(sym1_state::riot_a_r));
|
||||
riot.pa_wr_callback().set(FUNC(sym1_state::riot_a_w));
|
||||
riot.pb_rd_callback().set(FUNC(sym1_state::riot_b_r));
|
||||
riot.pb_wr_callback().set(FUNC(sym1_state::riot_b_w));
|
||||
|
||||
MCFG_DEVICE_ADD("ttl74145", TTL74145, 0)
|
||||
MCFG_TTL74145_OUTPUT_LINE_0_CB(WRITELINE(*this, sym1_state, sym1_74145_output_0_w))
|
||||
MCFG_TTL74145_OUTPUT_LINE_1_CB(WRITELINE(*this, sym1_state, sym1_74145_output_1_w))
|
||||
MCFG_TTL74145_OUTPUT_LINE_2_CB(WRITELINE(*this, sym1_state, sym1_74145_output_2_w))
|
||||
MCFG_TTL74145_OUTPUT_LINE_3_CB(WRITELINE(*this, sym1_state, sym1_74145_output_3_w))
|
||||
MCFG_TTL74145_OUTPUT_LINE_4_CB(WRITELINE(*this, sym1_state, sym1_74145_output_4_w))
|
||||
MCFG_TTL74145_OUTPUT_LINE_5_CB(WRITELINE(*this, sym1_state, sym1_74145_output_5_w))
|
||||
MCFG_TTL74145_OUTPUT_LINE_6_CB(WRITELINE("speaker", speaker_sound_device, level_w))
|
||||
TTL74145(config, m_ttl74145, 0);
|
||||
m_ttl74145->output_line0_callback().set(FUNC(sym1_state::sym1_74145_output_0_w));
|
||||
m_ttl74145->output_line1_callback().set(FUNC(sym1_state::sym1_74145_output_1_w));
|
||||
m_ttl74145->output_line2_callback().set(FUNC(sym1_state::sym1_74145_output_2_w));
|
||||
m_ttl74145->output_line3_callback().set(FUNC(sym1_state::sym1_74145_output_3_w));
|
||||
m_ttl74145->output_line4_callback().set(FUNC(sym1_state::sym1_74145_output_4_w));
|
||||
m_ttl74145->output_line5_callback().set(FUNC(sym1_state::sym1_74145_output_5_w));
|
||||
m_ttl74145->output_line6_callback().set("speaker", FUNC(speaker_sound_device::level_w));
|
||||
// lines 7-9 not connected
|
||||
|
||||
MCFG_DEVICE_ADD("via1", VIA6522, SYM1_CLOCK)
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE("mainirq", input_merger_device, in_w<0>))
|
||||
VIA6522(config, "via1", SYM1_CLOCK).irq_handler().set("mainirq", FUNC(input_merger_device::in_w<0>));
|
||||
VIA6522(config, "via2", SYM1_CLOCK).irq_handler().set("mainirq", FUNC(input_merger_device::in_w<1>));
|
||||
|
||||
MCFG_DEVICE_ADD("via2", VIA6522, SYM1_CLOCK)
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE("mainirq", input_merger_device, in_w<1>))
|
||||
via6522_device &via3(VIA6522(config, "via3", SYM1_CLOCK));
|
||||
via3.writepa_handler().set(FUNC(sym1_state::via3_a_w));
|
||||
via3.irq_handler().set("mainirq", FUNC(input_merger_device::in_w<2>));
|
||||
|
||||
MCFG_DEVICE_ADD("via3", VIA6522, SYM1_CLOCK)
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, sym1_state, via3_a_w))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE("mainirq", input_merger_device, in_w<2>))
|
||||
input_merger_device &merger(INPUT_MERGER_ANY_HIGH(config, "mainirq", 0)); // wire-or connection
|
||||
merger.output_handler().set_inputline(m_maincpu, M6502_IRQ_LINE);
|
||||
|
||||
MCFG_INPUT_MERGER_ANY_HIGH("mainirq") // wire-or connection
|
||||
MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("maincpu", M6502_IRQ_LINE))
|
||||
|
||||
MCFG_DEVICE_ADD("crt", RS232_PORT, default_rs232_devices, nullptr)
|
||||
MCFG_DEVICE_ADD("tty", RS232_PORT, default_rs232_devices, nullptr) // actually a 20 mA current loop; 110 bps assumed
|
||||
RS232_PORT(config, "crt", default_rs232_devices, nullptr);
|
||||
RS232_PORT(config, "tty", default_rs232_devices, nullptr); // actually a 20 mA current loop; 110 bps assumed
|
||||
|
||||
// internal ram
|
||||
MCFG_RAM_ADD(RAM_TAG)
|
||||
MCFG_RAM_DEFAULT_SIZE("4K")
|
||||
MCFG_RAM_EXTRA_OPTIONS("1K,2K,3K")
|
||||
MACHINE_CONFIG_END
|
||||
RAM(config, m_ram);
|
||||
m_ram->set_default_size("4K");
|
||||
m_ram->set_extra_options("1K,2K,3K");
|
||||
}
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
|
||||
@ -178,13 +178,14 @@ INTERRUPT_GEN_MEMBER(gameplan_state::trvquest_interrupt)
|
||||
m_via_2->write_ca1(0);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(gameplan_state::trvquest)
|
||||
void gameplan_state::trvquest(machine_config &config)
|
||||
{
|
||||
M6809(config, m_maincpu, XTAL(6'000'000)/4);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &gameplan_state::cpu_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(gameplan_state::trvquest_interrupt));
|
||||
|
||||
MCFG_DEVICE_ADD("maincpu", M6809,XTAL(6'000'000)/4)
|
||||
MCFG_DEVICE_PROGRAM_MAP(cpu_map)
|
||||
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", gameplan_state, trvquest_interrupt)
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1);
|
||||
|
||||
MCFG_NVRAM_ADD_1FILL("nvram")
|
||||
MCFG_MACHINE_START_OVERRIDE(gameplan_state,trvquest)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(gameplan_state,trvquest)
|
||||
|
||||
@ -194,29 +195,26 @@ MACHINE_CONFIG_START(gameplan_state::trvquest)
|
||||
/* sound hardware */
|
||||
SPEAKER(config, "mono").front_center();
|
||||
|
||||
MCFG_DEVICE_ADD("ay1", AY8910, XTAL(6'000'000)/2)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
||||
|
||||
MCFG_DEVICE_ADD("ay2", AY8910, XTAL(6'000'000)/2)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
||||
AY8910(config, "ay1", XTAL(6'000'000)/2).add_route(ALL_OUTPUTS, "mono", 0.25);
|
||||
AY8910(config, "ay2", XTAL(6'000'000)/2).add_route(ALL_OUTPUTS, "mono", 0.25);
|
||||
|
||||
/* via */
|
||||
MCFG_DEVICE_ADD("via6522_0", VIA6522, XTAL(6'000'000)/4)
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, gameplan_state, video_data_w))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, gameplan_state, gameplan_video_command_w))
|
||||
MCFG_VIA6522_CA2_HANDLER(WRITELINE(*this, gameplan_state, video_command_trigger_w))
|
||||
VIA6522(config, m_via_0, XTAL(6'000'000)/4);
|
||||
m_via_0->writepa_handler().set(FUNC(gameplan_state::video_data_w));
|
||||
m_via_0->writepb_handler().set(FUNC(gameplan_state::gameplan_video_command_w));
|
||||
m_via_0->ca2_handler().set(FUNC(gameplan_state::video_command_trigger_w));
|
||||
|
||||
MCFG_DEVICE_ADD("via6522_1", VIA6522, XTAL(6'000'000)/4)
|
||||
MCFG_VIA6522_READPA_HANDLER(IOPORT("IN0"))
|
||||
MCFG_VIA6522_READPB_HANDLER(IOPORT("IN1"))
|
||||
MCFG_VIA6522_CA2_HANDLER(WRITELINE(*this, gameplan_state, trvquest_coin_w))
|
||||
VIA6522(config, m_via_1, XTAL(6'000'000)/4);
|
||||
m_via_1->readpa_handler().set_ioport("IN0");
|
||||
m_via_1->readpb_handler().set_ioport("IN1");
|
||||
m_via_1->ca2_handler().set(FUNC(gameplan_state::trvquest_coin_w));
|
||||
|
||||
MCFG_DEVICE_ADD("via6522_2", VIA6522, XTAL(6'000'000)/4)
|
||||
MCFG_VIA6522_READPA_HANDLER(IOPORT("UNK"))
|
||||
MCFG_VIA6522_READPB_HANDLER(IOPORT("DSW"))
|
||||
MCFG_VIA6522_CA2_HANDLER(WRITELINE(*this, gameplan_state, trvquest_misc_w))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, gameplan_state, via_irq))
|
||||
MACHINE_CONFIG_END
|
||||
VIA6522(config, m_via_2, XTAL(6'000'000)/4);
|
||||
m_via_2->readpa_handler().set_ioport("UNK");
|
||||
m_via_2->readpb_handler().set_ioport("DSW");
|
||||
m_via_2->ca2_handler().set(FUNC(gameplan_state::trvquest_misc_w));
|
||||
m_via_2->irq_handler().set(FUNC(gameplan_state::via_irq));
|
||||
}
|
||||
|
||||
ROM_START( trvquest )
|
||||
ROM_REGION( 0x10000, "maincpu", 0 )
|
||||
|
||||
@ -272,44 +272,41 @@ MC6845_UPDATE_ROW( tv950_state::crtc_update_row )
|
||||
m_row = (m_row + 1) % 250;
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(tv950_state::tv950)
|
||||
void tv950_state::tv950(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("maincpu", M6502, MASTER_CLOCK/14)
|
||||
MCFG_DEVICE_PROGRAM_MAP(tv950_mem)
|
||||
M6502(config, m_maincpu, MASTER_CLOCK/14);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &tv950_state::tv950_mem);
|
||||
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK, 1200, 0, 1120, 370, 0, 250 ) // not real values
|
||||
MCFG_SCREEN_UPDATE_DEVICE( CRTC_TAG, r6545_1_device, screen_update )
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_raw(MASTER_CLOCK, 1200, 0, 1120, 370, 0, 250); // not real values
|
||||
screen.set_screen_update(CRTC_TAG, FUNC(r6545_1_device::screen_update));
|
||||
|
||||
// there are many 6845 CRTC submodels, the Theory of Operation manual references the Rockwell R6545-1 specificially.
|
||||
MCFG_MC6845_ADD(CRTC_TAG, R6545_1, "screen", MASTER_CLOCK/14)
|
||||
MCFG_MC6845_SHOW_BORDER_AREA(false)
|
||||
MCFG_MC6845_CHAR_WIDTH(14)
|
||||
MCFG_MC6845_UPDATE_ROW_CB(tv950_state, crtc_update_row)
|
||||
MCFG_MC6845_ADDR_CHANGED_CB(tv950_state, crtc_update_addr)
|
||||
MCFG_MC6845_OUT_HSYNC_CB(WRITELINE(VIA_TAG, via6522_device, write_pb6))
|
||||
MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, tv950_state, crtc_vs_w))
|
||||
MCFG_VIDEO_SET_SCREEN(nullptr)
|
||||
R6545_1(config, m_crtc, MASTER_CLOCK/14);
|
||||
m_crtc->set_screen("screen");
|
||||
m_crtc->set_show_border_area(false);
|
||||
m_crtc->set_char_width(14);
|
||||
m_crtc->set_update_row_callback(FUNC(tv950_state::crtc_update_row), this);
|
||||
m_crtc->set_on_update_addr_change_callback(FUNC(tv950_state::crtc_update_addr), this);
|
||||
m_crtc->out_hsync_callback().set(VIA_TAG, FUNC(via6522_device::write_pb6));
|
||||
m_crtc->out_vsync_callback().set(FUNC(tv950_state::crtc_vs_w));
|
||||
m_crtc->set_screen(nullptr);
|
||||
|
||||
MCFG_DEVICE_ADD(VIA_TAG, VIA6522, MASTER_CLOCK/14)
|
||||
MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M6502_NMI_LINE))
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, tv950_state, via_a_w))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, tv950_state, via_b_w))
|
||||
MCFG_VIA6522_READPB_HANDLER(READ8(*this, tv950_state, via_b_r))
|
||||
MCFG_VIA6522_CA2_HANDLER(WRITELINE(*this, tv950_state, via_crtc_reset_w))
|
||||
//MCFG_VIA6522_CB2_HANDLER(WRITELINE(*this, tv950_state, via_blink_rate_w))
|
||||
VIA6522(config, m_via, MASTER_CLOCK/14);
|
||||
m_via->irq_handler().set_inputline(m_maincpu, M6502_NMI_LINE);
|
||||
m_via->writepa_handler().set(FUNC(tv950_state::via_a_w));
|
||||
m_via->writepb_handler().set(FUNC(tv950_state::via_b_w));
|
||||
m_via->readpb_handler().set(FUNC(tv950_state::via_b_r));
|
||||
m_via->ca2_handler().set(FUNC(tv950_state::via_crtc_reset_w));
|
||||
//m_via->cb2_handler().set(FUNC(tv950_state::via_blink_rate_w));
|
||||
|
||||
MCFG_DEVICE_ADD(ACIA1_TAG, MOS6551, 0)
|
||||
MCFG_MOS6551_XTAL(MASTER_CLOCK/13)
|
||||
MOS6551(config, ACIA1_TAG, 0).set_xtal(MASTER_CLOCK/13);
|
||||
MOS6551(config, ACIA2_TAG, 0).set_xtal(MASTER_CLOCK/13);
|
||||
MOS6551(config, ACIA3_TAG, 0).set_xtal(MASTER_CLOCK/13);
|
||||
|
||||
MCFG_DEVICE_ADD(ACIA2_TAG, MOS6551, 0)
|
||||
MCFG_MOS6551_XTAL(MASTER_CLOCK/13)
|
||||
|
||||
MCFG_DEVICE_ADD(ACIA3_TAG, MOS6551, 0)
|
||||
MCFG_MOS6551_XTAL(MASTER_CLOCK/13)
|
||||
|
||||
MCFG_DEVICE_ADD("kbd", I8748, XTAL(5'714'300))
|
||||
MACHINE_CONFIG_END
|
||||
I8748(config, "kbd", XTAL(5'714'300));
|
||||
}
|
||||
|
||||
/* ROM definition */
|
||||
ROM_START( tv950 )
|
||||
|
||||
@ -90,59 +90,61 @@ static INPUT_PORTS_START(vectrex)
|
||||
|
||||
INPUT_PORTS_END
|
||||
|
||||
static void vectrex_cart(device_slot_interface &device)
|
||||
void vectrex_base_state::vectrex_cart(device_slot_interface &device)
|
||||
{
|
||||
device.option_add_internal("vec_rom", VECTREX_ROM_STD);
|
||||
device.option_add_internal("vec_rom64k", VECTREX_ROM_64K);
|
||||
device.option_add_internal("vec_sram", VECTREX_ROM_SRAM);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(vectrex_base_state::vectrex_base)
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("maincpu", MC6809, 6_MHz_XTAL) // 68A09
|
||||
void vectrex_base_state::vectrex_base(machine_config &config)
|
||||
{
|
||||
MC6809(config, m_maincpu, 6_MHz_XTAL); // 68A09
|
||||
|
||||
/* video hardware */
|
||||
MCFG_VECTOR_ADD("vector")
|
||||
MCFG_SCREEN_ADD("screen", VECTOR)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
MCFG_SCREEN_SIZE(400, 300)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 399, 0, 299)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(vectrex_base_state, screen_update_vectrex)
|
||||
VECTOR(config, m_vector, 0);
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_VECTOR);
|
||||
m_screen->set_refresh_hz(60);
|
||||
m_screen->set_size(400, 300);
|
||||
m_screen->set_visarea(0, 399, 0, 299);
|
||||
m_screen->set_screen_update(FUNC(vectrex_base_state::screen_update_vectrex));
|
||||
|
||||
/* sound hardware */
|
||||
SPEAKER(config, "speaker").front_center();
|
||||
MCFG_DEVICE_ADD("dac", MC1408, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.25) // mc1408.ic301 (also used for vector generation)
|
||||
MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
|
||||
MCFG_SOUND_ROUTE(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac", -1.0, DAC_VREF_NEG_INPUT)
|
||||
MC1408(config, m_dac, 0).add_route(ALL_OUTPUTS, "speaker", 0.25); // mc1408.ic301 (also used for vector generation)
|
||||
voltage_regulator_device &vreg(VOLTAGE_REGULATOR(config, "vref", 0));
|
||||
vreg.set_output(5.0);
|
||||
vreg.add_route(0, "dac", 1.0, DAC_VREF_POS_INPUT);
|
||||
vreg.add_route(0, "dac", -1.0, DAC_VREF_NEG_INPUT);
|
||||
|
||||
MCFG_DEVICE_ADD("ay8912", AY8912, 6_MHz_XTAL / 4)
|
||||
MCFG_AY8910_PORT_A_READ_CB(IOPORT("BUTTONS"))
|
||||
MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(*this, vectrex_base_state, vectrex_psg_port_w))
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.2)
|
||||
AY8912(config, m_ay8912, 6_MHz_XTAL / 4);
|
||||
m_ay8912->port_a_read_callback().set_ioport("BUTTONS");
|
||||
m_ay8912->port_a_write_callback().set(FUNC(vectrex_base_state::vectrex_psg_port_w));
|
||||
m_ay8912->add_route(ALL_OUTPUTS, "speaker", 0.2);
|
||||
|
||||
/* via */
|
||||
MCFG_DEVICE_ADD("via6522_0", VIA6522, 6_MHz_XTAL / 4)
|
||||
MCFG_VIA6522_READPA_HANDLER(READ8(*this, vectrex_base_state, vectrex_via_pa_r))
|
||||
MCFG_VIA6522_READPB_HANDLER(READ8(*this, vectrex_base_state, vectrex_via_pb_r))
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, vectrex_base_state, v_via_pa_w))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, vectrex_base_state, v_via_pb_w))
|
||||
MCFG_VIA6522_CA2_HANDLER(WRITELINE(*this, vectrex_base_state, v_via_ca2_w))
|
||||
MCFG_VIA6522_CB2_HANDLER(WRITELINE(*this, vectrex_base_state, v_via_cb2_w))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, vectrex_base_state, vectrex_via_irq))
|
||||
MACHINE_CONFIG_END
|
||||
VIA6522(config, m_via6522_0, 6_MHz_XTAL / 4);
|
||||
m_via6522_0->readpa_handler().set(FUNC(vectrex_base_state::vectrex_via_pa_r));
|
||||
m_via6522_0->readpb_handler().set(FUNC(vectrex_base_state::vectrex_via_pb_r));
|
||||
m_via6522_0->writepa_handler().set(FUNC(vectrex_base_state::v_via_pa_w));
|
||||
m_via6522_0->writepb_handler().set(FUNC(vectrex_base_state::v_via_pb_w));
|
||||
m_via6522_0->ca2_handler().set(FUNC(vectrex_base_state::v_via_ca2_w));
|
||||
m_via6522_0->cb2_handler().set(FUNC(vectrex_base_state::v_via_cb2_w));
|
||||
m_via6522_0->irq_handler().set(FUNC(vectrex_base_state::vectrex_via_irq));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(vectrex_state::vectrex)
|
||||
void vectrex_state::vectrex(machine_config &config)
|
||||
{
|
||||
vectrex_base(config);
|
||||
|
||||
MCFG_DEVICE_MODIFY("maincpu")
|
||||
MCFG_DEVICE_PROGRAM_MAP(vectrex_map)
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &vectrex_state::vectrex_map);
|
||||
|
||||
/* cartridge */
|
||||
MCFG_VECTREX_CARTRIDGE_ADD("cartslot", vectrex_cart, nullptr)
|
||||
vectrex_cart_slot_device &slot(VECTREX_CART_SLOT(config, "cartslot", 0));
|
||||
vectrex_cart(slot);
|
||||
|
||||
/* software lists */
|
||||
MCFG_SOFTWARE_LIST_ADD("cart_list","vectrex")
|
||||
MACHINE_CONFIG_END
|
||||
SOFTWARE_LIST(config, "cart_list").set_type("vectrex", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
}
|
||||
|
||||
ROM_START(vectrex)
|
||||
ROM_REGION(0x2000,"maincpu", 0)
|
||||
@ -224,17 +226,16 @@ static INPUT_PORTS_START(raaspec)
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
MACHINE_CONFIG_START(raaspec_state::raaspec)
|
||||
void raaspec_state::raaspec(machine_config &config)
|
||||
{
|
||||
vectrex_base(config);
|
||||
|
||||
MCFG_DEVICE_MODIFY("maincpu")
|
||||
MCFG_DEVICE_PROGRAM_MAP(raaspec_map)
|
||||
MCFG_NVRAM_ADD_0FILL("nvram")
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &raaspec_state::raaspec_map);
|
||||
|
||||
/* via */
|
||||
MCFG_DEVICE_MODIFY("via6522_0")
|
||||
MCFG_VIA6522_READPB_HANDLER(READ8(*this, raaspec_state, vectrex_s1_via_pb_r))
|
||||
MACHINE_CONFIG_END
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
|
||||
m_via6522_0->readpb_handler().set(FUNC(raaspec_state::vectrex_s1_via_pb_r));
|
||||
}
|
||||
|
||||
ROM_START(raaspec)
|
||||
ROM_REGION(0x10000,"maincpu", 0)
|
||||
|
||||
@ -152,7 +152,7 @@ private:
|
||||
DECLARE_WRITE_LINE_MEMBER( mux_serial_b_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( mux_serial_a_w );
|
||||
|
||||
DECLARE_PALETTE_INIT( victor9k );
|
||||
void palette_init(palette_device &palette);
|
||||
|
||||
// video state
|
||||
int m_brt;
|
||||
@ -608,7 +608,7 @@ WRITE_LINE_MEMBER( victor9k_state::fdc_irq_w )
|
||||
// MACHINE INITIALIZATION
|
||||
//**************************************************************************
|
||||
|
||||
PALETTE_INIT_MEMBER(victor9k_state, victor9k)
|
||||
void victor9k_state::palette_init(palette_device &palette)
|
||||
{
|
||||
palette.set_pen_color(0, rgb_t(0x00, 0x00, 0x00));
|
||||
|
||||
@ -679,121 +679,123 @@ void victor9k_state::machine_reset()
|
||||
// MACHINE_CONFIG( victor9k )
|
||||
//-------------------------------------------------
|
||||
|
||||
MACHINE_CONFIG_START(victor9k_state::victor9k)
|
||||
void victor9k_state::victor9k(machine_config &config)
|
||||
{
|
||||
// basic machine hardware
|
||||
MCFG_DEVICE_ADD(I8088_TAG, I8088, XTAL(30'000'000)/6)
|
||||
MCFG_DEVICE_PROGRAM_MAP(victor9k_mem)
|
||||
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE(I8259A_TAG, pic8259_device, inta_cb)
|
||||
I8088(config, m_maincpu, XTAL(30'000'000)/6);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &victor9k_state::victor9k_mem);
|
||||
m_maincpu->set_irq_acknowledge_callback(I8259A_TAG, FUNC(pic8259_device::inta_cb));
|
||||
|
||||
// video hardware
|
||||
MCFG_SCREEN_ADD_MONOCHROME(SCREEN_TAG, RASTER, rgb_t::green())
|
||||
MCFG_SCREEN_REFRESH_RATE(50)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // not accurate
|
||||
MCFG_SCREEN_UPDATE_DEVICE(HD46505S_TAG, hd6845_device, screen_update)
|
||||
MCFG_SCREEN_SIZE(640, 480)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 480-1)
|
||||
MCFG_PALETTE_ADD("palette", 16)
|
||||
MCFG_PALETTE_INIT_OWNER(victor9k_state, victor9k)
|
||||
screen_device &screen(SCREEN(config, SCREEN_TAG, SCREEN_TYPE_RASTER));
|
||||
screen.set_color(rgb_t::green());
|
||||
screen.set_refresh_hz(50);
|
||||
screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); // not accurate
|
||||
screen.set_screen_update(HD46505S_TAG, FUNC(hd6845_device::screen_update));
|
||||
screen.set_size(640, 480);
|
||||
screen.set_visarea(0, 640-1, 0, 480-1);
|
||||
|
||||
MCFG_MC6845_ADD(HD46505S_TAG, HD6845, SCREEN_TAG, XTAL(30'000'000)/10) // HD6845 == HD46505S
|
||||
MCFG_MC6845_SHOW_BORDER_AREA(true)
|
||||
MCFG_MC6845_CHAR_WIDTH(10)
|
||||
MCFG_MC6845_UPDATE_ROW_CB(victor9k_state, crtc_update_row)
|
||||
MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, victor9k_state, vert_w))
|
||||
PALETTE(config, m_palette, 16);
|
||||
m_palette->set_init(FUNC(victor9k_state::palette_init));
|
||||
|
||||
HD6845(config, m_crtc, XTAL(30'000'000)/10); // HD6845 == HD46505S
|
||||
m_crtc->set_screen(SCREEN_TAG);
|
||||
m_crtc->set_show_border_area(true);
|
||||
m_crtc->set_char_width(10);
|
||||
m_crtc->set_update_row_callback(FUNC(victor9k_state::crtc_update_row), this);
|
||||
m_crtc->out_vsync_callback().set(FUNC(victor9k_state::vert_w));
|
||||
|
||||
// sound hardware
|
||||
SPEAKER(config, "mono").front_center();
|
||||
MCFG_DEVICE_ADD(HC55516_TAG, HC55516, 0)
|
||||
HC55516(config, m_cvsd, 0);
|
||||
//MCFG_HC55516_DIG_OUT_CB(WRITELINE(MC6852_TAG, mc6852_device, rx_w))
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
||||
m_cvsd->add_route(ALL_OUTPUTS, "mono", 0.25);
|
||||
|
||||
// devices
|
||||
MCFG_IEEE488_BUS_ADD()
|
||||
MCFG_IEEE488_DAV_CALLBACK(WRITELINE(M6522_1_TAG, via6522_device, write_pb0))
|
||||
MCFG_IEEE488_EOI_CALLBACK(WRITELINE(M6522_1_TAG, via6522_device, write_pb1))
|
||||
MCFG_IEEE488_REN_CALLBACK(WRITELINE(M6522_1_TAG, via6522_device, write_pb2))
|
||||
MCFG_IEEE488_ATN_CALLBACK(WRITELINE(M6522_1_TAG, via6522_device, write_pb3))
|
||||
MCFG_IEEE488_IFC_CALLBACK(WRITELINE(M6522_1_TAG, via6522_device, write_pb4))
|
||||
MCFG_IEEE488_SRQ_CALLBACK(WRITELINE(M6522_1_TAG, via6522_device, write_pb5))
|
||||
MCFG_IEEE488_NRFD_CALLBACK(WRITELINE(*this, victor9k_state, write_nfrd))
|
||||
MCFG_IEEE488_NDAC_CALLBACK(WRITELINE(*this, victor9k_state, write_ndac))
|
||||
IEEE488(config, m_ieee488, 0);
|
||||
|
||||
MCFG_DEVICE_ADD(I8259A_TAG, PIC8259, 0)
|
||||
MCFG_PIC8259_OUT_INT_CB(INPUTLINE(I8088_TAG, INPUT_LINE_IRQ0))
|
||||
m_ieee488->dav_callback().set(M6522_1_TAG, FUNC(via6522_device::write_pb0));
|
||||
m_ieee488->eoi_callback().set(M6522_1_TAG, FUNC(via6522_device::write_pb1));
|
||||
m_ieee488->ren_callback().set(M6522_1_TAG, FUNC(via6522_device::write_pb2));
|
||||
m_ieee488->atn_callback().set(M6522_1_TAG, FUNC(via6522_device::write_pb3));
|
||||
m_ieee488->ifc_callback().set(M6522_1_TAG, FUNC(via6522_device::write_pb4));
|
||||
m_ieee488->srq_callback().set(M6522_1_TAG, FUNC(via6522_device::write_pb5));
|
||||
m_ieee488->nrfd_callback().set(FUNC(victor9k_state::write_nfrd));
|
||||
m_ieee488->ndac_callback().set(FUNC(victor9k_state::write_ndac));
|
||||
|
||||
MCFG_DEVICE_ADD(I8253_TAG, PIT8253, 0)
|
||||
MCFG_PIT8253_CLK0(2500000)
|
||||
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(*this, victor9k_state, mux_serial_b_w))
|
||||
MCFG_PIT8253_CLK1(2500000)
|
||||
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(*this, victor9k_state, mux_serial_a_w))
|
||||
MCFG_PIT8253_CLK2(100000)
|
||||
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(I8259A_TAG, pic8259_device, ir2_w))
|
||||
PIC8259(config, m_pic, 0);
|
||||
m_pic->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
|
||||
|
||||
MCFG_DEVICE_ADD(UPD7201_TAG, UPD7201, XTAL(30'000'000)/30)
|
||||
MCFG_Z80DART_OUT_TXDA_CB(WRITELINE(RS232_A_TAG, rs232_port_device, write_txd))
|
||||
MCFG_Z80DART_OUT_DTRA_CB(WRITELINE(RS232_A_TAG, rs232_port_device, write_dtr))
|
||||
MCFG_Z80DART_OUT_RTSA_CB(WRITELINE(RS232_A_TAG, rs232_port_device, write_rts))
|
||||
MCFG_Z80DART_OUT_TXDB_CB(WRITELINE(RS232_B_TAG, rs232_port_device, write_txd))
|
||||
MCFG_Z80DART_OUT_DTRB_CB(WRITELINE(RS232_B_TAG, rs232_port_device, write_dtr))
|
||||
MCFG_Z80DART_OUT_RTSB_CB(WRITELINE(RS232_B_TAG, rs232_port_device, write_rts))
|
||||
MCFG_Z80DART_OUT_INT_CB(WRITELINE(I8259A_TAG, pic8259_device, ir1_w))
|
||||
pit8253_device &pit(PIT8253(config, I8253_TAG, 0));
|
||||
pit.set_clk<0>(2500000);
|
||||
pit.out_handler<0>().set(FUNC(victor9k_state::mux_serial_b_w));
|
||||
pit.set_clk<1>(2500000);
|
||||
pit.out_handler<1>().set(FUNC(victor9k_state::mux_serial_a_w));
|
||||
pit.set_clk<2>(100000);
|
||||
pit.out_handler<2>().set(I8259A_TAG, FUNC(pic8259_device::ir2_w));
|
||||
|
||||
MCFG_DEVICE_ADD(MC6852_TAG, MC6852, XTAL(30'000'000)/30)
|
||||
MCFG_MC6852_TX_DATA_CALLBACK(WRITELINE(HC55516_TAG, hc55516_device, digit_w))
|
||||
MCFG_MC6852_SM_DTR_CALLBACK(WRITELINE(*this, victor9k_state, ssda_sm_dtr_w))
|
||||
MCFG_MC6852_IRQ_CALLBACK(WRITELINE(*this, victor9k_state, ssda_irq_w))
|
||||
UPD7201(config, m_upd7201, XTAL(30'000'000)/30);
|
||||
m_upd7201->out_txda_callback().set(RS232_A_TAG, FUNC(rs232_port_device::write_txd));
|
||||
m_upd7201->out_dtra_callback().set(RS232_A_TAG, FUNC(rs232_port_device::write_dtr));
|
||||
m_upd7201->out_rtsa_callback().set(RS232_A_TAG, FUNC(rs232_port_device::write_rts));
|
||||
m_upd7201->out_txdb_callback().set(RS232_B_TAG, FUNC(rs232_port_device::write_txd));
|
||||
m_upd7201->out_dtrb_callback().set(RS232_B_TAG, FUNC(rs232_port_device::write_dtr));
|
||||
m_upd7201->out_rtsb_callback().set(RS232_B_TAG, FUNC(rs232_port_device::write_rts));
|
||||
m_upd7201->out_int_callback().set(I8259A_TAG, FUNC(pic8259_device::ir1_w));
|
||||
|
||||
MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, XTAL(30'000'000)/30)
|
||||
MCFG_VIA6522_READPA_HANDLER(READ8(IEEE488_TAG, ieee488_device, dio_r))
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, victor9k_state, via1_pa_w))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, victor9k_state, via1_pb_w))
|
||||
MCFG_VIA6522_CB2_HANDLER(WRITELINE(*this, victor9k_state, codec_vol_w))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, victor9k_state, via1_irq_w))
|
||||
MC6852(config, m_ssda, XTAL(30'000'000)/30);
|
||||
m_ssda->tx_data_callback().set(HC55516_TAG, FUNC(hc55516_device::digit_w));
|
||||
m_ssda->sm_dtr_callback().set(FUNC(victor9k_state::ssda_sm_dtr_w));
|
||||
m_ssda->irq_callback().set(FUNC(victor9k_state::ssda_irq_w));
|
||||
|
||||
MCFG_DEVICE_ADD(M6522_2_TAG, VIA6522, XTAL(30'000'000)/30)
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, victor9k_state, via2_pa_w))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, victor9k_state, via2_pb_w))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, victor9k_state, via2_irq_w))
|
||||
VIA6522(config, m_via1, XTAL(30'000'000)/30);
|
||||
m_via1->readpa_handler().set(IEEE488_TAG, FUNC(ieee488_device::dio_r));
|
||||
m_via1->writepa_handler().set(FUNC(victor9k_state::via1_pa_w));
|
||||
m_via1->writepb_handler().set(FUNC(victor9k_state::via1_pb_w));
|
||||
m_via1->cb2_handler().set(FUNC(victor9k_state::codec_vol_w));
|
||||
m_via1->irq_handler().set(FUNC(victor9k_state::via1_irq_w));
|
||||
|
||||
MCFG_DEVICE_ADD(M6522_3_TAG, VIA6522, XTAL(30'000'000)/30)
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, victor9k_state, via3_pb_w))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, victor9k_state, via3_irq_w))
|
||||
VIA6522(config, m_via2, XTAL(30'000'000)/30);
|
||||
m_via2->writepa_handler().set(FUNC(victor9k_state::via2_pa_w));
|
||||
m_via2->writepb_handler().set(FUNC(victor9k_state::via2_pb_w));
|
||||
m_via2->irq_handler().set(FUNC(victor9k_state::via2_irq_w));
|
||||
|
||||
MCFG_DEVICE_ADD(m_centronics, CENTRONICS, centronics_devices, "printer")
|
||||
MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(M6522_1_TAG, via6522_device, write_pb5))
|
||||
MCFG_CENTRONICS_ACK_HANDLER(WRITELINE(M6522_1_TAG, via6522_device, write_pb6))
|
||||
MCFG_CENTRONICS_SELECT_HANDLER(WRITELINE(M6522_1_TAG, via6522_device, write_pb7))
|
||||
VIA6522(config, m_via3, XTAL(30'000'000)/30);
|
||||
m_via3->writepb_handler().set(FUNC(victor9k_state::via3_pb_w));
|
||||
m_via3->irq_handler().set(FUNC(victor9k_state::via3_irq_w));
|
||||
|
||||
MCFG_DEVICE_ADD(RS232_A_TAG, RS232_PORT, default_rs232_devices, nullptr)
|
||||
MCFG_RS232_RXD_HANDLER(WRITELINE(UPD7201_TAG, z80dart_device, rxa_w))
|
||||
MCFG_RS232_DCD_HANDLER(WRITELINE(UPD7201_TAG, z80dart_device, dcda_w))
|
||||
MCFG_RS232_RI_HANDLER(WRITELINE(*this, victor9k_state, write_ria))
|
||||
MCFG_RS232_CTS_HANDLER(WRITELINE(UPD7201_TAG, z80dart_device, ctsa_w))
|
||||
MCFG_RS232_DSR_HANDLER(WRITELINE(M6522_2_TAG, via6522_device, write_pa3))
|
||||
CENTRONICS(config, m_centronics, centronics_devices, "printer");
|
||||
m_centronics->busy_handler().set(M6522_1_TAG, FUNC(via6522_device::write_pb5));
|
||||
m_centronics->ack_handler().set(M6522_1_TAG, FUNC(via6522_device::write_pb6));
|
||||
m_centronics->select_handler().set(M6522_1_TAG, FUNC(via6522_device::write_pb7));
|
||||
|
||||
MCFG_DEVICE_ADD(RS232_B_TAG, RS232_PORT, default_rs232_devices, nullptr)
|
||||
MCFG_RS232_RXD_HANDLER(WRITELINE(UPD7201_TAG, z80dart_device, rxb_w))
|
||||
MCFG_RS232_DCD_HANDLER(WRITELINE(UPD7201_TAG, z80dart_device, dcdb_w))
|
||||
MCFG_RS232_RI_HANDLER(WRITELINE(*this, victor9k_state, write_ria))
|
||||
MCFG_RS232_CTS_HANDLER(WRITELINE(UPD7201_TAG, z80dart_device, ctsb_w))
|
||||
MCFG_RS232_DSR_HANDLER(WRITELINE(M6522_2_TAG, via6522_device, write_pa5))
|
||||
RS232_PORT(config, m_rs232a, default_rs232_devices, nullptr);
|
||||
m_rs232a->rxd_handler().set(UPD7201_TAG, FUNC(z80dart_device::rxa_w));
|
||||
m_rs232a->dcd_handler().set(UPD7201_TAG, FUNC(z80dart_device::dcda_w));
|
||||
m_rs232a->ri_handler().set(FUNC(victor9k_state::write_ria));
|
||||
m_rs232a->cts_handler().set(UPD7201_TAG, FUNC(z80dart_device::ctsa_w));
|
||||
m_rs232a->dsr_handler().set(M6522_2_TAG, FUNC(via6522_device::write_pa3));
|
||||
|
||||
MCFG_DEVICE_ADD(KB_TAG, VICTOR9K_KEYBOARD, 0)
|
||||
MCFG_VICTOR9K_KBRDY_HANDLER(WRITELINE(*this, victor9k_state, kbrdy_w))
|
||||
MCFG_VICTOR9K_KBDATA_HANDLER(WRITELINE(*this, victor9k_state, kbdata_w))
|
||||
RS232_PORT(config, m_rs232b, default_rs232_devices, nullptr);
|
||||
m_rs232b->rxd_handler().set(UPD7201_TAG, FUNC(z80dart_device::rxb_w));
|
||||
m_rs232b->dcd_handler().set(UPD7201_TAG, FUNC(z80dart_device::dcdb_w));
|
||||
m_rs232b->ri_handler().set(FUNC(victor9k_state::write_ria));
|
||||
m_rs232b->cts_handler().set(UPD7201_TAG, FUNC(z80dart_device::ctsb_w));
|
||||
m_rs232b->dsr_handler().set(M6522_2_TAG, FUNC(via6522_device::write_pa5));
|
||||
|
||||
VICTOR9K_KEYBOARD(config, m_kb, 0);
|
||||
m_kb->kbrdy_handler().set(FUNC(victor9k_state::kbrdy_w));
|
||||
m_kb->kbdata_handler().set(FUNC(victor9k_state::kbdata_w));
|
||||
|
||||
VICTOR_9000_FDC(config, m_fdc, 0);
|
||||
m_fdc->irq_wr_callback().set(FUNC(victor9k_state::fdc_irq_w));
|
||||
m_fdc->syn_wr_callback().set(I8259A_TAG, FUNC(pic8259_device::ir0_w)).invert();
|
||||
m_fdc->lbrdy_wr_callback().set_inputline(I8088_TAG, INPUT_LINE_TEST).invert();
|
||||
|
||||
// internal ram
|
||||
MCFG_RAM_ADD(RAM_TAG)
|
||||
MCFG_RAM_DEFAULT_SIZE("128K")
|
||||
RAM(config, m_ram).set_default_size("128K");
|
||||
|
||||
// software list
|
||||
MCFG_SOFTWARE_LIST_ADD("flop_list", "victor9k_flop")
|
||||
MACHINE_CONFIG_END
|
||||
SOFTWARE_LIST(config, "flop_list").set_type("victor9k_flop", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
@ -46,13 +46,7 @@ public:
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_rtc(*this, "rtc"),
|
||||
m_via(*this, "via"),
|
||||
m_uart0(*this, "uart0"),
|
||||
m_uart1(*this, "uart1"),
|
||||
m_uart2(*this, "uart2"),
|
||||
m_uart3(*this, "uart3"),
|
||||
m_uart4(*this, "uart4"),
|
||||
m_uart5(*this, "uart5"),
|
||||
m_uart6(*this, "uart6"),
|
||||
m_uart(*this, "uart%u", 0U),
|
||||
m_videocpu(*this, "videocpu"),
|
||||
m_videoctrl(*this, "videoctrl"),
|
||||
m_videoirq(*this, "videoirq"),
|
||||
@ -111,13 +105,7 @@ private:
|
||||
required_device<m68000_device> m_maincpu;
|
||||
required_device<mm58274c_device> m_rtc;
|
||||
required_device<via6522_device> m_via;
|
||||
required_device<mc2661_device> m_uart0;
|
||||
required_device<mc2661_device> m_uart1;
|
||||
required_device<mc2661_device> m_uart2;
|
||||
required_device<mc2661_device> m_uart3;
|
||||
required_device<mc2661_device> m_uart4;
|
||||
required_device<mc2661_device> m_uart5;
|
||||
required_device<mc2661_device> m_uart6;
|
||||
required_device_array<mc2661_device, 7> m_uart;
|
||||
required_device<cpu_device> m_videocpu;
|
||||
required_device<ls259_device> m_videoctrl;
|
||||
required_device<input_merger_device> m_videoirq;
|
||||
@ -134,11 +122,11 @@ private:
|
||||
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { return 0; }
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
|
||||
|
||||
void wicat_mem(address_map &map);
|
||||
void wicat_video_io(address_map &map);
|
||||
void wicat_video_mem(address_map &map);
|
||||
void wicat_wd1000_io(address_map &map);
|
||||
void wicat_wd1000_mem(address_map &map);
|
||||
void main_mem(address_map &map);
|
||||
void video_io(address_map &map);
|
||||
void video_mem(address_map &map);
|
||||
void wd1000_io(address_map &map);
|
||||
void wd1000_mem(address_map &map);
|
||||
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
@ -161,7 +149,7 @@ private:
|
||||
};
|
||||
|
||||
|
||||
void wicat_state::wicat_mem(address_map &map)
|
||||
void wicat_state::main_mem(address_map &map)
|
||||
{
|
||||
map.unmap_value_low();
|
||||
map.global_mask(0xffffff);
|
||||
@ -171,13 +159,13 @@ void wicat_state::wicat_mem(address_map &map)
|
||||
map(0x300000, 0xdfffff).rw(FUNC(wicat_state::invalid_r), FUNC(wicat_state::invalid_w));
|
||||
map(0xeff800, 0xeffbff).ram(); // memory mapping SRAM, used during boot sequence for storing various data (TODO)
|
||||
map(0xeffc00, 0xeffc01).rw(FUNC(wicat_state::memmap_r), FUNC(wicat_state::memmap_w));
|
||||
map(0xf00000, 0xf00007).rw(m_uart0, FUNC(mc2661_device::read), FUNC(mc2661_device::write)).umask16(0xff00); // UARTs
|
||||
map(0xf00008, 0xf0000f).rw(m_uart1, FUNC(mc2661_device::read), FUNC(mc2661_device::write)).umask16(0xff00);
|
||||
map(0xf00010, 0xf00017).rw(m_uart2, FUNC(mc2661_device::read), FUNC(mc2661_device::write)).umask16(0xff00);
|
||||
map(0xf00018, 0xf0001f).rw(m_uart3, FUNC(mc2661_device::read), FUNC(mc2661_device::write)).umask16(0xff00);
|
||||
map(0xf00020, 0xf00027).rw(m_uart4, FUNC(mc2661_device::read), FUNC(mc2661_device::write)).umask16(0xff00);
|
||||
map(0xf00028, 0xf0002f).rw(m_uart5, FUNC(mc2661_device::read), FUNC(mc2661_device::write)).umask16(0xff00);
|
||||
map(0xf00030, 0xf00037).rw(m_uart6, FUNC(mc2661_device::read), FUNC(mc2661_device::write)).umask16(0xff00);
|
||||
map(0xf00000, 0xf00007).rw(m_uart[0], FUNC(mc2661_device::read), FUNC(mc2661_device::write)).umask16(0xff00); // UARTs
|
||||
map(0xf00008, 0xf0000f).rw(m_uart[1], FUNC(mc2661_device::read), FUNC(mc2661_device::write)).umask16(0xff00);
|
||||
map(0xf00010, 0xf00017).rw(m_uart[2], FUNC(mc2661_device::read), FUNC(mc2661_device::write)).umask16(0xff00);
|
||||
map(0xf00018, 0xf0001f).rw(m_uart[3], FUNC(mc2661_device::read), FUNC(mc2661_device::write)).umask16(0xff00);
|
||||
map(0xf00020, 0xf00027).rw(m_uart[4], FUNC(mc2661_device::read), FUNC(mc2661_device::write)).umask16(0xff00);
|
||||
map(0xf00028, 0xf0002f).rw(m_uart[5], FUNC(mc2661_device::read), FUNC(mc2661_device::write)).umask16(0xff00);
|
||||
map(0xf00030, 0xf00037).rw(m_uart[6], FUNC(mc2661_device::read), FUNC(mc2661_device::write)).umask16(0xff00);
|
||||
map(0xf00040, 0xf0005f).rw(FUNC(wicat_state::via_r), FUNC(wicat_state::via_w));
|
||||
map(0xf00060, 0xf0007f).rw(m_rtc, FUNC(mm58274c_device::read), FUNC(mm58274c_device::write)).umask16(0xff00);
|
||||
map(0xf000d0, 0xf000d0).w("ledlatch", FUNC(ls259_device::write_nibble_d3));
|
||||
@ -186,13 +174,13 @@ void wicat_state::wicat_mem(address_map &map)
|
||||
map(0xf00f00, 0xf00fff).rw(FUNC(wicat_state::invalid_r), FUNC(wicat_state::invalid_w));
|
||||
}
|
||||
|
||||
void wicat_state::wicat_video_mem(address_map &map)
|
||||
void wicat_state::video_mem(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x7fff).rom().region("g1", 0x0000);
|
||||
map(0x8000, 0xffff).ram();
|
||||
}
|
||||
|
||||
void wicat_state::wicat_video_io(address_map &map)
|
||||
void wicat_state::video_io(address_map &map)
|
||||
{
|
||||
// these are largely wild guesses...
|
||||
map(0x0000, 0x0003).rw(FUNC(wicat_state::video_timer_r), FUNC(wicat_state::video_timer_w)); // some sort of timer?
|
||||
@ -211,13 +199,13 @@ void wicat_state::wicat_video_io(address_map &map)
|
||||
map(0x9000, 0x9fff).rom().region("g2char", 0x0000);
|
||||
}
|
||||
|
||||
void wicat_state::wicat_wd1000_mem(address_map &map)
|
||||
void wicat_state::wd1000_mem(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x17ff).rom().region("wd3", 0x0000);
|
||||
map(0x1800, 0x1fff).noprw();
|
||||
}
|
||||
|
||||
void wicat_state::wicat_wd1000_io(address_map &map)
|
||||
void wicat_state::wd1000_io(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x00ff).ram(); // left bank - RAM
|
||||
map(0x0100, 0x01ff).ram(); // right bank - I/O ports (TODO)
|
||||
@ -309,12 +297,8 @@ void wicat_state::machine_reset()
|
||||
// on the terminal board /DCD on both INS2651s are tied to GND
|
||||
m_videouart0->dcd_w(0);
|
||||
m_videouart1->dcd_w(0);
|
||||
m_uart0->dcd_w(0);
|
||||
m_uart1->dcd_w(0);
|
||||
m_uart2->dcd_w(0);
|
||||
m_uart3->dcd_w(0);
|
||||
m_uart4->dcd_w(0);
|
||||
m_uart5->dcd_w(0);
|
||||
for (int i = 0; i < 6; i++)
|
||||
m_uart[i]->dcd_w(0);
|
||||
|
||||
// initialise im6402 (terminal board)
|
||||
m_videouart->cls1_w(1);
|
||||
@ -736,96 +720,53 @@ I8275_DRAW_CHARACTER_MEMBER(wicat_state::wicat_display_pixels)
|
||||
}
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(wicat_state::wicat)
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("maincpu", M68000, 8_MHz_XTAL)
|
||||
MCFG_DEVICE_PROGRAM_MAP(wicat_mem)
|
||||
void wicat_state::wicat(machine_config &config)
|
||||
{
|
||||
M68000(config, m_maincpu, 8_MHz_XTAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &wicat_state::main_mem);
|
||||
|
||||
MCFG_DEVICE_ADD("via", VIA6522, 8_MHz_XTAL)
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, wicat_state, via_a_w))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, wicat_state, via_b_w))
|
||||
MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M68K_IRQ_1))
|
||||
VIA6522(config, m_via, 8_MHz_XTAL);
|
||||
m_via->writepa_handler().set(FUNC(wicat_state::via_a_w));
|
||||
m_via->writepb_handler().set(FUNC(wicat_state::via_b_w));
|
||||
m_via->irq_handler().set_inputline(m_maincpu, M68K_IRQ_1);
|
||||
|
||||
MCFG_DEVICE_ADD("rtc", MM58274C, 0) // actually an MM58174AN, but should be compatible
|
||||
MCFG_MM58274C_MODE24(0) // 12 hour
|
||||
MCFG_MM58274C_DAY1(1) // monday
|
||||
MM58274C(config, m_rtc, 0); // actually an MM58174AN, but should be compatible
|
||||
m_rtc->set_mode24(0); // 12 hour
|
||||
m_rtc->set_day1(1); // monday
|
||||
|
||||
// internal terminal
|
||||
MCFG_DEVICE_ADD("uart0", MC2661, 5.0688_MHz_XTAL) // connected to terminal board
|
||||
MCFG_MC2661_TXD_HANDLER(WRITELINE("videouart0", mc2661_device, rx_w))
|
||||
MCFG_MC2661_RXRDY_HANDLER(INPUTLINE("maincpu", M68K_IRQ_2))
|
||||
MCFG_MC2661_RTS_HANDLER(WRITELINE("videouart0", mc2661_device, cts_w))
|
||||
MCFG_MC2661_DTR_HANDLER(WRITELINE("videouart0", mc2661_device, dsr_w))
|
||||
MC2661(config, m_uart[0], 5.0688_MHz_XTAL); // connected to terminal board
|
||||
m_uart[0]->txd_handler().set(m_videouart0, FUNC(mc2661_device::rx_w));
|
||||
m_uart[0]->rxrdy_handler().set_inputline(m_maincpu, M68K_IRQ_2);
|
||||
m_uart[0]->rts_handler().set(m_videouart0, FUNC(mc2661_device::cts_w));
|
||||
m_uart[0]->dtr_handler().set(m_videouart0, FUNC(mc2661_device::dsr_w));
|
||||
|
||||
// RS232C ports (x5)
|
||||
MCFG_DEVICE_ADD("uart1", MC2661, 5.0688_MHz_XTAL)
|
||||
MCFG_MC2661_TXD_HANDLER(WRITELINE("serial1", rs232_port_device, write_txd))
|
||||
MCFG_MC2661_RXRDY_HANDLER(INPUTLINE("maincpu", M68K_IRQ_2))
|
||||
MCFG_MC2661_RTS_HANDLER(WRITELINE("serial1", rs232_port_device, write_rts))
|
||||
MCFG_MC2661_DTR_HANDLER(WRITELINE("serial1", rs232_port_device, write_dtr))
|
||||
MCFG_MC2661_TXEMT_DSCHG_HANDLER(INPUTLINE("maincpu", M68K_IRQ_2))
|
||||
|
||||
MCFG_DEVICE_ADD("uart2", MC2661, 5.0688_MHz_XTAL)
|
||||
MCFG_MC2661_TXD_HANDLER(WRITELINE("serial2", rs232_port_device, write_txd))
|
||||
MCFG_MC2661_RXRDY_HANDLER(INPUTLINE("maincpu", M68K_IRQ_2))
|
||||
MCFG_MC2661_RTS_HANDLER(WRITELINE("serial2", rs232_port_device, write_rts))
|
||||
MCFG_MC2661_DTR_HANDLER(WRITELINE("serial2", rs232_port_device, write_dtr))
|
||||
|
||||
MCFG_DEVICE_ADD("uart3", MC2661, 5.0688_MHz_XTAL)
|
||||
MCFG_MC2661_TXD_HANDLER(WRITELINE("serial3", rs232_port_device, write_txd))
|
||||
MCFG_MC2661_RXRDY_HANDLER(INPUTLINE("maincpu", M68K_IRQ_2))
|
||||
MCFG_MC2661_RTS_HANDLER(WRITELINE("serial3", rs232_port_device, write_rts))
|
||||
MCFG_MC2661_DTR_HANDLER(WRITELINE("serial3", rs232_port_device, write_dtr))
|
||||
MCFG_MC2661_TXEMT_DSCHG_HANDLER(INPUTLINE("maincpu", M68K_IRQ_2))
|
||||
|
||||
MCFG_DEVICE_ADD("uart4", MC2661, 5.0688_MHz_XTAL)
|
||||
MCFG_MC2661_TXD_HANDLER(WRITELINE("serial4", rs232_port_device, write_txd))
|
||||
MCFG_MC2661_RXRDY_HANDLER(INPUTLINE("maincpu", M68K_IRQ_2))
|
||||
MCFG_MC2661_RTS_HANDLER(WRITELINE("serial4", rs232_port_device, write_rts))
|
||||
MCFG_MC2661_DTR_HANDLER(WRITELINE("serial4", rs232_port_device, write_dtr))
|
||||
MCFG_MC2661_TXEMT_DSCHG_HANDLER(INPUTLINE("maincpu", M68K_IRQ_2))
|
||||
|
||||
MCFG_DEVICE_ADD("uart5", MC2661, 5.0688_MHz_XTAL)
|
||||
MCFG_MC2661_TXD_HANDLER(WRITELINE("serial5", rs232_port_device, write_txd))
|
||||
MCFG_MC2661_RXRDY_HANDLER(INPUTLINE("maincpu", M68K_IRQ_2))
|
||||
MCFG_MC2661_RTS_HANDLER(WRITELINE("serial5", rs232_port_device, write_rts))
|
||||
MCFG_MC2661_DTR_HANDLER(WRITELINE("serial5", rs232_port_device, write_dtr))
|
||||
MCFG_MC2661_TXEMT_DSCHG_HANDLER(INPUTLINE("maincpu", M68K_IRQ_2))
|
||||
const char *serial_names[5] = { "serial1", "serial2", "serial3", "serial4", "serial5" };
|
||||
for (int i = 1; i <= 5; i++)
|
||||
{
|
||||
MC2661(config, m_uart[i], 5.0688_MHz_XTAL);
|
||||
m_uart[i]->txd_handler().set(serial_names[i - 1], FUNC(rs232_port_device::write_txd));
|
||||
m_uart[i]->rts_handler().set(serial_names[i - 1], FUNC(rs232_port_device::write_rts));
|
||||
m_uart[i]->dtr_handler().set(serial_names[i - 1], FUNC(rs232_port_device::write_dtr));
|
||||
m_uart[i]->rxrdy_handler().set_inputline(m_maincpu, M68K_IRQ_2);
|
||||
m_uart[i]->txemt_dschg_handler().set_inputline(m_maincpu, M68K_IRQ_2);
|
||||
}
|
||||
|
||||
// modem
|
||||
MCFG_DEVICE_ADD("uart6", MC2661, 5.0688_MHz_XTAL) // connected to modem port
|
||||
MCFG_MC2661_RXRDY_HANDLER(INPUTLINE("maincpu", M68K_IRQ_2))
|
||||
MCFG_MC2661_TXEMT_DSCHG_HANDLER(INPUTLINE("maincpu", M68K_IRQ_2))
|
||||
MC2661(config, m_uart[6], 5.0688_MHz_XTAL); // connected to modem port
|
||||
m_uart[6]->rxrdy_handler().set_inputline(m_maincpu, M68K_IRQ_2);
|
||||
m_uart[6]->txemt_dschg_handler().set_inputline(m_maincpu, M68K_IRQ_2);
|
||||
|
||||
MCFG_DEVICE_ADD("serial1",RS232_PORT, default_rs232_devices,nullptr)
|
||||
MCFG_RS232_RXD_HANDLER(WRITELINE("uart1",mc2661_device,rx_w))
|
||||
MCFG_RS232_DCD_HANDLER(WRITELINE("uart1",mc2661_device,dcd_w))
|
||||
MCFG_RS232_DSR_HANDLER(WRITELINE("uart1",mc2661_device,dsr_w))
|
||||
MCFG_RS232_CTS_HANDLER(WRITELINE("uart1",mc2661_device,cts_w))
|
||||
|
||||
MCFG_DEVICE_ADD("serial2",RS232_PORT, default_rs232_devices,nullptr)
|
||||
MCFG_RS232_RXD_HANDLER(WRITELINE("uart2",mc2661_device,rx_w))
|
||||
MCFG_RS232_DCD_HANDLER(WRITELINE("uart2",mc2661_device,dcd_w))
|
||||
MCFG_RS232_DSR_HANDLER(WRITELINE("uart2",mc2661_device,dsr_w))
|
||||
MCFG_RS232_CTS_HANDLER(WRITELINE("uart2",mc2661_device,cts_w))
|
||||
|
||||
MCFG_DEVICE_ADD("serial3",RS232_PORT, default_rs232_devices,nullptr)
|
||||
MCFG_RS232_RXD_HANDLER(WRITELINE("uart3",mc2661_device,rx_w))
|
||||
MCFG_RS232_DCD_HANDLER(WRITELINE("uart3",mc2661_device,dcd_w))
|
||||
MCFG_RS232_DSR_HANDLER(WRITELINE("uart3",mc2661_device,dsr_w))
|
||||
MCFG_RS232_CTS_HANDLER(WRITELINE("uart3",mc2661_device,cts_w))
|
||||
|
||||
MCFG_DEVICE_ADD("serial4",RS232_PORT, default_rs232_devices,nullptr)
|
||||
MCFG_RS232_RXD_HANDLER(WRITELINE("uart4",mc2661_device,rx_w))
|
||||
MCFG_RS232_DCD_HANDLER(WRITELINE("uart4",mc2661_device,dcd_w))
|
||||
MCFG_RS232_DSR_HANDLER(WRITELINE("uart4",mc2661_device,dsr_w))
|
||||
MCFG_RS232_CTS_HANDLER(WRITELINE("uart4",mc2661_device,cts_w))
|
||||
|
||||
MCFG_DEVICE_ADD("serial5",RS232_PORT, default_rs232_devices,nullptr)
|
||||
MCFG_RS232_RXD_HANDLER(WRITELINE("uart5",mc2661_device,rx_w))
|
||||
MCFG_RS232_DCD_HANDLER(WRITELINE("uart5",mc2661_device,dcd_w))
|
||||
MCFG_RS232_DSR_HANDLER(WRITELINE("uart5",mc2661_device,dsr_w))
|
||||
MCFG_RS232_CTS_HANDLER(WRITELINE("uart5",mc2661_device,cts_w))
|
||||
const char *uart_names[5] = { "uart1", "uart2", "uart3", "uart4", "uart5" };
|
||||
for (int i = 1; i <= 5; i++)
|
||||
{
|
||||
rs232_port_device &port(RS232_PORT(config, serial_names[i - 1], default_rs232_devices, nullptr));
|
||||
port.rxd_handler().set(uart_names[i - 1], FUNC(mc2661_device::rx_w));
|
||||
port.dcd_handler().set(uart_names[i - 1], FUNC(mc2661_device::dcd_w));
|
||||
port.dsr_handler().set(uart_names[i - 1], FUNC(mc2661_device::dsr_w));
|
||||
port.cts_handler().set(uart_names[i - 1], FUNC(mc2661_device::cts_w));
|
||||
}
|
||||
|
||||
ls259_device &ledlatch(LS259(config, "ledlatch")); // U19 on I/O board
|
||||
ledlatch.q_out_cb<0>().set(FUNC(wicat_state::adir_w));
|
||||
@ -838,9 +779,9 @@ MACHINE_CONFIG_START(wicat_state::wicat)
|
||||
ledlatch.q_out_cb<7>().set_output("led6").invert();
|
||||
|
||||
/* video hardware */
|
||||
MCFG_DEVICE_ADD("videocpu", Z8002, 8_MHz_XTAL/2) // AMD AMZ8002DC
|
||||
MCFG_DEVICE_PROGRAM_MAP(wicat_video_mem)
|
||||
MCFG_DEVICE_IO_MAP(wicat_video_io)
|
||||
Z8002(config, m_videocpu, 8_MHz_XTAL/2); // AMD AMZ8002DC
|
||||
m_videocpu->set_addrmap(AS_PROGRAM, &wicat_state::video_mem);
|
||||
m_videocpu->set_addrmap(AS_IO, &wicat_state::video_io);
|
||||
|
||||
INPUT_MERGER_ANY_HIGH(config, m_videoirq).output_handler().set_inputline(m_videocpu, INPUT_LINE_IRQ0);
|
||||
|
||||
@ -859,58 +800,58 @@ MACHINE_CONFIG_START(wicat_state::wicat)
|
||||
|
||||
INPUT_MERGER_ALL_HIGH(config, "dmairq").output_handler().set_inputline(m_videocpu, INPUT_LINE_NMI);
|
||||
|
||||
MCFG_IM6402_ADD("videouart", 0, 1200)
|
||||
MCFG_IM6402_DR_CALLBACK(WRITELINE("videoirq", input_merger_device, in_w<2>))
|
||||
MCFG_IM6402_TBRE_CALLBACK(WRITELINE("tbreirq", input_merger_device, in_w<0>))
|
||||
IM6402(config, m_videouart, 0);
|
||||
m_videouart->set_rrc(0);
|
||||
m_videouart->set_trc(1200);
|
||||
m_videouart->dr_callback().set(m_videoirq, FUNC(input_merger_device::in_w<2>));
|
||||
m_videouart->tbre_callback().set("tbreirq", FUNC(input_merger_device::in_w<0>));
|
||||
|
||||
INPUT_MERGER_ALL_HIGH(config, "tbreirq").output_handler().set(m_videoirq, FUNC(input_merger_device::in_w<3>));
|
||||
|
||||
// terminal (2x INS2651, 1x IM6042 - one of these is for the keyboard, another communicates with the main board, the third is unknown)
|
||||
MCFG_DEVICE_ADD("videouart0", MC2661, 5.0688_MHz_XTAL) // the INS2651 looks similar enough to the MC2661...
|
||||
MCFG_MC2661_TXD_HANDLER(WRITELINE("uart0", mc2661_device, rx_w))
|
||||
MCFG_MC2661_RXRDY_HANDLER(WRITELINE("videoirq", input_merger_device, in_w<0>))
|
||||
MCFG_MC2661_RTS_HANDLER(WRITELINE("uart0", mc2661_device, cts_w))
|
||||
MCFG_MC2661_DTR_HANDLER(WRITELINE("uart0", mc2661_device, dsr_w))
|
||||
MC2661(config, m_videouart0, 5.0688_MHz_XTAL); // the INS2651 looks similar enough to the MC2661...
|
||||
m_videouart0->txd_handler().set(m_uart[0], FUNC(mc2661_device::rx_w));
|
||||
m_videouart0->rxrdy_handler().set(m_videoirq, FUNC(input_merger_device::in_w<0>));
|
||||
m_videouart0->rts_handler().set(m_uart[0], FUNC(mc2661_device::cts_w));
|
||||
m_videouart0->dtr_handler().set(m_uart[0], FUNC(mc2661_device::dsr_w));
|
||||
|
||||
MCFG_DEVICE_ADD("videouart1", MC2661, 5.0688_MHz_XTAL)
|
||||
MCFG_MC2661_RXC(19200)
|
||||
MCFG_MC2661_TXC(19200)
|
||||
MCFG_MC2661_RXRDY_HANDLER(WRITELINE("videoirq", input_merger_device, in_w<4>))
|
||||
MC2661(config, m_videouart1, 5.0688_MHz_XTAL);
|
||||
m_videouart1->set_rxc(19200);
|
||||
m_videouart1->set_txc(19200);
|
||||
m_videouart1->rxrdy_handler().set(m_videoirq, FUNC(input_merger_device::in_w<4>));
|
||||
|
||||
X2210(config, "vsram"); // XD2210
|
||||
|
||||
MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::green())
|
||||
MCFG_SCREEN_RAW_PARAMS(19.6608_MHz_XTAL, 1020, 0, 800, 324, 0, 300)
|
||||
MCFG_SCREEN_UPDATE_DEVICE("video",i8275_device,screen_update)
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_color(rgb_t::green());
|
||||
screen.set_raw(19.6608_MHz_XTAL, 1020, 0, 800, 324, 0, 300);
|
||||
screen.set_screen_update("video", FUNC(i8275_device::screen_update));
|
||||
|
||||
MCFG_PALETTE_ADD_MONOCHROME("palette")
|
||||
PALETTE(config, m_palette, 2);
|
||||
m_palette->set_init("palette", FUNC(palette_device::palette_init_monochrome));
|
||||
|
||||
MCFG_DEVICE_ADD("video", I8275, 19.6608_MHz_XTAL/10)
|
||||
MCFG_I8275_CHARACTER_WIDTH(10)
|
||||
MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(wicat_state, wicat_display_pixels)
|
||||
MCFG_I8275_DRQ_CALLBACK(WRITELINE("videodma", am9517a_device, dreq0_w))
|
||||
MCFG_I8275_VRTC_CALLBACK(WRITELINE(*this, wicat_state, crtc_irq_w))
|
||||
MCFG_VIDEO_SET_SCREEN("screen")
|
||||
I8275(config, m_crtc, 19.6608_MHz_XTAL/10);
|
||||
m_crtc->set_character_width(10);
|
||||
m_crtc->set_display_callback(FUNC(wicat_state::wicat_display_pixels), this);
|
||||
m_crtc->drq_wr_callback().set(m_videodma, FUNC(am9517a_device::dreq0_w));
|
||||
m_crtc->vrtc_wr_callback().set(FUNC(wicat_state::crtc_irq_w));
|
||||
m_crtc->set_screen("screen");
|
||||
|
||||
config.set_default_layout(layout_wicat);
|
||||
|
||||
/* Winchester Disk Controller (WD1000 + FD1795) */
|
||||
MCFG_DEVICE_ADD("wd1kcpu", N8X300, 8_MHz_XTAL)
|
||||
MCFG_DEVICE_PROGRAM_MAP(wicat_wd1000_mem)
|
||||
MCFG_DEVICE_IO_MAP(wicat_wd1000_io)
|
||||
n8x300_cpu_device &wd1kcpu(N8X300(config, "wd1kcpu", 8_MHz_XTAL));
|
||||
wd1kcpu.set_addrmap(AS_PROGRAM, &wicat_state::wd1000_mem);
|
||||
wd1kcpu.set_addrmap(AS_IO, &wicat_state::wd1000_io);
|
||||
|
||||
MCFG_DEVICE_ADD("fdc", FD1795, 8_MHz_XTAL)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:0", wicat_floppies, "525qd", floppy_image_device::default_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_SOUND(true)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:1", wicat_floppies, nullptr, floppy_image_device::default_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_SOUND(true)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:2", wicat_floppies, nullptr, floppy_image_device::default_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_SOUND(true)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fdc:3", wicat_floppies, nullptr, floppy_image_device::default_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_SOUND(true)
|
||||
FD1795(config, m_fdc, 8_MHz_XTAL);
|
||||
FLOPPY_CONNECTOR(config, "fdc:0", wicat_floppies, "525qd", floppy_image_device::default_floppy_formats).enable_sound(true);
|
||||
FLOPPY_CONNECTOR(config, "fdc:1", wicat_floppies, nullptr, floppy_image_device::default_floppy_formats).enable_sound(true);
|
||||
FLOPPY_CONNECTOR(config, "fdc:2", wicat_floppies, nullptr, floppy_image_device::default_floppy_formats).enable_sound(true);
|
||||
FLOPPY_CONNECTOR(config, "fdc:3", wicat_floppies, nullptr, floppy_image_device::default_floppy_formats).enable_sound(true);
|
||||
|
||||
MCFG_SOFTWARE_LIST_ADD("flop_list", "wicat")
|
||||
MACHINE_CONFIG_END
|
||||
SOFTWARE_LIST(config, "flop_list").set_type("wicat", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
}
|
||||
|
||||
/* ROM definition */
|
||||
ROM_START( wicat )
|
||||
|
||||
@ -9,6 +9,7 @@
|
||||
#ifndef MAME_INCLUDES_SSYSTEM3_H
|
||||
#define MAME_INCLUDES_SSYSTEM3_H
|
||||
|
||||
#include "cpu/m6502/m6502.h"
|
||||
#include "machine/6522via.h"
|
||||
#include "emupal.h"
|
||||
|
||||
@ -57,7 +58,7 @@ public:
|
||||
|
||||
private:
|
||||
virtual void video_start() override;
|
||||
DECLARE_PALETTE_INIT(ssystem3);
|
||||
void palette_init(palette_device &palette);
|
||||
uint32_t screen_update_ssystem3(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
DECLARE_WRITE8_MEMBER(ssystem3_via_write_a);
|
||||
DECLARE_READ8_MEMBER(ssystem3_via_read_a);
|
||||
@ -79,7 +80,7 @@ private:
|
||||
playfield_t m_playfield;
|
||||
lcd_t m_lcd;
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<m6502_device> m_maincpu;
|
||||
required_device<palette_device> m_palette;
|
||||
required_device<via6522_device> m_via6522_0;
|
||||
required_ioport m_configuration;
|
||||
|
||||
@ -48,6 +48,7 @@ public:
|
||||
, m_harddisk(*this, "harddisk")
|
||||
, m_ide(*this, "ide")
|
||||
, m_dat(*this, "dat")
|
||||
, m_bankdev(*this, "bankdev")
|
||||
{ }
|
||||
|
||||
void swtpc09_base(machine_config &config);
|
||||
@ -119,7 +120,7 @@ private:
|
||||
|
||||
offs_t dat_translate(offs_t offset) const;
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<mc6809_device> m_maincpu;
|
||||
required_device<mc14411_device> m_brg;
|
||||
required_device<pia6821_device> m_pia;
|
||||
required_device<ptm6840_device> m_ptm;
|
||||
@ -134,6 +135,7 @@ private:
|
||||
optional_device<device_t> m_harddisk;
|
||||
optional_device<ide_controller_device> m_ide;
|
||||
required_shared_ptr<uint8_t> m_dat;
|
||||
required_device<address_map_bank_device> m_bankdev;
|
||||
|
||||
uint8_t m_term_data; // terminal keyboard value
|
||||
uint8_t m_pia_counter; // this is the counter on pia porta
|
||||
|
||||
@ -36,13 +36,15 @@ public:
|
||||
TIMER_UPDATE_SIGNAL
|
||||
};
|
||||
|
||||
void vectrex_cart(device_slot_interface &device);
|
||||
|
||||
protected:
|
||||
vectrex_base_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_cart(*this, "cartslot"),
|
||||
m_gce_vectorram(*this, "gce_vectorram"),
|
||||
m_via6522_0(*this, "via6522_0"),
|
||||
m_gce_vectorram(*this, "gce_vectorram"),
|
||||
m_dac(*this, "dac"),
|
||||
m_ay8912(*this, "ay8912"),
|
||||
m_vector(*this, "vector"),
|
||||
@ -96,7 +98,10 @@ protected:
|
||||
emu_timer *m_imager_timer;
|
||||
emu_timer *m_lp_t;
|
||||
|
||||
required_device<via6522_device> m_via6522_0;
|
||||
|
||||
private:
|
||||
|
||||
struct vectrex_point
|
||||
{
|
||||
int x; int y;
|
||||
@ -137,8 +142,7 @@ private:
|
||||
uint8_t m_cb2;
|
||||
void (vectrex_base_state::*vector_add_point_function)(int, int, rgb_t, int);
|
||||
|
||||
required_device<via6522_device> m_via6522_0;
|
||||
required_device<dac_byte_interface> m_dac;
|
||||
required_device<mc1408_device> m_dac;
|
||||
required_device<ay8910_device> m_ay8912;
|
||||
required_device<vector_device> m_vector;
|
||||
optional_ioport_array<4> m_io_contr;
|
||||
|
||||
@ -112,9 +112,14 @@ const tiny_rom_entry *victor_9000_fdc_device::device_rom_region() const
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// SLOT_INTERFACE( victor9k_floppies )
|
||||
//-------------------------------------------------
|
||||
void victor_9000_fdc_device::add_floppy_drive(machine_config &config, const char *_tag)
|
||||
{
|
||||
floppy_connector &connector(FLOPPY_CONNECTOR(config, _tag, 0));
|
||||
connector.option_add("525ssqd", FLOPPY_525_SSQD); // Tandon TM100-3 with custom electronics
|
||||
connector.option_add("525qd", FLOPPY_525_QD); // Tandon TM100-4 with custom electronics
|
||||
connector.set_default_option("525qd");
|
||||
connector.set_formats(victor_9000_fdc_device::floppy_formats);
|
||||
}
|
||||
|
||||
image_init_result victor_9000_fdc_device::load0_cb(floppy_image_device *device)
|
||||
{
|
||||
@ -144,12 +149,6 @@ void victor_9000_fdc_device::unload1_cb(floppy_image_device *device)
|
||||
m_via4->write_cb1(1);
|
||||
}
|
||||
|
||||
static void victor9k_floppies(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("525ssqd", FLOPPY_525_SSQD); // Tandon TM100-3 with custom electronics
|
||||
device.option_add("525qd", FLOPPY_525_QD); // Tandon TM100-4 with custom electronics
|
||||
}
|
||||
|
||||
FLOPPY_FORMATS_MEMBER( victor_9000_fdc_device::floppy_formats )
|
||||
FLOPPY_VICTOR_9000_FORMAT
|
||||
FLOPPY_FORMATS_END
|
||||
@ -159,41 +158,42 @@ FLOPPY_FORMATS_END
|
||||
// device_add_mconfig - add device configuration
|
||||
//-------------------------------------------------
|
||||
|
||||
MACHINE_CONFIG_START(victor_9000_fdc_device::device_add_mconfig)
|
||||
MCFG_DEVICE_ADD(I8048_TAG, I8048, XTAL(30'000'000)/6)
|
||||
MCFG_MCS48_PORT_P1_IN_CB(READ8(*this, victor_9000_fdc_device, floppy_p1_r))
|
||||
MCFG_MCS48_PORT_P1_OUT_CB(WRITE8(*this, victor_9000_fdc_device, floppy_p1_w))
|
||||
MCFG_MCS48_PORT_P2_IN_CB(READ8(*this, victor_9000_fdc_device, floppy_p2_r))
|
||||
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(*this, victor_9000_fdc_device, floppy_p2_w))
|
||||
MCFG_MCS48_PORT_T0_IN_CB(READLINE(*this, victor_9000_fdc_device, tach0_r))
|
||||
MCFG_MCS48_PORT_T1_IN_CB(READLINE(*this, victor_9000_fdc_device, tach1_r))
|
||||
MCFG_MCS48_PORT_BUS_OUT_CB(WRITE8(*this, victor_9000_fdc_device, da_w))
|
||||
void victor_9000_fdc_device::device_add_mconfig(machine_config &config)
|
||||
{
|
||||
I8048(config, m_maincpu, XTAL(30'000'000)/6);
|
||||
m_maincpu->p1_in_cb().set(FUNC(victor_9000_fdc_device::floppy_p1_r));
|
||||
m_maincpu->p1_out_cb().set(FUNC(victor_9000_fdc_device::floppy_p1_w));
|
||||
m_maincpu->p2_in_cb().set(FUNC(victor_9000_fdc_device::floppy_p2_r));
|
||||
m_maincpu->p2_out_cb().set(FUNC(victor_9000_fdc_device::floppy_p2_w));
|
||||
m_maincpu->t0_in_cb().set(FUNC(victor_9000_fdc_device::tach0_r));
|
||||
m_maincpu->t1_in_cb().set(FUNC(victor_9000_fdc_device::tach1_r));
|
||||
m_maincpu->bus_out_cb().set(FUNC(victor_9000_fdc_device::da_w));
|
||||
|
||||
MCFG_DEVICE_ADD(M6522_4_TAG, VIA6522, XTAL(30'000'000)/30)
|
||||
MCFG_VIA6522_READPA_HANDLER(READ8(*this, victor_9000_fdc_device, via4_pa_r))
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, victor_9000_fdc_device, via4_pa_w))
|
||||
MCFG_VIA6522_READPB_HANDLER(READ8(*this, victor_9000_fdc_device, via4_pb_r))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, victor_9000_fdc_device, via4_pb_w))
|
||||
MCFG_VIA6522_CA2_HANDLER(WRITELINE(*this, victor_9000_fdc_device, wrsync_w))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, victor_9000_fdc_device, via4_irq_w))
|
||||
VIA6522(config, m_via4, XTAL(30'000'000)/30);
|
||||
m_via4->readpa_handler().set(FUNC(victor_9000_fdc_device::via4_pa_r));
|
||||
m_via4->writepa_handler().set(FUNC(victor_9000_fdc_device::via4_pa_w));
|
||||
m_via4->readpb_handler().set(FUNC(victor_9000_fdc_device::via4_pb_r));
|
||||
m_via4->writepb_handler().set(FUNC(victor_9000_fdc_device::via4_pb_w));
|
||||
m_via4->ca2_handler().set(FUNC(victor_9000_fdc_device::wrsync_w));
|
||||
m_via4->irq_handler().set(FUNC(victor_9000_fdc_device::via4_irq_w));
|
||||
|
||||
MCFG_DEVICE_ADD(M6522_5_TAG, VIA6522, XTAL(30'000'000)/30)
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, victor_9000_fdc_device, via5_irq_w))
|
||||
MCFG_VIA6522_READPA_HANDLER(READ8(*this, victor_9000_fdc_device, via5_pa_r))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, victor_9000_fdc_device, via5_pb_w))
|
||||
VIA6522(config, m_via5, XTAL(30'000'000)/30);
|
||||
m_via5->irq_handler().set(FUNC(victor_9000_fdc_device::via5_irq_w));
|
||||
m_via5->readpa_handler().set(FUNC(victor_9000_fdc_device::via5_pa_r));
|
||||
m_via5->writepb_handler().set(FUNC(victor_9000_fdc_device::via5_pb_w));
|
||||
|
||||
MCFG_DEVICE_ADD(M6522_6_TAG, VIA6522, XTAL(30'000'000)/30)
|
||||
MCFG_VIA6522_READPA_HANDLER(READ8(*this, victor_9000_fdc_device, via6_pa_r))
|
||||
MCFG_VIA6522_READPB_HANDLER(READ8(*this, victor_9000_fdc_device, via6_pb_r))
|
||||
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, victor_9000_fdc_device, via6_pa_w))
|
||||
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, victor_9000_fdc_device, via6_pb_w))
|
||||
MCFG_VIA6522_CA2_HANDLER(WRITELINE(*this, victor_9000_fdc_device, drw_w))
|
||||
MCFG_VIA6522_CB2_HANDLER(WRITELINE(*this, victor_9000_fdc_device, erase_w))
|
||||
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, victor_9000_fdc_device, via6_irq_w))
|
||||
VIA6522(config, m_via6, XTAL(30'000'000)/30);
|
||||
m_via6->readpa_handler().set(FUNC(victor_9000_fdc_device::via6_pa_r));
|
||||
m_via6->readpb_handler().set(FUNC(victor_9000_fdc_device::via6_pb_r));
|
||||
m_via6->writepa_handler().set(FUNC(victor_9000_fdc_device::via6_pa_w));
|
||||
m_via6->writepb_handler().set(FUNC(victor_9000_fdc_device::via6_pb_w));
|
||||
m_via6->ca2_handler().set(FUNC(victor_9000_fdc_device::drw_w));
|
||||
m_via6->cb2_handler().set(FUNC(victor_9000_fdc_device::erase_w));
|
||||
m_via6->irq_handler().set(FUNC(victor_9000_fdc_device::via6_irq_w));
|
||||
|
||||
MCFG_FLOPPY_DRIVE_ADD(I8048_TAG":0", victor9k_floppies, "525qd", victor_9000_fdc_device::floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD(I8048_TAG":1", victor9k_floppies, "525qd", victor_9000_fdc_device::floppy_formats)
|
||||
MACHINE_CONFIG_END
|
||||
add_floppy_drive(config, I8048_TAG":0");
|
||||
add_floppy_drive(config, I8048_TAG":1");
|
||||
}
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
|
||||
@ -55,6 +55,8 @@ protected:
|
||||
private:
|
||||
static const int rpm[0x100];
|
||||
|
||||
void add_floppy_drive(machine_config &config, const char *_tag);
|
||||
|
||||
enum
|
||||
{
|
||||
TM_GEN,
|
||||
@ -110,7 +112,7 @@ private:
|
||||
devcb_write_line m_syn_cb;
|
||||
devcb_write_line m_lbrdy_cb;
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<i8048_device> m_maincpu;
|
||||
required_device<via6522_device> m_via4;
|
||||
required_device<via6522_device> m_via5;
|
||||
required_device<via6522_device> m_via6;
|
||||
|
||||
@ -16,17 +16,6 @@
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// INTERFACE CONFIGURATION MACROS
|
||||
//**************************************************************************
|
||||
|
||||
#define MCFG_VICTOR9K_KBRDY_HANDLER(_devcb) \
|
||||
downcast<victor_9000_keyboard_device &>(*device).set_kbrdy_cb(DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_VICTOR9K_KBDATA_HANDLER(_devcb) \
|
||||
downcast<victor_9000_keyboard_device &>(*device).set_kbdata_cb(DEVCB_##_devcb);
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// TYPE DEFINITIONS
|
||||
//**************************************************************************
|
||||
@ -39,8 +28,8 @@ public:
|
||||
// construction/destruction
|
||||
victor_9000_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
template <class Object> devcb_base &set_kbrdy_cb(Object &&cb) { return m_kbrdy_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> devcb_base &set_kbdata_cb(Object &&cb) { return m_kbdata_cb.set_callback(std::forward<Object>(cb)); }
|
||||
auto kbrdy_handler() { return m_kbrdy_cb.bind(); }
|
||||
auto kbdata_handler() { return m_kbdata_cb.bind(); }
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( kback_w );
|
||||
|
||||
@ -77,6 +66,4 @@ private:
|
||||
// device type definition
|
||||
DECLARE_DEVICE_TYPE(VICTOR9K_KEYBOARD, victor_9000_keyboard_device)
|
||||
|
||||
|
||||
|
||||
#endif // MAME_MACHINE_VICTOR9K_KB_H
|
||||
|
||||
@ -36,13 +36,10 @@ static const unsigned char ssystem3_palette[] =
|
||||
};
|
||||
|
||||
|
||||
PALETTE_INIT_MEMBER(ssystem3_state, ssystem3)
|
||||
void ssystem3_state::palette_init(palette_device &palette)
|
||||
{
|
||||
int i;
|
||||
|
||||
for ( i = 0; i < sizeof(ssystem3_palette) / 3; i++ ) {
|
||||
for (int i = 0; i < sizeof(ssystem3_palette) / 3; i++)
|
||||
m_palette->set_pen_color(i, ssystem3_palette[i*3], ssystem3_palette[i*3+1], ssystem3_palette[i*3+2]);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user