mirror of
https://github.com/holub/mame
synced 2025-04-15 04:59:01 +03:00
Cleaned up various stuff.
* sony_news.xml: Added proper compatibility flags for different generations. * cpu/pic16x8x: This is very much a derivative work. * cpu/tms32025.cpp: Allow stack push/pop to be inlined. * tecmo/bombjack.cpp: Avoid needing to remove and replace devices in machine configuration. * Various other cleanup.
This commit is contained in:
Vas Crabb
parent
db219fd888
commit
9f6c0de566
hash
plugins/hiscore
src
devices
bus/hp_dio
cpu
f2mc16
pic16x8x
tms32025
z80
imagedev
machine
emu
lib/formats
mame
benesse
hp
igs
konami
layout
msx
sega
sinclair
sony
taito
tch
tecmo
ussr
vsystem
@ -10,7 +10,7 @@ license:CC0-1.0
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<year>1991</year>
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<publisher>Sony</publisher>
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<notes>The floppies can boot on both CISC and RISC systems due to some bootloader magic, but the MO image is only for the first wave of RISC NEWS machines (NWS-3000 series)</notes>
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<sharedfeat name="compatibility" value="RISC" />
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<sharedfeat name="compatibility" value="NWS3000" />
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<!--
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The installation floppy and MO disk work, but the format disk hangs after printing a few messages on RISC systems.
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Therefore, use of this kit requires use of a pre-formatted hard disk image for now.
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@ -44,7 +44,7 @@ license:CC0-1.0
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<year>1993</year>
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<publisher>Sony</publisher>
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<notes>Usable only on NWS-5000 series computers</notes>
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<sharedfeat name="compatibility" value="RISC" />
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<sharedfeat name="compatibility" value="NWS5000" />
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<!-- Source: WinWorld -->
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<!-- The "STAMP" file has the build date of 05/05/93 -->
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@ -8093,6 +8093,7 @@ lupin3:
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@:maincpu,program,20dc,03,00,00
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@delay=0.25
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invrvnge:
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invrvngea:
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invrvngeb:
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@ -10,9 +10,11 @@
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#include "emu.h"
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#include "hp98544.h"
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#include "screen.h"
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#include "video/topcat.h"
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#include "hp_dio.h"
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#include "screen.h"
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#define HP98544_SCREEN_NAME "98544_screen"
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#define HP98544_ROM_REGION "98544_rom"
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@ -8,7 +8,7 @@
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#include "emu.h"
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#include "hp98603a.h"
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#include "hp_dio.h"
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#define HP98603A_ROM_REGION "98603a_rom"
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@ -8,7 +8,7 @@
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#include "emu.h"
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#include "hp98603b.h"
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#include "hp_dio.h"
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#define HP98603B_ROM_REGION "98603b_rom"
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@ -8,7 +8,6 @@
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#include "emu.h"
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#include "hp98620.h"
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#include "hp_dio.h"
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#define VERBOSE 0
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#include "logmacro.h"
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@ -8,9 +8,9 @@
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#include "emu.h"
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#include "hp98624.h"
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#include "machine/tms9914.h"
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#include "bus/ieee488/ieee488.h"
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#include "hp_dio.h"
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#include "machine/tms9914.h"
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//#define VERBOSE 1
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#include "logmacro.h"
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@ -42,6 +42,7 @@ protected:
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required_device<tms9914_device> m_tms9914;
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required_device<ieee488_device> m_ieee488;
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required_ioport m_switches;
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private:
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void update_gpib_irq();
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void update_gpib_dma();
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@ -101,17 +102,17 @@ dio16_98624_device::dio16_98624_device(const machine_config &mconfig, device_typ
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{
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}
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#define REG_SWITCHES_SC 0x01
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#define REG_SWITCHES_REMOTE 0x02
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constexpr unsigned REG_SWITCHES_SC = 0x01;
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constexpr unsigned REG_SWITCHES_REMOTE = 0x02;
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#define REG_SWITCHES_INT_LEVEL_MASK 3
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#define REG_SWITCHES_INT_LEVEL_SHIFT 2
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constexpr unsigned REG_SWITCHES_INT_LEVEL_MASK = 3;
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constexpr unsigned REG_SWITCHES_INT_LEVEL_SHIFT = 2;
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#define REG_SWITCHES_SELECT_CODE_MASK 31
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#define REG_SWITCHES_SELECT_CODE_SHIFT 4
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constexpr unsigned REG_SWITCHES_SELECT_CODE_MASK = 31;
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constexpr unsigned REG_SWITCHES_SELECT_CODE_SHIFT = 4;
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#define REG_SWITCHES_GPIB_ADDR_MASK 31
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#define REG_SWITCHES_GPIB_ADDR_SHIFT 9
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constexpr unsigned REG_SWITCHES_GPIB_ADDR_MASK = 31;
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constexpr unsigned REG_SWITCHES_GPIB_ADDR_SHIFT = 9;
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static INPUT_PORTS_START(hp98624_port)
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PORT_START("switches")
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@ -8,9 +8,10 @@
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#include "emu.h"
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#include "hp98644.h"
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#include "bus/rs232/rs232.h"
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#include "machine/ins8250.h"
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#include "hp_dio.h"
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namespace {
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File diff suppressed because it is too large
Load Diff
@ -1,5 +1,5 @@
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// license:BSD-3-Clause
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// copyright-holders: Grull Osgo
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// copyright-holders:Tony La Porta, Grull Osgo
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/************************************************************************
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Microchip PIC16X8x Emulator
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@ -1,5 +1,5 @@
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// license:BSD-3-Clause
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// copyright-holders: Grull Osgo
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// copyright-holders:Tony La Porta, Grull Osgo
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/*
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Microchip PIC16X8x Emulator
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@ -1,5 +1,5 @@
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// license:BSD-3-Clause
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// copyright-holders:Grull Osgo
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// copyright-holders:Tony La Porta, Grull Osgo
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/****************************************************************************************
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Microchip PIC16x8x Emulator
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@ -1,5 +1,5 @@
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// license:BSD-3-Clause
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// copyright-holders:Grull Osgo
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// copyright-holders:Tony La Porta, Grull Osgo
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/************************************************************************
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Microchip PIC16x8x Emulator
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@ -245,7 +245,15 @@ const tiny_rom_entry *tms32025_device::device_rom_region() const
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}
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tms3202x_device::tms3202x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor prgmap, address_map_constructor datamap)
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tms3202x_device::tms3202x_device(
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const machine_config &mconfig,
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device_type type,
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const char *tag,
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device_t *owner,
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uint32_t clock,
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unsigned stack_depth,
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address_map_constructor prgmap,
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address_map_constructor datamap)
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: cpu_device(mconfig, type, tag, owner, clock)
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, m_program_config("program", ENDIANNESS_BIG, 16, 16, -1, prgmap)
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, m_data_config("data", ENDIANNESS_BIG, 16, 16, -1, datamap)
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@ -260,17 +268,18 @@ tms3202x_device::tms3202x_device(const machine_config &mconfig, device_type type
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, m_xf_out(*this)
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, m_dr_in(*this, 0xffff)
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, m_dx_out(*this)
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, m_stack_limit(stack_depth - 1)
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{
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}
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tms32020_device::tms32020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: tms3202x_device(mconfig, TMS32020, tag, owner, clock, address_map_constructor(), address_map_constructor(FUNC(tms3202x_device::tms3202x_data), this))
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: tms3202x_device(mconfig, TMS32020, tag, owner, clock, 4, address_map_constructor(), address_map_constructor(FUNC(tms3202x_device::tms3202x_data), this))
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{
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m_fixed_STR1 = 0x0180;
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}
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tms32025_device::tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor prgmap, address_map_constructor datamap)
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: tms3202x_device(mconfig, type, tag, owner, clock, prgmap, datamap)
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: tms3202x_device(mconfig, type, tag, owner, clock, 8, prgmap, datamap)
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, m_mp_mc(true)
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{
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}
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@ -374,24 +383,24 @@ void tms3202x_device::greg_w(uint16_t data)
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}
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void tms3202x_device::CLR0(uint16_t flag) { m_STR0 &= ~flag; m_STR0 |= 0x0400; }
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void tms3202x_device::SET0(uint16_t flag) { m_STR0 |= flag; m_STR0 |= 0x0400; }
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void tms3202x_device::CLR1(uint16_t flag) { m_STR1 &= ~flag; m_STR1 |= m_fixed_STR1; }
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void tms3202x_device::SET1(uint16_t flag) { m_STR1 |= flag; m_STR1 |= m_fixed_STR1; }
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inline void tms3202x_device::CLR0(uint16_t flag) { m_STR0 &= ~flag; m_STR0 |= 0x0400; }
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inline void tms3202x_device::SET0(uint16_t flag) { m_STR0 |= flag; m_STR0 |= 0x0400; }
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inline void tms3202x_device::CLR1(uint16_t flag) { m_STR1 &= ~flag; m_STR1 |= m_fixed_STR1; }
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inline void tms3202x_device::SET1(uint16_t flag) { m_STR1 |= flag; m_STR1 |= m_fixed_STR1; }
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void tms3202x_device::MODIFY_DP(int data)
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inline void tms3202x_device::MODIFY_DP(int data)
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{
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m_STR0 &= ~DP_REG;
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m_STR0 |= (data & DP_REG);
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m_STR0 |= 0x0400;
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}
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void tms3202x_device::MODIFY_PM(int data)
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inline void tms3202x_device::MODIFY_PM(int data)
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{
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m_STR1 &= ~PM_REG;
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m_STR1 |= (data & PM_REG);
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m_STR1 |= m_fixed_STR1;
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}
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void tms3202x_device::MODIFY_ARP(int data)
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inline void tms3202x_device::MODIFY_ARP(int data)
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{
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m_STR1 &= ~ARB_REG;
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m_STR1 |= (m_STR0 & ARP_REG);
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@ -406,18 +415,18 @@ uint16_t tms3202x_device::reverse_carry_add(uint16_t arg0, uint16_t arg1 )
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uint16_t result = 0;
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int carry = 0;
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int count;
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for( count=0; count<16; count++ )
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for (count = 0; count < 16; count++)
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{
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int sum = (arg0>>15)+(arg1>>15)+carry;
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result = (result<<1)|(sum&1);
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carry = sum>>1;
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arg0<<=1;
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arg1<<=1;
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int sum = (arg0 >> 15) + (arg1 >> 15) + carry;
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result = (result << 1) | (sum & 1);
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carry = sum >> 1;
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arg0 <<= 1;
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arg1 <<= 1;
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}
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return result;
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}
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void tms3202x_device::MODIFY_AR_ARP()
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inline void tms3202x_device::MODIFY_AR_ARP()
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{ /* modify address register referenced by ARP */
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switch (m_opcode.b.l & 0x70) /* Cases ordered by predicted useage */
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{
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@ -452,7 +461,7 @@ void tms3202x_device::MODIFY_AR_ARP()
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break;
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}
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if( !m_mHackIgnoreARP )
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if (!m_mHackIgnoreARP)
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{
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if (m_opcode.b.l & 8)
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{ /* bit 3 determines if new value is loaded into ARP */
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@ -461,92 +470,71 @@ void tms3202x_device::MODIFY_AR_ARP()
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}
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}
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void tms3202x_device::CALCULATE_ADD_CARRY()
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inline void tms3202x_device::CALCULATE_ADD_CARRY()
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{
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if ( (uint32_t)(m_oldacc.d) > (uint32_t)(m_ACC.d) ) {
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if (uint32_t(m_oldacc.d) > uint32_t(m_ACC.d))
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{
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SET1(C_FLAG);
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}
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else {
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else
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{
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CLR1(C_FLAG);
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}
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}
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void tms3202x_device::CALCULATE_SUB_CARRY()
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inline void tms3202x_device::CALCULATE_SUB_CARRY()
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{
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if ( (uint32_t)(m_oldacc.d) < (uint32_t)(m_ACC.d) ) {
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if (uint32_t(m_oldacc.d) < uint32_t(m_ACC.d))
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{
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CLR1(C_FLAG);
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}
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else {
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else
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{
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SET1(C_FLAG);
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}
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}
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void tms3202x_device::CALCULATE_ADD_OVERFLOW(int32_t addval)
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inline void tms3202x_device::CALCULATE_ADD_OVERFLOW(int32_t addval)
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{
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if ((int32_t)((m_ACC.d ^ addval) & (m_oldacc.d ^ m_ACC.d)) < 0)
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if (int32_t((m_ACC.d ^ addval) & (m_oldacc.d ^ m_ACC.d)) < 0)
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{
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SET0(OV_FLAG);
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if (OVM)
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{
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m_ACC.d = ((int32_t)m_oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
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m_ACC.d = (int32_t(m_oldacc.d) < 0) ? 0x80000000 : 0x7fffffff;
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}
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}
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}
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void tms3202x_device::CALCULATE_SUB_OVERFLOW(int32_t subval)
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inline void tms3202x_device::CALCULATE_SUB_OVERFLOW(int32_t subval)
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{
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if ((int32_t)((m_oldacc.d ^ subval) & (m_oldacc.d ^ m_ACC.d)) < 0)
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{
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SET0(OV_FLAG);
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if (OVM)
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{
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m_ACC.d = ((int32_t)m_oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
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m_ACC.d = (int32_t(m_oldacc.d) < 0) ? 0x80000000 : 0x7fffffff;
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}
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}
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}
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inline uint16_t tms3202x_device::POP_STACK()
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{
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uint16_t data = m_STACK[3];
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m_STACK[3] = m_STACK[2];
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m_STACK[2] = m_STACK[1];
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m_STACK[1] = m_STACK[0];
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uint16_t const data = m_STACK[m_stack_limit];
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for (unsigned i = m_stack_limit; 0 < i; --i)
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m_STACK[i] = m_STACK[i - 1];
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return data;
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}
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inline void tms3202x_device::PUSH_STACK(uint16_t data)
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{
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m_STACK[0] = m_STACK[1];
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m_STACK[1] = m_STACK[2];
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m_STACK[2] = m_STACK[3];
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m_STACK[3] = data;
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for (unsigned i = 0; m_stack_limit > i; ++i)
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m_STACK[i] = m_STACK[i + 1];
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m_STACK[m_stack_limit] = data;
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}
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inline uint16_t tms32025_device::POP_STACK()
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inline void tms3202x_device::SHIFT_Preg_TO_ALU()
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{
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uint16_t data = m_STACK[7];
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m_STACK[7] = m_STACK[6];
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m_STACK[6] = m_STACK[5];
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m_STACK[5] = m_STACK[4];
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m_STACK[4] = m_STACK[3];
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m_STACK[3] = m_STACK[2];
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m_STACK[2] = m_STACK[1];
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m_STACK[1] = m_STACK[0];
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return data;
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}
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inline void tms32025_device::PUSH_STACK(uint16_t data)
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{
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m_STACK[0] = m_STACK[1];
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m_STACK[1] = m_STACK[2];
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m_STACK[2] = m_STACK[3];
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m_STACK[3] = m_STACK[4];
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m_STACK[4] = m_STACK[5];
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m_STACK[5] = m_STACK[6];
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m_STACK[6] = m_STACK[7];
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m_STACK[7] = data;
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}
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void tms3202x_device::SHIFT_Preg_TO_ALU()
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{
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switch(PM) /* PM (in STR1) is the shift mode for Preg */
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switch (PM) /* PM (in STR1) is the shift mode for Preg */
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{
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case 0: m_ALU.d = m_Preg.d; break;
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case 1: m_ALU.d = (m_Preg.d << 1); break;
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@ -556,7 +544,7 @@ void tms3202x_device::SHIFT_Preg_TO_ALU()
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}
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}
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void tms3202x_device::GETDATA(int shift,int signext)
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inline void tms3202x_device::GETDATA(int shift,int signext)
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{
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if (m_opcode.b.l & 0x80)
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{ /* indirect memory access */
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@ -584,23 +572,25 @@ void tms3202x_device::GETDATA(int shift,int signext)
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if (m_opcode.b.l & 0x80) MODIFY_AR_ARP();
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}
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void tms3202x_device::PUTDATA(uint16_t data)
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inline void tms3202x_device::PUTDATA(uint16_t data)
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{
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if (m_opcode.b.l & 0x80) {
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if (m_opcode.b.l & 0x80)
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{
|
||||
if (m_memaccess >= 0x800) m_external_mem_access = 1; /* Pause if hold pin is active */
|
||||
else m_external_mem_access = 0;
|
||||
|
||||
m_data.write_word(IND, data);
|
||||
MODIFY_AR_ARP();
|
||||
}
|
||||
else {
|
||||
else
|
||||
{
|
||||
if (m_memaccess >= 0x800) m_external_mem_access = 1; /* Pause if hold pin is active */
|
||||
else m_external_mem_access = 0;
|
||||
|
||||
m_data.write_word(DMA, data);
|
||||
}
|
||||
}
|
||||
void tms3202x_device::PUTDATA_SST(uint16_t data)
|
||||
inline void tms3202x_device::PUTDATA_SST(uint16_t data)
|
||||
{
|
||||
if (m_opcode.b.l & 0x80) m_memaccess = IND;
|
||||
else m_memaccess = DMApg0;
|
||||
@ -1870,7 +1860,7 @@ void tms32026_device::device_reset()
|
||||
/****************************************************************************
|
||||
* Issue an interrupt if necessary
|
||||
****************************************************************************/
|
||||
int tms3202x_device::process_IRQs()
|
||||
inline int tms3202x_device::process_IRQs()
|
||||
{
|
||||
/********** Interrupt Flag Register (IFR) **********
|
||||
| 5 | 4 | 3 | 2 | 1 | 0 |
|
||||
@ -1944,39 +1934,36 @@ int tms3202x_device::process_IRQs()
|
||||
}
|
||||
|
||||
|
||||
void tms3202x_device::process_timer(int clocks)
|
||||
inline void tms3202x_device::process_timer(int clocks)
|
||||
{
|
||||
int preclocks, ticks;
|
||||
|
||||
/* easy case: no actual ticks */
|
||||
again:
|
||||
preclocks = CLK - m_timerover;
|
||||
if (clocks < preclocks)
|
||||
while (true)
|
||||
{
|
||||
m_timerover += clocks;
|
||||
m_icount -= clocks;
|
||||
return;
|
||||
}
|
||||
int const preclocks = CLK - m_timerover;
|
||||
if (clocks < preclocks)
|
||||
{
|
||||
/* easy case: no actual ticks */
|
||||
m_timerover += clocks;
|
||||
m_icount -= clocks;
|
||||
break;
|
||||
}
|
||||
|
||||
/* if we're not going to overflow the timer, just count the clocks */
|
||||
ticks = 1 + (clocks - preclocks) / CLK;
|
||||
if (ticks <= m_tim)
|
||||
{
|
||||
m_icount -= clocks;
|
||||
m_timerover = clocks - (ticks - 1) * CLK - preclocks;
|
||||
m_tim -= ticks;
|
||||
}
|
||||
int const ticks = 1 + (clocks - preclocks) / CLK;
|
||||
if (ticks <= m_tim)
|
||||
{
|
||||
/* if we're not going to overflow the timer, just count the clocks */
|
||||
m_icount -= clocks;
|
||||
m_timerover = clocks - (ticks - 1) * CLK - preclocks;
|
||||
m_tim -= ticks;
|
||||
break;
|
||||
}
|
||||
|
||||
/* otherwise, overflow the timer and signal an interrupt */
|
||||
else
|
||||
{
|
||||
/* otherwise, overflow the timer and signal an interrupt */
|
||||
m_icount -= preclocks + CLK * m_tim;
|
||||
m_timerover = 0;
|
||||
m_tim = m_prd;
|
||||
|
||||
m_IFR |= 0x08;
|
||||
clocks = process_IRQs(); /* Handle Timer IRQ */
|
||||
goto again;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -72,28 +72,29 @@ public:
|
||||
//void tms32025_program(address_map &map);
|
||||
void tms3202x_data(address_map &map);
|
||||
void tms32026_data(address_map &map);
|
||||
|
||||
protected:
|
||||
// construction/destruction
|
||||
tms3202x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor prgmap, address_map_constructor datamap);
|
||||
tms3202x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, unsigned stack_depth, address_map_constructor prgmap, address_map_constructor datamap);
|
||||
|
||||
// device-level overrides
|
||||
// device_t implementation
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
// device_execute_interface overrides
|
||||
// device_execute_interface implementation
|
||||
virtual uint32_t execute_min_cycles() const noexcept override { return 4; }
|
||||
virtual uint32_t execute_max_cycles() const noexcept override { return 20; }
|
||||
virtual uint32_t execute_input_lines() const noexcept override { return 6; }
|
||||
virtual void execute_run() override;
|
||||
virtual void execute_set_input(int inputnum, int state) override;
|
||||
|
||||
// device_memory_interface overrides
|
||||
// device_memory_interface implementation
|
||||
virtual space_config_vector memory_space_config() const override;
|
||||
|
||||
// device_state_interface overrides
|
||||
// device_state_interface implementation
|
||||
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
|
||||
|
||||
// device_disasm_interface overrides
|
||||
// device_disasm_interface implementation
|
||||
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
|
||||
|
||||
void common_reset();
|
||||
@ -129,6 +130,8 @@ protected:
|
||||
devcb_read16 m_dr_in;
|
||||
devcb_write16 m_dx_out;
|
||||
|
||||
unsigned const m_stack_limit;
|
||||
|
||||
|
||||
/******************** CPU Internal Registers *******************/
|
||||
uint16_t m_PREVPC; /* previous program counter */
|
||||
@ -177,25 +180,25 @@ protected:
|
||||
uint16_t greg_r();
|
||||
void greg_w(uint16_t data);
|
||||
|
||||
inline void CLR0(uint16_t flag);
|
||||
inline void SET0(uint16_t flag);
|
||||
inline void CLR1(uint16_t flag);
|
||||
inline void SET1(uint16_t flag);
|
||||
inline void MODIFY_DP(int data);
|
||||
inline void MODIFY_PM(int data);
|
||||
inline void MODIFY_ARP(int data);
|
||||
void CLR0(uint16_t flag);
|
||||
void SET0(uint16_t flag);
|
||||
void CLR1(uint16_t flag);
|
||||
void SET1(uint16_t flag);
|
||||
void MODIFY_DP(int data);
|
||||
void MODIFY_PM(int data);
|
||||
void MODIFY_ARP(int data);
|
||||
uint16_t reverse_carry_add(uint16_t arg0, uint16_t arg1 );
|
||||
inline void MODIFY_AR_ARP();
|
||||
inline void CALCULATE_ADD_CARRY();
|
||||
inline void CALCULATE_SUB_CARRY();
|
||||
inline void CALCULATE_ADD_OVERFLOW(int32_t addval);
|
||||
inline void CALCULATE_SUB_OVERFLOW(int32_t subval);
|
||||
virtual uint16_t POP_STACK();
|
||||
virtual void PUSH_STACK(uint16_t data);
|
||||
inline void SHIFT_Preg_TO_ALU();
|
||||
inline void GETDATA(int shift,int signext);
|
||||
inline void PUTDATA(uint16_t data);
|
||||
inline void PUTDATA_SST(uint16_t data);
|
||||
void MODIFY_AR_ARP();
|
||||
void CALCULATE_ADD_CARRY();
|
||||
void CALCULATE_SUB_CARRY();
|
||||
void CALCULATE_ADD_OVERFLOW(int32_t addval);
|
||||
void CALCULATE_SUB_OVERFLOW(int32_t subval);
|
||||
uint16_t POP_STACK();
|
||||
void PUSH_STACK(uint16_t data);
|
||||
void SHIFT_Preg_TO_ALU();
|
||||
void GETDATA(int shift,int signext);
|
||||
void PUTDATA(uint16_t data);
|
||||
void PUTDATA_SST(uint16_t data);
|
||||
void opcodes_CE();
|
||||
void opcodes_Dx();
|
||||
void illegal();
|
||||
@ -351,8 +354,8 @@ protected:
|
||||
void zalh();
|
||||
void zalr();
|
||||
void zals();
|
||||
inline int process_IRQs();
|
||||
inline void process_timer(int clocks);
|
||||
int process_IRQs();
|
||||
void process_timer(int clocks);
|
||||
};
|
||||
|
||||
|
||||
@ -377,14 +380,11 @@ protected:
|
||||
tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor prgmap, address_map_constructor datamap);
|
||||
|
||||
// device-level overrides
|
||||
// device_t implementation
|
||||
virtual void device_start() override;
|
||||
|
||||
virtual const tiny_rom_entry *device_rom_region() const override;
|
||||
|
||||
virtual uint16_t POP_STACK() override;
|
||||
virtual void PUSH_STACK(uint16_t data) override;
|
||||
|
||||
bool m_mp_mc;
|
||||
};
|
||||
|
||||
|
||||
@ -400,7 +400,7 @@ macro take_interrupt
|
||||
} else {
|
||||
/* Interrupt mode 0. We check for CALL and JP instructions,
|
||||
if neither of these were found we assume a 1 byte opcode
|
||||
was placed on the databus */
|
||||
was placed on the databus */
|
||||
LOGINT("IM0 $%04x\n", m_tmp_irq_vector);
|
||||
|
||||
// check for nop
|
||||
|
||||
@ -1140,12 +1140,12 @@ void floppy_image_device::cache_clear()
|
||||
void floppy_image_device::cache_fill(const attotime &when)
|
||||
{
|
||||
std::vector<uint32_t> &buf = m_image->get_buffer(m_cyl, m_ss, m_subcyl);
|
||||
uint32_t cells = buf.size();
|
||||
uint32_t const cells = buf.size();
|
||||
if(cells <= 1) {
|
||||
m_cache_start_time = attotime::zero;
|
||||
m_cache_end_time = attotime::never;
|
||||
m_cache_index = 0;
|
||||
m_cache_entry = cells == 1 ? buf[0] : floppy_image::MG_N;
|
||||
m_cache_entry = (cells == 1) ? buf[0] : floppy_image::MG_N;
|
||||
cache_weakness_setup();
|
||||
return;
|
||||
}
|
||||
@ -1153,25 +1153,23 @@ void floppy_image_device::cache_fill(const attotime &when)
|
||||
attotime base;
|
||||
uint32_t position = find_position(base, when);
|
||||
|
||||
auto it = std::upper_bound(
|
||||
buf.begin(), buf.end(), position,
|
||||
[](uint32_t a, uint32_t b) {
|
||||
return a < (b & floppy_image::TIME_MASK);
|
||||
}
|
||||
);
|
||||
auto const it = std::upper_bound(
|
||||
buf.begin(), buf.end(), position,
|
||||
[] (uint32_t a, uint32_t b) { return a < (b & floppy_image::TIME_MASK); });
|
||||
|
||||
int index = int(it - buf.begin()) - 1;
|
||||
|
||||
if(index == -1) {
|
||||
int index;
|
||||
if(buf.begin() == it) {
|
||||
base -= m_rev_time;
|
||||
index = buf.size() - 1;
|
||||
} else {
|
||||
index = int(it - buf.begin()) - 1;
|
||||
}
|
||||
|
||||
for(;;) {
|
||||
cache_fill_index(buf, index, base);
|
||||
if(m_cache_end_time > when) {
|
||||
cache_weakness_setup();
|
||||
return;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -33,12 +33,12 @@ DEFINE_DEVICE_TYPE(CXD1185, cxd1185_device, "cxd1185", "Sony CXD1185 SCSI 1 Prot
|
||||
static char const *const nscsi_phase[] = { "DATA OUT", "DATA IN", "COMMAND", "STATUS", "*", "*", "MESSAGE OUT", "MESSAGE IN" };
|
||||
|
||||
// FIXME: would be better to reuse from nscsi_full_device
|
||||
static unsigned const SCSI_ARB_DELAY = 2'400;
|
||||
static unsigned const SCSI_BUS_CLEAR = 800;
|
||||
static unsigned const SCSI_BUS_FREE = 800;
|
||||
static unsigned const SCSI_BUS_SETTLE = 400;
|
||||
static unsigned const SCSI_BUS_SKEW = 10;
|
||||
static unsigned const SCSI_RST_HOLD = 25'000;
|
||||
static constexpr unsigned SCSI_ARB_DELAY = 2'400;
|
||||
static constexpr unsigned SCSI_BUS_CLEAR = 800;
|
||||
static constexpr unsigned SCSI_BUS_FREE = 800;
|
||||
static constexpr unsigned SCSI_BUS_SETTLE = 400;
|
||||
static constexpr unsigned SCSI_BUS_SKEW = 10;
|
||||
static constexpr unsigned SCSI_RST_HOLD = 25'000;
|
||||
|
||||
ALLOW_SAVE_TYPE(cxd1185_device::state);
|
||||
|
||||
@ -328,12 +328,12 @@ void cxd1185_device::command_w(u8 data)
|
||||
case 0xc0:
|
||||
LOGMASKED(LOG_CMD, "transfer information\n");
|
||||
m_state = XFR_INFO;
|
||||
m_last_dma_direction = (m_command & DMA) ? ((scsi_bus->ctrl_r() & S_INP) ? DMA_IN : DMA_OUT) : DMA_NONE;
|
||||
m_last_dma_direction = !(m_command & DMA) ? DMA_NONE : (scsi_bus->ctrl_r() & S_INP) ? DMA_IN : DMA_OUT;
|
||||
break;
|
||||
case 0xc1:
|
||||
LOGMASKED(LOG_CMD, "transfer pad\n");
|
||||
m_state = XFR_INFO;
|
||||
m_last_dma_direction = (m_command & DMA) ? ((scsi_bus->ctrl_r() & S_INP) ? DMA_IN : DMA_OUT) : DMA_NONE;
|
||||
m_last_dma_direction = !(m_command & DMA) ? DMA_NONE : (scsi_bus->ctrl_r() & S_INP) ? DMA_IN : DMA_OUT;
|
||||
break;
|
||||
case 0xc2:
|
||||
LOGMASKED(LOG_CMD, "deassert ack\n");
|
||||
|
||||
@ -121,7 +121,7 @@ private:
|
||||
// internal state
|
||||
bool m_irq_asserted;
|
||||
bool m_drq_asserted;
|
||||
util::fifo <u8, 16> m_fifo;
|
||||
util::fifo<u8, 16> m_fifo;
|
||||
bool m_pio_data_mode;
|
||||
bool m_pio_ctrl_mode;
|
||||
u32 m_scsi_ctrl_state;
|
||||
|
||||
@ -720,11 +720,11 @@ void debugger_commands::execute_tracelog(const std::vector<std::string_view> &pa
|
||||
void debugger_commands::execute_tracesym(const std::vector<std::string_view> ¶ms)
|
||||
{
|
||||
// build a format string appropriate for the parameters and validate them
|
||||
std::stringstream format;
|
||||
std::ostringstream format;
|
||||
for (int i = 0; i < params.size(); i++)
|
||||
{
|
||||
// find this symbol
|
||||
symbol_entry *sym = m_console.visible_symtable().find(strmakelower(params[i]).c_str());
|
||||
symbol_entry *const sym = m_console.visible_symtable().find(strmakelower(params[i]).c_str());
|
||||
if (!sym)
|
||||
{
|
||||
m_console.printf("Unknown symbol: %s\n", params[i]);
|
||||
@ -738,9 +738,11 @@ void debugger_commands::execute_tracesym(const std::vector<std::string_view> &pa
|
||||
}
|
||||
|
||||
// build parameters for printf
|
||||
std::vector<std::string_view> printf_params(params);
|
||||
auto const format_str = format.str(); // HACK: workaround for pre-C++20 str()
|
||||
printf_params.insert(printf_params.begin(), format_str);
|
||||
auto const format_str = std::move(format).str(); // need this to stay put as long as the string_view exists
|
||||
std::vector<std::string_view> printf_params;
|
||||
printf_params.reserve(params.size() + 1);
|
||||
printf_params.emplace_back(format_str);
|
||||
std::copy(params.begin(), params.end(), std::back_inserter(printf_params));
|
||||
|
||||
// then do a printf
|
||||
std::ostringstream buffer;
|
||||
|
||||
@ -233,7 +233,7 @@ public:
|
||||
emu_fatalerror(util::format_argument_pack<char> const &args);
|
||||
emu_fatalerror(int _exitcode, util::format_argument_pack<char> const &args);
|
||||
|
||||
template <typename Format, typename... Params, typename = std::enable_if_t<!std::is_base_of_v<emu_fatalerror, std::remove_reference_t<Format>>>>
|
||||
template <typename Format, typename... Params, typename = std::enable_if_t<!std::is_base_of_v<emu_fatalerror, std::remove_reference_t<Format> > > >
|
||||
emu_fatalerror(Format &&fmt, Params &&... args)
|
||||
: emu_fatalerror(static_cast<util::format_argument_pack<char> const &>(util::make_format_argument_pack(std::forward<Format>(fmt), std::forward<Params>(args)...)))
|
||||
{
|
||||
|
||||
@ -381,7 +381,7 @@ err_t coco_rsdos_impl::file_create(const std::vector<std::string> &path, const m
|
||||
|
||||
dir_block.wstr(file_index * DIRECTORY_ENTRY_SIZE + 0, fname);
|
||||
dir_block.w8(file_index * DIRECTORY_ENTRY_SIZE + OFFSET_FIRST_GRANULE, granule);
|
||||
// The file type, ascii flag, and number of bytes in last sector of file will be set during writing.
|
||||
// The file type, ASCII flag, and number of bytes in last sector of file will be set during writing.
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -495,12 +495,12 @@ u8 coco_rsdos_impl::determine_file_type(const std::vector<u8> &data) const
|
||||
{
|
||||
if (is_ascii(data))
|
||||
{
|
||||
// TODO: Distinguish between basic code and text editor data
|
||||
// TODO: Distinguish between BASIC code and text editor data
|
||||
return FILE_TYPE_BASIC;
|
||||
}
|
||||
|
||||
const size_t data_length = data.size();
|
||||
// Binary basic code seems to begin with ff <16bit size> 26
|
||||
// Binary BASIC code seems to begin with ff <16bit size> 26
|
||||
if (data_length > 4 && data[0] == 0xff && data[3] == 0x26 && ((data[1] << 8) | data[2]) == data_length - 3)
|
||||
return FILE_TYPE_BASIC;
|
||||
|
||||
|
||||
@ -14,8 +14,8 @@
|
||||
|
||||
/*
|
||||
|
||||
TSOP32 Maskrom:
|
||||
The pinout matches nearly the 29LV040 (TSOP32) flashrom. It has no WE# and Pin 07 and 09 are swapped.
|
||||
TSOP32 mask ROM:
|
||||
The pinout nearly matches the 29LV040 (TSOP32) Flash ROM. It has no WE# and pin0 7 and 9 are swapped.
|
||||
|
||||
--------
|
||||
A11 --|01 32|-- OE#
|
||||
|
||||
@ -118,6 +118,9 @@ protected:
|
||||
required_region_ptr<uint8_t> m_chargen;
|
||||
|
||||
private:
|
||||
static inline constexpr unsigned TEXT_VRAM_SIZE = 2048;
|
||||
static inline constexpr unsigned GRAPHIC_VRAM_SIZE = 16384;
|
||||
|
||||
void cpu_mem_map(address_map &map);
|
||||
void diag_led_w(uint8_t data);
|
||||
uint16_t text_r(offs_t offset);
|
||||
@ -138,10 +141,8 @@ private:
|
||||
void upi_irq7_w(int state);
|
||||
void uart_irq_w(int state);
|
||||
|
||||
static constexpr unsigned TEXT_VRAM_SIZE = 2048;
|
||||
uint16_t m_text_vram[ TEXT_VRAM_SIZE ];
|
||||
static constexpr unsigned GRAPHIC_VRAM_SIZE = 16384;
|
||||
uint8_t m_graphic_vram[ GRAPHIC_VRAM_SIZE ];
|
||||
uint16_t m_text_vram[TEXT_VRAM_SIZE];
|
||||
uint8_t m_graphic_vram[GRAPHIC_VRAM_SIZE];
|
||||
bool m_hsync_en;
|
||||
bool m_graphic_en;
|
||||
bool m_hpib_irq;
|
||||
@ -298,7 +299,7 @@ void hp9816_state::diag_led_w(uint8_t data)
|
||||
uint16_t hp9816_state::text_r(offs_t offset)
|
||||
{
|
||||
if (BIT(offset, 12)) {
|
||||
return m_text_vram[ offset & (TEXT_VRAM_SIZE - 1) ];
|
||||
return m_text_vram[offset & (TEXT_VRAM_SIZE - 1)];
|
||||
} else if (BIT(offset, 0)) {
|
||||
return m_crtc->register_r();
|
||||
} else {
|
||||
@ -311,7 +312,7 @@ void hp9816_state::text_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (BIT(offset, 12)) {
|
||||
m_hsync_en = !BIT(offset, 14);
|
||||
COMBINE_DATA(&m_text_vram[ offset & (TEXT_VRAM_SIZE - 1) ]);
|
||||
COMBINE_DATA(&m_text_vram[offset & (TEXT_VRAM_SIZE - 1)]);
|
||||
} else if (ACCESSING_BITS_0_7) {
|
||||
if (BIT(offset, 0)) {
|
||||
m_crtc->register_w(uint8_t(data));
|
||||
@ -328,7 +329,7 @@ uint16_t hp9816_state::graphic_r(offs_t offset, uint16_t mem_mask)
|
||||
m_graphic_en = !BIT(offset, 14);
|
||||
|
||||
if (ACCESSING_BITS_0_7) {
|
||||
return m_graphic_vram[ offset & (GRAPHIC_VRAM_SIZE - 1) ];
|
||||
return m_graphic_vram[offset & (GRAPHIC_VRAM_SIZE - 1)];
|
||||
} else {
|
||||
return m_cpu->berr_r();
|
||||
}
|
||||
@ -339,7 +340,7 @@ void hp9816_state::graphic_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
m_graphic_en = !BIT(offset, 14);
|
||||
|
||||
if (ACCESSING_BITS_0_7) {
|
||||
m_graphic_vram[ offset & (GRAPHIC_VRAM_SIZE - 1) ] = uint8_t(data);
|
||||
m_graphic_vram[offset & (GRAPHIC_VRAM_SIZE - 1)] = uint8_t(data);
|
||||
} else {
|
||||
return m_cpu->berr_w(0);
|
||||
}
|
||||
@ -474,7 +475,7 @@ MC6845_UPDATE_ROW(hp9816_state::crtc_update_row)
|
||||
|
||||
// Text video
|
||||
for (int i = 0; i < x_count; i++) {
|
||||
uint16_t char_attr = m_text_vram[ (ma + i) & (TEXT_VRAM_SIZE - 1) ];
|
||||
uint16_t char_attr = m_text_vram[(ma + i) & (TEXT_VRAM_SIZE - 1)];
|
||||
// | Bit(s) | Meaning |
|
||||
// |--------+----------------------------|
|
||||
// | 15 | Select alternate char. set |
|
||||
@ -496,7 +497,7 @@ MC6845_UPDATE_ROW(hp9816_state::crtc_update_row)
|
||||
if (BIT(char_attr, 15)) {
|
||||
BIT_SET(chargen_addr, 12);
|
||||
}
|
||||
char_pixels = uint16_t(m_chargen[ chargen_addr ]) << 1;
|
||||
char_pixels = uint16_t(m_chargen[chargen_addr]) << 1;
|
||||
underline = BIT(char_attr, 10) && ra == 11;
|
||||
invert = BIT(char_attr, 8);
|
||||
cursor = cursor_x == i;
|
||||
@ -553,7 +554,7 @@ MC6845_UPDATE_ROW(hp9816_state::crtc_update_row)
|
||||
char_pixels = ~char_pixels;
|
||||
}
|
||||
for (unsigned col = 0; col < 10; col++) {
|
||||
bitmap.pix(y, i * 10 + col) = pen[ BIT(char_pixels, 9 - col) ? (half_bright ? 1 : 2) : 0 ];
|
||||
bitmap.pix(y, i * 10 + col) = pen[BIT(char_pixels, 9 - col) ? (half_bright ? 1 : 2) : 0];
|
||||
}
|
||||
}
|
||||
|
||||
@ -564,7 +565,7 @@ MC6845_UPDATE_ROW(hp9816_state::crtc_update_row)
|
||||
unsigned g_bytes_per_line = g_cols / 8;
|
||||
unsigned g_addr = y * g_bytes_per_line;
|
||||
for (unsigned i = 0; i < g_bytes_per_line; i++) {
|
||||
uint8_t graph_pixels = m_graphic_vram[ (g_addr + i) & (GRAPHIC_VRAM_SIZE - 1) ];
|
||||
uint8_t graph_pixels = m_graphic_vram[(g_addr + i) & (GRAPHIC_VRAM_SIZE - 1)];
|
||||
for (unsigned col = 0; col < 8; col++) {
|
||||
if (BIT(graph_pixels, 7 - col)) {
|
||||
// A graphic pixel covers 2 text pixels
|
||||
@ -581,12 +582,12 @@ MC6845_UPDATE_ROW(hp9816_state::crtc_update_row)
|
||||
// | 0 | 2 |
|
||||
// | 1 | 2 |
|
||||
// | 2 | 0 |
|
||||
pix = pen[ (pix == pen[ 2 ]) ? 0 : 2 ];
|
||||
pix = pen[(pix == pen[2]) ? 0 : 2];
|
||||
}
|
||||
x_pos++;
|
||||
{
|
||||
auto &pix = bitmap.pix(y, x_pos);
|
||||
pix = pen[ (pix == pen[ 2 ]) ? 0 : 2 ];
|
||||
pix = pen[(pix == pen[2]) ? 0 : 2];
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -701,6 +702,7 @@ ROM_START(hp9816a)
|
||||
ROM_SYSTEM_BIOS(1, "bios30", "BIOS v3.0")
|
||||
ROMX_LOAD("rom30.bin", 0x0000, 0x10000, CRC(05c07e75) SHA1(3066a65e6137482041f9a77d09ee2289fe0974aa), ROM_BIOS(1))
|
||||
ROM_END
|
||||
|
||||
} // anonymous namespace
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
|
||||
@ -32,10 +32,13 @@
|
||||
#include "emu.h"
|
||||
#include "hp98x6_upi.h"
|
||||
|
||||
#include "speaker.h"
|
||||
|
||||
// Debugging
|
||||
#define VERBOSE 1
|
||||
#include "logmacro.h"
|
||||
|
||||
|
||||
// Bit manipulation
|
||||
namespace {
|
||||
template<typename T> constexpr T BIT_MASK(unsigned n)
|
||||
@ -440,33 +443,33 @@ void hp98x6_upi_device::device_reset()
|
||||
|
||||
m_last_dial = m_dial->read();
|
||||
m_beep->set_state(0);
|
||||
m_ram[ RAM_POS_0_R2_FLAGS1 ] = 0;
|
||||
m_ram[RAM_POS_0_R2_FLAGS1] = 0;
|
||||
// Mask out all interrupts
|
||||
m_ram[ RAM_POS_0_R4_FLAGS2 ] =
|
||||
m_ram[RAM_POS_0_R4_FLAGS2] =
|
||||
BIT_MASK<uint8_t>(R4_FLAGS2_FHS_MASK_BIT) |
|
||||
BIT_MASK<uint8_t>(R4_FLAGS2_PSI_MASK_BIT) |
|
||||
BIT_MASK<uint8_t>(R4_FLAGS2_TMR_MASK_BIT) |
|
||||
BIT_MASK<uint8_t>(R4_FLAGS2_RST_MASK_BIT) |
|
||||
BIT_MASK<uint8_t>(R4_FLAGS2_KEY_MASK_BIT);
|
||||
m_ram[ RAM_POS_0_R5_FLAGS3 ] = 0;
|
||||
m_ram[ RAM_POS_0_R6_ROLLOVER ] = SCANCODE_NONE;
|
||||
m_ram[ RAM_POS_0_R7_KEY_DOWN ] = SCANCODE_NONE;
|
||||
m_ram[RAM_POS_0_R5_FLAGS3] = 0;
|
||||
m_ram[RAM_POS_0_R6_ROLLOVER] = SCANCODE_NONE;
|
||||
m_ram[RAM_POS_0_R7_KEY_DOWN] = SCANCODE_NONE;
|
||||
// Assume RESET key is down
|
||||
m_ram[ RAM_POS_RST_DEB_CNT ] = R2_FLAGS1_DEB_INIT;
|
||||
m_ram[RAM_POS_RST_DEB_CNT] = R2_FLAGS1_DEB_INIT;
|
||||
// PROM is present
|
||||
m_ram[ RAM_POS_CFG_JUMPERS ] = BIT_MASK<uint8_t>(CFG_JUMPERS_PROM_BIT);
|
||||
m_ram[RAM_POS_CFG_JUMPERS] = BIT_MASK<uint8_t>(CFG_JUMPERS_PROM_BIT);
|
||||
// Assume US English
|
||||
m_ram[ RAM_POS_LNG_JUMPERS ] = 0;
|
||||
m_ram[ RAM_POS_1_R3_TIMER_STS ] = 0;
|
||||
m_ram[ RAM_POS_1_R4_RPG_COUNT ] = 0;
|
||||
m_ram[ RAM_POS_1_R5_W_PTR ] = 0;
|
||||
m_ram[ RAM_POS_READING_PROM ] = 0;
|
||||
m_ram[RAM_POS_LNG_JUMPERS] = 0;
|
||||
m_ram[RAM_POS_1_R3_TIMER_STS] = 0;
|
||||
m_ram[RAM_POS_1_R4_RPG_COUNT] = 0;
|
||||
m_ram[RAM_POS_1_R5_W_PTR] = 0;
|
||||
m_ram[RAM_POS_READING_PROM] = 0;
|
||||
|
||||
// Note that RAM is not cleared to avoid losing TOD after an UPI reset
|
||||
|
||||
m_status = 0;
|
||||
m_ready = false;
|
||||
m_fsm_state = FSM_ST::ST_POR_TEST1;
|
||||
m_fsm_state = fsm_st::ST_POR_TEST1;
|
||||
m_delay_timer->adjust(clocks_to_attotime(POR_DELAY1));
|
||||
m_input_delay_timer->reset();
|
||||
}
|
||||
@ -483,24 +486,24 @@ TIMER_DEVICE_CALLBACK_MEMBER(hp98x6_upi_device::ten_ms)
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(hp98x6_upi_device::delay)
|
||||
{
|
||||
switch (m_fsm_state) {
|
||||
case FSM_ST::ST_POR_TEST1:
|
||||
case fsm_st::ST_POR_TEST1:
|
||||
m_irq1_write_func(false);
|
||||
m_fsm_state = FSM_ST::ST_POR_TEST2;
|
||||
m_fsm_state = fsm_st::ST_POR_TEST2;
|
||||
m_delay_timer->adjust(clocks_to_attotime(POR_DELAY2));
|
||||
break;
|
||||
|
||||
case FSM_ST::ST_POR_TEST2:
|
||||
case fsm_st::ST_POR_TEST2:
|
||||
write_ob_st(POST_BYTE, ST_POST_OK);
|
||||
m_fsm_state = FSM_ST::ST_IDLE;
|
||||
m_fsm_state = fsm_st::ST_IDLE;
|
||||
update_fsm();
|
||||
break;
|
||||
|
||||
case FSM_ST::ST_RESETTING:
|
||||
case fsm_st::ST_RESETTING:
|
||||
// Send NMI to 68k
|
||||
m_irq7_write_func(true);
|
||||
// F0 = 0 means "NMI from RESET key"
|
||||
BIT_CLR(m_status, STATUS_F0_BIT);
|
||||
m_fsm_state = FSM_ST::ST_IDLE;
|
||||
m_fsm_state = fsm_st::ST_IDLE;
|
||||
update_fsm();
|
||||
break;
|
||||
|
||||
@ -537,24 +540,24 @@ void hp98x6_upi_device::update_fsm()
|
||||
uint8_t in_data;
|
||||
|
||||
// Check for incoming command or data
|
||||
if (m_fsm_state == FSM_ST::ST_IDLE &&
|
||||
if (m_fsm_state == fsm_st::ST_IDLE &&
|
||||
m_ready &&
|
||||
read_ib(in_data)) {
|
||||
if (BIT(m_status, STATUS_F1_BIT)) {
|
||||
// Command
|
||||
LOG("UPI cmd %02x\n", in_data);
|
||||
decode_cmd(in_data);
|
||||
} else if (m_ram[ RAM_POS_1_R5_W_PTR ]) {
|
||||
} else if (m_ram[RAM_POS_1_R5_W_PTR]) {
|
||||
// Data
|
||||
LOG("UPI data %02x\n", in_data);
|
||||
uint8_t w_ptr = m_ram[ RAM_POS_1_R5_W_PTR ];
|
||||
uint8_t w_ptr = m_ram[RAM_POS_1_R5_W_PTR];
|
||||
if (w_ptr >= RAM_POS_TOD_1 && w_ptr <= RAM_POS_TOD_3) {
|
||||
// Data written to TOD are summed in, not just stored
|
||||
uint8_t inc[] = { 0, 0, 0 };
|
||||
inc[ w_ptr - RAM_POS_TOD_1 ] = in_data;
|
||||
inc[w_ptr - RAM_POS_TOD_1] = in_data;
|
||||
(void)add_to_ctr(RAM_POS_TOD_1, 3, inc);
|
||||
} else {
|
||||
m_ram[ w_ptr ] = in_data;
|
||||
m_ram[w_ptr] = in_data;
|
||||
}
|
||||
// Additional actions triggered by writing at the end of
|
||||
// various counters
|
||||
@ -564,29 +567,29 @@ void hp98x6_upi_device::update_fsm()
|
||||
if (in_data != 0) {
|
||||
m_beep->set_clock((clock() * in_data) / BEEP_SCALING);
|
||||
m_beep->set_state(1);
|
||||
BIT_SET(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_BEEP_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_BEEP_BIT);
|
||||
} else {
|
||||
m_beep->set_state(0);
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_BEEP_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_BEEP_BIT);
|
||||
}
|
||||
break;
|
||||
case RAM_POS_RPG_INT_RATE:
|
||||
m_ram[ RAM_POS_RPG_TIMER ] = m_ram[ RAM_POS_RPG_INT_RATE ];
|
||||
m_ram[RAM_POS_RPG_TIMER] = m_ram[RAM_POS_RPG_INT_RATE];
|
||||
break;
|
||||
case RAM_POS_FHS_2:
|
||||
BIT_SET(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_FHS_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_FHS_BIT);
|
||||
break;
|
||||
case RAM_POS_MATCH_3:
|
||||
BIT_SET(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_MATCH_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_MATCH_BIT);
|
||||
break;
|
||||
case RAM_POS_DELAY_3:
|
||||
BIT_SET(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_DELAY_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_DELAY_BIT);
|
||||
break;
|
||||
case RAM_POS_CYCLE_3:
|
||||
BIT_SET(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_CYCLE_BIT);
|
||||
m_ram[ RAM_POS_CYCLE_SAVE_1 ] = m_ram[ RAM_POS_CYCLE_1 ];
|
||||
m_ram[ RAM_POS_CYCLE_SAVE_2 ] = m_ram[ RAM_POS_CYCLE_2 ];
|
||||
m_ram[ RAM_POS_CYCLE_SAVE_3 ] = m_ram[ RAM_POS_CYCLE_3 ];
|
||||
BIT_SET(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_CYCLE_BIT);
|
||||
m_ram[RAM_POS_CYCLE_SAVE_1] = m_ram[RAM_POS_CYCLE_1];
|
||||
m_ram[RAM_POS_CYCLE_SAVE_2] = m_ram[RAM_POS_CYCLE_2];
|
||||
m_ram[RAM_POS_CYCLE_SAVE_3] = m_ram[RAM_POS_CYCLE_3];
|
||||
break;
|
||||
}
|
||||
|
||||
@ -595,7 +598,7 @@ void hp98x6_upi_device::update_fsm()
|
||||
if (w_ptr > 0x3f) {
|
||||
LOG("Write pointer overflow\n");
|
||||
} else {
|
||||
m_ram[ RAM_POS_1_R5_W_PTR ] = w_ptr;
|
||||
m_ram[RAM_POS_1_R5_W_PTR] = w_ptr;
|
||||
}
|
||||
} else {
|
||||
// Not writing, data not expected
|
||||
@ -609,46 +612,46 @@ void hp98x6_upi_device::update_fsm()
|
||||
void hp98x6_upi_device::decode_cmd(uint8_t cmd)
|
||||
{
|
||||
// Not writing to RAM unless we get the write command
|
||||
m_ram[ RAM_POS_1_R5_W_PTR ] = 0;
|
||||
m_ram[RAM_POS_1_R5_W_PTR] = 0;
|
||||
|
||||
// Decode command categories first
|
||||
switch (cmd & CMD_MASK) {
|
||||
case CMD_RD_RAM_LOW:
|
||||
// 000x'xxxx
|
||||
// Read low RAM
|
||||
m_ram[ RAM_POS_1_R6_R_PTR ] = cmd & CMD_PARAM;
|
||||
m_ram[RAM_POS_1_R6_R_PTR] = cmd & CMD_PARAM;
|
||||
// Read from ID PROM when enabled
|
||||
if (m_ram[ RAM_POS_READING_PROM ] &&
|
||||
m_ram[ RAM_POS_1_R6_R_PTR ] == RAM_POS_0_R1) {
|
||||
m_ram[ RAM_POS_0_R1 ] = id_prom[ m_ram[ RAM_POS_PROM_ADDR ] ];
|
||||
LOG("PROM @%02x=%02x\n", m_ram[ RAM_POS_PROM_ADDR ], m_ram[ RAM_POS_0_R1 ]);
|
||||
m_ram[ RAM_POS_PROM_ADDR ]++;
|
||||
if (m_ram[RAM_POS_READING_PROM] &&
|
||||
m_ram[RAM_POS_1_R6_R_PTR] == RAM_POS_0_R1) {
|
||||
m_ram[RAM_POS_0_R1] = id_prom[m_ram[RAM_POS_PROM_ADDR]];
|
||||
LOG("PROM @%02x=%02x\n", m_ram[RAM_POS_PROM_ADDR], m_ram[RAM_POS_0_R1]);
|
||||
m_ram[RAM_POS_PROM_ADDR]++;
|
||||
}
|
||||
BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_READ_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_READ_BIT);
|
||||
break;
|
||||
case CMD_RD_RAM_HIGH:
|
||||
// 001x'xxxx
|
||||
// Read high RAM
|
||||
{
|
||||
unsigned idx = RAM_POS_HIGH_RAM_START - 4 + (cmd & CMD_PARAM);
|
||||
m_ram[ RAM_POS_OUT_BUFF_1 ] = m_ram[ idx++ ];
|
||||
m_ram[ RAM_POS_OUT_BUFF_2 ] = m_ram[ idx++ ];
|
||||
m_ram[ RAM_POS_OUT_BUFF_3 ] = m_ram[ idx++ ];
|
||||
m_ram[ RAM_POS_OUT_BUFF_4 ] = m_ram[ idx++ ];
|
||||
m_ram[ RAM_POS_OUT_BUFF_5 ] = m_ram[ idx ];
|
||||
m_ram[RAM_POS_OUT_BUFF_1] = m_ram[idx++];
|
||||
m_ram[RAM_POS_OUT_BUFF_2] = m_ram[idx++];
|
||||
m_ram[RAM_POS_OUT_BUFF_3] = m_ram[idx++];
|
||||
m_ram[RAM_POS_OUT_BUFF_4] = m_ram[idx++];
|
||||
m_ram[RAM_POS_OUT_BUFF_5] = m_ram[idx];
|
||||
}
|
||||
break;
|
||||
case CMD_SET_INT_MASK:
|
||||
// 010x'xxxx
|
||||
// Set interrupt mask
|
||||
m_ram[ RAM_POS_0_R4_FLAGS2 ] &= ~CMD_PARAM;
|
||||
m_ram[ RAM_POS_0_R4_FLAGS2 ] |= (cmd & CMD_PARAM);
|
||||
m_ram[RAM_POS_0_R4_FLAGS2] &= ~CMD_PARAM;
|
||||
m_ram[RAM_POS_0_R4_FLAGS2] |= (cmd & CMD_PARAM);
|
||||
try_fhs_output();
|
||||
break;
|
||||
case CMD_WR_RAM_HIGH:
|
||||
// 101x'xxxx
|
||||
// Write high RAM
|
||||
m_ram[ RAM_POS_1_R5_W_PTR ] = RAM_POS_HIGH_RAM_START + (cmd & CMD_PARAM);
|
||||
m_ram[RAM_POS_1_R5_W_PTR] = RAM_POS_HIGH_RAM_START + (cmd & CMD_PARAM);
|
||||
break;
|
||||
default:
|
||||
// Decode single commands
|
||||
@ -657,14 +660,14 @@ void hp98x6_upi_device::decode_cmd(uint8_t cmd)
|
||||
// 1100'0001
|
||||
// Start reading ID PROM
|
||||
LOG("Start PROM read\n");
|
||||
m_ram[ RAM_POS_READING_PROM ] = 1;
|
||||
m_ram[ RAM_POS_PROM_ADDR ] = 0;
|
||||
m_ram[RAM_POS_READING_PROM] = 1;
|
||||
m_ram[RAM_POS_PROM_ADDR] = 0;
|
||||
break;
|
||||
case CMD_RD_PROM_STOP:
|
||||
// 1100'0000
|
||||
// Stop reading ID PROM
|
||||
LOG("Stop PROM read\n");
|
||||
m_ram[ RAM_POS_READING_PROM ] = 0;
|
||||
m_ram[RAM_POS_READING_PROM] = 0;
|
||||
break;
|
||||
default:
|
||||
LOG("Unknown UPI cmd %02x\n", cmd);
|
||||
@ -673,43 +676,43 @@ void hp98x6_upi_device::decode_cmd(uint8_t cmd)
|
||||
}
|
||||
|
||||
// Then decode write commands that require additional actions
|
||||
switch (m_ram[ RAM_POS_1_R5_W_PTR ]) {
|
||||
switch (m_ram[RAM_POS_1_R5_W_PTR]) {
|
||||
case RAM_POS_TOD_1:
|
||||
// Set time-of-day
|
||||
m_ram[ RAM_POS_TOD_1 ] = 0;
|
||||
m_ram[ RAM_POS_TOD_2 ] = 0;
|
||||
m_ram[ RAM_POS_TOD_3 ] = 0;
|
||||
m_ram[RAM_POS_TOD_1] = 0;
|
||||
m_ram[RAM_POS_TOD_2] = 0;
|
||||
m_ram[RAM_POS_TOD_3] = 0;
|
||||
break;
|
||||
case RAM_POS_DAY_1 - 1:
|
||||
// Set day
|
||||
m_ram[ RAM_POS_1_R5_W_PTR ] = RAM_POS_DAY_1;
|
||||
m_ram[RAM_POS_1_R5_W_PTR] = RAM_POS_DAY_1;
|
||||
break;
|
||||
case RAM_POS_FHS_1:
|
||||
// Set FHS
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_FHS_BIT);
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_FHS_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_FHS_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_FHS_BIT);
|
||||
m_irq7_write_func(false);
|
||||
break;
|
||||
case RAM_POS_MATCH_1:
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_MATCH_BIT);
|
||||
BIT_CLR(m_ram[ RAM_POS_1_R3_TIMER_STS ], R3_TIMER_STS_MATCH_BIT);
|
||||
if ((m_ram[ RAM_POS_1_R3_TIMER_STS ] & R3_TIMER_STS_INT_MASK) == 0) {
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_MATCH_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_1_R3_TIMER_STS], R3_TIMER_STS_MATCH_BIT);
|
||||
if ((m_ram[RAM_POS_1_R3_TIMER_STS] & R3_TIMER_STS_INT_MASK) == 0) {
|
||||
BIT_CLR(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_USER_TMR_BIT);
|
||||
}
|
||||
break;
|
||||
case RAM_POS_DELAY_1:
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_DELAY_BIT);
|
||||
BIT_CLR(m_ram[ RAM_POS_1_R3_TIMER_STS ], R3_TIMER_STS_DELAY_BIT);
|
||||
if ((m_ram[ RAM_POS_1_R3_TIMER_STS ] & R3_TIMER_STS_INT_MASK) == 0) {
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_DELAY_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_1_R3_TIMER_STS], R3_TIMER_STS_DELAY_BIT);
|
||||
if ((m_ram[RAM_POS_1_R3_TIMER_STS] & R3_TIMER_STS_INT_MASK) == 0) {
|
||||
BIT_CLR(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_USER_TMR_BIT);
|
||||
}
|
||||
break;
|
||||
case RAM_POS_CYCLE_1:
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_CYCLE_BIT);
|
||||
m_ram[ RAM_POS_1_R3_TIMER_STS ] &= ~(R3_TIMER_STS_MISSED_CYCLES_MASK |
|
||||
BIT_CLR(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_CYCLE_BIT);
|
||||
m_ram[RAM_POS_1_R3_TIMER_STS] &= ~(R3_TIMER_STS_MISSED_CYCLES_MASK |
|
||||
BIT_MASK<uint8_t>(R3_TIMER_STS_CYCLE_BIT));
|
||||
if ((m_ram[ RAM_POS_1_R3_TIMER_STS ] & R3_TIMER_STS_INT_MASK) == 0) {
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT);
|
||||
if ((m_ram[RAM_POS_1_R3_TIMER_STS] & R3_TIMER_STS_INT_MASK) == 0) {
|
||||
BIT_CLR(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_USER_TMR_BIT);
|
||||
}
|
||||
break;
|
||||
}
|
||||
@ -720,13 +723,13 @@ bool hp98x6_upi_device::add_to_ctr(unsigned ram_idx, unsigned len, const uint8_t
|
||||
unsigned carry = 0;
|
||||
|
||||
for (unsigned i = ram_idx; i < ram_idx + len; i++) {
|
||||
unsigned sum = unsigned(m_ram[ i ]) + carry + *op++;
|
||||
unsigned sum = unsigned(m_ram[i]) + carry + *op++;
|
||||
if (sum < 256) {
|
||||
carry = 0;
|
||||
m_ram[ i ] = uint8_t(sum);
|
||||
m_ram[i] = uint8_t(sum);
|
||||
} else {
|
||||
carry = 1;
|
||||
m_ram[ i ] = uint8_t(sum - 256);
|
||||
m_ram[i] = uint8_t(sum - 256);
|
||||
}
|
||||
}
|
||||
|
||||
@ -737,81 +740,81 @@ void hp98x6_upi_device::ten_ms_update_key()
|
||||
{
|
||||
// Acquire shift & control (note that bits in R5_FLAGS3 are inverted)
|
||||
if (BIT(m_shift->read(), 0)) {
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_SHIFT_UP_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_SHIFT_UP_BIT);
|
||||
} else {
|
||||
BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_SHIFT_UP_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_SHIFT_UP_BIT);
|
||||
}
|
||||
if (BIT(m_shift->read(), 1)) {
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_CTRL_UP_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_CTRL_UP_BIT);
|
||||
} else {
|
||||
BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_CTRL_UP_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_CTRL_UP_BIT);
|
||||
}
|
||||
|
||||
// Scan keyboard
|
||||
ioport_value keys[ 4 ];
|
||||
ioport_value keys[4];
|
||||
acquire_keys(keys);
|
||||
|
||||
for (uint8_t idx = MIN_SCANCODE; idx <= MAX_SCANCODE; idx++) {
|
||||
if (is_key_down(keys, idx)) {
|
||||
// Check for RESET key combo
|
||||
if (!BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_SHIFT_UP_BIT) &&
|
||||
if (!BIT(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_SHIFT_UP_BIT) &&
|
||||
idx == PAUSE_SCANCODE) {
|
||||
if (m_ram[ RAM_POS_RST_DEB_CNT ] == 0 &&
|
||||
!BIT(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_RST_MASK_BIT)) {
|
||||
if (m_ram[RAM_POS_RST_DEB_CNT] == 0 &&
|
||||
!BIT(m_ram[RAM_POS_0_R4_FLAGS2], R4_FLAGS2_RST_MASK_BIT)) {
|
||||
// RESET key pressed: start delay to interrupt 68k
|
||||
LOG("Reset pressed\n");
|
||||
m_fsm_state = FSM_ST::ST_RESETTING;
|
||||
m_fsm_state = fsm_st::ST_RESETTING;
|
||||
m_delay_timer->adjust(clocks_to_attotime(RESET_DELAY));
|
||||
// Reset cancels FHS timer
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_FHS_BIT);
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_FHS_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_FHS_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_FHS_BIT);
|
||||
}
|
||||
m_ram[ RAM_POS_RST_DEB_CNT ] = R2_FLAGS1_DEB_INIT;
|
||||
} else if (idx != m_ram[ RAM_POS_0_R7_KEY_DOWN ]) {
|
||||
if (m_ram[ RAM_POS_0_R7_KEY_DOWN ] == SCANCODE_NONE) {
|
||||
m_ram[RAM_POS_RST_DEB_CNT] = R2_FLAGS1_DEB_INIT;
|
||||
} else if (idx != m_ram[RAM_POS_0_R7_KEY_DOWN]) {
|
||||
if (m_ram[RAM_POS_0_R7_KEY_DOWN] == SCANCODE_NONE) {
|
||||
// New key is down
|
||||
LOG("Key %02x\n", idx);
|
||||
set_new_key(idx);
|
||||
} else if (m_ram[ RAM_POS_0_R6_ROLLOVER ] == SCANCODE_NONE) {
|
||||
} else if (m_ram[RAM_POS_0_R6_ROLLOVER] == SCANCODE_NONE) {
|
||||
// Save roll-over key
|
||||
LOG("Rollover key %02x\n", idx);
|
||||
m_ram[ RAM_POS_0_R6_ROLLOVER ] = idx;
|
||||
m_ram[RAM_POS_0_R6_ROLLOVER] = idx;
|
||||
}
|
||||
} else {
|
||||
// Key kept down, reload debounce counter
|
||||
m_ram[ RAM_POS_0_R2_FLAGS1 ] = (m_ram[ RAM_POS_0_R2_FLAGS1 ] & ~R2_FLAGS1_DEB_MASK) | R2_FLAGS1_DEB_INIT;
|
||||
m_ram[RAM_POS_0_R2_FLAGS1] = (m_ram[RAM_POS_0_R2_FLAGS1] & ~R2_FLAGS1_DEB_MASK) | R2_FLAGS1_DEB_INIT;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Debounce RESET key
|
||||
if (m_ram[ RAM_POS_RST_DEB_CNT ] != 0) {
|
||||
m_ram[ RAM_POS_RST_DEB_CNT ]--;
|
||||
if (m_ram[RAM_POS_RST_DEB_CNT] != 0) {
|
||||
m_ram[RAM_POS_RST_DEB_CNT]--;
|
||||
}
|
||||
|
||||
// Debounce, auto-repeat and roll-over
|
||||
if (m_ram[ RAM_POS_0_R7_KEY_DOWN ] != SCANCODE_NONE) {
|
||||
if (m_ram[RAM_POS_0_R7_KEY_DOWN] != SCANCODE_NONE) {
|
||||
// Do debouncing
|
||||
m_ram[ RAM_POS_0_R2_FLAGS1 ]--;
|
||||
if ((m_ram[ RAM_POS_0_R2_FLAGS1 ] & R2_FLAGS1_DEB_MASK) != 0) {
|
||||
m_ram[RAM_POS_0_R2_FLAGS1]--;
|
||||
if ((m_ram[RAM_POS_0_R2_FLAGS1] & R2_FLAGS1_DEB_MASK) != 0) {
|
||||
// Key still down
|
||||
m_ram[ RAM_POS_AR_TIMER ]++;
|
||||
if (m_ram[ RAM_POS_AR_TIMER ] == 0) {
|
||||
m_ram[RAM_POS_AR_TIMER]++;
|
||||
if (m_ram[RAM_POS_AR_TIMER] == 0) {
|
||||
// Repeat key if A/R is enabled
|
||||
m_ram[ RAM_POS_AR_TIMER ] = m_ram[ RAM_POS_AR_RATE ];
|
||||
if (m_ram[ RAM_POS_AR_RATE ]) {
|
||||
LOG("A/R key %02x\n", m_ram[ RAM_POS_0_R7_KEY_DOWN ]);
|
||||
BIT_SET(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_AR_BIT);
|
||||
m_ram[RAM_POS_AR_TIMER] = m_ram[RAM_POS_AR_RATE];
|
||||
if (m_ram[RAM_POS_AR_RATE]) {
|
||||
LOG("A/R key %02x\n", m_ram[RAM_POS_0_R7_KEY_DOWN]);
|
||||
BIT_SET(m_ram[RAM_POS_0_R4_FLAGS2], R4_FLAGS2_AR_BIT);
|
||||
}
|
||||
}
|
||||
// Key is up & debounced, get roll-over key (if any)
|
||||
} else if (m_ram[ RAM_POS_0_R6_ROLLOVER ] != SCANCODE_NONE) {
|
||||
LOG("Shift rollover key %02x\n", m_ram[ RAM_POS_0_R6_ROLLOVER ]);
|
||||
set_new_key(m_ram[ RAM_POS_0_R6_ROLLOVER ]);
|
||||
m_ram[ RAM_POS_0_R6_ROLLOVER ] = SCANCODE_NONE;
|
||||
} else if (m_ram[RAM_POS_0_R6_ROLLOVER] != SCANCODE_NONE) {
|
||||
LOG("Shift rollover key %02x\n", m_ram[RAM_POS_0_R6_ROLLOVER]);
|
||||
set_new_key(m_ram[RAM_POS_0_R6_ROLLOVER]);
|
||||
m_ram[RAM_POS_0_R6_ROLLOVER] = SCANCODE_NONE;
|
||||
} else {
|
||||
m_ram[ RAM_POS_0_R7_KEY_DOWN ] = SCANCODE_NONE;
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_AR_BIT);
|
||||
m_ram[RAM_POS_0_R7_KEY_DOWN] = SCANCODE_NONE;
|
||||
BIT_CLR(m_ram[RAM_POS_0_R4_FLAGS2], R4_FLAGS2_AR_BIT);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -827,7 +830,7 @@ void hp98x6_upi_device::ten_ms_update_dial()
|
||||
diff_int -= 256;
|
||||
}
|
||||
LOG("DIAL %d\n", diff_int);
|
||||
int pos = int(m_ram[ RAM_POS_1_R4_RPG_COUNT ]);
|
||||
int pos = int(m_ram[RAM_POS_1_R4_RPG_COUNT]);
|
||||
// Sign extension
|
||||
if (BIT(pos, 7)) {
|
||||
pos -= 256;
|
||||
@ -840,16 +843,16 @@ void hp98x6_upi_device::ten_ms_update_dial()
|
||||
pos = 127;
|
||||
}
|
||||
|
||||
m_ram[ RAM_POS_1_R4_RPG_COUNT ] = uint8_t(pos);
|
||||
m_ram[RAM_POS_1_R4_RPG_COUNT] = uint8_t(pos);
|
||||
m_last_dial = dial;
|
||||
}
|
||||
|
||||
if (--m_ram[ RAM_POS_RPG_TIMER ] == 0) {
|
||||
if (--m_ram[RAM_POS_RPG_TIMER] == 0) {
|
||||
// Dial timer expired
|
||||
m_ram[ RAM_POS_RPG_TIMER ] = m_ram[ RAM_POS_RPG_INT_RATE ];
|
||||
if (m_ram[ RAM_POS_1_R4_RPG_COUNT ]) {
|
||||
m_ram[RAM_POS_RPG_TIMER] = m_ram[RAM_POS_RPG_INT_RATE];
|
||||
if (m_ram[RAM_POS_1_R4_RPG_COUNT]) {
|
||||
// Time to send dial movement to 68k
|
||||
BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_RPG_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_RPG_BIT);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -857,99 +860,99 @@ void hp98x6_upi_device::ten_ms_update_dial()
|
||||
void hp98x6_upi_device::ten_ms_update_timers()
|
||||
{
|
||||
// 10-ms timer is up
|
||||
BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_PSI_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_PSI_BIT);
|
||||
|
||||
// Advance TOD
|
||||
uint8_t one[] = { 1, 0, 0 };
|
||||
(void)add_to_ctr(RAM_POS_TOD_1, 3, one);
|
||||
// Check for one full day of counting
|
||||
if (m_ram[ RAM_POS_TOD_3 ] > TOD_3_ONE_DAY ||
|
||||
(m_ram[ RAM_POS_TOD_3 ] == TOD_3_ONE_DAY &&
|
||||
(m_ram[ RAM_POS_TOD_2 ] > TOD_2_ONE_DAY ||
|
||||
(m_ram[ RAM_POS_TOD_2 ] == TOD_2_ONE_DAY &&
|
||||
m_ram[ RAM_POS_TOD_1 ] >= TOD_1_ONE_DAY)))) {
|
||||
if (m_ram[RAM_POS_TOD_3] > TOD_3_ONE_DAY ||
|
||||
(m_ram[RAM_POS_TOD_3] == TOD_3_ONE_DAY &&
|
||||
(m_ram[RAM_POS_TOD_2] > TOD_2_ONE_DAY ||
|
||||
(m_ram[RAM_POS_TOD_2] == TOD_2_ONE_DAY &&
|
||||
m_ram[RAM_POS_TOD_1] >= TOD_1_ONE_DAY)))) {
|
||||
// Clear TOD and advance DAY counter
|
||||
m_ram[ RAM_POS_TOD_1 ] = 0;
|
||||
m_ram[ RAM_POS_TOD_2 ] = 0;
|
||||
m_ram[ RAM_POS_TOD_3 ] = 0;
|
||||
m_ram[RAM_POS_TOD_1] = 0;
|
||||
m_ram[RAM_POS_TOD_2] = 0;
|
||||
m_ram[RAM_POS_TOD_3] = 0;
|
||||
(void)add_to_ctr(RAM_POS_DAY_1, 2, one);
|
||||
}
|
||||
|
||||
// Check if "match" timer matches TOD
|
||||
if (BIT(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_MATCH_BIT) &&
|
||||
m_ram[ RAM_POS_TOD_1 ] == m_ram[ RAM_POS_MATCH_1 ] &&
|
||||
m_ram[ RAM_POS_TOD_2 ] == m_ram[ RAM_POS_MATCH_2 ] &&
|
||||
m_ram[ RAM_POS_TOD_3 ] == m_ram[ RAM_POS_MATCH_3 ]) {
|
||||
BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT);
|
||||
BIT_SET(m_ram[ RAM_POS_1_R3_TIMER_STS ], R3_TIMER_STS_MATCH_BIT);
|
||||
if (BIT(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_MATCH_BIT) &&
|
||||
m_ram[RAM_POS_TOD_1] == m_ram[RAM_POS_MATCH_1] &&
|
||||
m_ram[RAM_POS_TOD_2] == m_ram[RAM_POS_MATCH_2] &&
|
||||
m_ram[RAM_POS_TOD_3] == m_ram[RAM_POS_MATCH_3]) {
|
||||
BIT_SET(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_USER_TMR_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_1_R3_TIMER_STS], R3_TIMER_STS_MATCH_BIT);
|
||||
// Match timer is self-canceling
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_MATCH_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_MATCH_BIT);
|
||||
}
|
||||
|
||||
// Update FHS timer
|
||||
if (BIT(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_FHS_BIT) &&
|
||||
if (BIT(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_FHS_BIT) &&
|
||||
add_to_ctr(RAM_POS_FHS_1, 2, one)) {
|
||||
BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_FHS_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_FHS_BIT);
|
||||
// Is the FHS timer self-canceling?
|
||||
try_fhs_output();
|
||||
}
|
||||
|
||||
// Update cyclic timer
|
||||
if (BIT(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_CYCLE_BIT) &&
|
||||
if (BIT(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_CYCLE_BIT) &&
|
||||
add_to_ctr(RAM_POS_CYCLE_1, 3, one)) {
|
||||
if (BIT(m_ram[ RAM_POS_1_R3_TIMER_STS ], R3_TIMER_STS_CYCLE_BIT) &&
|
||||
(m_ram[ RAM_POS_1_R3_TIMER_STS ] & R3_TIMER_STS_MISSED_CYCLES_MASK) != R3_TIMER_STS_MISSED_CYCLES_MASK) {
|
||||
if (BIT(m_ram[RAM_POS_1_R3_TIMER_STS], R3_TIMER_STS_CYCLE_BIT) &&
|
||||
(m_ram[RAM_POS_1_R3_TIMER_STS] & R3_TIMER_STS_MISSED_CYCLES_MASK) != R3_TIMER_STS_MISSED_CYCLES_MASK) {
|
||||
// Increment number of missed cycle interrupts
|
||||
m_ram[ RAM_POS_1_R3_TIMER_STS ]++;
|
||||
m_ram[RAM_POS_1_R3_TIMER_STS]++;
|
||||
}
|
||||
BIT_SET(m_ram[ RAM_POS_1_R3_TIMER_STS ], R3_TIMER_STS_CYCLE_BIT);
|
||||
BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_1_R3_TIMER_STS], R3_TIMER_STS_CYCLE_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_USER_TMR_BIT);
|
||||
// Reload timer
|
||||
m_ram[ RAM_POS_CYCLE_1 ] = m_ram[ RAM_POS_CYCLE_SAVE_1 ];
|
||||
m_ram[ RAM_POS_CYCLE_2 ] = m_ram[ RAM_POS_CYCLE_SAVE_2 ];
|
||||
m_ram[ RAM_POS_CYCLE_3 ] = m_ram[ RAM_POS_CYCLE_SAVE_3 ];
|
||||
m_ram[RAM_POS_CYCLE_1] = m_ram[RAM_POS_CYCLE_SAVE_1];
|
||||
m_ram[RAM_POS_CYCLE_2] = m_ram[RAM_POS_CYCLE_SAVE_2];
|
||||
m_ram[RAM_POS_CYCLE_3] = m_ram[RAM_POS_CYCLE_SAVE_3];
|
||||
}
|
||||
|
||||
// Update delay timer
|
||||
if (BIT(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_DELAY_BIT) &&
|
||||
if (BIT(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_DELAY_BIT) &&
|
||||
add_to_ctr(RAM_POS_DELAY_1, 3, one)) {
|
||||
BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT);
|
||||
BIT_SET(m_ram[ RAM_POS_1_R3_TIMER_STS ], R3_TIMER_STS_DELAY_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_USER_TMR_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_1_R3_TIMER_STS], R3_TIMER_STS_DELAY_BIT);
|
||||
// Is the delay timer self-canceling?
|
||||
}
|
||||
}
|
||||
|
||||
void hp98x6_upi_device::ten_ms_update_beep()
|
||||
{
|
||||
if (BIT(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_BEEP_BIT) &&
|
||||
++m_ram[ RAM_POS_BEEP_TIMER ] == 0) {
|
||||
if (BIT(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_BEEP_BIT) &&
|
||||
++m_ram[RAM_POS_BEEP_TIMER] == 0) {
|
||||
m_beep->set_state(0);
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_BEEP_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R2_FLAGS1], R2_FLAGS1_BEEP_BIT);
|
||||
}
|
||||
}
|
||||
|
||||
void hp98x6_upi_device::set_new_key(uint8_t scancode)
|
||||
{
|
||||
m_ram[ RAM_POS_0_R7_KEY_DOWN ] = scancode;
|
||||
m_ram[RAM_POS_0_R7_KEY_DOWN] = scancode;
|
||||
// Trigger output of key
|
||||
BIT_SET(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_AR_BIT);
|
||||
BIT_SET(m_ram[RAM_POS_0_R4_FLAGS2], R4_FLAGS2_AR_BIT);
|
||||
// Set A/R delay counter
|
||||
m_ram[ RAM_POS_AR_TIMER ] = m_ram[ RAM_POS_AR_WAIT ];
|
||||
m_ram[RAM_POS_AR_TIMER] = m_ram[RAM_POS_AR_WAIT];
|
||||
// Load debounce counter
|
||||
m_ram[ RAM_POS_0_R2_FLAGS1 ] = (m_ram[ RAM_POS_0_R2_FLAGS1 ] & ~R2_FLAGS1_DEB_MASK) | R2_FLAGS1_DEB_INIT;
|
||||
m_ram[RAM_POS_0_R2_FLAGS1] = (m_ram[RAM_POS_0_R2_FLAGS1] & ~R2_FLAGS1_DEB_MASK) | R2_FLAGS1_DEB_INIT;
|
||||
}
|
||||
|
||||
void hp98x6_upi_device::acquire_keys(ioport_value input[ 4 ])
|
||||
void hp98x6_upi_device::acquire_keys(ioport_value input[4])
|
||||
{
|
||||
// Search for longest sequence among pressed keys
|
||||
int max_len = 0;
|
||||
unsigned n_pressed = 0;
|
||||
for (unsigned i = 0; i < 4; i++) {
|
||||
input[ i ] = m_keys[ i ]->read();
|
||||
auto w = input[ i ];
|
||||
input[i] = m_keys[i]->read();
|
||||
auto w = input[i];
|
||||
while (w) {
|
||||
auto mask = BIT_MASK<ioport_value>(31 - count_leading_zeros_32(w));
|
||||
auto len = m_keys[ i ]->field(mask)->seq().length();
|
||||
auto len = m_keys[i]->field(mask)->seq().length();
|
||||
if (len > max_len) {
|
||||
max_len = len;
|
||||
}
|
||||
@ -960,12 +963,12 @@ void hp98x6_upi_device::acquire_keys(ioport_value input[ 4 ])
|
||||
// Filter out pressed keys with sequences shorter than the longest one
|
||||
if (n_pressed > 1) {
|
||||
for (unsigned i = 0; i < 4; i++) {
|
||||
auto w = input[ i ];
|
||||
auto w = input[i];
|
||||
while (w) {
|
||||
auto mask = BIT_MASK<ioport_value>(31 - count_leading_zeros_32(w));
|
||||
auto len = m_keys[ i ]->field(mask)->seq().length();
|
||||
auto len = m_keys[i]->field(mask)->seq().length();
|
||||
if (len < max_len) {
|
||||
input[ i ] &= ~mask;
|
||||
input[i] &= ~mask;
|
||||
}
|
||||
w &= ~mask;
|
||||
}
|
||||
@ -973,19 +976,19 @@ void hp98x6_upi_device::acquire_keys(ioport_value input[ 4 ])
|
||||
}
|
||||
}
|
||||
|
||||
bool hp98x6_upi_device::is_key_down(const ioport_value input[ 4 ], uint8_t idx)
|
||||
bool hp98x6_upi_device::is_key_down(const ioport_value input[4], uint8_t idx)
|
||||
{
|
||||
unsigned row = idx % 8;
|
||||
unsigned col = idx / 8;
|
||||
return BIT(input[ row / 2 ], col + ((row & 1) << 4));
|
||||
return BIT(input[row / 2], col + ((row & 1) << 4));
|
||||
}
|
||||
|
||||
uint8_t hp98x6_upi_device::encode_shift_ctrl(uint8_t st) const
|
||||
{
|
||||
if (BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_CTRL_UP_BIT)) {
|
||||
if (BIT(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_CTRL_UP_BIT)) {
|
||||
BIT_SET(st, 5);
|
||||
}
|
||||
if (BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_SHIFT_UP_BIT)) {
|
||||
if (BIT(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_SHIFT_UP_BIT)) {
|
||||
BIT_SET(st, 4);
|
||||
}
|
||||
return st;
|
||||
@ -995,41 +998,41 @@ void hp98x6_upi_device::try_output()
|
||||
{
|
||||
if (!BIT(m_status, STATUS_OBF_BIT)) {
|
||||
// Key
|
||||
if (BIT(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_AR_BIT) &&
|
||||
!BIT(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_KEY_MASK_BIT)) {
|
||||
if (BIT(m_ram[RAM_POS_0_R4_FLAGS2], R4_FLAGS2_AR_BIT) &&
|
||||
!BIT(m_ram[RAM_POS_0_R4_FLAGS2], R4_FLAGS2_KEY_MASK_BIT)) {
|
||||
uint8_t st = encode_shift_ctrl(ST_KEY);
|
||||
write_ob_st(m_ram[ RAM_POS_0_R7_KEY_DOWN ], st);
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_AR_BIT);
|
||||
write_ob_st(m_ram[RAM_POS_0_R7_KEY_DOWN], st);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R4_FLAGS2], R4_FLAGS2_AR_BIT);
|
||||
// If key output is not possible now, autorepeat bit is not cleared
|
||||
// to try again at a later time
|
||||
} else {
|
||||
// PSI and/or timers
|
||||
bool psi = BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_PSI_BIT) &&
|
||||
!BIT(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_PSI_MASK_BIT);
|
||||
bool timer = BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT) &&
|
||||
!BIT(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_TMR_MASK_BIT);
|
||||
bool psi = BIT(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_PSI_BIT) &&
|
||||
!BIT(m_ram[RAM_POS_0_R4_FLAGS2], R4_FLAGS2_PSI_MASK_BIT);
|
||||
bool timer = BIT(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_USER_TMR_BIT) &&
|
||||
!BIT(m_ram[RAM_POS_0_R4_FLAGS2], R4_FLAGS2_TMR_MASK_BIT);
|
||||
|
||||
if (psi || timer) {
|
||||
uint8_t st = (psi ? ST_PSI : 0) | (timer ? ST_TIMER : 0);
|
||||
write_ob_st(m_ram[ RAM_POS_1_R3_TIMER_STS ], st);
|
||||
write_ob_st(m_ram[RAM_POS_1_R3_TIMER_STS], st);
|
||||
if (psi) {
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_PSI_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_PSI_BIT);
|
||||
}
|
||||
if (timer) {
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT);
|
||||
m_ram[ RAM_POS_1_R3_TIMER_STS ] = 0;
|
||||
BIT_CLR(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_USER_TMR_BIT);
|
||||
m_ram[RAM_POS_1_R3_TIMER_STS] = 0;
|
||||
}
|
||||
} else if (BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_RPG_BIT) &&
|
||||
!BIT(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_KEY_MASK_BIT)) {
|
||||
} else if (BIT(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_RPG_BIT) &&
|
||||
!BIT(m_ram[RAM_POS_0_R4_FLAGS2], R4_FLAGS2_KEY_MASK_BIT)) {
|
||||
// Dial position
|
||||
uint8_t st = encode_shift_ctrl(ST_RPG);
|
||||
write_ob_st(m_ram[ RAM_POS_1_R4_RPG_COUNT ], st);
|
||||
m_ram[ RAM_POS_1_R4_RPG_COUNT ] = 0;
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_RPG_BIT);
|
||||
} else if (BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_READ_BIT)) {
|
||||
write_ob_st(m_ram[RAM_POS_1_R4_RPG_COUNT], st);
|
||||
m_ram[RAM_POS_1_R4_RPG_COUNT] = 0;
|
||||
BIT_CLR(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_RPG_BIT);
|
||||
} else if (BIT(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_READ_BIT)) {
|
||||
// Read data
|
||||
write_ob_st(m_ram[ m_ram[ RAM_POS_1_R6_R_PTR ] ], ST_REQUESTED_DATA);
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_READ_BIT);
|
||||
write_ob_st(m_ram[m_ram[RAM_POS_1_R6_R_PTR]], ST_REQUESTED_DATA);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_READ_BIT);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -1038,10 +1041,10 @@ void hp98x6_upi_device::try_output()
|
||||
void hp98x6_upi_device::try_fhs_output()
|
||||
{
|
||||
// Check if FHS NMI interrupt is to be raised
|
||||
if (BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_FHS_BIT) &&
|
||||
!BIT(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_FHS_MASK_BIT)) {
|
||||
if (BIT(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_FHS_BIT) &&
|
||||
!BIT(m_ram[RAM_POS_0_R4_FLAGS2], R4_FLAGS2_FHS_MASK_BIT)) {
|
||||
LOG("NMI from FHS\n");
|
||||
BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_FHS_BIT);
|
||||
BIT_CLR(m_ram[RAM_POS_0_R5_FLAGS3], R5_FLAGS3_FHS_BIT);
|
||||
// F0 = 1 means "NMI from FHS timer"
|
||||
BIT_SET(m_status, STATUS_F0_BIT);
|
||||
m_irq7_write_func(true);
|
||||
|
||||
@ -16,7 +16,7 @@
|
||||
|
||||
#include "machine/timer.h"
|
||||
#include "sound/beep.h"
|
||||
#include "speaker.h"
|
||||
|
||||
|
||||
class hp98x6_upi_device : public device_t
|
||||
{
|
||||
@ -40,6 +40,13 @@ protected:
|
||||
virtual void device_reset() override;
|
||||
|
||||
private:
|
||||
enum class fsm_st {
|
||||
ST_IDLE,
|
||||
ST_POR_TEST1,
|
||||
ST_POR_TEST2,
|
||||
ST_RESETTING
|
||||
};
|
||||
|
||||
required_ioport_array<4> m_keys;
|
||||
required_ioport m_shift;
|
||||
required_ioport m_dial;
|
||||
@ -50,21 +57,14 @@ private:
|
||||
|
||||
devcb_write_line m_irq1_write_func;
|
||||
devcb_write_line m_irq7_write_func;
|
||||
uint8_t m_ram[ 64 ];
|
||||
uint8_t m_ram[64];
|
||||
uint8_t m_data_in;
|
||||
uint8_t m_data_out;
|
||||
uint8_t m_status;
|
||||
bool m_ready;
|
||||
ioport_value m_last_dial;
|
||||
|
||||
enum class FSM_ST {
|
||||
ST_IDLE,
|
||||
ST_POR_TEST1,
|
||||
ST_POR_TEST2,
|
||||
ST_RESETTING
|
||||
};
|
||||
|
||||
FSM_ST m_fsm_state;
|
||||
fsm_st m_fsm_state;
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(ten_ms);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(delay);
|
||||
@ -80,8 +80,8 @@ private:
|
||||
void ten_ms_update_timers();
|
||||
void ten_ms_update_beep();
|
||||
void set_new_key(uint8_t scancode);
|
||||
void acquire_keys(ioport_value input[ 4 ]);
|
||||
bool is_key_down(const ioport_value input[ 4 ], uint8_t idx);
|
||||
void acquire_keys(ioport_value input[4]);
|
||||
bool is_key_down(const ioport_value input[4], uint8_t idx);
|
||||
uint8_t encode_shift_ctrl(uint8_t st) const;
|
||||
void try_output();
|
||||
void try_fhs_output();
|
||||
|
||||
@ -2,16 +2,20 @@
|
||||
// copyright-holders:David Haywood, XingXing
|
||||
|
||||
#include "emu.h"
|
||||
|
||||
#include "pgmcrypt.h"
|
||||
|
||||
#include "cpu/arm7/arm7.h"
|
||||
#include "cpu/arm7/arm7core.h"
|
||||
#include "cpu/xa/xa.h"
|
||||
#include "machine/nvram.h"
|
||||
#include "pgmcrypt.h"
|
||||
#include "sound/ics2115.h"
|
||||
|
||||
#include "emupal.h"
|
||||
#include "screen.h"
|
||||
#include "speaker.h"
|
||||
|
||||
|
||||
namespace {
|
||||
|
||||
class igs_fear_state : public driver_device
|
||||
@ -61,12 +65,12 @@ void igs_fear_state::draw_sprite(bitmap_ind16 &bitmap, const rectangle &cliprect
|
||||
if ((romoffset != 0) && (romoffset != 0xffffffff))
|
||||
{
|
||||
//logerror("x=%d, y=%d, w=%d pix, h=%d pix, c=0x%02x, romoffset=0x%08x\n", xpos, ypos, width, height, palette, romoffset << 2);
|
||||
uint8_t* gfxrom = &m_gfxrom[romoffset << 2];
|
||||
const uint8_t *gfxrom = &m_gfxrom[romoffset << 2];
|
||||
palette = (palette & 0x3f) << 7;
|
||||
|
||||
for (int y = 0; y < height; y++)
|
||||
{
|
||||
uint16_t* dest = &bitmap.pix(ypos + y);
|
||||
uint16_t *dest = &bitmap.pix(ypos + y);
|
||||
for (int x = 0; x < width; x++)
|
||||
{
|
||||
uint8_t pix = *gfxrom++;
|
||||
@ -81,7 +85,7 @@ void igs_fear_state::draw_sprite(bitmap_ind16 &bitmap, const rectangle &cliprect
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t igs_fear_state::screen_update(screen_device& screen, bitmap_ind16& bitmap, const rectangle& cliprect)
|
||||
uint32_t igs_fear_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
bitmap.fill(0x3ff, cliprect);
|
||||
|
||||
@ -181,7 +185,7 @@ ROM_START( fearless )
|
||||
ROM_END
|
||||
|
||||
ROM_START( superkds )
|
||||
ROM_REGION( 0x04000, "maincpu", 0 ) // Internal rom of IGS027A ARM based MCU */
|
||||
ROM_REGION( 0x04000, "maincpu", 0 ) // Internal rom of IGS027A ARM based MCU
|
||||
ROM_LOAD( "superkids_igs027a.bin", 0x00000, 0x4000, CRC(9a8e790d) SHA1(ab020a04a4ed0c0e5ec8c979f206fe57572d2304) ) // sticker marked 'F5'
|
||||
|
||||
ROM_REGION32_LE( 0x80000, "user1", 0 ) // external ARM data / prg
|
||||
@ -208,6 +212,7 @@ void igs_fear_state::init_igs_fear()
|
||||
*/
|
||||
fearless_decrypt(machine());
|
||||
}
|
||||
|
||||
void igs_fear_state::init_igs_superkds()
|
||||
{
|
||||
/*
|
||||
|
||||
@ -1418,6 +1418,7 @@ static const uint8_t superkds_tab[256] = {
|
||||
|
||||
void superkds_decrypt(running_machine &machine)
|
||||
{
|
||||
// FIXME: Endianness bug - casting a 32-bit ROM region to u16
|
||||
auto const src = reinterpret_cast<u16 *>(machine.root_device().memregion("user1")->base());
|
||||
|
||||
int const rom_size = 0x80000;
|
||||
@ -1435,7 +1436,7 @@ void superkds_decrypt(running_machine &machine)
|
||||
IGS27_CRYPT7
|
||||
IGS27_CRYPT8
|
||||
|
||||
x ^= superkds_tab[(i>> 1) & 0xff] << 8;
|
||||
x ^= superkds_tab[(i >> 1) & 0xff] << 8;
|
||||
|
||||
src[i] = x;
|
||||
}
|
||||
@ -1443,6 +1444,7 @@ void superkds_decrypt(running_machine &machine)
|
||||
|
||||
void fearless_decrypt(running_machine &machine)
|
||||
{
|
||||
// FIXME: Endianness bug - casting a 32-bit ROM region to u16
|
||||
auto const src = reinterpret_cast<u16 *>(machine.root_device().memregion("user1")->base());
|
||||
|
||||
int const rom_size = 0x80000;
|
||||
@ -1461,7 +1463,7 @@ void fearless_decrypt(running_machine &machine)
|
||||
IGS27_CRYPT7
|
||||
IGS27_CRYPT8
|
||||
|
||||
x ^= superkds_tab[(i>> 1) & 0xff] << 8;
|
||||
x ^= superkds_tab[(i >> 1) & 0xff] << 8;
|
||||
|
||||
src[i] = x;
|
||||
}
|
||||
|
||||
@ -489,7 +489,7 @@ public:
|
||||
m_image(*this, "ata:0:cr589"),
|
||||
m_pccard1(*this, "pccard1"),
|
||||
m_pccard2(*this, "pccard2"),
|
||||
m_pccard_cd{1, 1},
|
||||
m_pccard_cd{ 1, 1 },
|
||||
m_h8_response(*this, "h8_response"),
|
||||
m_ram(*this, "maincpu:ram"),
|
||||
m_flashbank(*this, "flashbank"),
|
||||
|
||||
@ -24,7 +24,7 @@ license:CC0-1.0
|
||||
<!--
|
||||
Panel labels:
|
||||
|
||||
| ワリア | ▲ | △ |メニュー|
|
||||
| クリア | ▲ | △ |メニュー|
|
||||
| ◀ | ▶ |
|
||||
| 修正 | ▼ | ▽ | ＯＫ |
|
||||
|
||||
|
||||
@ -370,7 +370,7 @@ void msx2_state::cpc400(machine_config &config)
|
||||
// FDC: mb8877a, 1 3.5" DS?DD drive
|
||||
// 1 Cartridge slot
|
||||
// 1 Expansion slot
|
||||
// The check for an external kanji rom always fails; deliberately? expects other type of kanji extension? bad dump?
|
||||
// The check for an external kanji ROM always fails; deliberately? Expects other type of kanji extension? Bad dump?
|
||||
|
||||
add_internal_slot(config, MSX_SLOT_ROM, "mainrom", 0, 0, 0, 2, "mainrom");
|
||||
add_internal_slot(config, MSX_SLOT_ROM, "hangul", 0, 1, 1, 2, "hangul");
|
||||
|
||||
@ -2610,10 +2610,10 @@ int segac2_state::prot_func_dummy(int in)
|
||||
/* 317-0149 */
|
||||
int segac2_state::prot_func_columns(int in)
|
||||
{
|
||||
int const b0 = BIT( in,2) ^ ((BIT(~in,0) && BIT( in,7)) || (BIT( in,4) && BIT( in,6)));
|
||||
int const b1 = BIT(~in,0) ^ (BIT( in,2) || (BIT( in,5) && BIT(~in,6) && BIT( in,7)));
|
||||
int const b2 = BIT( in,3) ^ ((BIT( in,0) && BIT( in,1)) || (BIT( in,4) && BIT( in,6)));
|
||||
int const b3 = BIT( in,1) ^ ((BIT( in,0) && BIT( in,1)) || (BIT( in,4) && BIT( in,5)) || (BIT(~in,6) && BIT( in,7))); // 1 repeated
|
||||
int const b0 = BIT( in,2) ^ ((BIT(~in,0) & BIT( in,7)) | (BIT( in,4) & BIT( in,6)));
|
||||
int const b1 = BIT(~in,0) ^ (BIT( in,2) | (BIT( in,5) & BIT(~in,6) & BIT( in,7)));
|
||||
int const b2 = BIT( in,3) ^ ((BIT( in,0) & BIT( in,1)) | (BIT( in,4) & BIT( in,6)));
|
||||
int const b3 = BIT( in,1) ^ ((BIT( in,0) & BIT( in,1)) | (BIT( in,4) & BIT( in,5)) | (BIT(~in,6) & BIT( in,7))); // 1 repeated
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2621,10 +2621,10 @@ int segac2_state::prot_func_columns(int in)
|
||||
/* 317-0160 */
|
||||
int segac2_state::prot_func_columns2(int in)
|
||||
{
|
||||
int const b0 = BIT( in,2) ^ (BIT( in,1) || (BIT( in,4) && BIT( in,5)));
|
||||
int const b1 = (BIT( in,0) && BIT( in,3) && BIT( in,4)) ^ (BIT( in,6) || (BIT( in,5) && BIT( in,7)));
|
||||
int const b2 = (BIT( in,3) && BIT(~in,2) && BIT( in,4)) ^ (BIT( in,5) || (BIT( in,0) && BIT( in,1)) || (BIT( in,4) && BIT( in,6))); // 4 repeated
|
||||
int const b3 = (BIT( in,1) && BIT( in,0) && BIT( in,2)) ^ ((BIT( in,4) && BIT(~in,6)) || (BIT( in,6) && BIT( in,7))); // 6 repeated
|
||||
int const b0 = BIT( in,2) ^ (BIT( in,1) | (BIT( in,4) & BIT( in,5)));
|
||||
int const b1 = (BIT( in,0) & BIT( in,3) & BIT( in,4)) ^ (BIT( in,6) | (BIT( in,5) & BIT( in,7)));
|
||||
int const b2 = (BIT( in,3) & BIT(~in,2) & BIT( in,4)) ^ (BIT( in,5) | (BIT( in,0) & BIT( in,1)) | (BIT( in,4) & BIT( in,6))); // 4 repeated
|
||||
int const b3 = (BIT( in,1) & BIT( in,0) & BIT( in,2)) ^ ((BIT( in,4) & BIT(~in,6)) | (BIT( in,6) & BIT( in,7))); // 6 repeated
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2632,10 +2632,10 @@ int segac2_state::prot_func_columns2(int in)
|
||||
/* 317-0172 */
|
||||
int segac2_state::prot_func_tfrceac(int in)
|
||||
{
|
||||
int const b0 = BIT(~in,2) ^ ((BIT( in,0) && BIT(~in,7)) || (BIT( in,3) && BIT( in,4)));
|
||||
int const b1 = (BIT( in,4) && BIT(~in,5) && BIT( in,7)) ^ ((BIT(~in,0) || BIT(~in,3)) && (BIT(~in,6) || BIT(~in,7))); // not in the form x1 XOR (x2 OR x3 OR x4)
|
||||
int const b2 = BIT( in,2) ^ ((BIT( in,4) && BIT(~in,5) && BIT( in,7)) || (BIT(~in,1) && BIT( in,6)));
|
||||
int const b3 = BIT( in,0) ^ ((BIT( in,1) && BIT( in,4) && BIT( in,6)) || (BIT( in,1) && BIT( in,4) && BIT( in,7))); // 1,4 repeated
|
||||
int const b0 = BIT(~in,2) ^ ((BIT( in,0) & BIT(~in,7)) | (BIT( in,3) & BIT( in,4)));
|
||||
int const b1 = (BIT( in,4) & BIT(~in,5) & BIT( in,7)) ^ ((BIT(~in,0) | BIT(~in,3)) & (BIT(~in,6) | BIT(~in,7))); // not in the form x1 XOR (x2 OR x3 OR x4)
|
||||
int const b2 = BIT( in,2) ^ ((BIT( in,4) & BIT(~in,5) & BIT( in,7)) | (BIT(~in,1) & BIT( in,6)));
|
||||
int const b3 = BIT( in,0) ^ ((BIT( in,1) & BIT( in,4) & BIT( in,6)) | (BIT( in,1) & BIT( in,4) & BIT( in,7))); // 1,4 repeated
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2643,10 +2643,10 @@ int segac2_state::prot_func_tfrceac(int in)
|
||||
/* 317-0173 */
|
||||
int segac2_state::prot_func_borench(int in)
|
||||
{
|
||||
int const b0 = (BIT( in,1) && BIT( in,2) && BIT( in,3) && BIT( in,7)) ^ (BIT( in,5) || (BIT(~in,0) && BIT(~in,4)));
|
||||
int const b1 = (BIT(~in,2) && BIT( in,3) && BIT( in,5)) ^ (BIT( in,1) || (BIT( in,0) && BIT(~in,4)));
|
||||
int const b2 = (BIT( in,1) && BIT(~in,4) && BIT(~in,6)) ^ (BIT( in,2) || BIT( in,3) || (BIT( in,5) && BIT( in,7)));
|
||||
int const b3 = (BIT(~in,0) && BIT( in,5) && (BIT( in,6) || BIT( in,7))) ^ (BIT( in,1) || (BIT( in,3) && BIT( in,4))); // not in the form x1 XOR (x2 OR x3 OR x4)
|
||||
int const b0 = (BIT( in,1) & BIT( in,2) & BIT( in,3) & BIT( in,7)) ^ (BIT( in,5) | (BIT(~in,0) & BIT(~in,4)));
|
||||
int const b1 = (BIT(~in,2) & BIT( in,3) & BIT( in,5)) ^ (BIT( in,1) | (BIT( in,0) & BIT(~in,4)));
|
||||
int const b2 = (BIT( in,1) & BIT(~in,4) & BIT(~in,6)) ^ (BIT( in,2) | BIT( in,3) | (BIT( in,5) & BIT( in,7)));
|
||||
int const b3 = (BIT(~in,0) & BIT( in,5) & (BIT( in,6) | BIT( in,7))) ^ (BIT( in,1) | (BIT( in,3) & BIT( in,4))); // not in the form x1 XOR (x2 OR x3 OR x4)
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2654,10 +2654,10 @@ int segac2_state::prot_func_borench(int in)
|
||||
/* 317-0178 */
|
||||
int segac2_state::prot_func_ribbit(int in)
|
||||
{
|
||||
int const b0 = (BIT( in,0) && BIT( in,4)) ^ ((BIT( in,1) && BIT( in,2)) || BIT( in,3) || BIT(~in,5));
|
||||
int const b1 = (BIT( in,1) && BIT( in,5)) ^ ((BIT( in,2) && BIT( in,3)) || BIT( in,0) || BIT(~in,6));
|
||||
int const b2 = (BIT( in,2) && BIT( in,7)) ^ ((BIT( in,3) && BIT( in,0)) || BIT(~in,1) || BIT( in,7));
|
||||
int const b3 = (BIT( in,3) && BIT( in,6)) ^ ((BIT( in,0) && BIT( in,1)) || BIT(~in,2) || BIT( in,4));
|
||||
int const b0 = (BIT( in,0) & BIT( in,4)) ^ ((BIT( in,1) & BIT( in,2)) | BIT( in,3) | BIT(~in,5));
|
||||
int const b1 = (BIT( in,1) & BIT( in,5)) ^ ((BIT( in,2) & BIT( in,3)) | BIT( in,0) | BIT(~in,6));
|
||||
int const b2 = (BIT( in,2) & BIT( in,7)) ^ ((BIT( in,3) & BIT( in,0)) | BIT(~in,1) | BIT( in,7));
|
||||
int const b3 = (BIT( in,3) & BIT( in,6)) ^ ((BIT( in,0) & BIT( in,1)) | BIT(~in,2) | BIT( in,4));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2665,10 +2665,10 @@ int segac2_state::prot_func_ribbit(int in)
|
||||
/* 317-0193 */
|
||||
int segac2_state::prot_func_twinsqua(int in)
|
||||
{
|
||||
int const b0 = (BIT( in,2) && BIT(~in,5)) ^ (BIT( in,3) || BIT(~in,4));
|
||||
int const b1 = (BIT( in,0) && BIT(~in,2) && BIT( in,4)) ^ (BIT(~in,0) || BIT(~in,4) || BIT(~in,6)); // 0,4 repeated
|
||||
int const b2 = (BIT( in,3) && BIT(~in,5)) ^ (BIT( in,4) && BIT( in,7));
|
||||
int const b3 = BIT( in,1) ^ ((BIT(~in,3) && BIT(~in,6)) || (BIT( in,4) && BIT(~in,6)) || (BIT(~in,1) && BIT( in,3) && BIT(~in,4))); // 1,3,4,6 repeated
|
||||
int const b0 = (BIT( in,2) & BIT(~in,5)) ^ (BIT( in,3) | BIT(~in,4));
|
||||
int const b1 = (BIT( in,0) & BIT(~in,2) & BIT( in,4)) ^ (BIT(~in,0) | BIT(~in,4) | BIT(~in,6)); // 0,4 repeated
|
||||
int const b2 = (BIT( in,3) & BIT(~in,5)) ^ (BIT( in,4) & BIT( in,7));
|
||||
int const b3 = BIT( in,1) ^ ((BIT(~in,3) & BIT(~in,6)) | (BIT( in,4) & BIT(~in,6)) | (BIT(~in,1) & BIT( in,3) & BIT(~in,4))); // 1,3,4,6 repeated
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2676,10 +2676,10 @@ int segac2_state::prot_func_twinsqua(int in)
|
||||
/* 317-0203 */
|
||||
int segac2_state::prot_func_puyo(int in)
|
||||
{
|
||||
int const b0 = (BIT(~in,3) && BIT( in,7)) ^ ((BIT(~in,0) && BIT(~in,1)) || (BIT(~in,1) && BIT(~in,4))); // 1 repeated
|
||||
int const b1 = (BIT( in,3) && BIT( in,5)) ^ (BIT(~in,2) || BIT( in,4) || BIT( in,6));
|
||||
int const b2 = (BIT(~in,2) && BIT(~in,5)) ^ (BIT( in,1) || BIT(~in,3) || BIT(~in,6));
|
||||
int const b3 = BIT( in,1) ^ ((BIT( in,0) && BIT( in,3) && BIT( in,7)) || BIT( in,4));
|
||||
int const b0 = (BIT(~in,3) & BIT( in,7)) ^ ((BIT(~in,0) & BIT(~in,1)) | (BIT(~in,1) & BIT(~in,4))); // 1 repeated
|
||||
int const b1 = (BIT( in,3) & BIT( in,5)) ^ (BIT(~in,2) | BIT( in,4) | BIT( in,6));
|
||||
int const b2 = (BIT(~in,2) & BIT(~in,5)) ^ (BIT( in,1) | BIT(~in,3) | BIT(~in,6));
|
||||
int const b3 = BIT( in,1) ^ ((BIT( in,0) & BIT( in,3) & BIT( in,7)) | BIT( in,4));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2687,10 +2687,10 @@ int segac2_state::prot_func_puyo(int in)
|
||||
/* 317-0211 */
|
||||
int segac2_state::prot_func_tantr(int in)
|
||||
{
|
||||
int const b0 = (BIT( in,0) && BIT( in,4)) ^ ( BIT( in,5) || BIT(~in,6) || (BIT(~in,3) && BIT( in,7)));
|
||||
int const b1 = (BIT( in,2) && BIT( in,6)) ^ ((BIT( in,1) && BIT( in,5)) || (BIT( in,3) && BIT( in,4)));
|
||||
int const b2 = (BIT(~in,0) && BIT( in,2)) ^ ( BIT( in,4) || BIT( in,7) || (BIT( in,1) && BIT(~in,5)));
|
||||
int const b3 = (BIT(~in,2) && BIT( in,7)) ^ ( BIT(~in,0) || BIT( in,1) || (BIT( in,3) && BIT( in,6)));
|
||||
int const b0 = (BIT( in,0) & BIT( in,4)) ^ ( BIT( in,5) | BIT(~in,6) | (BIT(~in,3) & BIT( in,7)));
|
||||
int const b1 = (BIT( in,2) & BIT( in,6)) ^ ((BIT( in,1) & BIT( in,5)) | (BIT( in,3) & BIT( in,4)));
|
||||
int const b2 = (BIT(~in,0) & BIT( in,2)) ^ ( BIT( in,4) | BIT( in,7) | (BIT( in,1) & BIT(~in,5)));
|
||||
int const b3 = (BIT(~in,2) & BIT( in,7)) ^ ( BIT(~in,0) | BIT( in,1) | (BIT( in,3) & BIT( in,6)));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2698,10 +2698,10 @@ int segac2_state::prot_func_tantr(int in)
|
||||
/* 317-???? */
|
||||
int segac2_state::prot_func_tantrkor(int in)
|
||||
{
|
||||
int const b0 = (BIT(~in,1) && BIT(~in,7)) ^ (BIT(~in,2) && BIT(~in,4));
|
||||
int const b1 = (BIT( in,2) && BIT( in,6)) ^ (BIT( in,0) && BIT( in,1));
|
||||
int const b2 = (BIT(~in,3) && BIT(~in,6)) ^ (BIT( in,1) || BIT(~in,4));
|
||||
int const b3 = (BIT(~in,0) && BIT(~in,2)) ^ (BIT( in,5) && BIT(~in,6));
|
||||
int const b0 = (BIT(~in,1) & BIT(~in,7)) ^ (BIT(~in,2) & BIT(~in,4));
|
||||
int const b1 = (BIT( in,2) & BIT( in,6)) ^ (BIT( in,0) & BIT( in,1));
|
||||
int const b2 = (BIT(~in,3) & BIT(~in,6)) ^ (BIT( in,1) | BIT(~in,4));
|
||||
int const b3 = (BIT(~in,0) & BIT(~in,2)) ^ (BIT( in,5) & BIT(~in,6));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2709,10 +2709,10 @@ int segac2_state::prot_func_tantrkor(int in)
|
||||
/* 317-0218 */
|
||||
int segac2_state::prot_func_potopoto(int in)
|
||||
{
|
||||
int const b0 = (BIT(~in,2) && BIT(~in,4)) ^ (BIT(~in,1) && BIT( in,3));
|
||||
int const b1 = (BIT( in,0) && BIT( in,5)) ^ (BIT( in,2) || BIT(~in,7));
|
||||
int const b2 = (BIT( in,0) && BIT( in,6)) ^ (BIT(~in,1) && BIT( in,7));
|
||||
int const b3 = (BIT( in,0) && BIT(~in,7)) ^ (BIT(~in,1) && BIT(~in,6));
|
||||
int const b0 = (BIT(~in,2) & BIT(~in,4)) ^ (BIT(~in,1) & BIT( in,3));
|
||||
int const b1 = (BIT( in,0) & BIT( in,5)) ^ (BIT( in,2) | BIT(~in,7));
|
||||
int const b2 = (BIT( in,0) & BIT( in,6)) ^ (BIT(~in,1) & BIT( in,7));
|
||||
int const b3 = (BIT( in,0) & BIT(~in,7)) ^ (BIT(~in,1) & BIT(~in,6));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2720,10 +2720,10 @@ int segac2_state::prot_func_potopoto(int in)
|
||||
/* 317-0219 */
|
||||
int segac2_state::prot_func_stkclmnj(int in)
|
||||
{
|
||||
int const b0 = (BIT( in,1) && BIT( in,4)) ^ (BIT( in,5) && BIT( in,2));
|
||||
int const b1 = (BIT(~in,2) && BIT( in,6)) ^ (BIT(~in,5) && BIT( in,7));
|
||||
int const b2 = (BIT(~in,3) && BIT( in,6)) ^ (BIT(~in,5) && BIT(~in,1));
|
||||
int const b3 = (BIT(~in,3) && BIT( in,5)) ^ (BIT(~in,6) || BIT(~in,7));
|
||||
int const b0 = (BIT( in,1) & BIT( in,4)) ^ (BIT( in,5) & BIT( in,2));
|
||||
int const b1 = (BIT(~in,2) & BIT( in,6)) ^ (BIT(~in,5) & BIT( in,7));
|
||||
int const b2 = (BIT(~in,3) & BIT( in,6)) ^ (BIT(~in,5) & BIT(~in,1));
|
||||
int const b3 = (BIT(~in,3) & BIT( in,5)) ^ (BIT(~in,6) | BIT(~in,7));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2731,10 +2731,10 @@ int segac2_state::prot_func_stkclmnj(int in)
|
||||
/* 317-0223 */
|
||||
int segac2_state::prot_func_stkclmns(int in)
|
||||
{
|
||||
int const b0 = (BIT( in,2) && BIT( in,4)) ^ (BIT( in,1) || BIT(~in,3));
|
||||
int const b1 = (BIT( in,0) && BIT( in,5)) ^ (BIT( in,2) && BIT( in,7));
|
||||
int const b2 = (BIT( in,0) && BIT(~in,6)) ^ (BIT( in,1) && BIT(~in,7));
|
||||
int const b3 = (BIT( in,0) && BIT(~in,7)) ^ (BIT(~in,1) && BIT( in,6));
|
||||
int const b0 = (BIT( in,2) & BIT( in,4)) ^ (BIT( in,1) | BIT(~in,3));
|
||||
int const b1 = (BIT( in,0) & BIT( in,5)) ^ (BIT( in,2) & BIT( in,7));
|
||||
int const b2 = (BIT( in,0) & BIT(~in,6)) ^ (BIT( in,1) & BIT(~in,7));
|
||||
int const b3 = (BIT( in,0) & BIT(~in,7)) ^ (BIT(~in,1) & BIT( in,6));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2742,10 +2742,10 @@ int segac2_state::prot_func_stkclmns(int in)
|
||||
/* 317-0224 */
|
||||
int segac2_state::prot_func_ichirj(int in)
|
||||
{
|
||||
int const b0 = (BIT( in,2) && BIT( in,4)) ^ (BIT(~in,5) && BIT(~in,2));
|
||||
int const b1 = (BIT( in,2) && BIT(~in,6)) ^ (BIT( in,5) && BIT( in,7));
|
||||
int const b2 = (BIT(~in,3) && BIT( in,6)) ^ (BIT(~in,5) && BIT(~in,1));
|
||||
int const b3 = (BIT(~in,1) && BIT( in,5)) ^ (BIT(~in,5) && BIT( in,7));
|
||||
int const b0 = (BIT( in,2) & BIT( in,4)) ^ (BIT(~in,5) & BIT(~in,2));
|
||||
int const b1 = (BIT( in,2) & BIT(~in,6)) ^ (BIT( in,5) & BIT( in,7));
|
||||
int const b2 = (BIT(~in,3) & BIT( in,6)) ^ (BIT(~in,5) & BIT(~in,1));
|
||||
int const b3 = (BIT(~in,1) & BIT( in,5)) ^ (BIT(~in,5) & BIT( in,7));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2753,10 +2753,10 @@ int segac2_state::prot_func_ichirj(int in)
|
||||
/* 317-???? */
|
||||
int segac2_state::prot_func_ichir(int in)
|
||||
{
|
||||
int const b0 = (BIT(~in,2) && BIT( in,4)) ^ (BIT( in,5) && BIT(~in,2));
|
||||
int const b1 = (BIT( in,1) && BIT( in,6)) ^ (BIT( in,5) || BIT( in,7));
|
||||
int const b2 = (BIT(~in,3) && BIT( in,6)) ^ (BIT(~in,5) && BIT(~in,3));
|
||||
int const b3 = (BIT( in,0) && BIT(~in,5)) ^ (BIT( in,5) && BIT( in,7));
|
||||
int const b0 = (BIT(~in,2) & BIT( in,4)) ^ (BIT( in,5) & BIT(~in,2));
|
||||
int const b1 = (BIT( in,1) & BIT( in,6)) ^ (BIT( in,5) | BIT( in,7));
|
||||
int const b2 = (BIT(~in,3) & BIT( in,6)) ^ (BIT(~in,5) & BIT(~in,3));
|
||||
int const b3 = (BIT( in,0) & BIT(~in,5)) ^ (BIT( in,5) & BIT( in,7));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2764,10 +2764,10 @@ int segac2_state::prot_func_ichir(int in)
|
||||
/* 317-???? */
|
||||
int segac2_state::prot_func_ichirk(int in)
|
||||
{
|
||||
int const b0 = (BIT(~in,2) && BIT( in,4)) ^ (BIT( in,5) && BIT(~in,1));
|
||||
int const b1 = (BIT( in,0) && BIT( in,6)) ^ (BIT( in,5) && BIT( in,4));
|
||||
int const b2 = (BIT(~in,1) && BIT(~in,6)) ^ (BIT(~in,5) && BIT( in,3));
|
||||
int const b3 = (BIT( in,1) && BIT( in,5)) ^ (BIT( in,6) && BIT( in,7));
|
||||
int const b0 = (BIT(~in,2) & BIT( in,4)) ^ (BIT( in,5) & BIT(~in,1));
|
||||
int const b1 = (BIT( in,0) & BIT( in,6)) ^ (BIT( in,5) & BIT( in,4));
|
||||
int const b2 = (BIT(~in,1) & BIT(~in,6)) ^ (BIT(~in,5) & BIT( in,3));
|
||||
int const b3 = (BIT( in,1) & BIT( in,5)) ^ (BIT( in,6) & BIT( in,7));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2775,20 +2775,20 @@ int segac2_state::prot_func_ichirk(int in)
|
||||
/* 317-0228 */
|
||||
int segac2_state::prot_func_puyopuy2(int in)
|
||||
{
|
||||
int const b0 = (BIT(~in,0) && BIT(~in,7)) ^ (BIT( in,1) || BIT(~in,4) || BIT(~in,6));
|
||||
int const b1 = (BIT( in,0) && BIT(~in,6)) ^ (BIT( in,3) && BIT( in,5));
|
||||
int const b2 = (BIT(~in,4) && BIT(~in,7)) ^ (BIT( in,0) || BIT(~in,6));
|
||||
int const b3 = (BIT(~in,1) && BIT( in,4)) ^ (BIT( in,2) && BIT(~in,3));
|
||||
int const b0 = (BIT(~in,0) & BIT(~in,7)) ^ (BIT( in,1) | BIT(~in,4) | BIT(~in,6));
|
||||
int const b1 = (BIT( in,0) & BIT(~in,6)) ^ (BIT( in,3) & BIT( in,5));
|
||||
int const b2 = (BIT(~in,4) & BIT(~in,7)) ^ (BIT( in,0) | BIT(~in,6));
|
||||
int const b3 = (BIT(~in,1) & BIT( in,4)) ^ (BIT( in,2) & BIT(~in,3));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
|
||||
int segac2_state::prot_func_zunkyou(int in)
|
||||
{
|
||||
int const b0 = (BIT(~in,1) && BIT( in,6)) ^ (BIT(~in,5) && BIT( in,7));
|
||||
int const b1 = (BIT( in,0) && BIT(~in,5)) ^ (BIT(~in,3) || BIT( in,4));
|
||||
int const b2 = (BIT( in,2) && BIT(~in,3)) ^ (BIT( in,4) && BIT(~in,5));
|
||||
int const b3 = (BIT( in,0) && BIT(~in,4)) ^ (BIT(~in,2) && BIT(~in,6));
|
||||
int const b0 = (BIT(~in,1) & BIT( in,6)) ^ (BIT(~in,5) & BIT( in,7));
|
||||
int const b1 = (BIT( in,0) & BIT(~in,5)) ^ (BIT(~in,3) | BIT( in,4));
|
||||
int const b2 = (BIT( in,2) & BIT(~in,3)) ^ (BIT( in,4) & BIT(~in,5));
|
||||
int const b3 = (BIT( in,0) & BIT(~in,4)) ^ (BIT(~in,2) & BIT(~in,6));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2800,10 +2800,10 @@ int pclub_state::prot_func_pclub(int in)
|
||||
|
||||
int pclub_state::prot_func_pclubjv2(int in)
|
||||
{
|
||||
int const b0 = (BIT( in,3) && BIT(~in,4)) ^ ((BIT(~in,1) && BIT(~in,7)) || BIT( in,6));
|
||||
int const b1 = (BIT( in,0) && BIT( in,5)) ^ (BIT( in,2) && BIT(~in,6));
|
||||
int const b2 = (BIT(~in,1) && BIT( in,6)) ^ (BIT( in,3) || BIT(~in,5) || BIT(~in,1)); // 1 repeated
|
||||
int const b3 = (BIT(~in,2) && BIT(~in,7)) ^ (BIT(~in,0) || BIT(~in,4));
|
||||
int const b0 = (BIT( in,3) & BIT(~in,4)) ^ ((BIT(~in,1) & BIT(~in,7)) | BIT( in,6));
|
||||
int const b1 = (BIT( in,0) & BIT( in,5)) ^ (BIT( in,2) & BIT(~in,6));
|
||||
int const b2 = (BIT(~in,1) & BIT( in,6)) ^ (BIT( in,3) | BIT(~in,5) | BIT(~in,1)); // 1 repeated
|
||||
int const b3 = (BIT(~in,2) & BIT(~in,7)) ^ (BIT(~in,0) | BIT(~in,4));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
@ -2811,30 +2811,30 @@ int pclub_state::prot_func_pclubjv2(int in)
|
||||
int pclub_state::prot_func_pclubjv3(int in)
|
||||
{
|
||||
// TODO: Determine correctly. This is just copied from V2 as a placeholder.
|
||||
int const b0 = (BIT( in,3) && BIT(~in,4)) ^ ((BIT(~in,1) && BIT(~in,7)) || BIT( in,6));
|
||||
int const b1 = (BIT( in,0) && BIT( in,5)) ^ (BIT( in,2) && BIT(~in,6));
|
||||
int const b2 = (BIT(~in,1) && BIT( in,6)) ^ (BIT( in,3) || BIT(~in,5) || BIT(~in,1)); // 1 repeated
|
||||
int const b3 = (BIT(~in,2) && BIT(~in,7)) ^ (BIT(~in,0) || BIT(~in,4));
|
||||
int const b0 = (BIT( in,3) & BIT(~in,4)) ^ ((BIT(~in,1) & BIT(~in,7)) | BIT( in,6));
|
||||
int const b1 = (BIT( in,0) & BIT( in,5)) ^ (BIT( in,2) & BIT(~in,6));
|
||||
int const b2 = (BIT(~in,1) & BIT( in,6)) ^ (BIT( in,3) | BIT(~in,5) | BIT(~in,1)); // 1 repeated
|
||||
int const b3 = (BIT(~in,2) & BIT(~in,7)) ^ (BIT(~in,0) | BIT(~in,4));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
|
||||
int pclub_state::prot_func_pclubjv4(int in)
|
||||
{
|
||||
int const b0 = (BIT(~in,2) && BIT( in,4)) ^ (BIT( in,1) && BIT(~in,6) && BIT(~in,3));
|
||||
int const b1 = (BIT(~in,3) && BIT(~in,4)) ^ (BIT( in,0) && BIT( in,5) && BIT(~in,6));
|
||||
int const b2 = BIT(~in,0) ^ (BIT( in,3) && BIT( in,4));
|
||||
int const b3 = (BIT(~in,1) && BIT( in,7)) ^ (BIT( in,5) && BIT(~in,7)); // 7 repeated
|
||||
int const b0 = (BIT(~in,2) & BIT( in,4)) ^ (BIT( in,1) & BIT(~in,6) & BIT(~in,3));
|
||||
int const b1 = (BIT(~in,3) & BIT(~in,4)) ^ (BIT( in,0) & BIT( in,5) & BIT(~in,6));
|
||||
int const b2 = BIT(~in,0) ^ (BIT( in,3) & BIT( in,4));
|
||||
int const b3 = (BIT(~in,1) & BIT( in,7)) ^ (BIT( in,5) & BIT(~in,7)); // 7 repeated
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
|
||||
int pclub_state::prot_func_pclubjv5(int in)
|
||||
{
|
||||
int const b0 = (BIT(~in,1) && BIT( in,5)) ^ (BIT(~in,2) && BIT(~in,6));
|
||||
int const b1 = (BIT(~in,0) && BIT( in,4)) ^ (BIT(~in,3) && BIT(~in,7));
|
||||
int const b2 = (BIT(~in,3) && BIT( in,7)) ^ (BIT(~in,0) || BIT(~in,4));
|
||||
int const b3 = (BIT(~in,2) && BIT( in,6)) ^ (BIT(~in,1) && BIT(~in,5));
|
||||
int const b0 = (BIT(~in,1) & BIT( in,5)) ^ (BIT(~in,2) & BIT(~in,6));
|
||||
int const b1 = (BIT(~in,0) & BIT( in,4)) ^ (BIT(~in,3) & BIT(~in,7));
|
||||
int const b2 = (BIT(~in,3) & BIT( in,7)) ^ (BIT(~in,0) | BIT(~in,4));
|
||||
int const b3 = (BIT(~in,2) & BIT( in,6)) ^ (BIT(~in,1) & BIT(~in,5));
|
||||
|
||||
return (b3 << 3) | (b2 << 2) | (b1 << 1) | b0;
|
||||
}
|
||||
|
||||
@ -34,10 +34,10 @@ namespace {
|
||||
#define TIMINGS_PERFECT 0
|
||||
|
||||
// Must be 800x525 to match VGA. With below puts odd scanlines to the right in order to avoid the same line redrawing.
|
||||
static const u16 CYCLES_HORIZ = 800 << 1;
|
||||
static const u16 CYCLES_VERT = 525 >> 1;
|
||||
static const rectangle SCR_FULL = { 0, 640 - 1, 0, 240 - 1 };
|
||||
static const rectangle SCR_256x192 = { 64, 64 + (256 << 1) - 1, 24, 24 + 192 - 1 };
|
||||
static constexpr u16 CYCLES_HORIZ = 800 << 1;
|
||||
static constexpr u16 CYCLES_VERT = 525 >> 1;
|
||||
static constexpr rectangle SCR_FULL = { 0, 640 - 1, 0, 240 - 1 };
|
||||
static constexpr rectangle SCR_256x192 = { 64, 64 + (256 << 1) - 1, 24, 24 + 192 - 1 };
|
||||
|
||||
class chloe_state : public spectrum_128_state
|
||||
{
|
||||
@ -62,7 +62,7 @@ public:
|
||||
INPUT_CHANGED_MEMBER(on_divmmc_nmi);
|
||||
|
||||
protected:
|
||||
static const u8 BASIC48_ROM = 0x01;
|
||||
static inline constexpr u8 BASIC48_ROM = 0x01;
|
||||
|
||||
virtual void machine_start() override ATTR_COLD;
|
||||
virtual void machine_reset() override ATTR_COLD;
|
||||
@ -151,7 +151,7 @@ void chloe_state::update_memory()
|
||||
const bool mapram_mode = BIT(m_divmmc_ctrl, 6);
|
||||
const bool conmem = BIT(m_divmmc_ctrl, 7);
|
||||
const bool divmmc_rom_active = m_divmmc_paged || conmem;
|
||||
for (auto i = 0; i < 8; ++i)
|
||||
for (int i = 0; i < 8; ++i)
|
||||
{
|
||||
const bool paged = BIT(m_timex_mmu, i);
|
||||
|
||||
@ -485,7 +485,7 @@ void chloe_state::map_fetch(address_map &map)
|
||||
|
||||
void chloe_state::map_mem(address_map &map)
|
||||
{
|
||||
for (auto i = 0; i < 8; i++)
|
||||
for (int i = 0; i < 8; i++)
|
||||
map(0x0000 + i * 0x2000, 0x1fff + i * 0x2000).bankrw(m_bank_ram[i]);
|
||||
|
||||
map(0x0000, 0x1fff).view(m_bank0_view);
|
||||
@ -633,7 +633,7 @@ u8 chloe_state::kbd_fe_r(offs_t offset)
|
||||
data |= 0xe0;
|
||||
|
||||
/* cassette input from wav */
|
||||
if (m_cassette->input() > 0.0038 )
|
||||
if (m_cassette->input() > 0.0038)
|
||||
{
|
||||
data &= ~0x40;
|
||||
}
|
||||
@ -814,7 +814,7 @@ void chloe_state::machine_start()
|
||||
m_maincpu->space(AS_PROGRAM).specific(m_program);
|
||||
m_maincpu->space(AS_IO).specific(m_io);
|
||||
|
||||
for (auto i = 0; i < 8; i++)
|
||||
for (int i = 0; i < 8; i++)
|
||||
{
|
||||
m_bank_ram[i]->configure_entries(0, m_ram->size() / 0x2000, m_ram->pointer(), 0x2000);
|
||||
m_bank_ram[i]->configure_entries( 8 << 1, 4, memregion("maincpu")->base(), 0x2000);
|
||||
|
||||
@ -52,7 +52,7 @@ protected:
|
||||
ula_type m_ula_type;
|
||||
|
||||
private:
|
||||
static const u16 UTM_FALLBACK_PEN = 0x800;
|
||||
static inline constexpr u16 UTM_FALLBACK_PEN = 0x800;
|
||||
|
||||
u16 m_offset_h, m_offset_v;
|
||||
const u8 *m_host_ram_ptr;
|
||||
|
||||
@ -151,7 +151,7 @@ void dmac_0448_device::dma_check(s32 param)
|
||||
else
|
||||
{
|
||||
// memory to device
|
||||
u8 const data = dma.ctrc > 0 ? m_bus->read_byte(address) : 0;
|
||||
u8 const data = (dma.ctrc > 0) ? m_bus->read_byte(address) : 0;
|
||||
|
||||
LOG("dma_w data 0x%02x address 0x%08x\n", data, address);
|
||||
|
||||
|
||||
@ -548,7 +548,7 @@ void news_r3k_base_state::common(machine_config &config)
|
||||
m_hid->irq_out<news_hid_hle_device::KEYBOARD>().set(FUNC(news_r3k_base_state::irq_w<KBD>));
|
||||
m_hid->irq_out<news_hid_hle_device::MOUSE>().set(FUNC(news_r3k_base_state::irq_w<MOUSE>));
|
||||
|
||||
SOFTWARE_LIST(config, "software_list").set_original("sony_news").set_filter("RISC");
|
||||
SOFTWARE_LIST(config, "software_list").set_original("sony_news").set_filter("RISC,NWS3000");
|
||||
}
|
||||
|
||||
void nws3260_state::nws3260(machine_config &config)
|
||||
|
||||
@ -525,7 +525,7 @@ void news_r4k_state::machine_common(machine_config &config)
|
||||
m_dmac->dma_r_cb<dmac3_device::CTRL1>().set(m_scsi1, FUNC(spifi3_device::dma_r));
|
||||
m_dmac->dma_w_cb<dmac3_device::CTRL1>().set(m_scsi1, FUNC(spifi3_device::dma_w));
|
||||
|
||||
SOFTWARE_LIST(config, "software_list").set_original("sony_news").set_filter("RISC");
|
||||
SOFTWARE_LIST(config, "software_list").set_original("sony_news").set_filter("RISC,NWS5000");
|
||||
}
|
||||
|
||||
void news_r4k_state::nws5000x(machine_config &config) { machine_common(config); }
|
||||
|
||||
@ -954,7 +954,7 @@ void mlanding_state::mlanding(machine_config &config)
|
||||
m_mechacpu->set_addrmap(AS_PROGRAM, &mlanding_state::mecha_map_prog);
|
||||
m_mechacpu->set_vblank_int("screen", FUNC(mlanding_state::irq0_line_hold));
|
||||
|
||||
tms32020_device& dsp(TMS32020(config, m_dsp, 16_MHz_XTAL)); // TMS32020GBL
|
||||
auto &dsp(TMS32020(config, m_dsp, 16_MHz_XTAL)); // TMS32020GBL
|
||||
dsp.set_addrmap(AS_PROGRAM, &mlanding_state::dsp_map_prog);
|
||||
dsp.set_addrmap(AS_DATA, &mlanding_state::dsp_map_data);
|
||||
dsp.hold_in_cb().set(FUNC(mlanding_state::dsp_hold_signal_r));
|
||||
|
||||
@ -118,7 +118,7 @@ static const int NUM_COLORS = 256;
|
||||
class wheelfir_state : public driver_device
|
||||
{
|
||||
public:
|
||||
wheelfir_state(const machine_config &mconfig, device_type type, const char* tag) :
|
||||
wheelfir_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_subcpu(*this, "subcpu"),
|
||||
@ -187,7 +187,7 @@ private:
|
||||
uint16_t wheelfir_7c0000_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void coin_cnt_w(uint16_t data);
|
||||
void adc_eoc_w(int state);
|
||||
uint32_t screen_update_wheelfir(screen_device &screen, bitmap_ind16& bitmap, const rectangle &cliprect);
|
||||
uint32_t screen_update_wheelfir(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void screen_vblank_wheelfir(int state);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(scanline_timer_callback);
|
||||
void ramdac_map(address_map &map);
|
||||
@ -212,7 +212,7 @@ void wheelfir_state::do_blit()
|
||||
// blitter irq? should be timed?
|
||||
m_maincpu->set_input_line(1, HOLD_LINE);
|
||||
|
||||
uint8_t const* const rom = m_tilepages;
|
||||
uint8_t const *const rom = m_tilepages;
|
||||
|
||||
const int src_u0 = (m_blitter_data[0] >> 8) + ((m_blitter_data[6] & 0x100) ? 256 : 0);
|
||||
const int src_v0 = (m_blitter_data[2] >> 8) + ((m_blitter_data[6] & 0x200) ? 256 : 0);
|
||||
@ -455,8 +455,8 @@ uint32_t wheelfir_state::screen_update_wheelfir(screen_device &screen, bitmap_in
|
||||
int scrolly = y;
|
||||
scrolly += m_current_yscroll;//
|
||||
scrolly &= 0x1ff;
|
||||
uint16_t const* const source = &m_tmp_bitmap[LAYER_BG]->pix(scrolly);
|
||||
uint16_t* const dest = &bitmap.pix(y);
|
||||
uint16_t const *const source = &m_tmp_bitmap[LAYER_BG]->pix(scrolly);
|
||||
uint16_t *const dest = &bitmap.pix(y);
|
||||
|
||||
for (int x = cliprect.min_x; x <= cliprect.max_x; x++)
|
||||
{
|
||||
@ -735,9 +735,9 @@ void wheelfir_state::machine_start()
|
||||
|
||||
for (int j = 0; j < 400; ++j)
|
||||
{
|
||||
/*
|
||||
#if 0
|
||||
// calculate index for zoom
|
||||
uint16_t* ROM = (uint16_t*)m_maincpurom;
|
||||
uint16_t *ROM = (uint16_t *)m_maincpurom;
|
||||
int i = j << 3;
|
||||
int d1 = ROM[0x200 + i] & 0x1f;
|
||||
int d0 = (ROM[0x200 + i] >> 8) & 0x1f;
|
||||
@ -749,7 +749,7 @@ void wheelfir_state::machine_start()
|
||||
int dflag = (ROM[0x200 + 1 + i] & 0x10) ? 1 : 0;
|
||||
|
||||
int index = d0 | (d1 << 6) | (hflag << 12) | (dflag << 13);
|
||||
*/
|
||||
#endif
|
||||
m_zoom_table[zoom_index[j]] = j;
|
||||
}
|
||||
}
|
||||
|
||||
@ -59,6 +59,7 @@
|
||||
#include "speaker.h"
|
||||
#include "tilemap.h"
|
||||
|
||||
|
||||
namespace {
|
||||
|
||||
class bombjack_state : public driver_device
|
||||
@ -71,7 +72,6 @@ public:
|
||||
, m_watchdog(*this, "watchdog")
|
||||
, m_audiocpu(*this, "audiocpu")
|
||||
, m_soundlatch(*this, "soundlatch")
|
||||
, m_speaker(*this, "speaker")
|
||||
, m_ay8910(*this, "psg%u", 1U)
|
||||
, m_screen(*this, "screen")
|
||||
, m_videoram(*this, "videoram")
|
||||
@ -97,6 +97,9 @@ protected:
|
||||
virtual void machine_reset() override;
|
||||
virtual void video_start() override;
|
||||
|
||||
template <typename T>
|
||||
void bombjack_base(machine_config &config, T &&psg_type);
|
||||
|
||||
// main CPU
|
||||
void program_map(address_map &map);
|
||||
void bombjack_map(address_map &map);
|
||||
@ -137,7 +140,6 @@ protected:
|
||||
|
||||
required_device<cpu_device> m_audiocpu;
|
||||
required_device<generic_latch_8_device> m_soundlatch;
|
||||
required_device<speaker_device> m_speaker;
|
||||
required_device_array<ay8910_device, 3> m_ay8910;
|
||||
|
||||
required_device<screen_device> m_screen;
|
||||
@ -163,18 +165,19 @@ private:
|
||||
class calorie_state : public bombjack_state
|
||||
{
|
||||
public:
|
||||
calorie_state(machine_config const &mconfig,
|
||||
device_type type, char const *tag)
|
||||
calorie_state(machine_config const &mconfig, device_type type, char const *tag)
|
||||
: bombjack_state(mconfig, type, tag)
|
||||
, m_opcodes(*this, "opcodes")
|
||||
{ }
|
||||
|
||||
void calorie(machine_config &config, bool encrypted);
|
||||
void calorie(machine_config &config);
|
||||
void calorieb(machine_config &config);
|
||||
|
||||
void init_calorieb();
|
||||
|
||||
protected:
|
||||
void calorie_common(machine_config &config);
|
||||
|
||||
// main CPU
|
||||
void calorie_map(address_map &map);
|
||||
void calorie_opcodes_map(address_map &map);
|
||||
@ -192,6 +195,7 @@ protected:
|
||||
optional_shared_ptr<u8> m_opcodes;
|
||||
};
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Audio hardware
|
||||
@ -210,6 +214,7 @@ u8 bombjack_state::soundlatch_r()
|
||||
return res;
|
||||
}
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Video hardware
|
||||
@ -407,6 +412,7 @@ u32 bombjack_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, r
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Address maps
|
||||
@ -485,6 +491,7 @@ void bombjack_state::bombjack_audio_portmap(address_map &map)
|
||||
map(0x80, 0x81).mirror(0x6e).w(m_ay8910[2], FUNC(ay8910_device::address_data_w));
|
||||
}
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Input ports
|
||||
@ -564,6 +571,7 @@ static INPUT_PORTS_START( bombjack )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Hard ) )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Input ports
|
||||
@ -646,6 +654,7 @@ static INPUT_PORTS_START( calorie )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Graphics definitions
|
||||
@ -691,6 +700,7 @@ static GFXDECODE_START( gfx_bombjack )
|
||||
GFXDECODE_ENTRY( "sprites", 0x0000, layout_32x32, 0, 16 )
|
||||
GFXDECODE_END
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Machine driver
|
||||
@ -709,32 +719,10 @@ void bombjack_state::machine_reset()
|
||||
m_audiocpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero);
|
||||
}
|
||||
|
||||
void bombjack_state::bombjack(machine_config &config)
|
||||
template <typename T>
|
||||
void bombjack_state::bombjack_base(machine_config &config, T &&psg_type)
|
||||
{
|
||||
// NOTE: X2 is 12MHz, but schematics specify 12.096MHz
|
||||
Z80(config, m_maincpu, CLOCK_X1);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &bombjack_state::bombjack_map);
|
||||
|
||||
WATCHDOG_TIMER(config, m_watchdog).set_vblank_count(m_screen, 8);
|
||||
|
||||
Z80(config, m_audiocpu, CLOCK_X2 / 4);
|
||||
m_audiocpu->set_addrmap(AS_PROGRAM, &bombjack_state::bombjack_audio_map);
|
||||
m_audiocpu->set_addrmap(AS_IO, &bombjack_state::bombjack_audio_portmap);
|
||||
|
||||
GENERIC_LATCH_8(config, m_soundlatch);
|
||||
|
||||
SPEAKER(config, m_speaker).front_center();
|
||||
|
||||
AY8910(config, m_ay8910[0], CLOCK_X2 / 8).add_route(ALL_OUTPUTS, m_speaker, 0.13);
|
||||
m_ay8910[0]->port_a_write_callback().set_nop(); // see todo
|
||||
m_ay8910[0]->port_b_write_callback().set_nop();
|
||||
AY8910(config, m_ay8910[1], CLOCK_X2 / 8).add_route(ALL_OUTPUTS, m_speaker, 0.13);
|
||||
m_ay8910[1]->port_a_write_callback().set_nop(); // see todo
|
||||
m_ay8910[1]->port_b_write_callback().set_nop();
|
||||
AY8910(config, m_ay8910[2], CLOCK_X2 / 8).add_route(ALL_OUTPUTS, m_speaker, 0.13);
|
||||
m_ay8910[2]->port_a_write_callback().set_nop(); // see todo
|
||||
m_ay8910[2]->port_b_write_callback().set_nop();
|
||||
|
||||
// video
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_raw(CLOCK_X2 / 2, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART);
|
||||
m_screen->set_screen_update(FUNC(bombjack_state::screen_update));
|
||||
@ -744,40 +732,70 @@ void bombjack_state::bombjack(machine_config &config)
|
||||
|
||||
GFXDECODE(config, m_gfxdecode, m_palette, gfx_bombjack);
|
||||
PALETTE(config, m_palette).set_format(palette_device::xBGR_444, 128);
|
||||
|
||||
// sound
|
||||
Z80(config, m_audiocpu, CLOCK_X2 / 4);
|
||||
m_audiocpu->set_addrmap(AS_PROGRAM, &bombjack_state::bombjack_audio_map);
|
||||
m_audiocpu->set_addrmap(AS_IO, &bombjack_state::bombjack_audio_portmap);
|
||||
|
||||
GENERIC_LATCH_8(config, m_soundlatch);
|
||||
|
||||
SPEAKER(config, "speaker").front_center();
|
||||
|
||||
psg_type(config, m_ay8910[0], CLOCK_X2 / 8).add_route(ALL_OUTPUTS, "speaker", 0.13);
|
||||
psg_type(config, m_ay8910[1], CLOCK_X2 / 8).add_route(ALL_OUTPUTS, "speaker", 0.13);
|
||||
psg_type(config, m_ay8910[2], CLOCK_X2 / 8).add_route(ALL_OUTPUTS, "speaker", 0.13);
|
||||
}
|
||||
|
||||
void calorie_state::calorie(machine_config &config, bool encrypted = true)
|
||||
void bombjack_state::bombjack(machine_config &config)
|
||||
{
|
||||
bombjack(config);
|
||||
// NOTE: X2 is 12MHz, but schematics specify 12.096MHz
|
||||
Z80(config, m_maincpu, CLOCK_X1);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &bombjack_state::bombjack_map);
|
||||
|
||||
WATCHDOG_TIMER(config, m_watchdog).set_vblank_count(m_screen, 8);
|
||||
|
||||
bombjack_base(config, AY8910);
|
||||
|
||||
m_ay8910[0]->port_a_write_callback().set_nop(); // see TODO
|
||||
m_ay8910[0]->port_b_write_callback().set_nop();
|
||||
m_ay8910[1]->port_a_write_callback().set_nop(); // see TODO
|
||||
m_ay8910[1]->port_b_write_callback().set_nop();
|
||||
m_ay8910[2]->port_a_write_callback().set_nop(); // see TODO
|
||||
m_ay8910[2]->port_b_write_callback().set_nop();
|
||||
}
|
||||
|
||||
void calorie_state::calorie_common(machine_config &config)
|
||||
{
|
||||
bombjack_base(config, YM2149);
|
||||
|
||||
if (encrypted)
|
||||
{
|
||||
sega_317_0004_device &maincpu(SEGA_317_0004(config.replace(), m_maincpu, CLOCK_X1));
|
||||
maincpu.set_addrmap(AS_OPCODES, &calorie_state::calorie_opcodes_map);
|
||||
maincpu.set_decrypted_tag(m_opcodes);
|
||||
}
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &calorie_state::calorie_map);
|
||||
|
||||
config.device_remove("watchdog");
|
||||
|
||||
m_audiocpu->set_addrmap(AS_PROGRAM, &calorie_state::calorie_audio_map);
|
||||
|
||||
// NOTE: never seems to use filters
|
||||
YM2149(config.replace(), m_ay8910[0], CLOCK_X2 / 8).add_route(ALL_OUTPUTS, m_speaker, 0.13);
|
||||
YM2149(config.replace(), m_ay8910[1], CLOCK_X2 / 8).add_route(ALL_OUTPUTS, m_speaker, 0.13);
|
||||
YM2149(config.replace(), m_ay8910[2], CLOCK_X2 / 8).add_route(ALL_OUTPUTS, m_speaker, 0.13);
|
||||
|
||||
// TODO: proper IRQ pulse timings
|
||||
m_screen->screen_vblank().set_inputline(m_maincpu, INPUT_LINE_IRQ0, HOLD_LINE);
|
||||
m_screen->screen_vblank().append_inputline(m_audiocpu, INPUT_LINE_IRQ0, HOLD_LINE);
|
||||
|
||||
// NOTE: never seems to use filters
|
||||
}
|
||||
|
||||
void calorie_state::calorie(machine_config &config)
|
||||
{
|
||||
sega_317_0004_device &maincpu(SEGA_317_0004(config, m_maincpu, CLOCK_X1));
|
||||
maincpu.set_addrmap(AS_OPCODES, &calorie_state::calorie_opcodes_map);
|
||||
maincpu.set_decrypted_tag(m_opcodes);
|
||||
|
||||
calorie_common(config);
|
||||
}
|
||||
|
||||
void calorie_state::calorieb(machine_config &config)
|
||||
{
|
||||
calorie(config, false);
|
||||
|
||||
// not encrypted, but still needs a lookup table for /M1
|
||||
Z80(config, m_maincpu, CLOCK_X1);
|
||||
m_maincpu->set_addrmap(AS_OPCODES, &calorie_state::calorie_opcodes_map);
|
||||
|
||||
calorie_common(config);
|
||||
}
|
||||
|
||||
void calorie_state::init_calorieb()
|
||||
@ -785,6 +803,7 @@ void calorie_state::init_calorieb()
|
||||
memcpy(m_opcodes, memregion("maincpu")->base() + 0x10000, 0x8000);
|
||||
}
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* ROM definitions
|
||||
@ -918,6 +937,7 @@ ROM_START( bombjackbl )
|
||||
ROM_LOAD( "14.bin", 0x4000, 0x2000, CRC(101c858d) SHA1(ed1746c15cdb04fae888601d940183d5c7702282) )
|
||||
ROM_END
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* ROM definitions
|
||||
@ -1053,22 +1073,11 @@ ROM_END
|
||||
|
||||
} // anonymous namespace
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Game drivers
|
||||
* (Bomb Jack)
|
||||
*
|
||||
*************************************/
|
||||
GAME( 1984, bombjack, 0, bombjack, bombjack, bombjack_state, empty_init, ROT90, "Tehkan", "Bomb Jack", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1984, bombjack2, bombjack, bombjack, bombjack, bombjack_state, empty_init, ROT90, "Tehkan", "Bomb Jack (earlier)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1984, bombjackt, bombjack, bombjack, bombjack, bombjack_state, empty_init, ROT90, "Tehkan (Tecfri license)", "Bomb Jack (Tecfri, Spain)", MACHINE_SUPPORTS_SAVE ) // official license
|
||||
GAME( 1985, bombjackbl, bombjack, bombjack, bombjack, bombjack_state, empty_init, ROT90, "bootleg", "Bomb Jack (bootleg)", MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Game drivers
|
||||
* (Calorie Kun)
|
||||
*
|
||||
*************************************/
|
||||
GAME( 1986, calorie, 0, calorie, calorie, calorie_state, empty_init, ROT0, "Sega", "Calorie Kun vs Moguranian", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1986, calorieb, calorie, calorieb, calorie, calorie_state, init_calorieb, ROT0, "bootleg", "Calorie Kun vs Moguranian (bootleg)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1984, bombjack, 0, bombjack, bombjack, bombjack_state, empty_init, ROT90, "Tehkan", "Bomb Jack", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1984, bombjack2, bombjack, bombjack, bombjack, bombjack_state, empty_init, ROT90, "Tehkan", "Bomb Jack (earlier)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1984, bombjackt, bombjack, bombjack, bombjack, bombjack_state, empty_init, ROT90, "Tehkan (Tecfri license)", "Bomb Jack (Tecfri, Spain)", MACHINE_SUPPORTS_SAVE ) // official license
|
||||
GAME( 1985, bombjackbl, bombjack, bombjack, bombjack, bombjack_state, empty_init, ROT90, "bootleg", "Bomb Jack (bootleg)", MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
GAME( 1986, calorie, 0, calorie, calorie, calorie_state, empty_init, ROT0, "Sega", "Calorie Kun vs Moguranian", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1986, calorieb, calorie, calorieb, calorie, calorie_state, init_calorieb, ROT0, "bootleg", "Calorie Kun vs Moguranian (bootleg)", MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
@ -95,13 +95,16 @@ void bk_state::bk0010(machine_config &config)
|
||||
|
||||
K1801VP014(config, m_kbd, 0);
|
||||
m_kbd->virq_wr_callback().set_inputline(m_maincpu, t11_device::VEC_LINE);
|
||||
m_kbd->keydown_wr_callback().set([this] (int state) {
|
||||
m_sel1 |= SEL1_UPDATED;
|
||||
if (state) m_sel1 &= ~SEL1_KEYDOWN; else m_sel1 |= SEL1_KEYDOWN;
|
||||
});
|
||||
m_kbd->halt_wr_callback().set([this] (int state) {
|
||||
m_maincpu->set_input_line(t11_device::HLT_LINE, state);
|
||||
});
|
||||
m_kbd->keydown_wr_callback().set(
|
||||
[this] (int state)
|
||||
{
|
||||
m_sel1 |= SEL1_UPDATED;
|
||||
if (state)
|
||||
m_sel1 &= ~SEL1_KEYDOWN;
|
||||
else
|
||||
m_sel1 |= SEL1_KEYDOWN;
|
||||
});
|
||||
m_kbd->halt_wr_callback().set_inputline(m_maincpu, t11_device::HLT_LINE);
|
||||
|
||||
/* video hardware */
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
|
||||
@ -11,21 +11,12 @@
|
||||
#pragma once
|
||||
|
||||
#include "1801vp014.h"
|
||||
|
||||
#include "bus/qbus/qbus.h"
|
||||
#include "cpu/t11/t11.h"
|
||||
#include "imagedev/cassette.h"
|
||||
#include "sound/dac.h"
|
||||
|
||||
enum sel1_bits : u16
|
||||
{
|
||||
SEL1_UPDATED = 0004,
|
||||
SEL1_RX_SER = 0020,
|
||||
SEL1_RX_CAS = 0040,
|
||||
SEL1_KEYDOWN = 0100,
|
||||
SEL1_RDY_SER = 0200,
|
||||
SEL1_MOTOR = 0200,
|
||||
};
|
||||
|
||||
class bk_state : public driver_device
|
||||
{
|
||||
public:
|
||||
@ -42,10 +33,21 @@ public:
|
||||
void bk0010(machine_config &config);
|
||||
void bk0010fd(machine_config &config);
|
||||
|
||||
protected:
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
|
||||
private:
|
||||
uint16_t m_scroll = 0U;
|
||||
uint16_t m_sel1 = 0U;
|
||||
uint16_t m_drive = 0U;
|
||||
enum sel1_bits : u16
|
||||
{
|
||||
SEL1_UPDATED = 0004,
|
||||
SEL1_RX_SER = 0020,
|
||||
SEL1_RX_CAS = 0040,
|
||||
SEL1_KEYDOWN = 0100,
|
||||
SEL1_RDY_SER = 0200,
|
||||
SEL1_MOTOR = 0200,
|
||||
};
|
||||
|
||||
uint16_t vid_scroll_r();
|
||||
uint16_t sel1_r();
|
||||
uint16_t trap_r();
|
||||
@ -57,17 +59,21 @@ private:
|
||||
uint16_t floppy_data_r();
|
||||
void floppy_data_w(uint16_t data);
|
||||
void reset_w(int state);
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
void bk0010_mem(address_map &map);
|
||||
void bk0010fd_mem(address_map &map);
|
||||
|
||||
required_shared_ptr<uint16_t> m_vram;
|
||||
required_device<k1801vm1_device> m_maincpu;
|
||||
required_device<cassette_image_device> m_cassette;
|
||||
required_device<dac_bit_interface> m_dac;
|
||||
required_device<k1801vp014_device> m_kbd;
|
||||
required_device<qbus_device> m_qbus;
|
||||
void bk0010_mem(address_map &map);
|
||||
void bk0010fd_mem(address_map &map);
|
||||
|
||||
uint16_t m_scroll = 0U;
|
||||
uint16_t m_sel1 = 0U;
|
||||
uint16_t m_drive = 0U;
|
||||
};
|
||||
|
||||
#endif // MAME_USSR_BK_H
|
||||
|
||||
@ -51,9 +51,9 @@ protected:
|
||||
|
||||
private:
|
||||
// handlers
|
||||
template<int Layer> void vram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
template<int Layer> void scrolly_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
template<int Layer> TILE_GET_INFO_MEMBER(get_tile_info);
|
||||
template <int Layer> void vram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
template <int Layer> void scrolly_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
template <int Layer> TILE_GET_INFO_MEMBER(get_tile_info);
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void setbank(int layer, int num, int bank);
|
||||
void gfxbank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
@ -61,6 +61,10 @@ private:
|
||||
void soundlatch_pending_w(int state);
|
||||
void sh_bankswitch_w(uint8_t data);
|
||||
|
||||
void main_map(address_map &map) ATTR_COLD;
|
||||
void sound_map(address_map &map) ATTR_COLD;
|
||||
void sound_portmap(address_map &map) ATTR_COLD;
|
||||
|
||||
// devices referenced above
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<cpu_device> m_audiocpu;
|
||||
@ -82,10 +86,6 @@ private:
|
||||
uint8_t m_gfxbank[8]{};
|
||||
uint16_t m_bank[4]{};
|
||||
uint16_t m_scrolly[2]{};
|
||||
|
||||
void main_map(address_map &map) ATTR_COLD;
|
||||
void sound_map(address_map &map) ATTR_COLD;
|
||||
void sound_portmap(address_map &map) ATTR_COLD;
|
||||
};
|
||||
|
||||
|
||||
@ -95,7 +95,7 @@ private:
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
template<int Layer>
|
||||
template <int Layer>
|
||||
TILE_GET_INFO_MEMBER(aerofgt_state::get_tile_info)
|
||||
{
|
||||
const uint16_t code = m_vram[Layer][tile_index];
|
||||
@ -199,14 +199,14 @@ void aerofgt_state::sh_bankswitch_w(uint8_t data)
|
||||
m_soundbank->set_entry(data & 0x03);
|
||||
}
|
||||
|
||||
template<int Layer>
|
||||
template <int Layer>
|
||||
void aerofgt_state::vram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_vram[Layer][offset]);
|
||||
m_tilemap[Layer]->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
template<int Layer>
|
||||
template <int Layer>
|
||||
void aerofgt_state::scrolly_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_scrolly[Layer]);
|
||||
|
||||
@ -84,6 +84,7 @@ Verification still needed for the other PCBs.
|
||||
#include "speaker.h"
|
||||
#include "tilemap.h"
|
||||
|
||||
|
||||
namespace {
|
||||
|
||||
class pspikes_base_state : public driver_device
|
||||
@ -171,7 +172,6 @@ protected:
|
||||
int m_charpalettebank = 0;
|
||||
int m_spritepalettebank = 0;
|
||||
int m_sprite_gfx = 0;
|
||||
|
||||
};
|
||||
|
||||
|
||||
@ -217,8 +217,6 @@ private:
|
||||
void aerfboot_sound_map(address_map &map);
|
||||
void kickball_sound_map(address_map &map);
|
||||
void kickball_sound_portmap(address_map &map);
|
||||
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user