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Removed safe_cpu_get_pc() which doesn't really make sense anymore.

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Moved cpu_execute() to be an inline function.
This commit is contained in:
Aaron Giles 2008-12-11 10:49:25 +00:00
parent 04ae2d8bc7
commit 9ff9434146
13 changed files with 70 additions and 87 deletions
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15
src/emu/cpuintrf.c
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@ -1160,21 +1160,6 @@ void cpu_set_info_fct(const device_config *device, UINT32 state, genf *data)
/*-------------------------------------------------
cpu_execute - execute the requested cycles on
a given CPU
-------------------------------------------------*/
int cpu_execute(const device_config *device, int cycles)
{
cpu_class_header *classheader = get_safe_classheader(device);
int ran;
ran = (*classheader->execute)(device, cycles);
return ran;
}
/*------------------------------------------------- /*-------------------------------------------------
cpu_reset - signal a reset for a given CPU cpu_reset - signal a reset for a given CPU
-------------------------------------------------*/ -------------------------------------------------*/

26
src/emu/cpuintrf.h
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@ -698,9 +698,6 @@ void cpu_set_info_int(const device_config *cpu, UINT32 state, INT64 data);
void cpu_set_info_ptr(const device_config *cpu, UINT32 state, void *data); void cpu_set_info_ptr(const device_config *cpu, UINT32 state, void *data);
void cpu_set_info_fct(const device_config *cpu, UINT32 state, genf *data); void cpu_set_info_fct(const device_config *cpu, UINT32 state, genf *data);
/* execute the requested cycles on a given CPU */
int cpu_execute(const device_config *cpu, int cycles);
/* signal a reset for a given CPU */ /* signal a reset for a given CPU */
void cpu_reset(const device_config *cpu); void cpu_reset(const device_config *cpu);
@ -732,17 +729,6 @@ const char *cputype_get_info_string(cpu_type cputype, UINT32 state);
INLINE FUNCTIONS INLINE FUNCTIONS
***************************************************************************/ ***************************************************************************/
/*-------------------------------------------------
safe_cpu_get_pc - return the current PC or ~0
if the CPU is invalid
-------------------------------------------------*/
INLINE offs_t safe_cpu_get_pc(const device_config *cpu)
{
return (cpu != NULL) ? cpu_get_pc(cpu) : ~0;
}
/*------------------------------------------------- /*-------------------------------------------------
cpu_get_index - return the index of the cpu_get_index - return the index of the
specified CPU (deprecated soon) specified CPU (deprecated soon)
@ -779,4 +765,16 @@ INLINE const address_space *cpu_get_address_space(const device_config *cpu, int
} }
/*-------------------------------------------------
cpu_execute - execute the requested cycles on
a given CPU
-------------------------------------------------*/
INLINE int cpu_execute(const device_config *device, int cycles)
{
cpu_class_header *classheader = device->classtoken;
return (*classheader->execute)(device, cycles);
}
#endif /* __CPUINTRF_H__ */ #endif /* __CPUINTRF_H__ */

8
src/emu/machine/wd33c93.c
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@ -527,7 +527,7 @@ WRITE8_HANDLER(wd33c93_w)
case 1: case 1:
{ {
LOG(( "WD33C93: PC=%08x - Write REG=%02x, data = %02x\n", safe_cpu_get_pc(space->cpu), scsi_data.sasr, data )); LOG(( "WD33C93: PC=%08x - Write REG=%02x, data = %02x\n", cpu_get_pc(space->cpu), scsi_data.sasr, data ));
/* update the register */ /* update the register */
scsi_data.regs[scsi_data.sasr] = data; scsi_data.regs[scsi_data.sasr] = data;
@ -535,7 +535,7 @@ WRITE8_HANDLER(wd33c93_w)
/* if we receive a command, schedule to process it */ /* if we receive a command, schedule to process it */
if ( scsi_data.sasr == WD_COMMAND ) if ( scsi_data.sasr == WD_COMMAND )
{ {
LOG(( "WDC33C93: PC=%08x - Executing command %08x - unit %d\n", safe_cpu_get_pc(space->cpu), data, wd33c93_getunit() )); LOG(( "WDC33C93: PC=%08x - Executing command %08x - unit %d\n", cpu_get_pc(space->cpu), data, wd33c93_getunit() ));
/* signal we're processing it */ /* signal we're processing it */
scsi_data.regs[WD_AUXILIARY_STATUS] |= ASR_CIP; scsi_data.regs[WD_AUXILIARY_STATUS] |= ASR_CIP;
@ -686,7 +686,7 @@ READ8_HANDLER(wd33c93_r)
intf->irq_callback(space->machine, 0); intf->irq_callback(space->machine, 0);
} }
LOG(( "WD33C93: PC=%08x - Status read (%02x)\n", safe_cpu_get_pc(space->cpu), scsi_data.regs[WD_SCSI_STATUS] )); LOG(( "WD33C93: PC=%08x - Status read (%02x)\n", cpu_get_pc(space->cpu), scsi_data.regs[WD_SCSI_STATUS] ));
} }
else if ( scsi_data.sasr == WD_DATA ) else if ( scsi_data.sasr == WD_DATA )
{ {
@ -755,7 +755,7 @@ READ8_HANDLER(wd33c93_r)
} }
} }
LOG(( "WD33C93: PC=%08x - Data read (%02x)\n", safe_cpu_get_pc(space->cpu), scsi_data.regs[WD_DATA] )); LOG(( "WD33C93: PC=%08x - Data read (%02x)\n", cpu_get_pc(space->cpu), scsi_data.regs[WD_DATA] ));
/* get the register value */ /* get the register value */
ret = scsi_data.regs[scsi_data.sasr]; ret = scsi_data.regs[scsi_data.sasr];

4
src/mame/drivers/crbaloon.c
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@ -63,7 +63,7 @@ static WRITE8_HANDLER( pc3092_w )
{ {
pc3092_data[offset] = data & 0x0f; pc3092_data[offset] = data & 0x0f;
if (LOG_PC3092) logerror("%04X: write PC3092 #%d = 0x%02x\n", safe_cpu_get_pc(space->cpu), offset, pc3092_data[offset]); if (LOG_PC3092) logerror("%04X: write PC3092 #%d = 0x%02x\n", cpu_get_pc(space->cpu), offset, pc3092_data[offset]);
pc3092_update(); pc3092_update();
} }
@ -143,7 +143,7 @@ static READ8_HANDLER( pc3259_r )
break; break;
} }
if (LOG_PC3259) logerror("%04X: read PC3259 #%d = 0x%02x\n", safe_cpu_get_pc(space->cpu), reg, ret); if (LOG_PC3259) logerror("%04X: read PC3259 #%d = 0x%02x\n", cpu_get_pc(space->cpu), reg, ret);
return ret | (input_port_read(space->machine, "DSW1") & 0xf0); return ret | (input_port_read(space->machine, "DSW1") & 0xf0);
} }

2
src/mame/drivers/enigma2.c
View File

@ -363,7 +363,7 @@ static READ8_HANDLER( sound_latch_r )
static WRITE8_HANDLER( protection_data_w ) static WRITE8_HANDLER( protection_data_w )
{ {
if (LOG_PROT) logerror("Protection Data Write: %x at %x\n", data, safe_cpu_get_pc(space->cpu)); if (LOG_PROT) logerror("Protection Data Write: %x at %x\n", data, cpu_get_pc(space->cpu));
protection_data = data; protection_data = data;
} }

6
src/mame/drivers/galaxian.c
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@ -762,7 +762,7 @@ static WRITE8_DEVICE_HANDLER( scorpion_protection_w )
static READ8_HANDLER( scorpion_sound_status_r ) static READ8_HANDLER( scorpion_sound_status_r )
{ {
logerror("%04X:scorpion_sound_status_r()\n", safe_cpu_get_pc(space->cpu)); logerror("%04X:scorpion_sound_status_r()\n", cpu_get_pc(space->cpu));
return 1; return 1;
} }
@ -770,7 +770,7 @@ static READ8_HANDLER( scorpion_sound_status_r )
static WRITE8_HANDLER( scorpion_sound_data_w ) static WRITE8_HANDLER( scorpion_sound_data_w )
{ {
scorpion_sound_data = data; scorpion_sound_data = data;
// logerror("%04X:scorpion_sound_data_w(%02X)\n", safe_cpu_get_pc(space->cpu), data); // logerror("%04X:scorpion_sound_data_w(%02X)\n", cpu_get_pc(space->cpu), data);
} }
@ -778,7 +778,7 @@ static WRITE8_HANDLER( scorpion_sound_control_w )
{ {
if (!(data & 0x04)) if (!(data & 0x04))
mame_printf_debug("Secondary sound = %02X\n", scorpion_sound_data); mame_printf_debug("Secondary sound = %02X\n", scorpion_sound_data);
// logerror("%04X:scorpion_sound_control_w(%02X)\n", safe_cpu_get_pc(space->cpu), data); // logerror("%04X:scorpion_sound_control_w(%02X)\n", cpu_get_pc(space->cpu), data);
} }

2
src/mame/drivers/model2.c
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@ -742,7 +742,7 @@ static READ32_HANDLER( geo_r )
} }
// fatalerror("geo_r: %08X, %08X\n", address, mem_mask); // fatalerror("geo_r: %08X, %08X\n", address, mem_mask);
mame_printf_debug("geo_r: PC:%08x - %08X\n", safe_cpu_get_pc(space->cpu), address); mame_printf_debug("geo_r: PC:%08x - %08X\n", cpu_get_pc(space->cpu), address);
return 0; return 0;
} }

4
src/mame/drivers/neogeo.c
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@ -691,7 +691,7 @@ static void set_audio_cpu_banking(running_machine *machine)
static void audio_cpu_bank_select(const address_space *space, int region, UINT8 bank) static void audio_cpu_bank_select(const address_space *space, int region, UINT8 bank)
{ {
if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: audio_cpu_bank_select: Region: %d Bank: %02x\n", safe_cpu_get_pc(space->cpu), region, bank); if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: audio_cpu_bank_select: Region: %d Bank: %02x\n", cpu_get_pc(space->cpu), region, bank);
audio_cpu_banks[region] = bank; audio_cpu_banks[region] = bank;
@ -828,7 +828,7 @@ static WRITE16_HANDLER( system_control_w )
break; break;
} }
if (LOG_VIDEO_SYSTEM && ((offset & 0x07) != 0x06)) logerror("PC: %x System control write. Offset: %x Data: %x\n", safe_cpu_get_pc(space->cpu), offset & 0x07, bit); if (LOG_VIDEO_SYSTEM && ((offset & 0x07) != 0x06)) logerror("PC: %x System control write. Offset: %x Data: %x\n", cpu_get_pc(space->cpu), offset & 0x07, bit);
} }
} }

2
src/mame/drivers/nyny.c
View File

@ -447,7 +447,7 @@ static WRITE8_HANDLER( nyny_ay8910_37_port_a_w )
{ {
/* not sure what this does */ /* not sure what this does */
/*logerror("%x PORT A write %x at Y=%x X=%x\n", safe_cpu_get_pc(space->cpu), data, video_screen_get_vpos(space->machine->primary_screen), video_screen_get_hpos(space->machine->primary_screen));*/ /*logerror("%x PORT A write %x at Y=%x X=%x\n", cpu_get_pc(space->cpu), data, video_screen_get_vpos(space->machine->primary_screen), video_screen_get_hpos(space->machine->primary_screen));*/
} }

24
src/mame/drivers/r2dtank.c
View File

@ -91,7 +91,7 @@ static READ8_HANDLER( audio_command_r )
{ {
UINT8 ret = soundlatch_r(space, 0); UINT8 ret = soundlatch_r(space, 0);
if (LOG_AUDIO_COMM) logerror("%08X CPU#1 Audio Command Read: %x\n", safe_cpu_get_pc(space->cpu), ret); if (LOG_AUDIO_COMM) logerror("%08X CPU#1 Audio Command Read: %x\n", cpu_get_pc(space->cpu), ret);
return ret; return ret;
} }
@ -102,14 +102,14 @@ static WRITE8_HANDLER( audio_command_w )
soundlatch_w(space, 0, ~data); soundlatch_w(space, 0, ~data);
cpu_set_input_line(space->machine->cpu[1], M6800_IRQ_LINE, HOLD_LINE); cpu_set_input_line(space->machine->cpu[1], M6800_IRQ_LINE, HOLD_LINE);
if (LOG_AUDIO_COMM) logerror("%08X CPU#0 Audio Command Write: %x\n", safe_cpu_get_pc(space->cpu), data^0xff); if (LOG_AUDIO_COMM) logerror("%08X CPU#0 Audio Command Write: %x\n", cpu_get_pc(space->cpu), data^0xff);
} }
static READ8_HANDLER( audio_answer_r ) static READ8_HANDLER( audio_answer_r )
{ {
UINT8 ret = soundlatch2_r(space, 0); UINT8 ret = soundlatch2_r(space, 0);
if (LOG_AUDIO_COMM) logerror("%08X CPU#0 Audio Answer Read: %x\n", safe_cpu_get_pc(space->cpu), ret); if (LOG_AUDIO_COMM) logerror("%08X CPU#0 Audio Answer Read: %x\n", cpu_get_pc(space->cpu), ret);
return ret; return ret;
} }
@ -118,13 +118,13 @@ if (LOG_AUDIO_COMM) logerror("%08X CPU#0 Audio Answer Read: %x\n", safe_cpu_ge
static WRITE8_HANDLER( audio_answer_w ) static WRITE8_HANDLER( audio_answer_w )
{ {
/* HACK - prevents lock-up, but causes game to end some in-between sreens prematurely */ /* HACK - prevents lock-up, but causes game to end some in-between sreens prematurely */
if (safe_cpu_get_pc(space->cpu) == 0xfb12) if (cpu_get_pc(space->cpu) == 0xfb12)
data = 0x00; data = 0x00;
soundlatch2_w(space, 0, data); soundlatch2_w(space, 0, data);
cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE, HOLD_LINE); cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE, HOLD_LINE);
if (LOG_AUDIO_COMM) logerror("%08X CPU#1 Audio Answer Write: %x\n", safe_cpu_get_pc(space->cpu), data); if (LOG_AUDIO_COMM) logerror("%08X CPU#1 Audio Answer Write: %x\n", cpu_get_pc(space->cpu), data);
} }
@ -139,7 +139,7 @@ static WRITE8_HANDLER( AY8910_select_w )
D5-D7 - not used */ D5-D7 - not used */
AY8910_selected = data; AY8910_selected = data;
if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910_select_w: %x\n", safe_cpu_get_pc(space->cpu), data); if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910_select_w: %x\n", cpu_get_pc(space->cpu), data);
} }
@ -150,12 +150,12 @@ static READ8_HANDLER( AY8910_port_r )
if (AY8910_selected & 0x08) if (AY8910_selected & 0x08)
{ {
ret = ay8910_read_port_0_r(space, offset); ret = ay8910_read_port_0_r(space, offset);
if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #0 Port Read: %x\n", safe_cpu_get_pc(space->cpu), ret);} if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #0 Port Read: %x\n", cpu_get_pc(space->cpu), ret);}
if (AY8910_selected & 0x10) if (AY8910_selected & 0x10)
{ {
ret = ay8910_read_port_1_r(space, offset); ret = ay8910_read_port_1_r(space, offset);
if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #1 Port Read: %x\n", safe_cpu_get_pc(space->cpu), ret);} if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #1 Port Read: %x\n", cpu_get_pc(space->cpu), ret);}
return ret; return ret;
} }
@ -166,23 +166,23 @@ static WRITE8_HANDLER( AY8910_port_w )
if (AY8910_selected & 0x04) if (AY8910_selected & 0x04)
{ {
if (AY8910_selected & 0x08) if (AY8910_selected & 0x08)
{if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #0 Control Write: %x\n", safe_cpu_get_pc(space->cpu), data); {if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #0 Control Write: %x\n", cpu_get_pc(space->cpu), data);
ay8910_control_port_0_w(space, offset, data); ay8910_control_port_0_w(space, offset, data);
} }
if (AY8910_selected & 0x10) if (AY8910_selected & 0x10)
{if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #1 Control Write: %x\n", safe_cpu_get_pc(space->cpu), data); {if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #1 Control Write: %x\n", cpu_get_pc(space->cpu), data);
ay8910_control_port_1_w(space, offset, data); ay8910_control_port_1_w(space, offset, data);
} }
} }
else else
{ {
if (AY8910_selected & 0x08) if (AY8910_selected & 0x08)
{if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #0 Port Write: %x\n", safe_cpu_get_pc(space->cpu), data); {if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #0 Port Write: %x\n", cpu_get_pc(space->cpu), data);
ay8910_write_port_0_w(space, offset, data); ay8910_write_port_0_w(space, offset, data);
} }
if (AY8910_selected & 0x10) if (AY8910_selected & 0x10)
{if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #1 Port Write: %x\n", safe_cpu_get_pc(space->cpu), data); {if (LOG_AUDIO_COMM) logerror("%08X CPU#1 AY8910 #1 Port Write: %x\n", cpu_get_pc(space->cpu), data);
ay8910_write_port_1_w(space, offset, data); ay8910_write_port_1_w(space, offset, data);
} }
} }

8
src/mame/machine/amiga.c
View File

@ -1040,7 +1040,7 @@ READ16_HANDLER( amiga_cia_r )
data = cia_r(cia, offset >> 7); data = cia_r(cia, offset >> 7);
if (LOG_CIA) if (LOG_CIA)
logerror("%06x:cia_%c_read(%03x) = %04x & %04x\n", safe_cpu_get_pc(space->cpu), 'A' + ((~offset & 0x0800) >> 11), offset * 2, data << shift, mem_mask); logerror("%06x:cia_%c_read(%03x) = %04x & %04x\n", cpu_get_pc(space->cpu), 'A' + ((~offset & 0x0800) >> 11), offset * 2, data << shift, mem_mask);
return data << shift; return data << shift;
} }
@ -1058,7 +1058,7 @@ WRITE16_HANDLER( amiga_cia_w )
const device_config *cia; const device_config *cia;
if (LOG_CIA) if (LOG_CIA)
logerror("%06x:cia_%c_write(%03x) = %04x & %04x\n", safe_cpu_get_pc(space->cpu), 'A' + ((~offset & 0x0800) >> 11), offset * 2, data, mem_mask); logerror("%06x:cia_%c_write(%03x) = %04x & %04x\n", cpu_get_pc(space->cpu), 'A' + ((~offset & 0x0800) >> 11), offset * 2, data, mem_mask);
/* offsets 0000-07ff reference CIA B, and are accessed via the MSB */ /* offsets 0000-07ff reference CIA B, and are accessed via the MSB */
if ((offset & 0x0800) == 0) if ((offset & 0x0800) == 0)
@ -1224,7 +1224,7 @@ READ16_HANDLER( amiga_custom_r )
} }
if (LOG_CUSTOM) if (LOG_CUSTOM)
logerror("%06X:read from custom %s\n", safe_cpu_get_pc(space->cpu), amiga_custom_names[offset & 0xff]); logerror("%06X:read from custom %s\n", cpu_get_pc(space->cpu), amiga_custom_names[offset & 0xff]);
return 0xffff; return 0xffff;
} }
@ -1255,7 +1255,7 @@ WRITE16_HANDLER( amiga_custom_w )
offset &= 0xff; offset &= 0xff;
if (LOG_CUSTOM) if (LOG_CUSTOM)
logerror("%06X:write to custom %s = %04X\n", safe_cpu_get_pc(space->cpu), amiga_custom_names[offset & 0xff], data); logerror("%06X:write to custom %s = %04X\n", cpu_get_pc(space->cpu), amiga_custom_names[offset & 0xff], data);
switch (offset) switch (offset)
{ {

48
src/mame/machine/leland.c
View File

@ -516,7 +516,7 @@ WRITE8_HANDLER( leland_master_alt_bankswitch_w )
/* update any bankswitching */ /* update any bankswitching */
if (LOG_BANKSWITCHING_M) if (LOG_BANKSWITCHING_M)
if ((alternate_bank ^ data) & 0x0f) if ((alternate_bank ^ data) & 0x0f)
logerror("%04X:alternate_bank = %02X\n", safe_cpu_get_pc(space->cpu), data & 0x0f); logerror("%04X:alternate_bank = %02X\n", cpu_get_pc(space->cpu), data & 0x0f);
alternate_bank = data & 15; alternate_bank = data & 15;
(*leland_update_master_bank)(space->machine); (*leland_update_master_bank)(space->machine);
@ -851,14 +851,14 @@ void ataxx_init_eeprom(running_machine *machine, UINT8 default_val, const UINT16
READ8_HANDLER( ataxx_eeprom_r ) READ8_HANDLER( ataxx_eeprom_r )
{ {
int port = input_port_read(space->machine, "IN2"); int port = input_port_read(space->machine, "IN2");
if (LOG_EEPROM) logerror("%04X:EE read\n", safe_cpu_get_pc(space->cpu)); if (LOG_EEPROM) logerror("%04X:EE read\n", cpu_get_pc(space->cpu));
return (port & ~0x01) | eeprom_read_bit(); return (port & ~0x01) | eeprom_read_bit();
} }
WRITE8_HANDLER( ataxx_eeprom_w ) WRITE8_HANDLER( ataxx_eeprom_w )
{ {
if (LOG_EEPROM) logerror("%04X:EE write %d%d%d\n", safe_cpu_get_pc(space->cpu), if (LOG_EEPROM) logerror("%04X:EE write %d%d%d\n", cpu_get_pc(space->cpu),
(data >> 6) & 1, (data >> 5) & 1, (data >> 4) & 1); (data >> 6) & 1, (data >> 5) & 1, (data >> 4) & 1);
eeprom_write_bit ((data & 0x10) >> 4); eeprom_write_bit ((data & 0x10) >> 4);
eeprom_set_clock_line((data & 0x20) ? ASSERT_LINE : CLEAR_LINE); eeprom_set_clock_line((data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
@ -877,11 +877,11 @@ WRITE8_HANDLER( leland_battery_ram_w )
{ {
if (battery_ram_enable) if (battery_ram_enable)
{ {
if (LOG_BATTERY_RAM) logerror("%04X:BatteryW@%04X=%02X\n", safe_cpu_get_pc(space->cpu), offset, data); if (LOG_BATTERY_RAM) logerror("%04X:BatteryW@%04X=%02X\n", cpu_get_pc(space->cpu), offset, data);
battery_ram[offset] = data; battery_ram[offset] = data;
} }
else else
logerror("%04X:BatteryW@%04X (invalid!)\n", safe_cpu_get_pc(space->cpu), offset); logerror("%04X:BatteryW@%04X (invalid!)\n", cpu_get_pc(space->cpu), offset);
} }
@ -889,13 +889,13 @@ WRITE8_HANDLER( ataxx_battery_ram_w )
{ {
if (battery_ram_enable) if (battery_ram_enable)
{ {
if (LOG_BATTERY_RAM) logerror("%04X:BatteryW@%04X=%02X\n", safe_cpu_get_pc(space->cpu), offset, data); if (LOG_BATTERY_RAM) logerror("%04X:BatteryW@%04X=%02X\n", cpu_get_pc(space->cpu), offset, data);
battery_ram[offset] = data; battery_ram[offset] = data;
} }
else if ((master_bank & 0x30) == 0x20) else if ((master_bank & 0x30) == 0x20)
ataxx_qram[((master_bank & 0xc0) << 8) + offset] = data; ataxx_qram[((master_bank & 0xc0) << 8) + offset] = data;
else else
logerror("%04X:BatteryW@%04X (invalid!)\n", safe_cpu_get_pc(space->cpu), offset); logerror("%04X:BatteryW@%04X (invalid!)\n", cpu_get_pc(space->cpu), offset);
} }
@ -1127,7 +1127,7 @@ WRITE8_HANDLER( leland_master_analog_key_w )
/* update top board banking for some games */ /* update top board banking for some games */
if (LOG_BANKSWITCHING_M) if (LOG_BANKSWITCHING_M)
if ((top_board_bank ^ data) & 0xc0) if ((top_board_bank ^ data) & 0xc0)
logerror("%04X:top_board_bank = %02X\n", safe_cpu_get_pc(space->cpu), data & 0xc0); logerror("%04X:top_board_bank = %02X\n", cpu_get_pc(space->cpu), data & 0xc0);
top_board_bank = data & 0xc0; top_board_bank = data & 0xc0;
(*leland_update_master_bank)(space->machine); (*leland_update_master_bank)(space->machine);
break; break;
@ -1178,7 +1178,7 @@ READ8_HANDLER( leland_master_input_r )
case 0x11: /* /GIN1 */ case 0x11: /* /GIN1 */
result = input_port_read(space->machine, "IN3"); result = input_port_read(space->machine, "IN3");
if (LOG_EEPROM) logerror("%04X:EE read\n", safe_cpu_get_pc(space->cpu)); if (LOG_EEPROM) logerror("%04X:EE read\n", cpu_get_pc(space->cpu));
result = (result & ~0x01) | eeprom_read_bit(); result = (result & ~0x01) | eeprom_read_bit();
break; break;
@ -1200,7 +1200,7 @@ WRITE8_HANDLER( leland_master_output_w )
cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, (data & 0x04) ? CLEAR_LINE : ASSERT_LINE); cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, (data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
cpu_set_input_line(space->machine->cpu[1], 0, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE); cpu_set_input_line(space->machine->cpu[1], 0, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
if (LOG_EEPROM) logerror("%04X:EE write %d%d%d\n", safe_cpu_get_pc(space->cpu), if (LOG_EEPROM) logerror("%04X:EE write %d%d%d\n", cpu_get_pc(space->cpu),
(data >> 6) & 1, (data >> 5) & 1, (data >> 4) & 1); (data >> 6) & 1, (data >> 5) & 1, (data >> 4) & 1);
eeprom_write_bit ((data & 0x10) >> 4); eeprom_write_bit ((data & 0x10) >> 4);
eeprom_set_clock_line((data & 0x20) ? ASSERT_LINE : CLEAR_LINE); eeprom_set_clock_line((data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
@ -1267,7 +1267,7 @@ WRITE8_HANDLER( ataxx_master_output_w )
case 0x04: /* /MBNK */ case 0x04: /* /MBNK */
if (LOG_BANKSWITCHING_M) if (LOG_BANKSWITCHING_M)
if ((master_bank ^ data) & 0xff) if ((master_bank ^ data) & 0xff)
logerror("%04X:master_bank = %02X\n", safe_cpu_get_pc(space->cpu), data & 0xff); logerror("%04X:master_bank = %02X\n", cpu_get_pc(space->cpu), data & 0xff);
master_bank = data; master_bank = data;
ataxx_bankswitch(space->machine); ataxx_bankswitch(space->machine);
break; break;
@ -1320,22 +1320,22 @@ WRITE8_HANDLER( ataxx_paletteram_and_misc_w )
else if (offset == 0x7fc) else if (offset == 0x7fc)
{ {
xrom1_addr = (xrom1_addr & 0xff00) | (data & 0x00ff); xrom1_addr = (xrom1_addr & 0xff00) | (data & 0x00ff);
if (LOG_XROM) logerror("%04X:XROM1 address low write = %02X (addr=%04X)\n", safe_cpu_get_pc(space->cpu), data, xrom1_addr); if (LOG_XROM) logerror("%04X:XROM1 address low write = %02X (addr=%04X)\n", cpu_get_pc(space->cpu), data, xrom1_addr);
} }
else if (offset == 0x7fd) else if (offset == 0x7fd)
{ {
xrom1_addr = (xrom1_addr & 0x00ff) | ((data << 8) & 0xff00); xrom1_addr = (xrom1_addr & 0x00ff) | ((data << 8) & 0xff00);
if (LOG_XROM) logerror("%04X:XROM1 address high write = %02X (addr=%04X)\n", safe_cpu_get_pc(space->cpu), data, xrom1_addr); if (LOG_XROM) logerror("%04X:XROM1 address high write = %02X (addr=%04X)\n", cpu_get_pc(space->cpu), data, xrom1_addr);
} }
else if (offset == 0x7fe) else if (offset == 0x7fe)
{ {
xrom2_addr = (xrom2_addr & 0xff00) | (data & 0x00ff); xrom2_addr = (xrom2_addr & 0xff00) | (data & 0x00ff);
if (LOG_XROM) logerror("%04X:XROM2 address low write = %02X (addr=%04X)\n", safe_cpu_get_pc(space->cpu), data, xrom2_addr); if (LOG_XROM) logerror("%04X:XROM2 address low write = %02X (addr=%04X)\n", cpu_get_pc(space->cpu), data, xrom2_addr);
} }
else if (offset == 0x7ff) else if (offset == 0x7ff)
{ {
xrom2_addr = (xrom2_addr & 0x00ff) | ((data << 8) & 0xff00); xrom2_addr = (xrom2_addr & 0x00ff) | ((data << 8) & 0xff00);
if (LOG_XROM) logerror("%04X:XROM2 address high write = %02X (addr=%04X)\n", safe_cpu_get_pc(space->cpu), data, xrom2_addr); if (LOG_XROM) logerror("%04X:XROM2 address high write = %02X (addr=%04X)\n", cpu_get_pc(space->cpu), data, xrom2_addr);
} }
else else
extra_tram[offset] = data; extra_tram[offset] = data;
@ -1349,13 +1349,13 @@ READ8_HANDLER( ataxx_paletteram_and_misc_r )
else if (offset == 0x7fc || offset == 0x7fd) else if (offset == 0x7fc || offset == 0x7fd)
{ {
int result = xrom_base[0x00000 | xrom1_addr | ((offset & 1) << 16)]; int result = xrom_base[0x00000 | xrom1_addr | ((offset & 1) << 16)];
if (LOG_XROM) logerror("%04X:XROM1 read(%d) = %02X (addr=%04X)\n", safe_cpu_get_pc(space->cpu), offset - 0x7fc, result, xrom1_addr); if (LOG_XROM) logerror("%04X:XROM1 read(%d) = %02X (addr=%04X)\n", cpu_get_pc(space->cpu), offset - 0x7fc, result, xrom1_addr);
return result; return result;
} }
else if (offset == 0x7fe || offset == 0x7ff) else if (offset == 0x7fe || offset == 0x7ff)
{ {
int result = xrom_base[0x20000 | xrom2_addr | ((offset & 1) << 16)]; int result = xrom_base[0x20000 | xrom2_addr | ((offset & 1) << 16)];
if (LOG_XROM) logerror("%04X:XROM2 read(%d) = %02X (addr=%04X)\n", safe_cpu_get_pc(space->cpu), offset - 0x7fc, result, xrom2_addr); if (LOG_XROM) logerror("%04X:XROM2 read(%d) = %02X (addr=%04X)\n", cpu_get_pc(space->cpu), offset - 0x7fc, result, xrom2_addr);
return result; return result;
} }
else else
@ -1388,7 +1388,7 @@ WRITE8_HANDLER( leland_sound_port_w )
/* some bankswitching occurs here */ /* some bankswitching occurs here */
if (LOG_BANKSWITCHING_M) if (LOG_BANKSWITCHING_M)
if ((sound_port_bank ^ data) & 0x24) if ((sound_port_bank ^ data) & 0x24)
logerror("%04X:sound_port_bank = %02X\n", safe_cpu_get_pc(space->cpu), data & 0x24); logerror("%04X:sound_port_bank = %02X\n", cpu_get_pc(space->cpu), data & 0x24);
sound_port_bank = data & 0x24; sound_port_bank = data & 0x24;
(*leland_update_master_bank)(space->machine); (*leland_update_master_bank)(space->machine);
} }
@ -1407,12 +1407,12 @@ WRITE8_HANDLER( leland_slave_small_banksw_w )
if (bankaddress >= slave_length) if (bankaddress >= slave_length)
{ {
logerror("%04X:Slave bank %02X out of range!", safe_cpu_get_pc(space->cpu), data & 1); logerror("%04X:Slave bank %02X out of range!", cpu_get_pc(space->cpu), data & 1);
bankaddress = 0x10000; bankaddress = 0x10000;
} }
memory_set_bankptr(space->machine, 3, &slave_base[bankaddress]); memory_set_bankptr(space->machine, 3, &slave_base[bankaddress]);
if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", safe_cpu_get_pc(space->cpu), data & 1, bankaddress); if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", cpu_get_pc(space->cpu), data & 1, bankaddress);
} }
@ -1422,12 +1422,12 @@ WRITE8_HANDLER( leland_slave_large_banksw_w )
if (bankaddress >= slave_length) if (bankaddress >= slave_length)
{ {
logerror("%04X:Slave bank %02X out of range!", safe_cpu_get_pc(space->cpu), data & 15); logerror("%04X:Slave bank %02X out of range!", cpu_get_pc(space->cpu), data & 15);
bankaddress = 0x10000; bankaddress = 0x10000;
} }
memory_set_bankptr(space->machine, 3, &slave_base[bankaddress]); memory_set_bankptr(space->machine, 3, &slave_base[bankaddress]);
if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", safe_cpu_get_pc(space->cpu), data & 15, bankaddress); if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", cpu_get_pc(space->cpu), data & 15, bankaddress);
} }
@ -1446,12 +1446,12 @@ WRITE8_HANDLER( ataxx_slave_banksw_w )
if (bankaddress >= slave_length) if (bankaddress >= slave_length)
{ {
logerror("%04X:Slave bank %02X out of range!", safe_cpu_get_pc(space->cpu), data & 0x3f); logerror("%04X:Slave bank %02X out of range!", cpu_get_pc(space->cpu), data & 0x3f);
bankaddress = 0x2000; bankaddress = 0x2000;
} }
memory_set_bankptr(space->machine, 3, &slave_base[bankaddress]); memory_set_bankptr(space->machine, 3, &slave_base[bankaddress]);
if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", safe_cpu_get_pc(space->cpu), data, bankaddress); if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", cpu_get_pc(space->cpu), data, bankaddress);
} }

8
src/mame/machine/midwayic.c
View File

@ -745,7 +745,7 @@ static UINT16 ioasic_fifo_r(const device_config *device)
/* main CPU is handling the I/O ASIC interrupt */ /* main CPU is handling the I/O ASIC interrupt */
if (ioasic.fifo_bytes == 0 && ioasic.has_dcs) if (ioasic.fifo_bytes == 0 && ioasic.has_dcs)
{ {
ioasic.fifo_force_buffer_empty_pc = safe_cpu_get_pc(ioasic.dcs_cpu); ioasic.fifo_force_buffer_empty_pc = cpu_get_pc(ioasic.dcs_cpu);
if (LOG_FIFO) if (LOG_FIFO)
logerror("fifo_r(%04X): FIFO empty, PC = %04X\n", result, ioasic.fifo_force_buffer_empty_pc); logerror("fifo_r(%04X): FIFO empty, PC = %04X\n", result, ioasic.fifo_force_buffer_empty_pc);
} }
@ -775,7 +775,7 @@ static UINT16 ioasic_fifo_status_r(const device_config *device)
/* sure the FIFO clear bit is set */ /* sure the FIFO clear bit is set */
if (ioasic.fifo_force_buffer_empty_pc && device == ioasic.dcs_cpu) if (ioasic.fifo_force_buffer_empty_pc && device == ioasic.dcs_cpu)
{ {
offs_t currpc = safe_cpu_get_pc(ioasic.dcs_cpu); offs_t currpc = cpu_get_pc(ioasic.dcs_cpu);
if (currpc >= ioasic.fifo_force_buffer_empty_pc && currpc < ioasic.fifo_force_buffer_empty_pc + 0x10) if (currpc >= ioasic.fifo_force_buffer_empty_pc && currpc < ioasic.fifo_force_buffer_empty_pc + 0x10)
{ {
ioasic.fifo_force_buffer_empty_pc = 0; ioasic.fifo_force_buffer_empty_pc = 0;
@ -933,7 +933,7 @@ READ32_HANDLER( midway_ioasic_r )
} }
if (LOG_IOASIC && offset != IOASIC_SOUNDSTAT && offset != IOASIC_SOUNDIN) if (LOG_IOASIC && offset != IOASIC_SOUNDSTAT && offset != IOASIC_SOUNDIN)
logerror("%06X:ioasic_r(%d) = %08X\n", safe_cpu_get_pc(space->cpu), offset, result); logerror("%06X:ioasic_r(%d) = %08X\n", cpu_get_pc(space->cpu), offset, result);
return result; return result;
} }
@ -958,7 +958,7 @@ WRITE32_HANDLER( midway_ioasic_w )
newreg = ioasic.reg[offset]; newreg = ioasic.reg[offset];
if (LOG_IOASIC && offset != IOASIC_SOUNDOUT) if (LOG_IOASIC && offset != IOASIC_SOUNDOUT)
logerror("%06X:ioasic_w(%d) = %08X\n", safe_cpu_get_pc(space->cpu), offset, data); logerror("%06X:ioasic_w(%d) = %08X\n", cpu_get_pc(space->cpu), offset, data);
switch (offset) switch (offset)
{ {